JP3226250B2 - Transfer mask - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transfer mask used for electron beam exposure, ion beam exposure and the like.

[0002]

2. Description of the Related Art At present, electron beam lithography, ion beam lithography, X-ray lithography and the like have been attracting attention as a manufacturing technology for next-generation sub-half micron or quarter micron ultra-miniaturized devices. Whether it will become mainstream is still unclear.

Under these circumstances, as a mask for electron beam exposure and ion beam exposure, a pattern to be exposed was formed by making holes (through holes, openings) in a metal foil such as Si, Mo, Al, or Au. Transfer mask (Stencil mask; Sten
cil mask) has been developed and is being partially put into practical use, but has not yet reached mass production.

[0004] In particular, in electron beam lithography in which a pattern is drawn using an electron beam, portions corresponding to portions obtained by dividing a pattern to be exposed, which are called collective exposure, block exposure or cell projection exposure, are used. Using a mask in which various transmission figures (openings) are formed, an electron beam is formed through these openings, a predetermined section (block or cell) is partially exposed, and this operation is repeated to draw. In recent years, a writing method has been proposed, which has rapidly emerged as a next-generation LSI technology and is in the spotlight. The drawing method using the partial batch exposure is a direct drawing method (so-called single-stroke writing method) in which an exposure pattern is scanned with an electron beam (thin beam spot) that has already been put into practice and drawing is performed.
Is a method devised to cope with an extremely long drawing time and a low throughput, which is a problem in the method described above, and a high-speed drawing is possible as compared with a direct drawing method using a variable rectangle.

[0005] Transfer masks used for such partial batch exposure have been conventionally manufactured by various methods.
In general, it is manufactured by processing a silicon substrate (a commercially available silicon wafer or the like) from the viewpoint of processability and strength. Specifically, for example, the back surface of the silicon substrate is etched to form a support frame portion and a thin film portion supported by the support frame portion,
An opening is formed in this thin film portion to produce a transfer mask.

[0006] In such a transfer mask made of silicon alone, the silicon thin film portion in which an opening is formed as it is has poor durability against an electron beam. Therefore, gold (Au), tungsten or the like is usually provided on the silicon thin film portion. (W), a metal layer such as platinum (Pt) is formed to improve the durability of the mask during electron beam irradiation. In addition, since these metals are good conductors and have excellent electron conductivity and heat conductivity, they contribute to the prevention of beam shift due to charging (charge-up) and the effect of preventing thermal distortion of the mask due to heat generation. Furthermore, since these metals have excellent shielding properties against electron beams and act as energy absorbers, the silicon thin film portion can be made thinner, so that the opening accuracy is improved and the effect of the opening side walls on the electron beams is reduced. Can be reduced.

[0007]

However, the metal layer formed on the silicon thin film portion has the following problems.

That is, in Au, the linear expansion coefficient of Au is significantly different from that of silicon.
Since the mask is distorted by stress or a diffusion reaction occurs in which Au diffuses into silicon, there is a problem that the stability and durability of the mask are lacking. Further, since it is difficult to dry-etch Au, it is only possible to form an Au layer by a thin-film forming method after forming an opening, and there is a problem that the opening accuracy is impaired and the process is greatly restricted.

[0009] Further, W has almost the same linear expansion coefficient as silicon, but is excellent in stability because it easily forms an oxide layer on the surface and has poor chemical resistance to acids. There is a problem that it is difficult to remove organic substances such as carbon adhered as contaminants in a vacuum apparatus by acid cleaning. Further, similarly to Au, there is a problem that a diffusion reaction occurs with silicon.

Furthermore, Pt has a problem that the thermal conductivity is lower than that of silicon and the coefficient of linear expansion is twice as large as that of silicon. . Further, similarly to Au, since dry etching is difficult, there is a problem that aperture accuracy is impaired and process restrictions are large.

The present invention has been made in view of the above problems, and has as its object to provide a transfer mask having a metal layer satisfying various required characteristics as a metal layer and having excellent practicability such as durability. I do.

[0012]

In order to achieve the above object, a transfer mask according to the present invention comprises an electron beam exposure or ion beam exposure in which an opening is formed in a thin film portion supported by a support frame.
A transfer mask used for at least Ru (ruthenium), Re (rhenium), Pt (platinum), Au (gold), Rh (rhodium),
An iridium alloy layer containing one or more metals selected from Pd (palladium), W (tungsten), Ta (tantalum), Mo (molybdenum), Nb (niobium), and iridium ( but tungsten, tantalum, molybdenum)
Metal selected from den, platinum and iridium
Configuration is provided an iridium alloy layer is excluded) containing, or a transfer mask obtained by forming an opening in the thin film portion supported by the support frame portion, at least, a tungsten layer / iridium alloy layer on the transfer surface of the mask or A laminated layer composed of an iridium alloy layer / tungsten layer / iridium alloy layer, or a laminated layer composed of a tantalum layer / iridium alloy layer or an iridium alloy layer / tantalum layer / iridium alloy layer (where the iridium alloy layer is a tungsten
Selected from Ten, Tantalum, Molybdenum and Platinum
Excluding iridium alloy layers containing metal and iridium,
Iridium alloy layer ).

[0013] In the transfer mask of the present invention, in the transfer mask, the iridium alloy layer or the laminated layer may be formed as follows.
The structure formed on the side and / or back side of the transfer mask , wherein the iridium alloy layer comprises: (1) iridium and an alloy component other than the iridium;
Intermetallic compounds (boron, charcoal
Silicon, germanium, antimony, selenium, etc.
Also included are) (only if or interstitial compound containing non-metallic
And iridium, tungsten, tantalum, molybdenum
And intermetallic compounds with metals selected from platinum and platinum.
Ku), and (2) a compound layer containing an iridium alloy component, (3) an iridium alloy layer containing Au-Sn alloy, (4) the substrate surface is tantalum (Ta) and nitrogen (N)
Iridium alloy-based compound that contains
Formed so that alloy components and nitrogen become zero
(5) An iridium alloy-based compound layer , or (5) an iridium alloy whose substrate interface is an iridium alloy and has an inclined structure such that the alloying component becomes zero as the deposition proceeds.
A transfer mask formed by forming an opening in the thin film portion supported by the support frame portion, wherein the silicon substrate,
A structure in which an SOI substrate or a SIMOX substrate is formed by etching, or a transfer mask in which the transfer mask is formed by forming an opening in a thin film portion supported by a support frame portion, and then formed by a thin film forming method. The structure is such that an iridium alloy layer or a laminated layer is formed, or an opening is formed after forming an iridium alloy layer or a laminated layer on a substrate before forming an opening.

Hereinafter, the present invention will be described in detail. The transfer mask of the present invention is, for example, as shown in FIG.
2 is a transfer mask in which an opening 11 is formed in the thin film portion 13 supported by the iridium alloy layer 2 at least on the transfer mask surface.

The transfer mask of the present invention is prepared by processing a silicon substrate or the like by various conventionally known methods to produce a transfer mask made of silicon or the like having an opening formed in a thin film portion supported by a support frame. It can be obtained by forming an iridium alloy (layer) on the surface of the transfer mask by a thin film forming method.

The transfer mask of the present invention can also be obtained by forming an opening after forming an iridium alloy layer on the substrate before forming the opening.

The iridium alloy layer 2 does not need to be formed on the entire surface of the transfer mask, but may be formed on the surface of the thin film other than the opening.

The transfer mask formed by forming an opening in the thin film portion supported by the support frame may be a transfer mask manufactured by various conventionally known methods. The configuration and the like are not particularly limited. The method for manufacturing the transfer mask of the present invention will be described later in detail.

The iridium (Ir) alloy layer formed on the surface of the transfer mask satisfies all the characteristics required for the metal layer formed on the surface of the transfer mask.
Electrical resistance, thermal conductivity, coefficient of linear expansion, etc.)

Here, since the iridium alloy has a high density, the depth of penetration of electrons (that is, the range) with respect to the acceleration voltage when irradiating an electron beam can be reduced.

The iridium alloy layer is made of Ru (ruthenium), Re (rhenium), Pt (platinum), Au (gold),
Rh (rhodium), Pd (palladium), W (tungsten), Ta (tantalum), Mo (molybdenum), Nb
This is an alloy layer containing one or more metals selected from (niobium) and iridium as main components. The proportion of alloy components other than iridium in the iridium alloy is adjusted so that the material characteristics of the iridium alloy are optimal. Since the preferable ratio of the alloy component varies depending on the type of the alloy component, the ratio is adjusted so as to be optimal according to the type of the alloy component.

The iridium alloy layer may be an intermetallic compound (a type of alloy) of iridium and an alloy component other than the above-mentioned iridium.
It includes nonmetals such as carbon, silicon, germanium, antimony, and selenium, and interstitial compounds. The iridium alloy layer may be a metal compound containing the iridium alloy component and at least one element of oxygen, nitrogen, and carbon. By adjusting the components other than iridium, the ratio thereof, and the like, the material characteristics of the iridium alloy layer, the adhesion to the substrate, and the like can be controlled.

The iridium alloy layer may be a single layer of the iridium alloy layer, or may be a laminated layer composed of an iridium alloy layer / tungsten layer / iridium alloy layer (sandwich structure) or a tungsten layer / iridium alloy layer. The iridium alloy layer may have an inclined structure in which the substrate interface is an iridium alloy and alloy components other than iridium become zero as the deposition proceeds. Thus, the surface oxidation preventing effect, the adhesion to the substrate, the diffusion preventing effect, and the like can be controlled.

Further, a buffer layer such as an oxide or a metal may be provided between the Si and the Ir alloy layer to control the adhesion to the substrate.

The thickness of the iridium alloy layer is 0.02 to 5
It is appropriate to set it in the range of μm (200 to 50,000 angstroms). When the thickness of the iridium alloy layer is 0.
If the thickness is less than 02 μm, the durability to electron beams is poor, and if it exceeds 5 μm, film formation becomes difficult, and
It becomes difficult to control the film stress, and it becomes difficult to perform high-precision dry etching.

The method for forming the iridium alloy layer is not particularly limited, and examples thereof include a thin film forming method such as an ion beam evaporation method, a vacuum evaporation method, a sputtering method, and an ion plating method. The method for forming the iridium alloy layer is appropriately selected in consideration of film quality (density, crystal structure, defect-freeness, and the like of the film), cost, and the like.

The iridium alloy layer and the like are formed not only on the transfer mask surface but also on the side and / or back side of the transfer mask (including the tapered portion on the back surface of the substrate and the back side of the thin film portion) and on the side wall of the opening. It may be formed. This is SOI
When a transfer mask is manufactured using a substrate or the like, the iridium alloy layer on the surface of the transfer mask is electrically insulated by the SiO ₂ layer which is a dielectric, so that charge-up easily occurs, and the SiO ₂ layer is thermally Since the conductivity is poor, the mask may generate heat. In order to solve these problems, an iridium alloy layer is also formed on the side surface and the back surface (including the back surface side of the thin film portion) of the transfer mask on which the SiO ₂ layer is not formed to conduct (contact) with the front surface side. To deal with the problem.

In this case, for example, an Ir alloy / W is applied to the surface irradiated with the electron beam to prevent surface oxidation and diffusion.
A laminated layer of a sandwich structure made of a / Ir alloy is formed, and since there is no need to prevent diffusion on the other surface that is not irradiated with an electron beam, a laminated layer made of a W / Ir alloy or a metal good conductor layer other than the Ir alloy is used. It may be formed.

Next, a method of manufacturing the transfer mask of the present invention will be described.

As described above, the transfer mask of the present invention
Processing a silicon substrate etc. by various conventionally known methods,
After a transfer mask made of silicon or the like having an opening formed in the thin film portion supported by the support frame is formed, an iridium alloy (layer) can be formed on the surface of the transfer mask by a thin film forming method. Here, the following methods are mentioned as conventionally known various methods.

For example, an SOI (Silicon on Insulat) having a structure in which _two silicon plates are bonded via an SiO ₂ layer.
or) a method of forming a silicon thin film portion using a substrate with an SiO ₂ layer as an etching stop layer (etching stopper layer) (Japanese Patent Laid-Open No. Hei 6-130655), and a method of forming an opening (opening) pattern portion using a silicon substrate. A method of forming by electric discharge machining (JP-A-5-217876), or a method of applying a photosensitive glass on a silicon substrate and using the photosensitive glass as a mask material to omit the resist process (JP-A-4-240719) No.) and the like.

[0032] Among these various production methods,
Considering the durability of the thin film portion during the production of the transfer mask and the processing accuracy of the opening, an SOI substrate is used as the substrate.
Generally, a method is used in which the opening pattern portion is processed with high precision by dry etching, and the back surface portion of the substrate corresponding to the opening is processed by wet etching (wet etching). More specifically, for example, Si / SiO ₂
/ SOI substrate having a multilayer structure of
After forming a dry etching (trench etching) mask layer made of SiO ₂ on the side of the opening pattern forming surface of the I-substrate, the entire substrate is covered with a silicon nitride layer. There is a method of forming a thin film portion by wet etching, removing the silicon nitride layer, and then performing dry etching on the opening pattern side.

On the contrary, it is also possible to use a method in which the opening sequence is processed first and then the back surface of the substrate is processed by changing the process order. Further, a method using a boron layer as an etching stopper layer can also be used (Japanese Patent Laid-Open No.
No. -76216).

The transfer mask of the present invention can also be obtained by forming an opening after forming an iridium alloy layer on the substrate before forming the opening. This manufacturing method (hereinafter, referred to as the present method) is a method (Japanese Patent Application No. Hei.
336909), which will be described in detail below.

Although the present method includes a plurality of steps and the order of these steps can be arbitrarily determined according to the purpose, the description will be made in accordance with one of the steps for convenience of explanation.

FIG. 3 is a process explanatory view showing an example of a process for manufacturing a transfer mask. As shown in FIG. 3, first, an iridium alloy layer 2 is formed on the surface of the substrate 1 (FIG. 3A) (FIG. 3).
(B)). Here, as the substrate material, Si, Mo, A
l, Au, Cu, etc., from the viewpoint of chemical resistance, processing conditions, dimensional accuracy, etc., a silicon substrate, SOI substrate, SIMOX in which oxygen ions are implanted at a high concentration into a silicon substrate or the like to form an oxide film by heat treatment. (Separation by im
It is preferable to use a planted oxygen (substrate) substrate or the like. Note that when a silicon substrate doped with phosphorus or boron is used, electron conductivity and the like of the silicon substrate can be improved.

The iridium alloy layer 2 is formed by using the above-mentioned various thin film forming methods.

Next, an SiO ₂ layer (an etching mask layer of the iridium alloy layer) 3 is formed on the iridium alloy layer 2 (FIG. 3C). Here, the SiO ₂ layer 3 may be formed only on the iridium alloy layer 2, but in consideration of the warpage of the substrate 1, both sides of the substrate have well-balanced thicknesses (for example,
(0.5 to 3.0 μm).

As a method for forming the SiO ₂ layer, a sputtering method, a vapor deposition method, a thermal oxidation method, a CVD method, or an SOG (spin
On-glass), photosensitive glass, photosensitive SOG, and the like.

Next, the SiO ₂ layer 3 is patterned into a desired shape by using a lithography technique. Specifically, for example, a resist is applied on the SiO ₂ layer 3, a resist pattern (not shown) is formed by exposure and development, and the resist pattern is used as a mask to form the SiO ₂ layer 3.
Is etched to form a resist pattern on the SiO ₂ layer 3.
(FIG. 3 (c)).

In this case, considering the pattern accuracy, S
The etching of the iO ₂ layer 3 is performed using a fluorocarbon gas (C
It is preferable to perform dry etching using F ₄ , C ₂ F ₆ , CHF ₃ or the like as an etching gas.

Next, after the resist is removed, the iridium alloy layer 2 and the surface of the substrate 1 are subjected to trench etching (etching into a deep groove shape) by dry etching using the patterned SiO ₂ layer 3 as a mask. Transfer _two patterns to these (Fig. 3
(D)).

In this case, the depth of the trench etching on the surface of the substrate 1 is set to a predetermined depth (for example, 5 to 30 μm) so as to form a thin film portion having a predetermined thickness.

The etching gas used for dry etching is not particularly limited. For example, as an etching gas for an iridium alloy, a fluorocarbon-based gas (S
F ₆ / O ₂ mixed gas, SF ₆ / Cl ₂ mixed gas, CF ₄ / O ₂
Mixed gas, CBrF ₃ gas, etc.), and HBr gas, Cl ₂ / O ₂
A mixed gas, a mixed gas of SiCl ₄ / N _{2 and the} like can be given. Note that the iridium alloy layer and the silicon substrate may be continuously etched with the same etching gas using SF ₆ gas or the like.

By continuously etching the iridium alloy layer and the silicon substrate as described above, the opening including the iridium alloy layer can be formed in one step and in a short time by continuous dry etching. And can be performed with high precision and ease.

Next, after removing the unnecessary SiO ₂ layer 3 with a stripping solution (buffered hydrofluoric acid, dilute hydrofluoric acid, etc.), a wet etching mask layer 4 is formed on the back surface of the substrate, and this wet etching mask is formed. The layer 4 is patterned by a lithography technique (FIG. 3E).

However, when the SiO ₂ layer is also formed on the back surface, the SiO ₂ layer on the back surface can be used as it is as a wet etching mask layer depending on the type of the wet etching solution. SiO
_It may be used as it is without removing the _two layers.

Here, the wet etching mask layer 4
Is a metal simple substance such as tungsten, zirconium, titanium, chromium, nickel, silicon, or an alloy containing these metals, or these metals or alloys and oxygen,
It is preferable to use a metal compound containing at least one element of nitrogen and carbon. This is because these metal systems can be patterned by low-temperature wet etching, and the removal of these metal systems can be performed at 100 ° C.
This is because the following low-temperature wet etching can be performed, so that the thin film portion is not damaged during these processes.

As the wet etching mask layer 4, an inorganic layer such as SiO ₂ , SiC, Si 3 N 4, sialon (composite mixture of Si and Al), and SiON can be used.

The wet etching mask layer 4 may be formed by a thin film forming method such as a sputtering method, a vapor deposition method, or a CVD method. If the film quality is poor, an etchant is impregnated into the silicon substrate to etch holes (etch pits). It is preferable to control the film forming conditions and the like from the viewpoint of avoiding the occurrence of cracks, and from the viewpoint of avoiding damage such as cracks due to thermal stress in high-temperature film formation.

The thickness of the wet etching mask layer 4 is
Suitably, it is in the range of 0.1 to 1 μm. If the thickness of the wet etching mask layer 4 is less than 0.1 μm, the silicon substrate cannot be completely covered. If the thickness exceeds 1 μm, it takes a long time to form the film and the influence of the film stress increases.

The patterning of the wet etching mask layer 4 is specifically performed as follows.
A resist is coated thereon, and a resist pattern (not shown) is formed by a lithography method. Using this resist pattern as a mask, the wet etching mask layer 4 is wet-etched with an etching solution to be patterned (FIG. 3E )).

The etchant used for wet etching is not particularly limited. For example, a 4% dilute aqueous solution of hydrofluoric nitric acid is used as an etchant for titanium, and ceric ammonium nitrate / perchlorate is used as an etchant for chromium. Aqueous solutions and the like, ferric chloride and the like as nickel etching liquids, and red blood salt (potassium ferricyanide) aqueous solution and the like as tungsten etching liquids.

Next, a low-temperature curable resin layer 5 is formed on the surface and side surfaces of the substrate, and is cured by heating or leaving it at room temperature (FIG. 3E). The low-temperature curable resin layer 5 plays a role as a protective layer in a portion other than the back surface of the substrate when the back surface of the substrate is subjected to wet etching.

Here, it is preferable to use a resin that cures at a low temperature of 200 ° C. or less as the low-temperature curing resin. When the curing temperature exceeds 200 ° C., distortion and breakage of the thin film portion and the like occur due to the influence of thermal stress during the curing process. In order to more completely avoid the influence of such thermal stress, it is more preferable to use a resin that cures at room temperature.

Examples of such a low-temperature curing resin include resins containing at least one of fluorine resin, ethylene resin, propylene resin, silicon resin, butadiene resin, and styrene resin.

A low-temperature cured resin layer 5 is formed on the surface and side surfaces of the substrate.
Examples of a method for forming a film include a spin coating method, a dipping method, and a spraying method, and the spin coating method is preferable in consideration of handling, work efficiency, and the like. The coating on the side surface of the substrate is performed by, for example, wrapping the resin around the side surface of the substrate during the initial low-speed rotation in the spin coating method.

It is appropriate that the thickness of the low-temperature curing resin layer 5 is 30 μm or more. The thickness of the low-temperature curing resin layer 5 is 3
If the thickness is less than 0 μm, the durability to an etching solution and the function as a protective layer become poor.

The low-temperature curable resin layer does not affect other parts due to thermal stress when it is formed or removed.
It can be easily formed by a spin coating method or the like, has excellent step coverage, and can completely prevent liquid erosion of an etching solution. Therefore, it contributes to stably and easily manufacturing the transfer mask.

Next, the back surface of the substrate on which the low-temperature curable resin layer 5 has been formed is immersed in an etchant, and the back surface of the substrate is etched (FIG. 3F). Here, examples of the etchant include an aqueous alkaline solution such as KOH and NaOH, an aqueous alkaline solution containing alcohol and the like, and an alkaline solution such as an organic alkali.

The etching temperature is preferably set to a low temperature of 150 ° C. or less, more preferably 110 ° C. or less, in order to avoid the influence of thermal stress.
Examples of the etching method include a dipping (dipping) method.

In this method, since the etching amount (depth) on the back surface of the substrate can be controlled by controlling the etching time, an etching stopper layer (SiO ₂ , boron, etc.) on an SOI substrate or the like becomes unnecessary, and therefore, bare Silicon (ordinary silicon substrate) can be used, which can contribute to cost reduction.

Finally, the unnecessary low-temperature curing resin layer 5 is removed with an organic solvent or the like, and the wet etching mask layer 4 is similarly removed with an etching solution or the like to obtain a transfer mask (FIG. 3E). )). At this time, the removal temperature of these layers is preferably set to a low temperature of 100 ° C. or less, more preferably room temperature, in order to avoid the influence of thermal stress.

Although the transfer mask manufacturing method of the present method includes a plurality of steps as described above, the order of these steps is not limited, and the order of the steps can be arbitrarily determined according to the purpose. The feature is that it can be done, and the degree of freedom is high. For example, the back surface processing may be performed first, and the opening may be formed later.

Further, a transfer mask can be manufactured by combining some of the steps of the present method and a conventionally known step (including a part) of manufacturing a transfer mask.

The present invention will be described below in more detail with reference to examples.

Example 1 FIG. 1 is a process explanatory view showing an example of a process for manufacturing a transfer mask of the present invention. As shown in FIG. 1, an inorganic layer (SiO ₂ ) is formed on both sides of a phosphorus (P) -doped silicon substrate 1 (FIG. 1A).
Layer) (not shown), pattern the inorganic layer by lithography, dry-etch from the front side to form openings 11, and wet-etch from the back side to form the support frame 12 Was formed, and the unnecessary inorganic layer was removed with buffered hydrofluoric acid or the like to obtain a transfer mask consisting only of silicon (FIG. 1B).

Then, palladium (Pd) was deposited on the transfer mask surface by electron beam (EB) vapor deposition.
% Of the iridium alloy layer 2 having a thickness of 1 μm to obtain a transfer mask. In this case, by adding palladium, fine grains (particles) can be obtained, and the adhesion characteristics with the silicon substrate are improved. As described above, a high-density film can be formed, and at the same time, the adhesion characteristics to the silicon substrate have been improved. Therefore, the EB durability has been further improved as compared with the case of using Ir alone.

The obtained transfer mask was mounted on an electron beam exposure apparatus, and a drawing test was performed. As a result, it was confirmed that the transfer mask was excellent in drawing accuracy and durability and high in practicality.

Embodiment 2 FIG. 2 is a process explanatory view showing another example of the process of manufacturing the transfer mask of the present invention. As shown in FIG. 2, an etching mask layer patterned by lithography is formed on the back surface of the boron (B) -doped silicon substrate 1 (FIG. 2 (a)), and wet etching is performed from the back surface side to form a thin film. The part 13 was formed (FIG. 2B).

Next, an Ir alloy 2a / W2b / Ir alloy 2c layer 2 having a sandwich structure is formed on the surface of the substrate 1 (FIG. 2C). The above Ir alloy / W / Ir alloy layer 2
₂ was formed thereon, and the SiO ₂ layer 3 was patterned using a lithography technique using a resist and a dry etching technique (FIG. 2).
(D)).

Thereafter, the Ir alloy / W / Ir alloy layer 2 is etched by dry etching using the patterned SiO ₂ layer 3 as a mask (FIG. 2).
(E)) Subsequently, an opening pattern was formed by performing trench etching on the surface of the silicon substrate 1 (FIG. 2).
(E)). A fluorocarbon-based gas (CF ₄ / O ₂ ) is used as an etching gas for the Ir alloy / W / Ir alloy layer 2, and C is used as an etching gas for the surface of the silicon substrate 1.
Using l ₂ / SF ₆ gas mixture.

Finally, the unnecessary SiO ₂ layer 3 was removed with buffered hydrofluoric acid or the like to obtain a transfer mask (FIG. 1).
(F)).

In the transfer mask, since the opening including the metal layer is formed by continuous dry etching, a transfer mask having an opening with higher precision than when the metal layer is formed after the opening is obtained. I was able to. The obtained transfer mask was mounted on an electron beam batch exposure apparatus, and a drawing test was performed. As a result, it was confirmed that the transfer mask had excellent drawing accuracy and durability and was highly practical.

Embodiment 3 FIG. 3 is a process explanatory view showing another example of the process of manufacturing the transfer mask of the present invention. As shown in FIG. 3, on the surface of the phosphorus (P) -doped silicon substrate 1 (FIG. 3 (a)), the substrate interface is an iridium alloy-based compound containing tantalum (Ta) and nitrogen (N). An iridium alloy-based compound layer 2 was formed with a thickness of 2 μm by sputtering so that the alloy components and nitrogen become zero as the process proceeds.
(FIG. 3 (b)). In addition, when the substrate interface is made of an Ir alloy in this way, the adhesion characteristics with the substrate are further improved, and
Since the surface is Ir, it is excellent in various required characteristics as a metal layer.

[0075] Next, on the iridium alloy compound layer 2, to form a SiO ₂ layer 3 in a thickness of 3 [mu] m, the SiO ₂
The layer 3 was patterned using a lithography technique using a resist and a dry etching technique (FIG. 3C).

Thereafter, the patterned SiO 2
_{Using the second} layer 3 as a mask, the iridium alloy-based compound layer 2 was etched by dry etching, followed by trench etching on the surface of the silicon substrate 1 to form an opening pattern (FIG. 3D). Incidentally, by using a chlorine-based gas (Cl2 _/ O ₂₎ as etching gas iridium alloy compound layer 2, using SiCl ₄ / SF ₆ / Cl ₂ gas mixture as the etching gas of the silicon substrate 1 surface.

Next, an SiC layer (etching mask layer) 4 having a thickness of 2000 angstroms is formed on the back surface of the substrate 1 and a rubber-based resin (ethylene / propylene or the like) is formed on the front and side surfaces of the substrate as a protective layer against etching.
Is applied in a thickness of 300 μm to form a resin layer 5,
The resin layer 5 was cured by heating at 0 ° C. (FIG. 3)
(E)).

The SiC layer 4 formed on the back surface of the substrate 1 was patterned using a lithography technique using a resist and a dry etching technique (FIG. 3).
(E)). Using the patterned SiC layer 4 as a mask, the back surface of the silicon substrate 1 was wet-etched until it reached the opening pattern (FIG. 3 (f)).

Finally, the unnecessary SiC layer 4, Si
The O ₂ layer 3 and the resin layer 5 were removed to obtain a transfer mask (FIG. 3F).

In the transfer mask, since the opening including the metal layer is formed by continuous dry etching, a transfer mask having an opening with higher precision than when coating the metal layer after forming the opening is obtained. I was able to. By adding nitrogen, the film stress could be further reduced, and a more accurate transfer mask could be formed.

The obtained transfer mask was mounted on an electron beam batch exposure apparatus, and a drawing test was performed. As a result, it was confirmed that the transfer mask was excellent in drawing accuracy and durability and high in practicality.

The erosion (especially the opening) of the etching solution during the wet etching of the back surface of the substrate was completely prevented by the low-temperature curing resin layer. In addition, the influence of thermal stress could be avoided throughout the entire process, and no damage or the like occurred during the process, and the transfer mask could be manufactured stably.

Embodiment 4 FIG. 4 is a process explanatory view showing another example of the process of manufacturing the transfer mask of the present invention. As shown in FIG. 4, the entire surface (all surfaces) of the phosphorus (P) -doped silicon substrate 1 having a thickness of 500 μm has C
An SiC layer (etching mask layer) 4 having a thickness of 0.2 μm was formed by the VD method (FIG. 4A).

Subsequently, the back surface SiC layer 4 is patterned by lithography using a resist, and the patterned back surface SiC layer 4 is
The back surface of the substrate 1 was etched into a predetermined size and shape with an OH aqueous solution to form a support frame portion and a thin film portion (FIG. 4B).

Next, after removing the SiC layer 4, the substrate 1
An SiO ₂ layer 3 having a thickness of 2 μm was formed on the surface by a sputtering method, and patterning was performed on a region on the thin film portion of the SiO ₂ layer 3 using a lithography technique using a resist and a dry etching technique (FIG. 4). (C)).

Thereafter, the patterned SiO 2
_{Using the second} layer 3 as a mask, the thin film portion of the silicon substrate 1 was etched by dry etching to form an opening pattern (FIG. 4D).

Further, the unnecessary SiO ₂ layer 3 was removed with buffered hydrofluoric acid or the like to obtain a transfer mask consisting only of silicon (FIG. 4E).

Next, an iridium alloy layer 2 containing 5% of an Au—Sn alloy is formed to a thickness of 1 μm on the obtained transfer mask surface by an ion plating method, and subjected to a heat treatment in a reducing atmosphere to perform transfer. The mask was obtained (Fig. 4
(F)).

The obtained transfer mask was mounted on an electron beam exposure apparatus, and a drawing test was carried out. As a result, it was confirmed that the transfer mask had excellent drawing accuracy and durability and was highly practical.

Embodiment 5 FIG. 5 is a process explanatory view showing another example of the process of manufacturing the transfer mask of the present invention. As shown in FIG. 5, a 3 μm thick SiO 2 layer 3 was formed on the entire SOI substrate 1 (entire surface) by a CVD method (FIG. 5A).

Subsequently, the back surface SiO 2 layer 3 is patterned by a lithography method using a resist, and using the patterned back surface SiO 2 layer 3 as a mask, ethylenediamine / pyrocatechol (catechol)
The support frame portion and the thin film portion were formed by etching the back surface of the substrate 1 into a predetermined size and shape using a mixed aqueous solution consisting of / water (FIG. 5B).

Next, patterning was performed on a region on the thin film portion of the SiO ₂ layer 3 on the surface of the substrate by using a lithography technique using a resist and a dry etching technique (FIG. 5C).

Thereafter, the patterned SiO 2
_{Using the two} layers 3 as a mask, the thin film portion of the silicon substrate 1 was etched by dry etching to form an opening pattern (FIG. 5D).

Further, the unnecessary SiO ₂ layer 3 and the SiO ₂ layer in the SOI were removed with buffered hydrofluoric acid to obtain a transfer mask made of silicon (FIG. 5E).

Next, an iridium alloy layer 2 containing 5% rhodium (Rh) was formed to a thickness of 0.5 μm on the surface of the obtained transfer mask by a vacuum evaporation method to obtain a transfer mask (FIG. 5 ( f)).

The obtained transfer mask was mounted on an electron beam exposure apparatus, and a drawing test was carried out. As a result, it was confirmed that the transfer mask had excellent drawing accuracy and durability and was highly practical.

While the present invention has been described with reference to the preferred embodiments, the present invention is not necessarily limited to the above-described embodiments. For example, similar results were obtained when a SIMOX substrate was used instead of the SOI substrate. In addition, when an iridium alloy layer was formed on the mask side surface and the back surface in addition to the mask surface, an excellent charge-up preventing effect was exhibited.

The transfer mask of the present invention can be used not only as an electron beam exposure mask but also as an ion beam exposure mask.

[0099]

As described above, the transfer mask of the present invention has a metal layer that satisfies various required characteristics as a metal layer, and is excellent in practicality such as durability.

[Brief description of the drawings]

FIG. 1 is a process explanatory view showing an example of a process for manufacturing a transfer mask according to the present invention.

FIG. 2 is a process explanatory view showing another example of a process for manufacturing a transfer mask according to the present invention.

FIG. 3 is a process explanatory view showing another example of a process for manufacturing a transfer mask according to the present invention.

FIG. 4 is a process explanatory view showing another example of a process for manufacturing a transfer mask according to the present invention.

FIG. 5 is a process explanatory view showing another example of a process of manufacturing a transfer mask according to the present invention.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 substrate 2 iridium alloy layer 3 SiO ₂ layer 4 etching mask layer 5 resin layer 11 opening 12 support frame 13 thin film

Claims (6)

(57) [Claims] 1. A transfer mask comprising an opening formed in a thin film portion supported by a support frame portion, wherein at least Ru (ruthenium), Re (rhenium), Pt (platinum), Au (gold),
Rh (rhodium), Pd (palladium), W (tungsten), Ta (tantalum), Mo (molybdenum) Nb
An iridium alloy layer containing one or more metals selected from (niobium) and iridium (excluding an iridium alloy layer containing iridium and a metal selected from tungsten, tantalum, molybdenum, and platinum) A transfer mask used for electron beam exposure or ion beam exposure, provided. 2. A transfer mask in which an opening is formed in a thin film portion supported by a support frame, wherein at least a tungsten layer / iridium alloy layer or an iridium alloy layer / tungsten layer / iridium alloy is formed on a surface of the transfer mask. laminated layer comprising a layer or a tantalum layer / iridium alloy layer or an iridium alloy layer / a tantalum layer / laminated layer consisting of an iridium alloy layer (but before
The iridium alloy layer is made of tungsten, tantalum,
Metals selected from budene and platinum, and iridium
A transfer mask used in electron beam exposure or ion beam exposure. 3. The iridium alloy layer or the laminated layer,
3. The transfer mask used for electron beam exposure or ion beam exposure according to claim 1, wherein the transfer mask is also formed on the side and / or back side of the transfer mask. 4. The iridium alloy layer comprises: (1) an intermetallic compound of iridium and an alloy component other than iridium (this intermetallic compound includes non-metals such as boron, carbon, silicon, germanium, antimony, and selenium; (Including metals and interstitial compounds) (excluding intermetallic compounds of iridium and metals selected from tungsten, tantalum, molybdenum and platinum); (2) compound layer containing iridium alloy component (3) an iridium alloy layer containing an Au-Sn alloy; and (4) an iridium alloy-based compound containing tantalum (Ta) and nitrogen (N) at the substrate interface, and the alloy components and nitrogen become zero as the deposition proceeds. Iridium alloy-based compound layer formed in an inclined manner as described above, or (5) As the substrate interface is an iridium alloy and the deposition proceeds, Claims 1 to 3 electron beam exposure or ion beam transfer mask used in the exposure, wherein the alloy components is iridium alloy layers of mound structures such as zero. 5. The transfer mask formed by forming an opening in a thin film portion supported by the support frame portion is formed by etching a silicon substrate, an SOI substrate, or a SIMOX substrate. Transfer mask used for electron beam exposure or ion beam exposure. 6. The transfer mask according to claim 1, wherein
A transfer mask formed by forming an opening in a thin film portion supported by a support frame portion, and then an iridium alloy layer or a laminated layer formed by a thin film forming method, or an iridium alloy layer or a laminated layer on a substrate before the opening is formed. A transfer mask used for electron beam exposure or ion beam exposure, wherein an opening is formed after a layer is formed.