JP4788249B2 - Stencil mask blank, stencil mask, and charged particle beam pattern exposure method using the same - Google Patents

Description

  The present invention relates to a stencil mask blank and a stencil mask used for charged particle beam exposure such as an electron beam and an ion beam, and a charged particle beam pattern exposure method using the stencil mask blank.

  In recent years, miniaturization of LSIs and the like has progressed rapidly, and development of lithography techniques for forming further fine circuit patterns of these elements has been promoted. Particularly in pattern formation with a line width of 65 nm or less, the exposure method using a conventional ArF excimer laser as an exposure light source reaches the resolution limit, making pattern formation difficult. For this reason, an immersion lithography method that fills the space between the lens and the wafer to be exposed with a medium having a higher refractive index than air and improves the effective resolution as an alternative lithography technique has attracted attention. According to this method, it is expected that a pattern of 65 nm or less, which has been difficult to form with a conventional ArF excimer laser, can be formed.

  However, when the immersion lithography method is used, the effective resolution can be improved, but the depth of focus decreases. For this reason, it becomes difficult to form a hole pattern with a high aspect ratio, and there is a possibility that the resolution limit may be reached for a fine pattern of 45 nm node or less by the immersion lithography method. In this case, a new exposure technique to replace the immersion lithography method is necessary, and one of the methods is electron beam lithography.

  Electron beam lithography is a technique that uses a charged particle beam as an exposure light source in place of an excimer laser such as ArF or KrF that has been conventionally used. In electron beam lithography, a transfer mask is irradiated with an electron beam serving as an exposure light source, and the resist on the exposure target wafer is exposed to a fine pattern by an electron beam shaped into a desired pattern by an electron beam transmission hole formed on the transfer mask. Is formed.

Among the electron beam lithography, the electron beam shaped into a desired pattern by a transfer mask reduced to 1/4 by the electromagnetic lens, EPL (E Lectron performing transfer onto the wafer
beam P rojection L ithography) are expected as the following fine pattern forming technology 45nm node, research and development has been promoted.

SOI (S ilicon O n I nsulator ) wafer is often used in the manufacture of a transfer mask used in the exposure. FIG. 2 is an explanatory view showing an example of the structure of an SOI wafer in cross section. SOI wafer as shown in FIG., A single crystal silicon as a supporting substrate wafer (hereinafter, the supporting substrate and descriptions) (203) buried oxide film as an intermediate insulating layer on (B uried ox ide layer: below BOX layer as described ) Is formed, and a single-layer silicon (201) called an active layer (hereinafter referred to as SOI layer) is formed on the silicon oxide film (202). An SOI wafer used for manufacturing an EPL transfer mask is usually a wafer having a layer structure in which a support substrate has a film thickness of 725 μm, a BOX layer has a thickness of 1 μm, and an active layer has a film thickness of about 1 μm to 2 μm. Is 8 inches.

FIG. 3 is an explanatory view showing, in cross section, an example of a transfer mask manufactured using an SOI wafer. In the figure, an opening (305) for transmitting an electron beam is formed in the support substrate, and an electron beam transmitting hole (304) for forming an electron beam in a fine pattern is formed on the active layer. As can be seen from the figure, the region where the electron beam transmission holes are formed is a single-layer free-standing film (hereinafter referred to as a membrane) having only the active layer, from which the support substrate and BOX are removed. The film thickness of the membrane is determined by the acceleration voltage of the electron beam used for exposure and the pattern size formed on the membrane. In the electron beam exposure, it is necessary to shield or sufficiently scatter the electron beam other than the electron beam transmitted through the electron beam transmitting hole. From the viewpoint of shielding the electron beam, it is desirable that the membrane is thicker. However, when the membrane thickness is increased, the aspect ratio of the electron beam transmission holes formed on the membrane also increases, so that the technical load for forming the electron beam transmission holes increases. The film thickness of the membrane is determined by the balance of these factors. In the EPL described above, the film thickness of the active layer that becomes the membrane is 1 μm to 2 μm, which is an electron that is tetraploid of the pattern size actually formed on the membrane. A line transmission hole is formed. A transfer mask having an electron beam transmission hole formed on the membrane in this way is called a stencil mask.

FIG. 4 is an explanatory view showing in cross section an example of a manufacturing process of a stencil mask using an SOI wafer. Based on the illustration shown in the figure, an example of the manufacturing process of the stencil mask will be described below. First, an SOI wafer (406) is prepared (FIG. 4 (a)), and a resist (407) for forming an opening is applied to the support substrate side (FIG. B). The resist is exposed and developed to form an opening resist pattern (408) (FIG. C). Using this resist pattern as an etching mask, the support substrate is etched by dry etching or wet etching (FIG. D). In this case, the support substrate is etched using the BOX layer as an etching stopper layer. After processing the support substrate by etching, the BOX layer is removed, the resist is peeled off to complete the opening (405), and a stencil mask blank is formed (FIG. E).
Next, an electron beam transmission hole is formed in the active layer that becomes the membrane (409). First, a resist for forming an electron beam transmission hole is applied to the active layer side, and the resist is patterned by an electron beam drawing machine or the like to form a resist pattern (410) of the electron beam transmission hole (FIG. F). The active layer is etched using this resist pattern as an etching mask to form an electron beam transmission hole (411), and then the resist is removed to complete a stencil mask (412) (FIG. G). The above-described stencil mask manufacturing method employs a method of processing an active layer that has become a membrane after processing a support substrate to form an opening, but first etches the active layer to a BOX layer, and The stencil mask can also be formed by a method of forming an opening after forming the transmission hole.
As described above, in the manufacture of a normal stencil mask, the electron beam transmission hole and the opening are formed separately. Therefore, when the electron beam transmission hole is formed on the membrane or when the support substrate is processed to form the back surface opening. Requires an etching stopper layer. An advantage of using an SOI wafer for manufacturing a stencil mask is that the active layer can be used as a membrane layer and the BOX layer can be used as an etching stopper layer. When a membrane layer and an etching stopper layer are formed on a silicon wafer by a CVD (Chemical Vapor Deposition) method, a PVD (Physical Vapor Deposition) method, etc., precise control of the film thickness of each layer and management of film defects are necessary. The number of steps and manufacturing cost for manufacturing the stencil mask increase. On the other hand, by using an SOI wafer with a high degree of technical completion as a stencil mask manufacturing wafer, it is possible to reduce the number of steps and cost for manufacturing the stencil mask. For the above reasons, SOI wafers are often used as substrates for producing transfer masks for electron beam lithography.

  By using an SOI wafer in which a membrane and an etching stopper are configured in advance, the transfer mask can be easily manufactured. However, at this time, a serious problem due to the layer configuration of the SOI wafer occurs. It is a deformation that occurs throughout the transfer mask. This deformation is roughly divided into two, one is the deformation of the SOI wafer itself due to the compressive stress of the silicon oxide film that constitutes the BOX layer, and the other is due to the stress of the SOI layer that constitutes the membrane. It is a local deformation. Hereinafter, each modification will be described.

First, the deformation of the SOI wafer itself due to the stress of the BOX layer will be described. In general, the stress of a thin film is divided into tensile stress and compressive stress. The tensile stress acts in a direction in which the film itself contracts, and the substrate on which the thin film having the tensile stress is formed is deformed into a concave shape on the thin film side. Since compressive stress exerts a force in the direction in which the thin film itself extends, the substrate after film formation is deformed into a convex shape on the thin film side. The BOX layer that causes the deformation of the SOI wafer is a compressive stress, and this compressive stress generates a deformation in a convex shape on the SOI layer side. The amount of warpage varies somewhat depending on the SOI wafer manufacturing method, but is generally determined by the stress value and film thickness of the BOX layer. The silicon oxide film constituting the BOX layer is a thermal oxide film formed by heat treatment, and the stress is a compressive stress of about 300 MPa. The amount of warpage of the entire SOI wafer varies depending on the film thickness and aperture of each layer constituting the SOI wafer. For example, in an SOI wafer used for manufacturing an EPL transfer mask, the active layer has a film thickness of 2 μm and the BOX layer has a film thickness. Assuming that the thickness of the support substrate is 725 μm, a warp in the form of swelling about 85 μm on the active layer side occurs in the entire SOI wafer.

  When the entire transfer mask is deformed for the above reason, it adversely affects the position accuracy of the electron beam transmission holes formed on the membrane. For example, the transfer mask is placed in an exposure machine in a state where it is placed in an electrostatic chuck type mask folder. However, if a transfer mask having a large warp is placed in the mask folder, the entire transfer mask is deformed. The pattern transferred using this deformed transfer mask has a significant decrease in positional accuracy and needs to be improved. However, the deformation of the entire transfer mask caused by chucking is not regular and reproducible, and must be deformed in advance. It is difficult to take correction means such as predicting and determining the position of the electron beam transmission hole.

Next, local deformation of the stencil mask generated by the stress of the SOI layer will be described. The local deformation of the stencil mask occurs due to the stress of the membrane when the support substrate and the BOX layer are processed into a stencil state. Usually, the SOI layer constituting the membrane is adjusted to have a tensile stress by an impurity implantation process or the like in order to prevent the membrane from being bent due to the compressive stress of the BOX layer. For this reason, when the membrane is formed by removing the support substrate and the BOX layer, the membrane forming region is locally deformed by the tensile stress of the membrane. In particular, since the support substrate and the BOX layer are removed in the membrane formation region, the mechanical strength is remarkably lowered and deformation due to stress is likely to occur. 5A and 5B are explanatory views of an example of an EPL stencil mask formed by a conventional method, where FIG. 5A is an explanatory view seen from a plane, and FIG. 5B is an explanatory view seen from a cross section. In particular, as shown in the figure, in the stencil mask generally used in EPL, the membrane formation region (501) occupies 34% of the SOI wafer, and a very large deformation (502) occurs due to the stress of the membrane. The local distortion generated in this way occurs in a region where correction by the electrostatic chuck (503) is impossible, and therefore mechanical correction cannot be performed. Therefore, as a result, local distortion occurs in the mask, which causes deterioration of the mask transfer accuracy.
Therefore, in order to provide a transfer mask capable of realizing high transfer accuracy, local deformation of the stencil mask due to deformation of the entire mask caused by compressive stress of the BOX layer and tensile stress of the SOI layer is provided. It is essential to suppress deformation. As a method for reducing the warpage of the entire SOI wafer caused by the compressive stress of the BOX layer, for example, a method of forming a thin film with controlled stress and film thickness on the support substrate side of the SOI wafer (see Patent Document 1), A method has been proposed in which a SiO ₂ layer formed on a support substrate of an SOI wafer is used as a warp adjusting layer. (See Patent Document 2)
Known documents are described below.
JP 2004-111828 A JP 2002-151385A.

  However, although these proposals can correct the deformation of the entire SOI wafer due to the compressive stress of the BOX layer, they are caused by the deformation of the membrane region actually irradiated with the electron beam, that is, the tensile stress of the SOI layer. It is impossible to suppress local deformation of the stencil mask.

The present invention relates to a stencil mask produced using an SOI wafer, which suppresses local deformation that occurs in the stencil mask due to membrane formation, improves the flatness of the stencil mask, and has a high transfer accuracy. An object of the present invention is to provide a stencil mask blank and a charged particle beam pattern exposure method using the mask.

The present invention has been made in view of the above problems, and the invention of claim 1 is a support substrate made of a single crystal silicon wafer , an active layer for providing a transfer pattern, and formed between the support substrate and the active layer. An embedded oxide film layer, and a local deformation prevention layer provided on the other side of the support substrate corresponding to the membrane beam, and an opening corresponding to the membrane is formed with the local deformation prevention layer. The stencil mask blank is provided on the support substrate and the buried oxide film layer, and the local deformation prevention layer suppresses local deformation due to stress of the membrane .

  In the present invention, local deformation due to the stress of the membrane is suppressed, and the pattern position shift due to the height variation of the membrane can be corrected.

The invention of claim 2 of the present invention, between the supporting substrate and the local deformation preventing layer, further, except for the opening, in claim 1, characterized in that it comprises a warp adjusting layer on the support substrate over the entire surface The stencil mask blank described is used.

The invention of claim 3 of the present invention is that the material constituting the local deformation preventing layer is one or more metals or alloys of the group consisting of silicon, titanium and tantalum, or oxides or nitrides thereof. It is set as the stencil mask blank of any one of Claims 1-2 characterized by the above-mentioned.

The invention of claim 4 of the present invention is a stencil mask characterized in that a transfer pattern is formed on the active layer by lithography using the stencil mask blank of any one of claims 1 to 3 . Is.

The invention of claim 5 of the present invention comprises a step of irradiating the stencil mask of claim 4 with a charged particle beam to form a charged particle beam in the shape of the transfer pattern. This is an exposure method.

According to the present invention, when a stencil mask is manufactured using an SOI wafer, it is possible to prevent local deformation of the stencil mask caused by membrane formation. Thereby, a transfer mask having excellent transfer accuracy can be manufactured.

  Furthermore, according to the exposure method of the present invention, accurate pattern exposure can be performed for a resist formed on the sample substrate for a long period of time, and as a result, patterns of semiconductors and the like can be manufactured with a high yield.

Hereinafter, the contents of the present invention will be described by taking a stencil mask manufacturing process as an example. FIG. 1 is a cross-sectional view illustrating an embodiment of a manufacturing process of a stencil mask blank and a mask according to the present invention. First, an SOI wafer is prepared (FIG. 1 (a)), and a local deformation prevention layer (104) is formed at a location corresponding to the membrane formation region on the support substrate (103) side (FIG. B).
After forming the local deformation preventing layer, a resist pattern (105) for opening the back surface is formed on the support substrate side (FIG. C). Using this resist pattern as an etching mask, the local deformation prevention layer is etched to form a back surface opening pattern (106) made of the local deformation prevention layer (FIG. D). The local deformation prevention layer can be etched by either a dry etching method or a wet etching method, but when patterning is performed by the wet etching method, a significant dimensional change may occur due to the occurrence of side etching. Because there is a nature, attention is necessary. Further, in the case where the material constituting the local deformation prevention layer is silicon, the manufacturing process can be shortened by processing simultaneously with the support substrate.

  Next, a back surface opening (107) of the support substrate is formed (FIG. E). Processing of the support substrate at this time can be performed by a method of etching the support substrate by a dry etching method using a resist pattern as an etching mask, or by an anisotropic wet etching method of silicon using a strong alkaline solution. In this case, if the thickness of the local deformation prevention layer is changed by etching, the amount of deformation control changes, so care must be taken not to cause fluctuations in the thickness of the local deformation prevention layer. After processing the support substrate, the BOX layer is removed to form an opening to complete the stencil mask blank (108) (FIG. F).

  Next, an electron beam resist is applied on the SOI layer that becomes the membrane, and a resist pattern of electron beam transmitting holes is formed on the surface by electron beam drawing. The membrane is processed using this resist pattern as an etching mask to form electron beam transmitting holes, and then the resist is removed to complete a stencil mask (109) (FIG. G).

  The material constituting the local deformation prevention layer is one or more metals or alloys of the group consisting of silicon, zirconium, molybdenum, gold, platinum, silver, palladium, tungsten, titanium, tantalum, hafnium, chromium, indium, or these Oxides or nitrides can be used. In particular, one or more metals or alloys of these groups consisting of silicon, titanium, and tantalum, or oxides or nitrides thereof are preferable because they can be etched together with the etching process of the silicon support substrate.

  Further, in the charged particle beam exposure method according to the present invention, it is possible to perform pattern exposure with high accuracy on a resist formed on a sample substrate, and as a result, it is possible to manufacture a pattern of a semiconductor or the like with a high yield. .

Hereinafter, the manufacturing process of the EPL transfer mask is taken as an example, and details of the embodiment will be described with reference to the drawings. FIG. 6 is an explanatory view showing, in section, an embodiment of the stencil mask blank and mask manufacturing process of the present invention. First, an SOI wafer having a diameter of 200 mm was prepared (FIG. 6A). This SOI wafer comprises an active layer (601), a BOX layer (602) and a support substrate (60).
3) Double-side polished wafers having thicknesses of 2 μm, 1 μm, and 725 μm, respectively. When the warpage of this SOI wafer was measured, deformation occurred in a form of warping by 83 μm on the SOI layer (601) side. The amount of warpage at this time is a value measured by holding a portion 5 mm from the outer peripheral portion of the SOI wafer. Further, in the measurement, in order to exclude the influence of the distortion of the SOI wafer due to gravity, the average value of the value measured with the SOI surface as the upper surface and the value measured with the support substrate side as the upper surface was defined as the warpage amount.

  An amorphous silicon layer was formed on the entire surface of the SOI substrate on the support substrate (603) side by a DC magnetron sputtering method using a polycrystalline silicon target as a warp adjustment layer (610). In this embodiment, the silicon layer is formed by DC magnetron sputtering, but the silicon layer can also be formed by other RF sputtering methods, and can also be formed by CVD or vapor deposition.

  This time, the film thickness of the amorphous silicon layer formed as the warp adjusting layer (610) was 1.5 μm, and the warpage amount of the SOI substrate immediately after the formation of the amorphous silicon layer was about 100 μm on the support substrate side. However, it was confirmed that the warpage amount of the SOI substrate after heat-treating the SOI substrate at a temperature of 250 ° C. for 1 hour has a convex shape of 3.7 μm on the active layer side. The reason for the heat treatment is that the stress of the thin film formed by sputtering is thermally unstable, so the crystallinity of the film is stabilized by heat treatment, and the stress changes due to heat treatment during the mask manufacturing process. This is to prevent this from happening.

Next, amorphous silicon was formed by a DC magnetron sputtering method as a local deformation prevention layer (604) in accordance with the membrane formation region where the strut and membrane on the support substrate (603) side of this SOI wafer were formed. At this time, it is necessary to determine the stress and film thickness of the local deformation prevention layer (604) based on the area of the membrane actually formed and the stress and film thickness of the SOI layer constituting the membrane. In this embodiment, since the stencil mask for EPL is manufactured, the membrane area is 10953 mm ² , while the strut area is 3477 mm ² . For this reason, the stress of the SOI layer measured in advance is 20 MPa, the film thickness is 2 μm, and the area ratio of the membrane region and the strut region, the film thickness of the amorphous Si serving as the local deformation prevention layer is 0.5 μm, and the stress is 200 MPa. The pressure at the time of film formation was adjusted so that the tensile stress was.

  As a method of forming the local deformation prevention layer (604), CVD, vapor deposition, plating, or the like can be used as in the warp adjustment layer (610), but it is different from the formation of the warp adjustment layer (610). The point is that the formation region of the local deformation prevention layer (604) is finally only on the strut, and patterning according to this region is required. As a patterning method, a method of forming a film only at a necessary location by a mask process at the time of film formation, or after performing a film formation on the entire surface of the support substrate, etching or a lift-off process according to a strut formation region. It is possible to use a patterning method. When the material constituting the local deformation prevention layer (604) is different from the material constituting the warpage adjusting layer, the local deformation prevention layer (604) is patterned by dry etching or wet etching using a resist mask or the like. Is also possible (FIG. B).

Next, the support substrate (603) was processed to form an opening (607) of the support substrate. A resist pattern (605) of the opening (607) is formed (FIG. C), and the support substrate (603) is etched by plasma etching using a fluorocarbon-based gas, and a BOX layer (602) serving as an etching stopper layer Etching was performed until (FIG. D). A resist LA-900 having a film thickness of 50 μm was used as an etching mask at this time, and the warpage adjusting layer (610) and the local deformation preventing layer (604) formed on the supporting substrate (603) were simultaneously processed. LA-900 used as an etching mask was removed using an organic solvent after the etching of the support substrate (603) was completed. In this embodiment, since the material constituting the warpage adjustment layer (610) and the local deformation prevention layer (604) is Si, it is possible to etch simultaneously with the support substrate, but the warpage adjustment layer (610) and the local deformation prevention layer (604) can be etched simultaneously. When the materials constituting the deformation prevention layer (604) are different, it is necessary to provide an additional etching step. In this case, it is necessary to separately optimize etching conditions so that pattern shape deterioration and dimensional change due to etching do not occur.

  Next, the BOX layer (602) used as an etching stopper layer was removed to complete a stencil mask blank (608) (FIG. E). For removing the BOX layer, hydrofluoric acid having a concentration of 5% was used.

  Next, an electron beam transmission hole was formed on the membrane. A resist for electron beam exposure was applied, and a resist pattern was completed by electron beam drawing. Using this resist pattern as an etching mask, plasma etching of a fluorocarbon-based gas was performed, and after etching, the resist was removed with an organic solvent to complete a stencil mask (609) (FIG. F).

  The amount of deformation of the membrane formation region of the transfer mask formed by the above method was measured and found to be 0.5 μm, and a normal EPL stencil mask with no local deformation prevention layer formed thereon was about 7 μm shown in the membrane formation region. It was confirmed that the flatness can be greatly improved with respect to the amount of deformation. Actually, when a transfer test was performed using the present stencil mask subjected to the local deformation prevention process, it was confirmed that the pattern transfer position accuracy can be greatly improved as compared with the conventional transfer mask.

  The present invention can be used in a method for manufacturing a transfer mask used for exposure of charged particle beams such as an electron beam and an ion beam.

It is explanatory drawing which shows an example of the manufacturing process of the stencil mask blank and mask of this invention in a cross section. It is explanatory drawing which shows an example of the structure of an SOI wafer in a cross section. It is explanatory drawing which shows the example of the transfer mask produced using the SOI wafer in a cross section. It is explanatory drawing which shows an example of the manufacturing process of the stencil mask using an SOI wafer in a cross section. It is explanatory drawing of an example of the stencil mask for EPL formed by the conventional method, (a) is explanatory drawing seen in the plane, (b) is explanatory drawing seen in the cross section. It is explanatory drawing which shows the Example of the manufacturing process of the stencil mask blank and mask of this invention in a cross section.

Explanation of symbols

101, 201, 501, 601... Single crystal silicon film 102, 202, 602... Constituting a BOX layer. Silicon oxide films 103, 203, 603... Constituting a BOX layer. Silicon film 107, 305, 405... Opening 104... Local deformation preventing layer 105... Backside opening forming resist pattern 106... Back surface opening pattern 108 consisting of local deformation preventing layer. Stencil mask blanks 109 with a prevention layer formed ... Stencil masks 304 with a local deformation prevention layer 304, 411 ... Electron beam transmission hole 406 ... SOI wafer 407 ... Opening formation resist 408 .. Opening resist pattern 409... Membrane 410. Electron beam transmission hole forming resist pattern 412 Stencil mask 501 ... Membrane formation region 502 ... Deformation caused by membrane stress 503 ... Stencil mask fixing electrostatic chuck 604 ... Local deformation prevention layer 605 ... Opening resist pattern 607 ..Opening portion 608 ... Stencil mask blank 609 ... Stencil mask 610 ... Warpage adjustment layer

Claims (5)

A support substrate made of a single crystal silicon wafer , an active layer for providing a transfer pattern, a buried oxide film layer formed between the support substrate and the active layer, and a membrane beam on the other side of the support substrate And an opening corresponding to the membrane is provided in the local deformation prevention layer, the support substrate, and the buried oxide film layer, and the local deformation prevention layer is provided . A stencil mask blank characterized by suppressing local deformation due to stress of the membrane . Wherein between the supporting substrate and the local deformation preventing layer, further, a stencil mask blank according to claim 1, wherein except for the opening, characterized in that it comprises a warp adjusting layer on the support substrate over the entire surface. Material silicon constituting the local deformation preventing layer, titanium, any claims 1-2, characterized in that the one or more metals or alloys or oxides or nitrides of these, among the group consisting of tantalum A stencil mask blank according to item 1. A stencil mask, wherein a transfer pattern is formed on an active layer by lithography using the stencil mask blank according to any one of claims 1 to 3 . A charged particle beam pattern exposure method comprising a step of irradiating the stencil mask according to claim 4 with a charged particle beam to form a charged particle beam in the shape of a transfer pattern.