JP4581348B2 - Method for manufacturing bonded wafer and SOI wafer - Google Patents

Method for manufacturing bonded wafer and SOI wafer Download PDF

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JP4581348B2
JP4581348B2 JP2003208759A JP2003208759A JP4581348B2 JP 4581348 B2 JP4581348 B2 JP 4581348B2 JP 2003208759 A JP2003208759 A JP 2003208759A JP 2003208759 A JP2003208759 A JP 2003208759A JP 4581348 B2 JP4581348 B2 JP 4581348B2
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Prior art keywords
wafer
surface
ion implantation
film
bonded
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JP2005072043A (en
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正幸 今井
勝弥 奥村
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信越半導体株式会社
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[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a bonded wafer using a so-called ion implantation delamination method, and in particular, a thin film mainly formed by bonding two silicon single crystal wafers through an oxide film and having an SOI layer thickness of 1 μm or less. The present invention relates to an SOI wafer manufacturing method.
[0002]
[Prior art]
Conventionally, a bonded wafer formed by bonding two wafers, particularly, an SOI wafer in which a thin silicon layer (SOI layer) is formed on a base wafer made of silicon single crystal via an oxide film has been used. In order to manufacture such an SOI wafer, for example, a bond wafer to be an SOI layer and a base wafer are prepared, bonded together through an oxide film, and then the bond wafer is thinned. .
[0003]
In particular, in the manufacture of a thin-film SOI wafer having a SOI layer thickness of 1 μm or less, and further an ultra-thin SOI wafer having an SOI layer of 0.1 μm or less, for a silicon single crystal wafer for semiconductor production used as a bond wafer, A method of implanting hydrogen ions, rare gas ions, or mixed gas ions thereof directly through a thermal oxide film formed on the surface is used (see Japanese Patent No. 3048201). By performing ion implantation in this manner, an ion implantation layer can be formed at a position extremely shallow from the surface. After bonding the surface of the bond wafer on which ions are implanted and the surface of the base wafer, By peeling the bond wafer through the injection layer, an SOI wafer having a thin or ultra-thin SOI layer can be manufactured.
[0004]
[Patent Document 1]
Japanese Patent No. 3048201 [0005]
[Problems to be solved by the invention]
However, when ion implantation is performed on the bond wafer as described above, the surface made of a thermal oxide film or silicon is affected by damage, surface roughness, and contamination that occur during ion implantation, resulting in poor bonding and metal contamination. In addition, there is a problem that device yield decreases when an SOI wafer in which such a bonding failure occurs is used for device fabrication.
[0006]
The present invention has been made to solve the above-described problems, and reduces the wafer surface damage, surface roughness, and contamination caused by ion implantation of hydrogen and the like, and reduces bonding defects and metal contamination. The main object is to provide a method for manufacturing a wafer.
[0007]
[Means for Solving the Problems]
In order to achieve the above object, according to the present invention, hydrogen ions, rare gas ions, or mixed gas ions thereof are ion-implanted from the surface of a bond wafer to form an ion-implanted layer inside the wafer. A bonded wafer in which the surface on the implanted side and the surface of the base wafer are bonded directly or via an insulating film, and then a part of the bond wafer is peeled off by the ion-implanted layer to form a bonded wafer. In this manufacturing method, there is provided a method for manufacturing a bonded wafer, wherein the ion implantation is performed after a treatment for curing at least a surface of the bond wafer on which ions are implanted .
[0008]
In this way, if the ion implantation is performed after the treatment for curing at least the surface of the bond wafer on which ions are implanted, the surface becomes hard, so that surface roughness and contamination due to ion implantation can be reduced. Therefore, after ion implantation into this bond wafer, it is bonded to the base wafer, and then peeled off at the ion implantation layer to form a bonded wafer, thereby reducing bonding defects and metal contamination, and high-quality bonded wafers. Can be manufactured.
[0009]
As the bond wafer, a silicon single crystal wafer having a surface formed with a thermal oxide film can be used .
At present, there is a high demand for SOI wafers using silicon single crystal wafers. If ion implantation is performed after a silicon oxide film formed on the surface of a silicon single crystal wafer is cured, an oxide film (insulating film) can be obtained. Surface roughness and the like are reduced, and as a result, a high-quality SOI wafer can be manufactured.
[0010]
As the treatment for curing the surface of the bond wafer, heat treatment in an NH 3 gas atmosphere or nitridation treatment by nitrogen plasma can be performed .
If the above-described silicon oxide film is subjected to the above heat treatment in an NH 3 gas atmosphere or nitriding by nitrogen plasma, it can be easily cured, and surface roughness during subsequent ion implantation can be prevented. And manufacturing cost can be kept low.
[0011]
Further, formed before performing the ion implantation, it is preferable to form a protective film on the hardening process is performed surface of the bond wafer, as the protective film, for example, a nitride film or an amorphous silicon film by CVD it can be.
In this way, a protective film such as a nitride film by CVD is formed on the cured surface to improve flatness, and even if the protective film is roughened by ion implantation, it is protected after ion implantation. If the film is removed, the rough surface of the bonding surface is reliably removed, and bonding defects and contamination can be reliably prevented.
[0012]
Specifically, after performing ion implantation on the bond wafer, the nitride film can be removed by etching using phosphoric acid, and then bonded to the base wafer .
Even when the nitride film formed as a protective film is roughened by ion implantation, it can be selectively etched with phosphoric acid, and then bonded to the base wafer to reliably prevent poor bonding. .
[0013]
As described above, the SOI wafer formed by nitriding the thermal oxide film by heat treatment or the like in an NH 3 gas atmosphere and then performing ion implantation, bonding with the base wafer, and peeling off by the ion implantation layer is an SOI layer. The SOI wafer has a nitrogen concentration peak at least at the interface between the buried oxide film and the base wafer among the interface between the buried oxide film and the base wafer .
Such an SOI wafer is a high-quality SOI wafer with reduced bonding defects and the like. If this SOI wafer is used for device fabrication, a high-performance device can be fabricated with a high yield.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be specifically described. In the following embodiments, manufacturing of an SOI wafer formed by bonding silicon single crystal wafers through a silicon oxide film, which is currently most commonly used as a bonded wafer, will be described. It is not limited to this.
[0015]
In manufacturing an SOI wafer, in order to form a high-concentration ion implantation layer for peeling inside the bond wafer, ion implantation of the order of 10 16 atoms / cm 2 is usually performed. If ion implantation is performed at such a high dose, the surface of the bond wafer will be rough, and it will be susceptible to defects (such as voids and blisters) and metal contamination in the subsequent bonding process. .
In order to prevent the surface roughness that occurs when ion implantation is performed in this way, the present inventors have conducted extensive research, and by performing ion implantation after the surface to be ion-implanted is hardened from the original surface, ions are implanted. It has been found that surface roughness due to implantation can be reduced.
[0016]
1A to 1F are flowcharts schematically illustrating an example of a process for manufacturing an SOI wafer according to the present invention.
(A) Formation of thermal oxide film First, heat treatment is performed on the bond wafer 1 made of silicon single crystal in an oxidizing atmosphere, and a thermal oxide film 2 is formed as an insulating film on the surface (actually, thermal oxidation is performed on the entire surface of the wafer). A film is formed, but is omitted.) Specific heat treatment conditions may be appropriately set. For example, a uniform SiO 2 film can be formed on the surface of the silicon single crystal wafer 1 by heat treatment at 900 to 1100 ° C. in a water vapor atmosphere. Prior to the thermal oxidation treatment, the native oxide film may be removed by treatment in a reducing atmosphere, thereby removing impurities on the wafer surface.
[0017]
(B) Surface hardening treatment and protective film formation Before the ion implantation, the bond wafer 1 having the silicon oxide film 2 is subjected to a treatment for hardening at least the surface of the bond wafer 1 on the ion implantation side. Here, the bond wafer 1 on which the thermal oxide film 2 is formed is heat-treated (thermal nitriding treatment) in an NH 3 gas atmosphere. The heat treatment conditions may be appropriately set. For example, the surface can be cured by heat treatment at 800 to 900 ° C. for about 10 to 60 minutes in an ammonia atmosphere. At this time, although a complete thermal nitride film (Si 3 N 4 film) is difficult to form on the surface of the oxide film 2, a film 3 having a composition of SiOxNy (hereinafter referred to as “SiOxNy film”) is formed. It is harder than the SiO 2 film.
As the surface hardening treatment, the same effect can be obtained not only by the heat treatment in the ammonia gas atmosphere as described above but also by performing a nitriding treatment by nitrogen plasma, for example. In the present invention, the “curing process” means a process for adding an effect of reducing surface roughness caused by ion implantation performed later.
[0018]
After the surface of the bond wafer 1 is cured as described above, it is difficult to cause surface roughness by performing ion implantation from the surface, but before ion implantation is performed in order to reduce surface roughness more effectively. Further, a protective film 4 is formed on the cured surface. As such a protective film 4, for example, a nitride film (CVD nitride film) 4 is formed on the SiOxNy film 3 by a CVD method. The SiN film 4 can be formed by processing the bond wafer 1 whose surface has been hardened by supplying SiH 2 Cl 2 / NH 3 gas or the like at 600 to 700 ° C., for example. Alternatively, an amorphous silicon film may be formed by supplying SiH 4 gas or the like instead of the SiN film 4.
[0019]
In this case, even if an attempt is made to deposit a CVD nitride film directly on the oxide film 2 without performing the curing process on the surface of the bond wafer 1 as described above, the CVD nitride film cannot be deposited well, resulting in variations in film thickness. The flatness deteriorates, and as a result, the distribution of the ion implantation layer 5 varies. Therefore, as described above, once the SiOxNy film 3 is thinly formed by thermal nitriding treatment and the CVD nitride film 4 is deposited on the cured surface, the SiOxNy film 3 functions as a buffer layer and has a uniform thickness. The protective film 4 having high property and flatness can be deposited.
[0020]
(C) After the ion-implanted CVD nitride film 4 is formed, hydrogen, rare gas ions, or mixed gas ions thereof are ion-implanted from the surface thereof. Thereby, the ion implantation layer 5 is formed inside the bond wafer 1. Note that the ion implantation conditions may be set in consideration of the thickness of the SOI layer to be finally formed and the ion species, implantation energy, and implantation amount.
[0021]
(D) The protective film removal CVD nitride film 4 may have a poor surface roughness at the initial stage before ion implantation or may cause surface roughness due to ion implantation. Therefore, by removing the CVD nitride film 4 after ion implantation, surface roughness and contamination generated on the surface of the CVD nitride film 4 can be reliably eliminated. As a method for removing the CVD nitride film 4, for example, it can be selectively removed by etching using hot phosphoric acid.
[0022]
(E) After bonding ion implantation, the CVD nitride film 4 on the surface is removed, and then the surface of the bond wafer 1 on which ions are implanted and the surface of the base wafer (silicon single crystal wafer) 6 are connected to the oxide film 2 (SiOxNy). Bonding via the film 3). As a result, the two wafers 1 and 6 are joined.
[0023]
(F) By performing a peeling heat treatment after peeling and bonding, a part of the bond wafer 1 can be peeled off by the ion implantation layer 5, and the SOI wafer 10 having the SOI layer 7 can be formed. Furthermore, after peeling, it is preferable to perform a higher temperature heat treatment (bonding heat treatment) in order to increase the bonding strength. Note that the peeling heat treatment and the bonding heat treatment can be performed together.
[0024]
The SOI wafer 10 formed through the above processes has a nitrogen concentration peak at the interface between the buried oxide film 2 and the base wafer 6. Such an SOI wafer 10 is a high-quality thin film or ultra-thin SOI wafer with reduced bonding defects and metal contamination. If this is used for device fabrication, the device yield is improved and a high-performance device is reduced. It can be manufactured at a low cost.
[0025]
【Example】
Examples of the present invention and comparative examples will be described below.
A plurality of samples in which a thermal oxide film (film thickness: about 140 nm) was formed on a silicon single crystal wafer having a diameter of 200 mm, p-type, and plane orientation (100) in a steam atmosphere at 950 ° C. were prepared (Sample 1).
[0026]
Next, a sample was prepared by subjecting the thermal oxide film of Sample 1 to NH 3 treatment (heat treatment with 100% NH 3 gas) at 850 ° C. and 266 Pa for 30 minutes (Sample 2).
Further, following the treatment of Sample 2, a SiH 2 Cl 2 / NH 3 gas was supplied at 650 ° C. and 40 Pa to prepare a sample in which a SiN film (CVD nitride film) was formed at about 7 nm (Sample 3).
[0027]
Samples 1, 2 and 3 produced as described above were respectively implanted with hydrogen ions to obtain samples 1 ', 2' and 3 ', respectively. In addition, the hydrogen ion implantation conditions used are energy: 60.5 keV and dose: 5.7 × 10 16 atoms / cm 2 .
[0028]
Table 1 shows the results of analysis by an atomic force microscope (AFM) in order to confirm the surface roughness of each of the six points of the sample at the center and the periphery of the wafer.
[0029]
[Table 1]
[0030]
As is apparent from Table 1, the surface roughness of Sample 1 in which only the thermal oxide film is formed on the surface is remarkably increased by the subsequent hydrogen ion implantation (Sample 1 ′).
On the other hand, in the sample 2 subjected to the thermal nitriding treatment in the NH 3 atmosphere after the formation of the thermal oxide film, the surface roughness after the hydrogen ion implantation (sample 2 ′) is increased as compared with that before the ion implantation. The increase (ΔRms) is reduced compared to samples 1 and 1 ′. This shows that the thermal oxide film on the surface of the silicon wafer was cured by thermal nitriding, and the surface roughness due to ion implantation was suppressed.
[0031]
Further, in sample 3 in which a CVD nitride film was formed following the thermal nitriding treatment, the surface roughness after ion implantation (sample 3 ′) was similar to that of sample 1 ′, but before hydrogen ion implantation (sample 3). Since the initial surface roughness was rough, the increase in surface roughness due to subsequent hydrogen ion implantation was small.
Therefore, the samples 3 and 3 ′ were subjected to a phosphoric acid wet etching process to remove only the CVD nitride film, and the surface roughness was measured by AFM. The results are shown in Table 2.
[0032]
[Table 2]
[0033]
As is apparent from Table 2, after removing the CVD nitride film by etching, the surface roughness of the sample 3 'is the same as that of any of the samples 1', 2 'and 3' after ion implantation in both the central portion and the peripheral portion. It was found that even when compared with Samples 1 and 2 before ion implantation, the level was the same in the peripheral portion and maintained at a lower level in the central portion.
[0034]
Next, a plurality of samples that have been subjected to hydrogen ion implantation under the same conditions as the samples 1 ′, 2 ′, and 3 ′ are prepared and bonded to a base wafer made of a silicon single crystal wafer, and then at 500 ° C. for 30 minutes. Then, a heat treatment of peeling was performed to peel off by the hydrogen ion implantation layer, and an SOI wafer having an SOI layer of about 400 nm was manufactured. Further, a bonding heat treatment (1100 ° C., 2 hours) for improving the bonding strength was performed.
[0035]
Visual inspection and surface inspection device for voids (portions where the SOI layer does not exist) and blisters (portions where the SOI layer is swollen) observed on the surface of the SOI layer after peeling heat treatment and bonding heat treatment as described above And compared the defective bonding rate (number of voids / blisters generated / number of produced sheets). As a result, the defect rate of samples 2 ′ and 3 ′ is 20% or more lower than that of sample 1 ′. Particularly, in sample 3 ′, a bonding defect rate lower than that of sample 2 ′ is obtained, which is extremely high. It became a quality SOI wafer.
[0036]
Furthermore, one of each of the three types of produced SOI wafers was extracted and the nitrogen concentration distribution from the SOI surface to the outermost surface of the base wafer was measured using SIMS (secondary ion mass spectrometer). For 3 ', a peak of nitrogen concentration was observed at the interface between the buried oxide film and the base wafer, but for sample 1', there was almost no change in nitrogen concentration before and after the interface.
[0037]
The present invention is not limited to the above embodiment. The above embodiment is merely an example, and the present invention has the same configuration as that of the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.
[0038]
The present invention can also be applied to the production of SOI wafers by forming a thermal oxide film on the base wafer side. Furthermore, both the bond wafer and the base wafer are not limited to silicon wafers, and the present invention is applicable even when a bonded wafer is manufactured by directly bonding both wafers without forming a thermal oxide film or the like on either wafer. By performing ion implantation after the surface hardening treatment, surface roughness due to ion implantation can be reduced.
[0039]
【The invention's effect】
According to the present invention, when a bonded wafer is manufactured by an ion implantation separation method, the ion implantation is performed after performing a treatment for curing at least the surface of the bond wafer on which ions are implanted. The influence of contamination is reduced, and poor bonding such as voids and blisters, metal contamination, and the like can be reduced. Therefore, the SOI wafer manufactured according to the present invention is of high quality, and by using this, the yield of device fabrication can be improved.
[Brief description of the drawings]
FIG. 1 is a flowchart showing an example of a manufacturing process of an SOI wafer in the present invention.
[Explanation of symbols]
1. Bond wafer (silicon single crystal wafer),
2 ... thermal oxide film (buried oxide film), 3 ... SiOxNy film,
4 ... Protective film (CVD nitride film, SiN film), 5 ... Ion implantation layer,
6 ... Base wafer (silicon single crystal wafer), 7 ... SOI layer,
10 ... SOI wafer.

Claims (5)

  1. An ion implantation layer is formed inside the wafer by ion implantation of hydrogen ions, rare gas ions, or mixed gas ions thereof from the surface of the bond wafer in which a thermal oxide film is formed on the surface of the silicon single crystal wafer. A bonded wafer in which a surface of the implanted side and a surface of a base wafer are bonded together via the thermal oxide film, and then a part of the bond wafer is peeled off by the ion-implanted layer to form a bonded wafer. In the manufacturing method, at least the surface of the thermal oxide film on the ion-implanted side of the bond wafer is subjected to a heat treatment in an NH 3 gas atmosphere or a nitriding treatment by nitrogen plasma, and then the ion is implanted. A method for producing a bonded wafer, wherein implantation is performed.
  2.   The method for producing a bonded wafer according to claim 1, wherein a protective film is formed on the surface of the bond wafer that has been cured before the ion implantation.
  3.   The method for manufacturing a bonded wafer according to claim 2, wherein a nitride film or an amorphous silicon film is formed as the protective film by a CVD method.
  4.   4. The method for producing a bonded wafer according to claim 3, wherein after the ion implantation is performed on the bond wafer, the nitride film is removed by etching using phosphoric acid, and then bonded to the base wafer. .
  5.   An SOI wafer in which a buried oxide film and an SOI layer are sequentially formed on a base wafer manufactured by the method for manufacturing a bonded wafer according to any one of claims 1 to 4, An SOI wafer having a nitrogen concentration peak only at the interface between a buried oxide film and a base wafer.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007134616A (en) * 2005-11-14 2007-05-31 Nec Electronics Corp Soi substrate, and method of manufacturing same
KR101443580B1 (en) * 2007-05-11 2014-10-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Method for manufacturing semiconductor device
US7763502B2 (en) * 2007-06-22 2010-07-27 Semiconductor Energy Laboratory Co., Ltd Semiconductor substrate, method for manufacturing semiconductor substrate, semiconductor device, and electronic device
EP2009687B1 (en) * 2007-06-29 2016-08-17 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing an SOI substrate and method of manufacturing a semiconductor device
US20090004764A1 (en) * 2007-06-29 2009-01-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate and method for manufacturing semiconductor device
JP5250228B2 (en) 2007-09-21 2013-07-31 株式会社半導体エネルギー研究所 Method for manufacturing semiconductor device
JP2011077504A (en) * 2009-09-02 2011-04-14 Semiconductor Energy Lab Co Ltd Method for manufacturing semiconductor device

Citations (5)

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JPH05259418A (en) * 1992-03-09 1993-10-08 Nippon Telegr & Teleph Corp <Ntt> Semiconductor substrate and fabrication thereof
JPH0845868A (en) * 1994-06-17 1996-02-16 Sharp Corp Method for improving electrical isolation of semiconductor substrate with buried insulating layer and simox semiconductor substrate, and manufacture of simox semiconductor substrate
JPH10335616A (en) * 1997-05-29 1998-12-18 Mitsubishi Materials Shilicon Corp Manufacture of soi substrate
JPH11186187A (en) * 1997-12-22 1999-07-09 Mitsubishi Materials Silicon Corp Production of soi substrate
JP2002170942A (en) * 2000-11-30 2002-06-14 Seiko Epson Corp Soi substrate, manufacturing method thereof, element substrate, manufacturing method thereof, electrooptical device, electronic apparatus

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05259418A (en) * 1992-03-09 1993-10-08 Nippon Telegr & Teleph Corp <Ntt> Semiconductor substrate and fabrication thereof
JPH0845868A (en) * 1994-06-17 1996-02-16 Sharp Corp Method for improving electrical isolation of semiconductor substrate with buried insulating layer and simox semiconductor substrate, and manufacture of simox semiconductor substrate
JPH10335616A (en) * 1997-05-29 1998-12-18 Mitsubishi Materials Shilicon Corp Manufacture of soi substrate
JPH11186187A (en) * 1997-12-22 1999-07-09 Mitsubishi Materials Silicon Corp Production of soi substrate
JP2002170942A (en) * 2000-11-30 2002-06-14 Seiko Epson Corp Soi substrate, manufacturing method thereof, element substrate, manufacturing method thereof, electrooptical device, electronic apparatus

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