JP4581337B2 - Pixel circuit, display device, and driving method of pixel circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention particularly relates to a pixel circuit having an electro-optical element whose luminance is controlled by a current value, such as an organic EL (Electroluminescence) display, and an image display device in which the pixel circuit is arranged in a matrix. The present invention relates to a so-called active matrix image display device in which the value of a current flowing through an electro-optic element is controlled by an insulated gate field effect transistor provided therein, and a method for driving a pixel circuit.
[0002]
[Prior art]
In an image display device, such as a liquid crystal display, an image is displayed by arranging a large number of pixels in a matrix and controlling the light intensity for each pixel in accordance with image information to be displayed.
This is the same for an organic EL display or the like, but the organic EL display is a so-called self-luminous display having a light emitting element in each pixel circuit, and has a higher image visibility than a liquid crystal display. There are advantages such as unnecessary and high response speed.
The luminance of each light emitting element is greatly different from a liquid crystal display or the like in that a color gradation is obtained by controlling the luminance of the light emitting element according to the current value flowing therethrough, that is, the light emitting element is a current control type.
[0003]
In the organic EL display, as with the liquid crystal display, a simple matrix method and an active matrix method can be used. However, although the former has a simple structure, it is difficult to realize a large and high-definition display. There's a problem.
For this reason, active matrix systems have been actively developed in which the current flowing through the light emitting elements in each pixel circuit is controlled by active elements provided in the pixel circuits, generally TFTs (Thin Film Transistors).
[0004]
FIG. 8 is a block diagram showing a configuration of a general organic EL display device.
As shown in FIG. 8, the display device 1 includes a pixel array section 2 in which pixel circuits (PXLC) 2a are arranged in an m × n matrix, a horizontal selector (HSEL) 3, a light scanner (WSCN) 4, a horizontal Data lines DTL1 to DTLn selected by the selector 3 and supplied with data signals corresponding to luminance information, and scanning lines WSL1 to WSLm selectively driven by the write scanner 4 are provided.
[0005]
FIG. 9 is a circuit diagram showing a configuration example of the pixel circuit 2a of FIG. 8 (see, for example, Patent Documents 1 and 2).
The pixel circuit of FIG. 9 has the simplest circuit configuration among many proposed circuits, and is a so-called two-transistor driving circuit.
[0006]
The pixel circuit 2a in FIG. 9 includes a p-channel thin film field effect transistor (hereinafter referred to as TFT) 11 and TFT 12, a capacitor C11, and an organic EL element (OLED) 13 that is a light emitting element. In FIG. 9, DTL indicates a data line, and WSL indicates a scanning line.
Since organic EL elements often have rectifying properties, they are sometimes called OLEDs (Organic Light Emitting Diodes). In FIG. 9 and others, the symbol of a diode is used as a light emitting element. It does not require rectification.
In FIG. 9, the source of the TFT 11 is connected to the power supply potential VCC, and the cathode (cathode) of the light emitting element 13 is connected to the ground potential GND. The operation of the pixel circuit 2a in FIG. 9 is as follows.
[0007]
Step ST1 :
When the scanning line WSL is in a selected state (here, low level) and Vdata is applied to the data line DTL, the TFT 12 becomes conductive and the capacitor C11 is charged or discharged, and the gate potential of the TFT 11 becomes Vdata.
[0008]
Step ST2 :
When the scanning line WSL is in a non-selected state (here, high level), the data line DTL and the TFT 11 are electrically disconnected, but the gate potential of the TFT 11 is stably held by the capacitor C11.
[0009]
Step ST3 :
The current flowing through the TFT 11 and the light emitting element 13 has a value corresponding to the gate-source voltage Vgs of the TFT 11, and the light emitting element 13 continues to emit light with a luminance corresponding to the current value.
The operation of selecting the scanning line WSL and transmitting the luminance information given to the data line to the inside of the pixel as in step ST1 is hereinafter referred to as “writing”.
As described above, in the pixel circuit 2a of FIG. 9, once Vdata is written, the light emitting element 13 continues to emit light with a constant luminance until it is rewritten next time.
[0010]
As described above, in the pixel circuit 2a, the value of the current flowing through the EL light emitting element 13 is controlled by changing the gate application voltage of the FET 11 that is a drive transistor.
At this time, the source of the p-channel drive transistor is connected to the power supply potential VCC, and the TFT 11 always operates in the saturation region. Therefore, the constant current source has a value represented by the following formula 1.
[0011]
[Expression 1]
Ids = 1/2 · μ (W / L) Cox (Vgs− | Vth |) ² ... (1)
[0012]
Here, μ is the carrier mobility, Cox is the gate capacitance per unit area, W is the gate width, L is the gate length, Vgs is the gate-source voltage of the TFT 11, and Vth is the threshold of the TFT 11. Each value Vth is shown.
[0013]
In the simple matrix type image display device, each light emitting element emits light only at the selected moment, whereas in the active matrix, as described above, the light emitting element continues to emit light even after the writing is completed. In comparison, the peak luminance and peak current of the light emitting element can be lowered, and this is particularly advantageous in a large-sized and high-definition display.
[0014]
However, TFTs generally have large variations in Vth and mobility μ. For this reason, even when the same input voltage is applied to the gates of different drive transistors, the on-current varies, and as a result, the image quality uniformity deteriorates.
[0015]
Many pixel circuits have been proposed to remedy this problem. FIG. (See, for example, Patent Document 3 or Patent Document 4).
[0016]
A pixel circuit 2b in FIG. 10 includes p-channel TFTs 21 to 24, a capacitor C21, and an organic EL light emitting element (OLED) 25 that is a light emitting element. In FIG. 10, DTL indicates a data line, WSL indicates a scanning line, and DSL indicates a drive line.
[0017]
The operation of the pixel circuit 2b will be described.
In this case, the input signal SI supplied to the data line DTL is a current signal.
When the input signal SI is written, the TFT 24 and the TFT 23 are turned on with the TFT 22 turned off. As a result, a signal current flows through the TFT 21 which is a drive transistor.
At this time, the gate and drain of the TFT 21 are connected and driven in the saturation region. Therefore, a gate voltage corresponding to the input current is written based on the equation shown in the above equation 1, and is held in the capacitor C21 which is a pixel capacitor.
Thereafter, the TFT 24 is turned off and the TFT 22 is turned on, whereby a current corresponding to the input signal current flows through the TFT 21 and the EL light emitting element 25.
[0018]
[Patent Document 1]
USP 5,684,365
[Patent Document 2]
JP-A-8-234683
[Patent Document 3]
USP 6,229,506
[Patent Document 4]
FIG. 2 of JP-T 2002-514320. 3
[0019]
[Problems to be solved by the invention]
In the pixel circuit of FIG. 10 described above, it is possible to correct (cancel) Vth variation and mobility μ for each pixel.
However, in the large screen panel, the pixel circuit of FIG. 10 has the following disadvantages.
[0020]
Since the panel size of a large screen panel increases, the wiring capacitance Csig of the data line (signal line) DTL increases. This problem will be described with reference to FIGS. 11 and 12.
[0021]
FIG. 11 is a diagram showing a circuit diagram when the wiring capacitance of the data line is large, and FIGS. 12A to 12E are diagrams showing potential changes in the main part of the circuit of FIG.
FIG. 12 shows an example in which two pixel circuits 2b-1 and 2b-2 similar to the pixel circuit of FIG. 10 are connected to the same data line DTL.
12A shows the scanning signal ws [1] applied to the scanning line WSL1 connected to the gate of the TFT 24-1 of the pixel circuit 2b-1 in the first row, and FIG. 12B shows the first row. The scanning signal ws [2] applied to the scanning line WSL2 connected to the gate of the TFT 24-2 of the second pixel circuit 2b-2 is shown in FIG. 12C. The capacitor of the first row pixel circuit 2b-1 is shown in FIG. 12D shows the potential VC211 of C21-1, FIG. 12D shows the potential VC212 of the capacitor C21-2 of the pixel circuit 2b-2 in the second row, and FIG. 12D shows the potential VCsig of the wiring capacitance Csig of the data line DTL. Respectively.
[0022]
For example, assume that a black signal is written to the pixel circuit 2b-2 in the second row. First, before the TF 24-2 is turned on, the gate capacitance of the TFT 21-1 of the pixel circuit 2b-1 at the previous stage is held in the wiring capacitor Csig.
Next, the TFT 24-2 is turned on. At this time, since the wiring capacitance Csig is larger than the capacitor C21-2 as the pixel capacitance (for example, the pixel capacitance is 500 fF and the wiring capacitance Csig is 200 pF), when the TFT 24-2 is turned on, FIG. E), the potential VC212 of the capacitor C21-2 is equal to the potential VCsig of the wiring capacitance Csig.
That is, the gate voltage of the previous pixel circuit 2b-1 is written into the capacitor C21-2. Here, assuming that the potential corresponding to the black signal is, for example, 10V, the capacitor C21-2 must be written from the previous stage gate potential to the own stage gate potential of 10V.
At this time, the black signal has a current value close to 0 μA, and this writing takes time. In particular, when the wiring capacity Csig of the data line DTL is large (heavy) on a large screen panel, this writing time is further required.
However, generally, the writing time of the input signal to each pixel circuit is at most one horizontal scanning period (1H). Therefore, when a black signal is written on the large screen panel, it cannot be written within the 1H period. As a result, variations in the threshold value Vtf and mobility μ in the previous stage and the own stage affect the gate voltage, resulting in poor image quality. In particular, as described above, this decrease occurs remarkably when writing a black signal having a low current value.
[0023]
The present invention has been made in view of such circumstances, and an object of the present invention is to suppress the influence of the wiring capacity of the data line, and to be affected by variations in threshold values and mobility of active elements in the pixel. It is an object of the present invention to provide a pixel circuit, a display device, and a driving method of the pixel circuit that can obtain high image quality without uniformity.
[0024]
[Means for Solving the Problems]
In order to achieve the above object, a first aspect of the present invention is a pixel circuit for driving an electro-optical element whose luminance changes depending on a flowing current, and is supplied with a signal current having a current level corresponding to luminance information. Forming a current supply line between the line, the first and second nodes, the first and second reference potentials, the first terminal and the second terminal, and the control terminal connected to the second node A drive transistor that controls a current flowing through the current supply line in accordance with a potential, a first switch connected to the first node, and a connection between the first node and the second node. A second switch, a third switch connected between the data line and the second node, and a pixel capacitor connected to the second node. Between the reference potential of and the second reference potential, The current supply line of the drive transistor, the first node, the first switch, and the electro-optical element are connected in series, and the second switch and the second switch are connected to drive the electro-optical element. Before the main signal current supplied to the data line is written to the pixel capacitor element, the pre-signal current supplied to the data line is taken in and the pixel capacitor element is held at a predetermined voltage. Has precharge circuit The precharge circuit includes third and fourth nodes, a fourth switch connected between the second node and the third node, the data line, and the fourth node. And a conversion unit that causes the pre-signal current supplied to the fourth node to appear at the third node as a voltage level signal. .
[0025]
Second aspect of the present invention Display device Includes a plurality of pixel circuits arranged in a matrix, a data line to which a signal current having a current level corresponding to luminance information is supplied, and first and second reference potentials. An electro-optical element whose luminance is changed by a flowing current, the first and second nodes, and a potential of a control terminal connected to the second node by forming a current supply line between the first terminal and the second terminal. And a driving transistor for controlling a current flowing through the current supply line, a first switch connected to the first node, and a connection between the first node and the second node. A second switch; a third switch connected between the data line and the second node; and a pixel capacitor connected to the second node; Between the reference potential and the second reference potential, The current supply line of the driving transistor, the first node, the first switch, and the electro-optic element are connected in series, and the second switch and the third switch are further connected to drive the electro-optic element. Before the main signal current supplied to the data line is written to the pixel capacitor element, the pre-signal current supplied to the data line is taken in and the pixel capacitor element holds a predetermined voltage. Has a charge circuit The precharge circuit includes third and fourth nodes, a fourth switch connected between the second node and the third node, the data line, and the fourth node. And a conversion unit that causes the pre-signal current supplied to the fourth node to appear at the third node as a voltage level signal. .
[0027]
Preferably, the converter includes a transistor having a gate connected to the third node, a drain connected to the fourth node, a drain and a gate connected to each other, and a source connected to a predetermined potential. Including.
[0028]
Preferably, there is provided a first circuit for setting a pre-signal current value supplied to the data line during pre-charging to be larger than the main signal current value.
[0029]
Preferably, the pre-signal current value supplied to the data line at the time of pre-charging is set to be larger than the main signal current value, and at the time of pre-charging when the pre-signal current value is supplied to the data line, And a second circuit for conducting a fifth switch in a plurality of pixel circuits connected to the same data line.
[0030]
According to a third aspect of the present invention, there is provided an electro-optical element whose luminance is changed by a flowing current, a data line to which a signal current having a current level corresponding to luminance information is supplied, first and second nodes, A current supply line is formed between the second reference potential and the first terminal and the second terminal, and a current flowing through the current supply line is controlled according to the potential of the control terminal connected to the second node. A driving transistor; a first switch connected to the first node; a second switch connected between the first node and the second node; the data line; A third switch connected between the first node and the pixel capacitor connected to the second node, and between the first reference potential and the second reference potential, A current supply line for the drive transistor; Over de, the first switch, and the electro-optical element is connected in series And a third switch, a fourth switch connected between the second node and the third node, and a connection between the data line and the fourth node. A precharge circuit including a fifth switch and a conversion unit that causes the pre-signal current supplied to the fourth node to appear as a voltage level signal at the third node. A pixel circuit driving method comprising: In order to drive the electro-optic element, before the main signal current supplied to the data line is written to the pixel capacitor element by making the second switch and the third switch conductive, the fourth switch and By turning on the fifth switch, a pre-signal current set to a value larger than the main signal current supplied to the data line is supplied to the fourth node and supplied to the fourth node. The pre-signal current is made to appear at the third node as a voltage level signal in the converter, and the voltage is A first step of performing a precharge process to be held in the pixel capacitor; The fourth switch and the fifth switch are set in a non-conducting state to shift from the precharge processing to the signal writing processing, The second switch and the above A second step of turning on a third switch and writing a main signal current supplied to the data line to the pixel capacitor; The second switch and the third switch are turned off, And a third step of supplying a predetermined current to the electro-optic element by turning on the first switch.
[0031]
According to the present invention, for example, in the precharge period, the pre-signal current set to a value larger than the main signal current value is supplied to the data line. Then, a pre-signal current supplied to the data line by the precharge circuit is taken in, and a predetermined voltage is held in the pixel capacitor element.
At this time, the gate of the driving transistor is precharged with respect to the required gate voltage, excluding Vth variation.
Next, the precharge operation of the precharge circuit is stopped, the precharge period is terminated, and the current writing period starts.
In the current writing period, the main signal current supplied to the data line by turning on the second switch and the third switch is written into the pixel capacitor element.
In the signal writing period, the pixel circuit is a normal current-driven circuit.
In this signal writing period, a main signal current is supplied to the data line.
The main signal current value is set to a current value that flows through the electro-optic element according to the luminance information.
As the third switch is turned on, the main signal current flows to the drive transistor.
At this time, since the second switch is in a conducting state, the gate and the drain of the driving transistor are connected and driven in the saturation region. Therefore, the gate voltage corresponding to the input current is written based on the equation shown in the above equation 1, and held in the pixel capacitor element.
Thereafter, for example, after the second and third switches are turned off, the first switch is turned on.
As a result, a current corresponding to the input signal current flows through the drive transistor and the electro-optical element, and the electro-optical element emits light.
In the present invention, as described above, the gate voltage of the drive transistor is precharged in advance.
Therefore, the amount of voltage change when writing the main signal current in the signal writing period is from the gate potential at the time of precharging to the gate potential corresponding to the pixel current. That is, writing is very small compared to the amount of voltage change in the conventional method.
As a result, variations due to insufficient writing (especially low current black signals) in a large screen panel can be suppressed, and high uniformity image quality without variations in threshold Vth and mobility μ can be obtained. .
[0032]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
[0033]
FIG. 1 is a block diagram showing a configuration of an organic EL display device employing the pixel circuit according to the present embodiment.
FIG. 2 is a circuit diagram showing a specific configuration of the pixel circuit according to the present embodiment in the organic EL display device of FIG.
[0034]
As shown in FIGS. 1 and 2, the display device 100 includes a pixel array unit 102 in which pixel circuits (PXLC) 101 are arranged in an m × n matrix, and a horizontal selector (HSEL) 103 as a first circuit. , A light scanner (WSCN) 104, a drive scanner (DSCN) 105, a pre-scanner (PSCN) 106 as a second circuit, a main signal current selected by a horizontal selector 103 and a pre-signal current at the time of precharging Data lines DTL101 to DTL10n, scan lines WSL101 to WS10m selectively driven by the write scanner 104, drive lines DSL101 to DSL10m selectively driven by the drive scanner 105, and prescan lines selectively driven by the prescanner 106 PSL101 to PSL1 Having a m.
[0035]
In the pixel array unit 102, the pixel circuits 101 are arranged in a matrix of m × n. However, in FIG. 1, in order to simplify the drawing, a matrix of 2 (= m) × 3 (= n) is used. An example of arrangement is shown.
FIG. 2 also shows a specific configuration of one pixel circuit for simplifying the drawing.
[0036]
As shown in FIG. 2, the pixel circuit 101 according to the present embodiment includes p-channel TFTs 111 to 117, a capacitor C111, a light emitting element 118 including an organic EL element (OLED: electro-optical element), a first node ND111, and a second node. Node ND112, third node ND113, and fourth node ND114.
In FIG. 2, DTL 101 indicates a data line, WSL 101 indicates a scanning line, DSL 101 indicates a drive line, and PSL 101 indicates a pre-scanning line.
Of these components, the TFT 111 constitutes a drive transistor according to the present invention, the TFT 112 constitutes a first switch, the TFT 113 constitutes a second switch, and the TFT 114 constitutes a third switch. The TFT 115 constitutes a fourth switch, the TFT 116 constitutes a fifth switch, and the capacitor C111 constitutes a pixel capacitor according to the present invention. Further, the TFT 117 constitutes a conversion unit according to the present invention.
The TFTs 115 to 117, the third node ND113, and the fourth node ND114 constitute a precharge circuit according to the present invention.
[0037]
At the time of precharging, the pre-signal current value supplied to the data line DSL by the horizontal selector 103 is set to a value larger than the normal write main signal current value.
Further, the supply line (power supply potential) of the power supply voltage VCC corresponds to the first reference potential, and the ground potential GND corresponds to the second reference potential.
[0038]
In the pixel circuit 101, the TFT 111, the first node ND111, the TFT 112, and the light emitting element 118 are connected in series between the power supply potential VCC and the ground potential GND.
Specifically, the source of the TFT 111 as the drive transistor is connected to the supply line of the power supply voltage VCC, and the drain is connected to the first node ND111. The source of the TFT 112 as the first switch is connected to the first node ND111, the drain is connected to the anode of the light emitting element 118, and the cathode of the light emitting element 118 is connected to the ground potential GND. The gate of the TFT 111 is connected to the second node ND112, and the gate of the TFT 112 is connected to the drive line DSL101.
The TFT 113 source / drain as a second switch is connected to the first node ND111 and the second node ND112, and the gate of the TFT 113 is connected to the scanning line WSL101 as the first control line.
The first electrode of the capacitor C111 is connected to the second node ND112, and the second electrode is connected to the power supply potential VCC.
A source / drain of a TFT 114 as a third switch is connected to the data line DTL101 and the second node ND112, and a gate of the TFT 114 is connected to the scanning line 101.
[0039]
The source / drain of the TFT 115 as the fourth switch is connected to the second node ND112 and the third node ND113, and the gate of the TFT 115 is connected to the pre-scan line PSL101.
The source / drain of the TFT 116 as a switch 53 is connected to the data line DTL 101 and the fourth node ND 114, and the gate of the TFT 116 is connected to the pre-scan line 101.
Further, the gate of the TFT 117 is connected to the third node ND113, the drain is connected to the fourth node ND114, the gate and the source (the third node ND113 and the fourth node ND114) are connected, and the source is the power source. Connected to the potential VCC.
[0040]
Next, the operation of the above configuration will be described with reference to FIGS. 3A to 3G, FIG. 4, and FIG. 5, focusing on the operation of the pixel circuit.
3A shows the scanning signal ws [1] applied to the first row scanning line WSL101 of the pixel array, and FIG. 3B shows the scanning signal WSL102 applied to the second row scanning line WSL102 of the pixel array. FIG. 3C shows the scanning signal ws [2], FIG. 3C shows the pre-scanning signal ps [1] applied to the first row pre-scanning line PSL101, and FIG. 3D shows the second pixel arrangement. FIG. 3E shows the pre-scan signal ps [2] applied to the pre-scan line PSL101 in the row, and FIG. 3E shows the drive signal ds [1] applied to the drive line DSL101 in the first row of the pixel array. 3 (F) shows the drive signal ds [2] applied to the drive line DSL102 in the second row of the pixel array, and FIG. 3 (G) shows the gate potential Vg of the TFT 111, respectively.
In the figure, Tpre indicates a precharge period, and Twrt indicates a signal writing period. A precharge period Tpre and a signal writing period Twrt are set during one horizontal scanning period (1H).
Hereinafter, the operation of the pixel circuit in the first row will be described.
[0041]
First, in the precharge period Tpre, as shown in FIGS. 3A, 3C, and 3E, the drive signal ws [1] to the scanning line WSL101 is in a high level (TFT 114 and TFT 113 are non-conductive). ) When the drive signal ds [1] to the drive line DSL101 is at a high level (TFT 112 is non-conductive), the pre-scan signal ps [1] to the pre-scan line PSL101 is set to a low level, and the TFT 116 and the TFT 115 are turned on. Make it conductive.
[0042]
An equivalent circuit at this time is shown in FIG. Thus, in the precharge period, the pixel circuit 101 is a so-called simple current mirror type circuit.
In the precharge period Tpre, a pre-signal current is supplied from the horizontal selector 103 to the data line DTL101. The pre-signal current value is set to a value larger than the main signal current value supplied to the data line DTL101 in the signal writing period Twrt. For example, a current having a value equivalent to the current multiplication function of the current mirror circuit (hereinafter sometimes referred to as current mirror multiplication) is supplied to the current value flowing through the EL light emitting element 118 during the signal writing period Twrt.
Thereby, the gate voltage value of the TFT 117 with respect to the current value that is double the current mirror can be written to the capacitor C111 as a pixel capacitor through the TFT 115.
This is not more than the voltage difference of the threshold value Vth at most with respect to the gate voltage of the TFT 111 as the drive transistor corresponding to the current value to be passed through the EL light emitting element 118. That is, the gate of the TFT 111 is precharged with respect to the required gate voltage, excluding Vth variation.
[0043]
Next, as shown in FIG. 3C, the pre-scan signal ps [1] to the pre-scan line PSL101 is set to a high level, the TFT 116 and the TFT 115 are turned off, and from the precharge period to the signal writing period Twrt. Transition.
In the signal writing period Twrt, as shown in FIG. 3A, the drive signal ws [1] to the scanning line WSL101 is set to a low level, and the TFTs 114 and 113 are turned on.
[0044]
An equivalent circuit at this time is shown in FIG. Thus, in the signal writing period, the pixel circuit 101 is a normal current-driven circuit.
In the signal writing period Twrt, the main signal current is supplied from the horizontal selector 103 to the data line DTL101. The main signal current value is set to a current value that flows through the EL light emitting element 118 according to the luminance information.
As the TFT 114 becomes conductive, the main signal current flows through the TFT 111 which is a drive transistor.
At this time, since the TFT 113 is in a conductive state, the gate and the drain of the TFT 111 are connected and driven in the saturation region. Therefore, a gate voltage corresponding to the input current is written based on the equation shown in the above equation 1, and is held in the capacitor C111 which is a pixel capacitor.
[0045]
Thereafter, as shown in FIGS. 3A and 3E, the drive signal ws [1] to the scanning line WSL101 is set to a high level, the TFTs 114 and 113 are turned off, and then the drive signal to the drive line DSL101 is set. ds [1] is at a low level, and the TFT 112 is turned on.
As a result, a current corresponding to the input signal current flows to the TFT 111 and the EL light emitting element 118, and the EL light emitting element 118 emits light.
[0046]
Here, current writing in the precharge period Tpre and the signal writing period Twrt during one horizontal scanning period (1H) will be considered.
In this embodiment, as described above, the gate voltage of the drive transistor is precharged in advance by current mirror driving.
Therefore, the amount of voltage change when writing the main signal current in the signal writing period Twrt is from the gate potential at the time of precharging to the gate potential corresponding to the pixel current.
Here, as described above, this voltage difference ΔV is within the range of variations in threshold value Vth even at the maximum. That is, it becomes about 0.3V. Compared with the amount of voltage change in the conventional method, it can be seen that very little writing is required.
As a result, variations due to insufficient writing (especially low current black signals) in a large screen panel can be suppressed, and high uniformity image quality without variations in threshold Vth and mobility μ can be obtained. .
[0047]
As described above, in the precharge period Tpre, the pre-signal current value is set to a value larger than the main signal current value supplied to the data line DTL 101 in the signal writing period Twrt by the horizontal selector 103 with respect to the data line DTL101. However, in this case, in order to increase the current value at the time of driving the current mirror and increase the writing time of the main signal current in the large screen panel, for example, as shown in FIG. 6, it is connected to the same data line DTL101. It is desirable that the TFT 116 serving as the fifth switch in the pixel circuit in the same column is kept conductive.
[0048]
As described above, according to the present embodiment, in order to drive the EL light emitting device 118 by providing the current driving type pixel circuit with the TFTs 115 to 117 and the nodes ND113 and ND114, and further providing the precharge circuit. Before the main signal current supplied to the data line DTL101 is written to the pixel capacitor C111 by making the TFTs 114 and 113 conductive, the pre-signal current supplied to the data line DTL101 is captured by the current mirror driving. Since the pixel capacitor C111 is provided with a precharge circuit for holding a predetermined voltage, the gate voltage of the drive transistor is sufficiently written even with a low current signal, so that the writing variation is reduced. Can be suppressed in time. As a result, even in a large screen panel having a large (heavy) data line capacitance, variations in the threshold value Vth and mobility μ of the TFT 111 can be corrected, and uniform image quality can be obtained.
[0049]
In this embodiment, the example in which the p-channel TFTs 111 to 117 are used as the pixel circuit has been described. However, for example, as illustrated in FIG. 7, the pixel circuit may be configured using n-channel TFTs 121 to 127. . However, the connection form between the power supply potential VCC and the ground potential GDN is reversed.
It is also possible to configure a CMOS type in which p-channel TFTs and n-channel TFTs are mixed.
[0050]
【The invention's effect】
As described above, according to the present invention, since the amount of change in the gate voltage is small even with a low current signal, the gate voltage of the driving transistor is sufficiently written, and writing variations can be suppressed in a short time.
As a result, even in a large screen panel with a large (heavy) data line wiring capacity, variations in the threshold Vth and mobility μ of the driving transistor can be corrected, and uniform image quality can be obtained.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of an organic EL display device employing a pixel circuit according to a first embodiment.
2 is a circuit diagram showing a specific configuration of a pixel circuit according to the present embodiment in the organic EL display device of FIG. 1;
FIG. 3 is a timing chart for explaining the operation of the embodiment.
4 is an equivalent circuit diagram of a precharge period of the pixel circuit of FIG. 2. FIG.
5 is an equivalent circuit diagram of a current writing period of the pixel circuit of FIG. 2. FIG.
FIG. 6 is a diagram for explaining a preferred driving method in a precharge period.
FIG. 7 is a circuit diagram in which a pixel circuit according to the present embodiment is configured by n-channel TFTs.
FIG. 8 is a block diagram showing a configuration of a general organic EL display device.
9 is a circuit diagram illustrating a configuration example of the pixel circuit in FIG. 8. FIG.
FIG. 10 is a circuit diagram illustrating another configuration example of the pixel circuit.
11 is a circuit diagram for explaining an operation when a plurality of pixel circuits of FIG. 10 are connected to a data line.
12 is a diagram for explaining an operation and a problem of the pixel circuit in FIG. 11;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 100 ... Display apparatus, 101, 101A ... Pixel circuit (PXLC), 102 ... Pixel array part, 103 ... Horizontal selector (HSEL), 104 ... Write scanner (WSCN), 105 ... Drive scanner (DSCN), 106 ... Pre-scanner ( PSCN), 111, 121 ... TFT as drive transistor, 112, 122 ... TFT as first switch, 113, 123 ... TFT as second switch, 114, 124 ... TFT as third switch, 115, 125... TFT as the fourth switch, TFT 115 and 126... TFT as the fifth switch, 117 and 127... TFT constituting the conversion unit, 118 and 128... EL light emitting element, DTL 101 to DTL 10 n. WS10m ... scanning line, DSL101-DSL 0m ... drive line, PSL101~PSL10m ... pre-scanning line.

Claims (8)

A pixel circuit that drives an electro-optic element whose luminance changes according to a flowing current,
A data line to which a signal current having a current level corresponding to luminance information is supplied;
First and second nodes;
First and second reference potentials;
A drive transistor that forms a current supply line between the first terminal and the second terminal and controls a current flowing through the current supply line in accordance with a potential of a control terminal connected to the second node;
A first switch connected to the first node;
A second switch connected between the first node and the second node;
A third switch connected between the data line and the second node;
A pixel capacitor connected to the second node,
The current supply line of the drive transistor, the first node, the first switch, and the electro-optic element are connected in series between the first reference potential and the second reference potential, and
In order to drive the electro-optical element, the second switch and the third switch are turned on, and the main signal current supplied to the data line is supplied to the data line before being written to the pixel capacitor element. have a precharge circuit for maintaining a predetermined voltage to the pixel capacitance element captures the pre-signal current that,
The precharge circuit is
A third and fourth node;
A fourth switch connected between the second node and the third node;
A fifth switch connected between the data line and the fourth node;
A conversion circuit that causes the pre-signal current supplied to the fourth node to appear as a voltage level signal at the third node . The conversion unit includes a transistor having a gate connected to the third node, a drain connected to the fourth node, a drain and a gate connected to each other, and a source connected to a predetermined potential. The pixel circuit described. The pixel circuit according to claim 2, wherein a pre-signal current value supplied to the data line is set larger than the main signal current value. A plurality of pixel circuits arranged in a matrix;
A data line to which a signal current having a current level corresponding to luminance information is supplied;
First and second reference potentials,
The pixel circuit is
An electro-optic element whose luminance varies depending on the flowing current;
First and second nodes;
A drive transistor that forms a current supply line between the first terminal and the second terminal and controls a current flowing through the current supply line in accordance with a potential of a control terminal connected to the second node;
A first switch connected to the first node;
A second switch connected between the first node and the second node;
A third switch connected between the data line and the second node;
A pixel capacitor connected to the second node,
The current supply line of the drive transistor, the first node, the first switch, and the electro-optic element are connected in series between the first reference potential and the second reference potential, and
In order to drive the electro-optical element, the second switch and the third switch are turned on, and the main signal current supplied to the data line is supplied to the data line before being written to the pixel capacitor element. have a precharge circuit for maintaining a predetermined voltage to the pixel capacitance element captures the pre-signal current that,
The precharge circuit is
A third and fourth node;
A fourth switch connected between the second node and the third node;
A fifth switch connected between the data line and the fourth node;
And a converter that causes the pre-signal current supplied to the fourth node to appear on the third node as a voltage level signal . The converter includes a transistor having a gate connected to the third node, a drain connected to the fourth node, a drain and a gate connected to each other, and a source connected to a predetermined potential.
The display device according to claim 4 . The display device according to claim 5, further comprising: a first circuit that sets a pre-signal current value supplied to the data line during pre-charging to be larger than the main signal current value. A first circuit for setting a pre-signal current value supplied to the data line at the time of pre-charging to be larger than the main signal current value;
During precharge pre-signal current is supplied to the data line, according to claim 5, further comprising a second circuit for turning the fifth switch in the plurality of pixel circuits connected to the same data line Display device. An electro-optic element whose luminance varies depending on the flowing current;
A data line to which a signal current having a current level corresponding to luminance information is supplied;
First and second nodes;
First and second reference potentials;
A drive transistor that forms a current supply line between the first terminal and the second terminal and controls a current flowing through the current supply line in accordance with a potential of a control terminal connected to the second node;
A first switch connected to the first node;
A second switch connected between the first node and the second node;
A third switch connected between the data line and the second node;
A pixel capacitor connected to the second node,
Between the first reference potential and second reference potential, the current supply line of the drive transistor, said first node, said first switch, and the electro-optical element are connected in series, and further, Third and fourth nodes; a fourth switch connected between the second node and the third node; a second switch connected between the data line and the fourth node; And a conversion unit that causes the pre-signal current supplied to the fourth node to appear at the third node as a voltage level signal. And
In order to drive the electro-optic element, before the main signal current supplied to the data line is written to the pixel capacitor element by turning on the second switch and the third switch,
The fourth switch and the fifth switch are turned on to supply a pre-signal current set to a value larger than the main signal current supplied to the data line to the fourth node, and A first step of performing a precharge process in which the pre-signal current supplied to the node 4 is made to appear at the third node as a voltage level signal in the conversion unit and the voltage is held in the pixel capacitor element; ,
The fourth switch and the fifth switch as a non-conductive state shifts to the signal write process from the pre-charge process, by conducting the second switch and the third switch is supplied to the data line A second step of writing a main signal current to the pixel capacitor element;
A third step of bringing the second switch and the third switch into a non-conducting state, and conducting the first switch to supply a predetermined current to the electro-optical element.

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