JP2004317941A - Pixel circuit, display device, and driving method of pixel circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a pixel circuit capable of optionally selecting emission time of a light emitting element inside a pixel, a display device and a driving method of the pixel circuit. <P>SOLUTION: The pixel circuit is provided with a first capacitor C31, a second capacitor C32, a TFT33 which is connected between nodes ND31 and ND32 and the gate of which is connected with an erasing line ESL31, a TFT34 which is connected between nodes ND32 and ND33 and the gate of which is connected with an erasing line ESL32, a TFT35 which is connected between the node ND32 and an electric charge discharge line VCC and the gate of which is connected with a node ND34, a TFT36 which is connected between a first data line DTL31 and the node ND33 and the gate of which is connected with a scanning line WSL31, a TFT37 which is connected between a second data line DTL32 and the node ND34 and the gate of which is connected with a scanning line WSL32 and a TFT 38 which is connected between the node ND33 and the electric charge discharge line VCC and the gate of which is connected with a scanning line WSL33. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a pixel circuit having an electro-optical element whose luminance is controlled by a current value, such as an organic EL (Electroluminescence) display, and an image display device in which the pixel circuits are arranged in a matrix, and particularly to the inside of each pixel. The present invention relates to a so-called active matrix type image display device in which the value of a current flowing through an electro-optical element is controlled by an insulated gate type field effect transistor provided in a semiconductor device, and a driving method of a pixel circuit.
[0002]
[Prior art]
2. Description of the Related Art In an image display device, for example, a liquid crystal display, an image is displayed by arranging a large number of pixels in a matrix and controlling light intensity for each pixel according to image information to be displayed.
The same applies to an organic EL display and the like, but an organic EL display is a so-called self-luminous display having a light emitting element in each pixel circuit, and has higher image visibility than a liquid crystal display, and a backlight. It has advantages such as unnecessary and quick response speed.
Further, the luminance of each light emitting element is controlled by a current value flowing through the light emitting element, that is, it is significantly different from a liquid crystal display or the like in that the light emitting element is a current control type.
[0003]
The organic EL display can be driven by a simple matrix method or an active matrix method as in the liquid crystal display. However, the former has a simple structure, but it is difficult to realize a large and high-definition display. There's a problem. For this reason, active matrix systems in which a current flowing through a light emitting element inside each pixel is controlled by an active element (generally, a thin film transistor (TFT)) provided inside the pixel have been actively developed.
[0004]
FIG. 4 is a circuit diagram showing a first configuration example of a pixel circuit in an active matrix organic EL display (for example, see Patent Documents 1 and 2).
[0005]
The pixel circuit 10 of FIG. 4 includes a p-channel thin-film field-effect transistor (hereinafter, referred to as TFT) 11, an n-channel TFT 12, a capacitor C <b> 11, and an organic EL element (OLED) 13 as a light emitting element. In FIG. 4, DTL indicates a data line, and WSL indicates a scanning line.
Since the organic EL element has rectification in many cases, it is sometimes called an OLED (Organic Light Emitting Diode). In FIG. 4 and the like, the symbol of a diode is used as a light emitting element, but the OLED is not necessarily used in the following description. It does not require rectification.
In FIG. 4, the source of the TFT 11 is connected to the power supply potential VCC, and the cathode (cathode) of the light emitting element 13 is connected to the ground potential GND. The operation of the pixel circuit 10 of FIG. 4 is as follows.
[0006]
When the scanning line WSL is set to the selected state (here, high level) and the writing potential Vdata is applied to the data line DTL, the TFT 12 is turned on and the capacitor C11 is charged or discharged, and the gate potential of the TFT 11 becomes VDATA.
[0007]
When the scanning line is in a non-selected state (here, low level), the data line DTL is electrically disconnected from the TFT 11, but the gate potential of the TFT 11 is stably held by the capacitor C11.
[0008]
The current flowing through the TFT 11 and the light emitting element 13 has a value corresponding to the gate-source voltage Vgs of the TFT 11, and the light emitting element 13 continues to emit light at a luminance corresponding to the current value.
The operation of selecting the scanning line WSL and transmitting the luminance information given to the data line to the inside of the pixel as described above is hereinafter referred to as “writing”.
As described above, in the pixel circuit 10 of FIG. 4, once VDATA is written, the light emitting element 13 continues to emit light at a constant luminance until the next rewriting.
[0009]
FIG. 5 is a circuit diagram showing a second configuration example of the pixel circuit in the active matrix type organic EL display.
[0010]
The pixel circuit 20 in FIG. 5 includes p-channel TFTs 21 and 22, n-channel TFTs 23 and 24, a capacitor C21, and an organic EL element OLED25 as a light emitting element. In FIG. 5, DTL indicates a data line, WSL indicates a scanning line, and ESL indicates an erase line.
The operation of the pixel circuit 20 will be described below with reference to a timing chart shown in FIG.
[0011]
First, in the state (period) {circle around (1)}, as shown in FIGS. 6C and 6D, the scan signal WS applied to the scan line WSL and the erase signal ES applied to the erase line ESL are set to the high level. You. As a result, the TFT 24 and the TFT 23 are turned on, and the TFT 22 is turned off, and the capacitor C21 is charged from the data line DTL with electric charge corresponding to the amount of data VDATA.
[0012]
In the state (period) (2), as shown in FIGS. 6C and 6D, the scanning signal WS to the scanning line WSL and the erasing signal ES to the erasing line ESL are set to low level. As a result, the TFT 24 and the TFT 23 are turned off and the TFT 22 is turned off, and a current corresponding to the charge charged in the capacitor C21 flows to the EL light emitting element 25 through the TFT 21. This current is maintained until the applied signal ES to the erase line ESL becomes high level.
[0013]
In state (period) {circle around (3)}, the erase signal ES to the erase line ESL is set to the high level as shown in FIG. As a result, the TFT 23 and the TFT 22 are turned on, so that the electric charge charged in the capacitor C21 is discharged through the TFT 23 and the TFT 22, and the light emission of the EL light emitting element 25 is turned off there.
[0014]
As described above, in the circuit of FIG. 5, each pixel uniquely controls the light emitting period (DUTY) of the light emitting element 25 by using one erase line ESL.
[0015]
[Patent Document 1]
USP 5,684,365
[Patent Document 2]
JP-A-8-234683
[0016]
[Problems to be solved by the invention]
By the way, in the circuit of FIG. 4, since there is no switching element for discharging the electric charge accumulated in the storage capacitor C11 of the light emitting element 13, the light emitting time of the display element of the entire screen is selected in one frame. I couldn't do that.
[0017]
Similarly, the circuit of FIG. 5 also has only one TFT 22 as a switching element for discharging the charge stored in the storage capacitor C21 of the light emitting element 25 and one erase line ESL for controlling the light emission time. For this reason, the light emission time of the light emitting elements 25 on the entire screen can be uniquely selected only in one frame.
[0018]
Accordingly, in the organic EL display, the light emission time of the light emitting element can be selected only in the same light emission time in all the light emitting elements (display elements) in which the same erase signal is selected in one frame per panel. Was.
Therefore, for example, when a multi-screen display system capable of displaying a plurality of input sources is connected to a display device, for each input source that is displayed on the screen divided into areas, for each area where the input video source is displayed. There is a disadvantage that optimal brightness and signal processing cannot be performed, and it is difficult to express a high-impact image with a sense of contrast.
That is, in the conventional organic EL display, for example, even if a certain input signal source has a large area and a bright screen occupies the opposite part of the display area, and a different input video source is displaying a small area and a dark screen, a large area is displayed. By reducing the light emission time of the display element and suppressing the brightness for bright display areas, power consumption can be reduced without deteriorating image quality, and the light emission time can be increased for dark display areas with a small area. Therefore, it is difficult to express video signals having different characteristics on one screen by improving the sense of contrast of image quality.
In order to realize this, it is necessary to adjust the image quality for each input on the signal processing system side for driving the display device, resulting in a cost disadvantage of using a large-scale system and a plurality of high-performance ICs. Was.
[0019]
The present invention has been made in view of the above circumstances, and an object of the present invention is to make it possible to arbitrarily select a light emitting time of a light emitting element inside a pixel, and to set an optimum luminance for each area where an input video source is displayed. Another object of the present invention is to provide a pixel circuit, a display device, and a method for driving a pixel circuit, which can perform high-resolution images with high contrast and signal processing.
[0020]
[Means for Solving the Problems]
In order to achieve the above object, a first aspect of the present invention is a pixel circuit for driving an electro-optical element whose luminance changes according to a flowing current, wherein the first data is supplied with a data signal corresponding to luminance information. A first data line, a second data line to which a control data signal for controlling a light emission time of the electro-optical element is supplied, first, second, third, and fourth control lines; Forming a current supply line between the second, third, and fourth nodes, the first and second reference potentials, the charge discharge line, and the first and second terminals, and connecting to the first node; A drive transistor for controlling a current flowing through the current supply line in accordance with the potential of the control terminal, a first storage capacitor for storing a data signal written to the first node, Connected to the second node, A first switching element that is controlled to be conductive by one control line, and a second switching element that is connected between the second node and the third node and that is controlled to be conductive by the second control line And a third switching element connected between the second node and the charge discharge line, the conduction of which is controlled in accordance with the potential of the fourth node, and a control written to the fourth node. A second storage capacitor for holding a data signal, a fourth switching element connected between the first data line and the third node, the conduction of which is controlled by the third control line; A fifth switching element connected between a second data line and the fourth node, the conduction of which is controlled by the fourth control line; and a fifth switching element. The drive above Current supply line of the transistor, and the electro-optical element are connected in series.
[0021]
Preferably, the semiconductor device includes a fifth control line, and a sixth switching element connected between the fourth node and the charge discharge line, the conduction of which is controlled by the fifth control line.
[0022]
Preferably, when the first and second switching elements are in a conducting state and the fourth switching element is in a non-conducting state, means for discharging the electric charge of the third node to the electric charge discharging line. Having.
[0023]
Preferably, when the electro-optical element is driven, the first switching element, the second switching element, and the second switching element are controlled by the first control line, the second control line, and the third control line as a first stage. After the element and the fourth switching element are turned on and the charge corresponding to the data signal propagated through the first data line is charged into the first storage capacitor through the first node, The first switching element, the second switching element, and the fourth switching element are kept in a non-conductive state, the fifth control element is made conductive by the fourth control line, and the second data line is connected. After the second storage capacitor is charged with a charge corresponding to the propagated control data signal, the fifth switching element is held in a non-conductive state, and the second switching element is used as a second stage. It said first switching element is made conductive by control line, as a third stage, the second switching element is brought into conduction by the second control line.
[0024]
Preferably, when driving the electro-optical element, as a first stage, the sixth control element is turned on by the fifth control line for a predetermined period, and the second holding element is passed through the fourth node. The charge of the capacitor is discharged to be in an initial state, and as a second stage, the sixth switching element is kept in a non-conductive state by the fifth control line, and the first control line and the second The first switching element, the second switching element, and the fourth switching element are turned on by the control line and the third control line, and the electric charge corresponding to the data signal propagated through the first data line. Is charged in the first storage capacitor through the first node, the first switching element, the second switching element, and the fourth switching element are turned off. After being held, the fifth switching element is turned on by the fourth control line, and the charge corresponding to the control data signal propagated through the second data line is charged in the second storage capacitor. The fifth switching element is kept in a non-conductive state, the first control element is turned on by the first control line as a third stage, and the second control is turned on as a fourth stage. The line causes the second switching element to conduct.
[0025]
In the display device according to the second aspect of the present invention, a plurality of pixel circuits are arranged in a matrix, and the pixel circuits are wired for each column in the matrix arrangement of the pixel circuits, and a data signal according to luminance information is supplied. A first data line, a second data line wired for each column with respect to the matrix arrangement of the pixel circuits, and a control data signal for controlling a light emission time of the electro-optical element is supplied to the first data line; A first, a second, a third, and a fourth control line, a first and a second reference potential, and a charge discharge line, wired for each row with respect to the matrix arrangement of the circuit; Each pixel circuit forms an electro-optical element whose luminance changes according to a flowing current, and a current supply line between a first terminal and a second terminal, and the current supply line is formed according to a potential of a control terminal connected to the first node. Controls the current flowing through the current supply line A driving transistor, a first storage capacitor for storing a data signal written to the first node, and a first control line connected between the first node and the second node. A second switching element connected between the second node and the third node, the conduction of which is controlled by the second control line; A third switching element connected between the second node and the charge discharge line, the conduction of which is controlled in accordance with the potential of the fourth node; and a control data signal written to the fourth node. A second storage capacitor, a fourth switching element connected between the first data line and the third node, the conduction of which is controlled by the third control line; Line and the fourth A fifth switching element connected between the first reference potential and the second reference potential, the driving transistor being connected between the first reference potential and the second reference potential. And the electro-optical element are connected in series.
[0026]
A third aspect of the present invention is to control an electro-optical element whose luminance changes according to a flowing current, a first data line to which a data signal corresponding to luminance information is supplied, and a light emission time of the electro-optical element. A second data line to which the control data signal is supplied, first, second, third, and fourth control lines; first, second, third, and fourth nodes; And forming a current supply line between the second reference potential, the charge discharge line, the first terminal and the second terminal, and setting the current supply line according to the potential of a control terminal connected to the first node. A driving transistor for controlling a flowing current, a first storage capacitor for storing a data signal written to the first node, and a driving transistor connected between the first node and the second node; A first switch that is controlled to be conductive by one control line A second switching element connected between the second node and the third node, the conduction of which is controlled by the second control line; and the second node and the charge discharging line. A third switching element, which is connected between the second switching element and the third node, and which is controlled to be conductive according to the potential of the fourth node; a second storage capacitor that stores a control data signal written to the fourth node; A fourth switching element connected between the first data line and the third node and controlled to be conductive by the third control line; and a second switching element connected to the second data line and the fourth node. And a fifth switching element that is controlled to be conductive by the fourth control line. The current of the drive transistor is between the first reference potential and the second reference potential. Supply line, and the above electric light A method of driving a pixel circuit in which elements are connected in series, wherein the first control element, the second control element, and the third control element control the first switching element, the second switching element, And a first step of causing the fourth switching element to conduct, and charging the first storage capacitor through the first node with a charge corresponding to a data signal propagated through the first data line; A second step of keeping the first switching element, the second switching element, and the fourth switching element in a non-conducting state; and causing the fifth switching element to conduct by the fourth control line; A third step of charging the second storage capacitor with a charge corresponding to a control data signal propagated through the data line, and holding the fifth switching element in a non-conductive state A fourth step, a fifth step of making the first switching element conductive by the first control line, and a sixth step of making the second switching element conductive by the second control line. Have.
[0027]
A fourth aspect of the present invention is to control an electro-optical element whose luminance changes according to a flowing current, a first data line to which a data signal according to luminance information is supplied, and a light emitting time of the electro-optical element. Data line to which the control data signal is supplied, at least first, second, third, and fourth control lines, and first, second, third, fourth, and fifth nodes. Forming a current supply line between the first and second reference potentials, the charge discharge line, and the first and second terminals, and according to the potential of the control terminal connected to the first node, A drive transistor that controls a current flowing through a current supply line, a first storage capacitor that holds a data signal written to the first node, and a connection between the first node and the second node And the conduction is controlled by the first control line. A first switching element, a second switching element connected between the second node and the third node, the conduction of which is controlled by the second control line; A third switching element connected between the charge discharging line and controlled to be conductive in accordance with the potential of the fourth node, and a second holding element for holding a control data signal written to the fourth node A capacitor, a fourth switching element connected between the first data line and the third node, the conduction of which is controlled by the third control line, the fourth data line, and the fourth data line; A fifth switching element connected between the fourth node and the fourth control line, the fifth switching element being connected between the fourth node and the charge discharge line, and connected to the fifth control line. Controlled by A pixel circuit, comprising: a sixth switching element; and a current supply line of the driving transistor and the electro-optical element connected in series between the first reference potential and the second reference potential. Wherein the sixth control element is turned on by the fifth control line for a predetermined period to discharge electric charge of the second storage capacitor through the fourth node, thereby setting an initial state. A second step of keeping the sixth switching element in a non-conducting state by the fifth control line; a first control line, a second control line, and a third control line The first switching element, the second switching element, and the fourth switching element are turned on, and charges corresponding to a data signal propagated through the first data line are passed through the first node. A third step of charging the first storage capacitor, a fourth step of holding the first switching element, the second switching element, and the fourth switching element in a non-conductive state, A fifth step of causing the fifth switching element to conduct by the control line, and charging the second storage capacitor with a charge corresponding to a control data signal propagated through the second data line; A sixth step of keeping the switching element in a non-conducting state, a seventh step of causing the first switching element to conduct by the first control line, and the second switching by the second control line. An eighth step of conducting the element.
[0028]
According to the present invention, for example, the sixth control element is kept in the conductive state by the fifth control line for a predetermined period. As a result, the charge of the second storage capacitor is discharged through the fourth node to be in an initial state.
Then, the sixth switching element is kept in a non-conductive state by the fifth control line.
Next, the first switching element, the second switching element, and the fourth switching element are kept conductive by the first control line, the second control line, and the third control line. At this time, the data signal propagated through the first data line is transferred to the first node, and the charge corresponding to the data signal is charged to the first storage capacitor through the first node.
Thereafter, the first switching element, the second switching element, and the fourth switching element are held in a non-conductive state, and the charge charged in the first storage capacitor is maintained. For example, light emission of the electro-optical element is started in this state.
Then, the fifth control element is maintained in a conductive state by the fourth control line. At this time, the control data signal propagated through the second data line is transferred to the fourth node, and the charge corresponding to the control data signal is charged to the second storage capacitor through the fourth node.
After that, the fifth switching element is held in a non-conductive state, and the electric charge charged in the second holding capacitor is maintained.
[0029]
Next, the first switching element is kept conductive by the first control line. At this time, when a potential difference is generated in the second storage capacitor during charging of the second storage capacitor, the third switching element is maintained in a conductive state (on state), and thus the first switching element is maintained in the first state. The charge of the storage capacitor is discharged through the first node, the first switching element, the second node, and the third switching element, and light emission of the electro-optical element is stopped there.
On the other hand, when no potential difference is generated in the second storage capacitor during charging of the second storage capacitor, the third switching element is held in a non-conducting state (off state). The charge of the storage capacitor is not discharged. Therefore, the light emission of the electro-optical element is maintained.
Next, the second control element keeps the second switching element conductive. In this case, when a potential difference occurs in the second storage capacitor, the charge of the first storage capacitor is discharged and light emission of the electro-optical element is stopped, so that there is no influence here.
When there is no potential difference in the second storage capacitor, the third switching element is held in the off state, and thus the electric charge of the first storage capacitor passes through the second switching element and the second node. It is discharged and the light emission of the electro-optical element is stopped there.
[0030]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0031]
FIG. 1 is a circuit diagram showing one embodiment of a pixel circuit according to the present invention applicable to an active matrix type image display device.
[0032]
As shown in FIG. 1, the pixel circuit 30 according to the present embodiment includes a p-channel TFT 31, a TFT 32, n-channel TFTs 33 to 38, capacitors C31 and C32, a light-emitting element 39 including an organic EL element (OLED: electro-optical element), And a first node ND31 to a fourth node ND34.
In FIG. 1, DTL 31 indicates a first data line, DTL 32 indicates a second data line, WSL 31, WSL 32, and WSL 33 indicate scanning lines, and ESL 31 and ESL 32 indicate erasing lines.
[0033]
Among these constituent elements, the TFT 31 constitutes a driving transistor according to the present invention, the TFT 32 constitutes means for discharging electric charges when the TFT 36 is off and the TFTs 33 and 34 are on, and the TFT 33 is a first switching element. The TFT 34 configures a second switching element, the TFT 35 configures a third switching element, the TFT 36 configures a fourth switching element, the TFT 37 configures a fifth switching element, and the TFT 38 configures The sixth switching element is formed, the capacitor C31 forms a first storage capacitor according to the present invention, and the capacitor C32 forms a second storage capacitor.
[0034]
Further, the erase line ESL31 corresponds to the first control line according to the present invention, the erase line ESL32 corresponds to the second control line, the scanning line WSL31 corresponds to the third control line, and the scanning line WSL32 corresponds to the third control line. The scanning line WSL33 corresponds to the fifth control line, corresponding to the fourth control line.
Further, a supply line (power supply potential) of the power supply voltage VCC corresponds to a first reference potential, and the ground potential GND corresponds to a second reference potential.
Further, in the present embodiment, the supply line of the power supply voltage VCC as the first power supply potential is shared as the charge discharge line according to the present invention.
[0035]
In the pixel circuit 30, a TFT 31 and an optical element 39 are connected in series between a first reference potential (VCC) and a second reference potential (ground potential GND in this embodiment). Specifically, a source (for example, a first terminal) of the TFT 31 is connected to a supply line of the power supply voltage VCC, a drain (a second terminal) of the TFT 31 is connected to an anode of the light emitting element 39, and a cathode side of the light emitting element 39 is grounded. It is connected to the potential GND. The gate (control terminal) of the TFT 31 is connected to the first node ND31.
[0036]
The source / drain of the TFT 33 as a first switching element is connected to the first node ND31 and the second node ND32, respectively, and the gate of the TFT 33 is connected to an erase line ESL31 as a first control line.
The source / drain of the TFT 34 as a second switching element is connected to the second node ND32 and the second node ND33, respectively, and the gate of the TFT 34 is connected to the erase line ESL32 as a second control line.
The third node ND33 is connected to the gate of the TFT 32, the drain of the TFT 32 is connected to the third node ND33, that is, the drain, and the source is connected to the supply line of the power supply voltage VCC.
The source / drain of the TFT 36 as a fourth switching element is connected to the first data line DTL31 and the drain (third node ND33) of the TFT 32, respectively, and the gate of the TFT 36 is connected to the scanning line WSL31 as a third control line. It is connected.
[0037]
The drain and source of the TFT 35 as a third switching element are connected between the second node ND32 and the supply line (charge discharge line) of the power supply voltage VCC, and the gate of the TFT 35 is connected to the fourth node ND34. ing.
The drain and source of the TFT 37 as a fifth switching element are connected to the second data line DTL32 and the fourth node ND34, respectively, and the gate of the TFT 37 is connected to the scanning line WSL32 as a fourth control line. .
The drain and source of a TFT 38 as a seventh switching element are connected between the fourth node ND34 and a supply line (charge discharge line) of the power supply voltage VCC, and the gate of the TFT 38 is scanned as a fifth control line. It is connected to the line WSL33.
[0038]
A first electrode of a first capacitor C31 as a first storage capacitor is connected to a first node ND31, and a second electrode is connected to a supply line of a power supply voltage VCC.
A first electrode of a second capacitor C32 as a second storage capacitor is connected to the fourth node ND34, and a second electrode is connected to a supply line of the power supply voltage VCC.
[0039]
In such a configuration, the first erase signal ES1 (n) is propagated to the erase line ESL31, the second erase signal ES (n) is propagated to the erase line ESL32, and the first erase signal ES (n) is propagated to the scan line WSL31. The scanning signal WS (n) is propagated, the second scanning signal WS (n + 1) is propagated to the scanning line WSL32, and the third scanning signal WS (n-1) is propagated to the scanning line WSL33.
[0040]
By arranging a large number of such pixel circuits in an M × N matrix as shown in FIG. 2 and repeating the writing of the data lines DTL1 to DTL-N while sequentially selecting the scanning lines WSL1 to WSL-M, the active matrix A type image display device can be configured.
In FIG. 2, each data line DTL31-1 to DTL31-N and each data line DTL32-1 to DTL32-N are driven by a horizontal drive circuit (HDRV) 41, and each of the erase lines ESL31-1 to ESL31-M, ESL32-1. To ESL32-M, scanning lines WSL31-1 to WSL31-M, WSL32-1 to WSL32-M, and WSL33-1 to WSL33-M are driven by a vertical drive circuit (VDRV) 42.
[0041]
When the pixel circuits 30 are applied to a display device arranged in a matrix, for example, the first erase signal ES1 (n) is propagated to the erase line ESL31, and the second erase signal ES is transmitted to the erase line ESL32. (N) is propagated, the first scanning signal WS (n) is propagated to the scanning line WSL31, and the scanning signal of the pixel circuit (pixel row) to be accessed next is transmitted to the scanning line WSL32 in the second scanning. The signal is propagated as the signal WS (n + 1), and the scanning signal of the pixel circuit (one row before) accessed one time before is transmitted to the scanning line WSL33 as the third scanning signal WS (n-1).
[0042]
The operation when the pixel circuit 30 is applied to an active matrix image display device will be described below with reference to a timing chart shown in FIG.
[0043]
First, in the state (period) {circle around (1)}, as shown in FIG. 3C, the horizontal drive circuit 41 applies the third scan signal WS (n-1) to the scan line WSL33 at a high level.
As a result, the reset TFT 38 is turned on, and the charge of the second capacitor C32 is discharged through the fourth node ND34 and the TFT 38. As a result, the TFT 35 whose gate is connected to the fourth node ND34 is stably held in the off state, and current does not pass. This state is hereinafter referred to as an initial state.
[0044]
Next, in the state (period) {circle around (2)}, as shown in FIGS. 3 (D), (H) and (I), the horizontal drive circuit 41 causes the first scan signal WS (n) to go high to the scan line WSL31. At the level, the erase signals ES1 (n) and ES2 (n) are applied to the erase lines ESL31 and ESL32 at a high level. At this time, as shown in FIG. 4N, the data VDATA is transmitted to the first data line DTL31 by the vertical drive circuit 42.
As a result, the TFT 36, the TFT 34, and the TFT 33 are turned on, and the data VDATA propagated to the first data line DTL31 is transmitted through the TFT 36, the third node ND33, the TFT 34, the second node ND32, and the TFT 33. Propagated to the node ND31, the charge corresponding to the data amount is charged in the first capacitor C31. At this time, a predetermined current flows through the EL light emitting element 39 to emit light. Incidentally, in this state, the pixels on the (n + 1) th line are in the initial state.
[0045]
Next, in the state (period) {circle around (3)}, the first scanning signal WS (n) set to the low level in the state {circle over (2)} and the erase signals ES1 (n) and ES2 (n) are shown in FIG. As shown in (D), (H) and (I), the signal is set to the low level and applied to the first scanning line WSL31 and the erasing lines ESL31 and ESL32.
As a result, the TFT 36, the TFT 34, and the TFT 33 are turned off, and the electric charge accumulated in the first capacitor C31 is held. At this time, the light emitting state of the EL light emitting element 39 is maintained.
At this time, as shown in FIG. 3E, the third scanning signal WS (n + 1) is applied to the scanning line WSL32 at a high level. At this time, as shown in FIG. 3 (O), the data hDATA is transmitted to the second data line DTL32 by the vertical drive circuit 42.
As a result, the TFT 37 is turned on, the data hDATA propagated to the second data line DTL32 is propagated to the fourth node ND34 through the TFT 37, and the charge corresponding to the data amount is charged in the second capacitor C32. You.
[0046]
Next, in the state (period) {circle around (4)}, as shown in FIG. 3E, the third scanning signal WS (n + 1) is applied to the scanning line WSL32 at a low level.
As a result, the TFT 37 is turned off, and the electric charge accumulated in the first capacitor C32 is held.
Then, as shown in FIG. 3H, the erase signal ES1 (n) is set to a high level and applied to the erase line ESL31. Thus, the TFT 33 is turned on.
At this time, if a potential difference is generated in the second capacitor C32 due to the charging operation performed in the state (3), the TFT 35 is in the ON state, and the electric charge accumulated in the first capacitor C31 passes through the TFT 35. And the emission of the EL element 39 is stopped there.
On the other hand, when no potential difference occurs in the second capacitor C32 due to the charging operation performed in the state (3), the TFT 35 is off, and at this time, as described above, the TFT 33 is turned off by the erase signal ES1 (n). Even in the ON state, the light emitting state of the EL light emitting element 39 is not stopped, and the light emitting state of the EL light emitting element 39 is maintained.
[0047]
Next, in the state (period) (5), as shown in FIG. 4I, the erase signal ES2 (n) is applied to the erase line ESL32 at a high level. As a result, the TFT 34 is turned on.
At this time, if a potential difference occurs in the second capacitor C32 due to the charging operation in the state (3), the light emission of the EL light emitting element 39 is turned off (stopped) in the state (3). It does not affect.
On the other hand, when the potential difference is not generated in the second capacitor C32 by the charging operation performed in the state (3), the TFT 35 is in the off state and the TFT 34 is turned on by the erase signal ES2 (n). Then, the potential accumulated in the first capacitor 31 is discharged through the TFT 34 and the TFT 32, and the light emitting operation of the EL light emitting element 39 is stopped.
[0048]
By performing this state transition on each line, the duty (DUTY) time can be arbitrarily selected at an arbitrary pixel on the screen, and the light emission time of the EL light emitting element 39 can be controlled.
As described above, since the DUTY time is selected for each pixel, an arbitrary continuous area can be formed.
Thus, by performing optimal brightness and signal processing for each area in which the input video source is displayed, an image with a higher contrast and an impact can be expressed without being affected by power consumption control.
[0049]
As described above, according to the present embodiment, the TFT 31 as a drive transistor, the first capacitor C31 holding the data signal written to the first node ND31, the first node ND31 and the second A TFT 33 connected to a node ND32 and a gate connected to an erase line ESL31; a TFT34 connected between a second node ND32 and a third node ND33 and a gate connected to the erase line ESL32; A TFT 35 connected between the second node ND32 and the charge discharge line VCC and having a gate connected to the fourth node ND34, and a second capacitor C32 holding a control data signal written to the fourth node ND34. Between the first data line DTL31 and the third node ND33, and the gate is connected to the scanning line WSL31. Between the connected TFT 36, the second data line DTL32 and the fourth node ND34, and the TFT 37 whose gate is connected to the scanning line WSL32, and between the fourth node ND34 and the charge discharge line VCC. Since the TFT 38 is connected to the scanning line WSL33 and the gate is connected to the scanning line WSL33, the following effects can be obtained.
[0050]
That is, the light emitting time of the light emitting element inside the pixel can be arbitrarily selected.
As a result, by selecting a plurality of display pixel regions in a matrix on the screen and controlling the light emission time, optimal brightness and signal processing are performed for each area in which the input video source is displayed, thereby improving the contrast. High-impact images can be expressed.
In addition, even if an input signal source has a large area and a bright screen occupies the opposite part of the display area, even if a different input video source is displaying a small area and a dark screen, it is displayed for a large area and a bright display area. By reducing the light emission time of the element and suppressing the luminance, power saving is achieved without impairing the image quality, and by increasing the light emission time for a small area and dark display area, the contrast of the image quality is improved. Thus, video signals having different characteristics can be expressed on a single screen.
Also, by optimally selecting ON / OFF of the control and a variable range of the control, it is possible to perform an optimal display for an input signal such as a text display or a moving image display.
Further, since the signal processing for each input source is reduced in the video signal processing unit, the cost and size of the system can be reduced.
Furthermore, since the display period (DUTY) can be selected for each pixel, it is possible to correct a decrease in luminance due to deterioration of each pixel by changing the DUTY ratio for each pixel.
[0051]
In the pixel circuit 30 of FIG. 1, an NMOS is used as a switching element, but this is an example, and the present invention is not limited to this. For example, as described above, since the TFTs 33 to 38 are merely switches, it is obvious that all or a part of them can be formed by p-channel MOS or other switch elements.
[0052]
【The invention's effect】
As described above, according to the present invention, the light emission time of the light emitting element inside the pixel can be arbitrarily selected.
As a result, by selecting a plurality of display pixel regions in a matrix on the screen and controlling the light emission time, optimal brightness and signal processing are performed for each area in which the input video source is displayed, thereby improving the contrast. High-impact images can be expressed.
In addition, even if an input signal source has a large area and a bright screen occupies the opposite part of the display area, even if a different input video source is displaying a small area and a dark screen, it is displayed for a large area and a bright display area. By reducing the light emission time of the element and suppressing the luminance, power saving is achieved without impairing the image quality, and by increasing the light emission time for a small area and dark display area, the contrast of the image quality is improved. Thus, video signals having different characteristics can be expressed on a single screen.
Also, by optimally selecting ON / OFF of the control and a variable range of the control, it is possible to perform an optimal display for an input signal such as a text display or a moving image display.
Further, since the signal processing for each input source is reduced in the video signal processing unit, the cost and size of the system can be reduced.
Furthermore, since the display period (DUTY) can be selected for each pixel, it is possible to correct a decrease in luminance due to deterioration of each pixel by changing the DUTY ratio for each pixel.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing one embodiment of a pixel circuit according to the present invention applicable to an active matrix type image display device.
FIG. 2 is a block diagram illustrating a configuration example of an active matrix image display device to which the pixel circuit of FIG. 1 is applied.
FIG. 3 is a timing chart for explaining the operation of the circuit of FIG. 1;
FIG. 4 is a circuit diagram showing a first configuration example of a pixel circuit in an active matrix type organic EL display.
FIG. 5 is a circuit diagram showing a second configuration example of the pixel circuit in the active matrix type organic EL display.
FIG. 6 is a timing chart for explaining the operation of the circuit of FIG. 5;
[Explanation of symbols]
Reference numeral 30 denotes a pixel circuit, 31 denotes a TFT as a driving transistor, 33 denotes a TFT as a first switching element, 34 denotes a TFT as a second switching element, 35 denotes a TFT as a third switching element, and 36 denotes a fourth. TFT as a switching element, 37 ... TFT as a fifth switching element, 38 ... TFT as a sixth switching element, 39 ... light emitting element, ND31 ... first node, ND32 ... second node, ND33 ... 3rd node, ND34 ... 4th node, ESL31 ... Erase line as first control line, ESL32 ... Erase line as second control line, WSL31 ... Scanning line as third control line, WSL32 ... A scanning line as a fourth control line, WSL33... A scanning line as a fifth control line, 40... An image display device, 41. (HDRV), 42 ... vertical drive circuit (VDRV).

Claims (10)

A pixel circuit for driving an electro-optical element whose luminance changes according to a flowing current,
A first data line to which a data signal corresponding to the luminance information is supplied;
A second data line to which a control data signal for controlling a light emission time of the electro-optical element is supplied;
First, second, third, and fourth control lines;
First, second, third, and fourth nodes;
First and second reference potentials;
A charge discharge line;
A drive transistor that forms a current supply line between the first terminal and the second terminal, and controls a current flowing through the current supply line according to a potential of a control terminal connected to the first node;
A first storage capacitor for holding a data signal written to the first node;
A first switching element connected between the first node and the second node, the conduction of which is controlled by the first control line;
A second switching element connected between the second node and the third node, the conduction of which is controlled by the second control line;
A third switching element connected between the second node and the charge discharge line, the conduction of which is controlled in accordance with the potential of the fourth node;
A second storage capacitor for holding the control data signal written to the fourth node;
A fourth switching element connected between the first data line and the third node, the conduction of which is controlled by the third control line;
A fifth switching element connected between the second data line and the fourth node, the conduction of which is controlled by the fourth control line;
A pixel circuit in which a current supply line of the driving transistor and the electro-optical element are connected in series between the first reference potential and the second reference potential. A fifth control line;
The pixel circuit according to claim 1, further comprising: a sixth switching element connected between the fourth node and the charge discharge line, the conduction of which is controlled by the fifth control line. Means for discharging the charge at the third node to the charge discharge line when the first and second switching elements are in a conductive state and the fourth switching element is in a non-conductive state. 2. The pixel circuit according to 2. When driving the electro-optical element,
As a first stage, the first switching element, the second switching element, and the fourth switching element are turned on by the first control line, the second control line, and the third control line, After a charge corresponding to a data signal propagated through the first data line is charged in the first storage capacitor through the first node, the first switching element, the second switching element, and the The fourth switching element is kept in a non-conductive state, the fifth control element is made conductive by the fourth control line, and the electric charge corresponding to the control data signal propagated through the second data line is stored in the fourth control line. After the second storage capacitor is charged, the fifth switching element is held in a non-conductive state,
As a second stage, the first switching element is turned on by the first control line,
3. The pixel circuit according to claim 2, wherein, as the third stage, the second switching element is turned on by the second control line. When driving the electro-optical element,
As a first stage, the sixth control element is turned on by the fifth control line for a predetermined period, and the charge of the second storage capacitor is discharged through the fourth node to be in an initial state;
As a second stage, the sixth switching element is maintained in a non-conducting state by the fifth control line, and the first control line, the second control line, and the third control line perform the first switching operation. The second switching element, the second switching element, and the fourth switching element are turned on, and the charge corresponding to the data signal propagated through the first data line is passed through the first node to the first storage capacitor. , The first switching element, the second switching element, and the fourth switching element are held in a non-conductive state, and the fifth control element is turned on by the fourth control line. After the charge corresponding to the control data signal propagated through the second data line is charged in the second storage capacitor, the fifth switching element is held in a non-conductive state.
As a third stage, the first switching element is turned on by the first control line,
3. The pixel circuit according to claim 2, wherein, as the fourth stage, the second switching element is turned on by the second control line. A plurality of pixel circuits arranged in a matrix,
A first data line wired for each column with respect to the matrix arrangement of the pixel circuits and supplied with a data signal corresponding to luminance information;
A second data line wired for each column with respect to the matrix arrangement of the pixel circuits and supplied with a control data signal for controlling a light emission time of the electro-optical element;
First, second, third, and fourth control lines wired for each row with respect to the matrix arrangement of the pixel circuits;
First and second reference potentials;
And a charge discharge line;
Each of the above pixel circuits is
An electro-optical element whose luminance changes according to a flowing current;
A drive transistor that forms a current supply line between the first terminal and the second terminal, and controls a current flowing through the current supply line according to a potential of a control terminal connected to the first node;
A first storage capacitor for holding a data signal written to the first node;
A first switching element connected between the first node and the second node, the conduction of which is controlled by the first control line;
A second switching element connected between the second node and the third node, the conduction of which is controlled by the second control line;
A third switching element connected between the second node and the charge discharge line, the conduction of which is controlled in accordance with the potential of the fourth node;
A second storage capacitor for holding the control data signal written to the fourth node;
A fourth switching element connected between the first data line and the third node, the conduction of which is controlled by the third control line;
A fifth switching element connected between the second data line and the fourth node, the conduction of which is controlled by the fourth control line;
A display device in which a current supply line of the driving transistor and the electro-optical element are connected in series between the first reference potential and the second reference potential. A fifth control line;
7. The display device according to claim 6, further comprising: a sixth switching element connected between the fourth node and the charge discharge line, the conduction of which is controlled by the fifth control line. Means for discharging the charge at the third node to the charge discharge line when the first and second switching elements are in a conductive state and the fourth switching element is in a non-conductive state. 7. The display device according to 7. An electro-optical element whose luminance changes according to a flowing current;
A first data line to which a data signal corresponding to the luminance information is supplied;
A second data line to which a control data signal for controlling a light emission time of the electro-optical element is supplied;
First, second, third, and fourth control lines;
First, second, third, and fourth nodes;
First and second reference potentials;
A charge discharge line;
A drive transistor that forms a current supply line between the first terminal and the second terminal, and controls a current flowing through the current supply line according to a potential of a control terminal connected to the first node;
A first storage capacitor for holding a data signal written to the first node;
A first switching element connected between the first node and the second node, the conduction of which is controlled by the first control line;
A second switching element connected between the second node and the third node, the conduction of which is controlled by the second control line;
A third switching element connected between the second node and the charge discharge line, the conduction of which is controlled in accordance with the potential of the fourth node;
A second storage capacitor for holding the control data signal written to the fourth node;
A fourth switching element connected between the first data line and the third node, the conduction of which is controlled by the third control line;
A fifth switching element connected between the second data line and the fourth node, the conduction of which is controlled by the fourth control line;
A method for driving a pixel circuit in which a current supply line of the drive transistor and the electro-optical element are connected in series between the first reference potential and the second reference potential,
The first control line, the second control line, and the third control line are used to make the first switching element, the second switching element, and the fourth switching element conductive, and the first data line is connected. A first step of charging the first storage capacitor with a charge corresponding to the propagated data signal through the first node;
A second step of keeping the first switching element, the second switching element, and the fourth switching element in a non-conductive state;
A third step of causing the fifth switching element to conduct by the fourth control line and charging the second storage capacitor with a charge corresponding to a control data signal propagated through the second data line;
A fourth step of holding the fifth switching element in a non-conductive state;
A fifth step of conducting the first switching element by the first control line;
A sixth step of causing the second switching element to conduct by the second control line. An electro-optical element whose luminance changes according to a flowing current;
A first data line to which a data signal corresponding to the luminance information is supplied;
A second data line to which a control data signal for controlling a light emission time of the electro-optical element is supplied;
First, second, third, fourth, and fifth control lines;
First, second, third, and fourth nodes;
First and second reference potentials;
A charge discharge line;
A drive transistor that forms a current supply line between the first terminal and the second terminal, and controls a current flowing through the current supply line according to a potential of a control terminal connected to the first node;
A first storage capacitor for holding a data signal written to the first node;
A first switching element connected between the first node and the second node, the conduction of which is controlled by the first control line;
A second switching element connected between the second node and the third node, the conduction of which is controlled by the second control line;
A third switching element connected between the second node and the charge discharge line, the conduction of which is controlled in accordance with the potential of the fourth node;
A second storage capacitor for holding the control data signal written to the fourth node;
A fourth switching element connected between the first data line and the third node, the conduction of which is controlled by the third control line;
A fifth switching element connected between the second data line and the fourth node, the conduction of which is controlled by the fourth control line;
A sixth switching element connected between the fourth node and the charge discharge line, the conduction of which is controlled by the fifth control line;
A method for driving a pixel circuit in which a current supply line of the drive transistor and the electro-optical element are connected in series between the first reference potential and the second reference potential,
A first step of causing the sixth switching element to conduct for a predetermined period by the fifth control line and discharging the electric charge of the second storage capacitor through the fourth node to an initial state;
A second step of keeping the sixth switching element non-conductive by the fifth control line;
The first control line, the second control line, and the third control line are used to make the first switching element, the second switching element, and the fourth switching element conductive, and the first data line is connected. A third step of charging the first storage capacitor with a charge corresponding to the propagated data signal through the first node;
A fourth step of keeping the first switching element, the second switching element, and the third switching element in a non-conductive state;
A fifth step of causing the fifth switching element to conduct by the fourth control line, and charging the second storage capacitor with a charge corresponding to a control data signal propagated through the second data line;
A sixth step of holding the fifth switching element in a non-conductive state;
A seventh step of causing the first switching element to conduct by the first control line;
An eighth step of conducting the second switching element by the second control line.

Images