JP4552579B2 - Light emitting device, driving method thereof, and image forming apparatus - Google Patents

Description

  The present invention relates to a light emitting device using a light emitting element that emits light having a magnitude corresponding to the amount of current, such as an organic light emitting diode element, a driving method thereof, and an image forming apparatus.

In recent years, organic light emitting diodes (hereinafter referred to as “OLED elements”) elements called organic electroluminescence elements and light emitting polymer elements have attracted attention as next-generation light-emitting devices that replace liquid crystal elements. An image forming apparatus using a line head provided with a large number of OLED elements in one line as an exposure means has been developed. In such a line head, a plurality of pixel circuits including an OLED element and a transistor for driving the OLED element are arranged. For example, Patent Document 1 discloses a line head composed of one line of OLED elements.
Here, the plurality of pixel circuits are arranged in one direction, and a selection signal is supplied through a common wiring and a data signal is supplied through a matrix wiring. When the selection signal becomes active, the data signal is taken into the pixel circuit.
Japanese Patent Laid-Open No. 11-274569 (FIG. 2, paragraph numbers 0041 to 0043)

By the way, the length of the line head in the longitudinal direction depends on the width of the paper to be printed, and may be long. In the above-described conventional technology, the length of the common wiring is determined according to the distance from the terminal to the pixel circuit. Therefore, the length of the common wiring connected to the pixel circuit close to the terminal is shortened. The length of the common wiring connected to the far pixel circuit is increased.
However, when the wiring distance is increased, the impedance of the common wiring is increased, and noise is easily superimposed, causing a malfunction. Further, for the sake of layout, there are cases where it is desired to arrange the selection signal circuit for supplying a selection signal → matrix wiring → pixel circuit in this order. In this case, since the wiring for supplying the selection signal and the wiring for supplying the data signal intersect, there is a high possibility that noise is superimposed on the selection signal.
The present invention has been made in view of the above circumstances, it is an object of the light-emitting device capable to reduce malfunctions due to noise, provides a driving method thereof and an image forming equipment using the same There is.

In order to solve the above-described problem, a light-emitting device according to the present invention sequentially shifts a start pulse and outputs a plurality of shift signals so that an active period of one shift signal and an active period of a next shift signal overlap each other by a predetermined period. a shift register to be generated, a plurality of pixel circuits having respective light-emitting elements emitting the size of the light corresponding to the magnitude of the drive current supplied, the turning on and off of the light emitting element based on said shift signal A light emission control unit including a plurality of control circuits that generate control signals for control, and is provided between the light emission control unit and the shift register, and supplies a data signal to each of the plurality of pixel circuits. a plurality of data signal lines, is provided to intersect with the plurality of data signal lines, and a plurality of shift signal lines for supplying said plurality of shift signals to the plurality of control circuits, before The shift register generates a shift signal corresponding to each pixel circuit, and each of the plurality of control circuits is provided corresponding to each of the plurality of pixel circuits. The control signal is activated in the predetermined period in which an active period and an active period of a shift signal corresponding to the next pixel circuit overlap, and each of the plurality of pixel circuits is activated by the control signal from the corresponding control circuit. Storage means for capturing and storing the data signal during the period, and supply means for supplying the drive current to the light emitting element according to the storage contents of the storage means .

According to the present invention, since the control circuit is provided inside the light emission control unit, it is possible to generate a control signal from which noise has been removed in the control circuit even if noise is superimposed on the shift signal line. In addition, since the control circuits are provided in one-to-one correspondence with the pixel circuits, it is possible to remove noise immediately before the pixel circuits. The pixel circuit takes in the data signal when the control signal becomes active. However, since the control signal has the noise removed, the malfunction of the pixel circuit can be prevented and the performance of the light emitting device can be improved. Note that the light emitting element may be any element that can control light emission, and may include, for example, a light emitting diode element, an organic EL diode element, an inorganic EL diode element, and the like. Further, the predetermined period may be a period based on the cycle of the clock signal . Contact name, the light emitting control unit, a configuration having both a function of controlling function of emitting light and the light emission.

The light-emitting device according to the present invention sequentially shifts the start pulse, and generates a plurality of shift signals so that an active period of a certain shift signal and an active period of the next shift signal overlap each other by a predetermined period; A plurality of pixel circuits each including a light emitting element that emits light having a magnitude corresponding to the magnitude of the supplied drive current, and a control signal for controlling lighting / extinction of the light emitting element based on the shift signal A plurality of data signal lines that are provided between the light emission control unit and the shift register and supply a data signal to each of the plurality of pixel circuits; provided to intersect with the plurality of data signal lines, a plurality of shift signals and a plurality of shift signal lines supplied to the plurality of control circuits, the plurality of pixel circuits includes a plurality The control circuits are divided into blocks, and the plurality of control circuits are provided corresponding to the plurality of pixel circuits, respectively, and the shift register generates shift signals corresponding to the blocks, and the control circuits belonging to a certain block each, activates the control signal Te predetermined period odors and active period of the shift signal overlap corresponding to the active period and the next block of the shift signal corresponding to the block, each of the plurality of pixel circuits, the corresponding Storage means for capturing and storing the data signal during a period in which the control signal from the control circuit is active, and supply means for supplying the drive current to the light emitting element according to the storage contents of the storage means. It is characterized by that . In this case, the pixel circuits are driven in units of blocks. However, since the control circuits are provided in one-to-one correspondence with the pixel circuits, it is possible to remove noise immediately before the pixel circuits.

The light-emitting device according to the present invention sequentially shifts the start pulse, and generates a plurality of shift signals so that an active period of a certain shift signal and an active period of the next shift signal overlap each other by a predetermined period; A plurality of pixel circuits each including a light emitting element that emits light having a magnitude corresponding to the magnitude of the supplied drive current, and a control signal for controlling lighting / extinction of the light emitting element based on the shift signal A plurality of data signal lines that are provided between the light emission control unit and the shift register and supply a data signal to each of the plurality of pixel circuits; provided to intersect with the plurality of data signal lines, a plurality of shift signals and a plurality of shift signal lines supplied to the plurality of control circuits, the plurality of pixel circuits includes a plurality The control circuits are divided into blocks, and the plurality of control circuits are provided corresponding to the plurality of blocks, the shift register generates a shift signal corresponding to each block, and the control circuit belonging to a certain block includes: activate the predetermined period odor Te the control signal and the active period of the shift signal overlap corresponding to the active period and the next block of the shift signal corresponding to the block, the control signal to the pixel circuits belonging to the block Each of the plurality of pixel circuits supplies and stores the data signal in a period in which the control signal from the corresponding control circuit is active, and the light emission according to the storage contents of the storage means And a supply means for supplying the drive current to the element . In this case, the pixel circuit is driven in units of blocks, but the control circuit is provided in units of blocks. For this reason, the number of control circuits can be reduced.

  In the light emitting device described above, the shift register may generate the shift signal so as to be active at a low level, and the control circuit may be configured by a NOR circuit. Alternatively, the shift register may generate the shift signal so as to be active at a high level, and the control circuit may be configured by a NAND circuit. According to these control circuits, a control signal is generated by extracting a period in which active periods of a certain shift signal and the next shift signal overlap. Therefore, even if noise is superimposed outside the overlapping period, the noise can be removed if noise is not superimposed on both shift signals simultaneously. As a result, malfunction of the pixel circuit can be reduced.

In the light emitting device described above, a first supply terminal for supplying a high-potential-side power supply signal to each of the plurality of pixel circuits and each of the plurality of control circuits, each of the plurality of pixel circuits, and the plurality of the plurality of pixel circuits. A second supply terminal for supplying a low-potential-side power supply signal to each of the control circuits, and the longer the distance from the first supply terminal and the second supply terminal, the more the control circuit includes the block. The number of pixel circuits may be reduced.

  Next, an image forming apparatus according to the present invention includes a photoconductor on which an image is formed by irradiation of light, and a head unit that forms the image by irradiating the photoconductor with light. The head portion is used. Since this image forming apparatus uses the above-described light emitting device for the head portion, it is possible to form a high-quality image on the photoreceptor. Such an image forming apparatus may include a printer, a copier, and a multifunction machine.

Next, a driving method of a light emitting device according to the present invention includes a first region in which a plurality of pixel circuits each including a light emitting element that emits light having a magnitude corresponding to the magnitude of a supplied drive current is formed. A driving method of a light emitting device, comprising: a plurality of data signal lines for supplying data signals to each of the plurality of pixel circuits; and a second region in which a plurality of signal lines intersecting the plurality of data signal lines are formed. a is, the start pulse is sequentially shifted according to the clock signal, the active period of the active period and the next shift signal of a shift signal to generate each shift signals corresponding to the respective pixel circuits so as to overlap by a predetermined period, Each of the shift signals is transmitted to the first region via the plurality of signal lines, and the data signal is supplied to the plurality of pixel circuits via the plurality of data signal lines. The each pixel circuit, a control for taking in the data signal to the pixel circuits in the predetermined period and an active period overlaps a shift signal corresponding to the active period and the next pixel circuits of a shift signal corresponding to the pixel circuit A signal is activated, and in each of the plurality of pixel circuits, the data signal is captured and stored in a period in which the corresponding control signal is active, and the driving current is supplied to the light emitting element according to the stored contents . It is characterized by that.
According to the present invention, since the control signal is generated in the first region, it is possible to generate a control signal from which noise has been removed in the first region even if noise is superimposed on the shift signal line. Therefore, malfunction of the pixel circuit can be prevented and the performance of the light emitting device can be improved.

Embodiments of the present invention will be described below with reference to the drawings.
<Light emitting device>
FIG. 1 is a block diagram showing a configuration of a light emitting device according to an embodiment of the present invention. The light-emitting device includes a printer head unit 10 as an image forming apparatus and its peripheral circuits. The light emitting device includes a control circuit 20, an image processing circuit 30, and a power supply circuit 40 as peripheral circuits of the head unit 10. The control circuit 20 generates a start pulse signal SP and a clock signal CLK. The start pulse signal SP is a signal that becomes active at the start of the main scanning period. The clock signal CLK gives a time serving as a reference for main scanning. The image processing circuit 30 outputs parallel format data signals D1 to D89. The data signals D0 to D89 in this example are binary signals instructing to turn on / off the OLED element. The power supply circuit 40 generates a high-potential-side power supply signal VHHEL and a low-potential-side power supply signal VSSEL in addition to the logic circuit power-supply signals VHH and VLL.

The head unit 10 is a line-type optical head and includes regions A1 to A3. In the area A1, pixel blocks B1 to B40 and power supply lines La and Lb are formed. In the area A2, 89 data lines L1 to L89 and signal lines Ls1 to Ls40 intersecting with these are formed. A shift register 50 is formed in the region A3. Pixel blocks B1 to B40 are arranged in the X direction. The data lines L1 to L89 and the power supply lines La and Lb are arranged in parallel with the X direction.
The shift register 50 is configured by cascading a plurality of unit shift circuits (not shown), and sequentially shifts the start pulse signal SP according to the clock signal CLK to generate shift signals SR1, SR2,... SR41. As shown in FIG. 2, each of the shift signals SR1 to SR41 is a signal that is active only for a period of one cycle of the clock signal CLK. In addition, the active periods of adjacent shift signals overlap by a half cycle of the clock signal CLK.

The shift signals SR1 to SR41 are supplied to the pixel blocks B1 to B40 via the signal lines Ls1 to Ls41. Each of the pixel blocks B1 to B39 includes 89 unit circuits P1 to P89, and the pixel block B40 includes 73 unit circuits P1 to P73. The unit circuits P1 to P89 have the same configuration. In the following description, when individual unit circuits are not problematic, they are simply referred to as a unit circuit P.
The high potential power signal VHHEL is supplied to the supply terminal Ta of the power supply line La, while the low potential power signal VSSEL is supplied to the supply terminal Tb of the power supply line Lb. Each unit circuit P is connected to the power supply lines La and Lb, and receives the power supply of the high potential side power signal VHHEL and the low potential side power signal VSSEL through them. The pixel block closest to the supply terminals Ta and Tb is B1, and the farthest pixel block is B40.

FIG. 2 shows a detailed configuration of the unit circuit P, and FIG. 3 shows a timing chart thereof. The unit circuit P belongs to the first block B1 and is connected to the data line L1. The unit circuit P includes a control circuit CTL and a pixel circuit PXL. The control circuit CTL has a function of generating a sampling signal based on the shift signal supplied from the shift register 5 0. The sampling signal specifies a period during which the data signal is taken into the pixel circuit PXL. The pixel circuit PXL includes an OLED element 85.

  The control circuit CTL in this example is configured by a NOR circuit 60. The NOR circuit 60 generates a sampling signal SAM1 that is active (high level) during a period in which the shift signal SR1 corresponding to the block B1 and the shift signal SR2 corresponding to the next block B2 are simultaneously low level (active). To do. Here, the shift signal SR2 is a signal that becomes active next to the shift signal SR1.

  The reason why the control circuit CTL is provided in each pixel circuit PXL is as follows. The shift signals SR1 to SR41 are supplied to the pixel blocks B1 to B40 via the signal lines Ls1 to Ls41. For this reason, noise may be superimposed on the signal lines Ls1 to Ls41. The main factor is dive noise in the area A2. Since the signal lines Ls1 to Ls41 intersect with the data signal lines L1 to L89 in the region A2, stray capacitances are associated with the intersections. In other words, the signal lines Ls1 to Ls41 are AC-coupled with the data signal lines L1 to L89. Therefore, when the logic levels of the data signals D1 to D89 change, noise on the signal lines Ls1 to Ls41 may be superimposed.

In the example shown in FIG. 3, noises N1 and N2 are superimposed on the shift signal SR1, and noises N3 and N4 are superimposed on the shift signal SR2. If the NOR circuit 60 is provided in the region A3 and the sampling signals SAM1 to SAM40 are transmitted using the signal lines Ls1 to Ls40, noise is superimposed on the sampling signals SAM1 to SAM40, and the pixel circuit PXL malfunctions. .
However, in the present embodiment, since the NOR circuit 60 is disposed in the region A1, noise can be masked. That is, the NOR circuit 60 activates the sampling signal SAM1 only when the adjacent shift signals SR1 and SR2 are simultaneously activated. Accordingly, the noises N1 and N2 superimposed on the shift signal SR1 are masked by the shift signal SR2, while the noises N3 and N4 superimposed on the shift signal SR2 are masked by the shift signal SR1.

  In particular, when the shift signal is supplied in units of pixel blocks as in the present embodiment, the interval between the signal lines Ls1 to Ls41 is widened. For this reason, when paying attention to a certain data signal line, the distance of the intersection with the signal line becomes long. This is important in terms of masking noise. Since the data signal line is accompanied by stray capacitance and distributed resistance, a data signal delay occurs. There is a difference in the timing at which noise is superimposed on the signal line at a certain intersection and the next intersection. Therefore, even if the same data signal jumps into the signal lines Ls1 to Ls41 as noise, it is possible to remove the noise. Accordingly, by providing the NOR circuit 60 in the unit circuit P, it is possible to remove noise from the sampling signal SAM1 and drive the pixel circuit PXL normally.

  Next, details of the unit circuit P will be described. The NOR circuit 60 generates a sampling signal SAM1 that is high during a period from time t2 to time t3 when both the shift signal SR1 and the shift signal SR2 are low (active), and supplies the sampling signal SAM1 to the latch circuit 70. The latch circuit 70 includes a transfer gate 72, inverters 71, 73 and 74, and a clocked inverter 75. In the period from time t1 to time t2, since the shift signal SR1 is at a low level, the clocked inverter 75 is in a high impedance state. Further, since the sampling signal SAM1 is at a low level, the transfer gate 72 is turned off. As a result, an equivalent circuit of the latch circuit 70 is as shown in FIG.

Next, from time t2 to time t3, the shift signal SR1 is maintained at the low level, but the sampling signal SAM1 is at the high level. At this time, the clocked inverter 75 maintains a high impedance state, while the transfer gate 72 is turned on. As a result, the equivalent circuit of the latch circuit 70 is as shown in FIG. 4B, and the logic level of the data signal D1 is captured.
Next, after time t4, the shift signal SR1 becomes high level, and the clocked inverter 75 operates as an inverter. Further, since the sampling signal SAM1 is at a low level, the transfer gate 72 is turned off. As a result, an equivalent circuit of the data latch circuit 70 is as shown in FIG. In other words, the logic level of the data signal D1 is stored in the latch circuit 70 until the data signal D1 is taken in and the next writing is performed.

  The output signal of the latch circuit 70 is supplied to the node Q via the inverter 82. The gate of the driving transistor 83 and the gate of the control transistor 84 are connected to the node Q. The drive transistor 83 is composed of a P-channel TFT, and the control transistor is composed of an N-channel TFT. A high potential side power supply signal VDDEL is supplied to the drain of the driving transistor 83, and the anode of the OLED element 85 is connected to the source thereof. A low potential side power signal VSSEL is supplied to the cathode of the OLED element 85. The control transistor 84 short-circuits the OLED element 85 in the on state.

  Here, when the logic level of the node Q is low, the drive transistor 83 is turned on and the control transistor 84 is turned off. At this time, the drive current is supplied to the OLED element 85, and the OLED element 85 is lit. On the other hand, when the logic level of the node Q is high, the drive transistor 83 is turned off and the control transistor 84 is turned on. At this time, no driving current is supplied to the OLED element 85, and the OLED element 85 is turned off.

In the unit circuit P described above, the logic level of the node Q, sampling signal SAM1 is allowed to vary to become active. The sampling signal SAM1 is generated also in other unit circuits P belonging to the block B1. Accordingly, the unit circuits P1 to P89 belonging to the block B1 execute the write operation at the same time. The same applies to the other blocks B2 to B40. Therefore, the OLED element 85 is turned on / off in units of blocks.
With this drive unit circuits P in blocks sampled signals SAM1, SAM2, in synchronization ... with the timing of the signal waveform rises of SAM40, the potential of the high potential power supply signal VHHEL and the low potential power supply signal VSSEL changes. This is because wiring resistance exists in the power supply lines La and Lb. The power supply impedance increases as the distance between the supply terminals Ta and Tb increases. The voltage fluctuations of the power supply lines La and Lb are determined by both the load and the power supply impedance. In order to reduce the voltage fluctuation, the load should be reduced as the power supply impedance increases. In this example, the size of the load is determined according to the number of unit circuits P included in each of the blocks B1 to B40, and the power supply impedance is determined according to the distance from the supply terminals Ta and Tb. Therefore, in order to reduce the voltage fluctuation, the number of unit circuits P included in each block may be set not to increase as the distance from the supply terminals Ta and Tb increases. More specifically, in adjacent blocks Bk (k is a natural number from 1 to 39) and Bk + 1, the number of unit circuits P included in the block Bk closer to the supply terminals Ta and Tb is the supply terminals Ta and Tb. It is preferable to set so as to be equal to or larger than the number of unit circuits P included in the block Bk + 1 on the far side.

  In this example, the number of unit circuits P included in the blocks B1 to B39 is “89”, and the number of unit circuits P included in the block B40 farthest from the supply terminals Ta and Tb is “73”. Can be lightened, and voltage fluctuations between the high-potential power supply signal VDDEL and the low-potential power supply signal VSSEL can be suppressed. The luminance of the OLED element 85 varies according to the magnitude of the drive current, and the magnitude of the drive current varies according to the voltage between the high potential side power supply signal VDDEL and the low potential side power supply signal VSSEL. Therefore, by suppressing the voltage fluctuation, the light emission luminance of the OLED element 85 in each of the blocks B1 to B40 can be made closer to uniform.

When the number of unit circuits P included in each of the blocks B1 to B40 is N1 to N40, it may be set as follows.
(1) N1> N2, N2 = N3 =... = N40
For example, N1 = 112, N2 = N3 =... = N40 = 88 may be set. In this case, the number N1 of unit circuits P included in the block B1 closest to the supply terminals Ta and Tb is larger than the number N2 of pixel circuits included in the other blocks B2 to B40. For this reason, a heavy load is driven at a location where the power source impedance is low. As a result, voltage fluctuation between the high potential side power supply signal VDDEL and the low potential side power supply signal VSSEL can be suppressed, and the light emission luminance of the OLED element 85 in each of the blocks B1 to B40 can be made close to uniform. . In addition, the number of unit circuits P included in the blocks B2 to B40 can be the same, and the fractions can be combined into the block B1.

(2) N1>N2> N3 ...> N40
In this case, the number of unit circuits P included in each of the blocks B1 to B30 is decreased as the distance from the supply terminals Ta and Tb is increased. Therefore, since the load becomes lighter as the power supply impedance increases, the light emission luminance of the OLED element 85 in each of the blocks B1 to B40 can be made more uniform.
(3) N1 = N2> N3 = N4... = N40
For example, N1 = N2 = 100, N3 = N4... = N40 = 88 may be set.
(4) N1 = N2... = N38> N39 = N40
For example, N1 = N2... = N38 = 89, N39 = N40 = 81 may be set.

<Modification of light emitting device>
Next, a modified example of the light emitting device will be described.
(1) Modification 1
In the light emitting device described above, the shift register 50 generates the shift signals SR1 to SR41 that are active at a low level, but may generate the shift signals SR1 to SR41 that are active at a high level.
FIG. 5 shows a circuit diagram of the unit circuit P according to the first modification, and FIG. 6 shows a timing chart thereof. The unit circuit P is configured in the same manner as the unit circuit P of the embodiment shown in FIG. 2 except that the NAND circuit 61 is used as the control circuit CTL and the control inputs of the transfer gate 72 and the clocked inverter 75 are reversed. Has been. Further, as shown in FIG. 6, the logic levels of the start pulse SP, the shift signals SR1 to SR41, and the sampling signals SAM1 to SAM40 are inverted. Here, the control circuit CTL needs to extract a period in which the shift signals SR1 and SR2 that are active at a high level are simultaneously active. For this reason, the NAND circuit 61 is used as the control circuit CTL.

(2) Modification 2
In the above-described embodiment and Modification 1, the latch circuit 70 is provided in the pixel circuit PXL. However, instead of the latch circuit 70, a storage element may be configured using a capacitive element.
FIG. 7 is a circuit diagram showing a configuration of a unit circuit P according to a modification. As shown in this figure, the pixel circuit PXL includes a capacitive element 90 between the gate of the drive transistor 83 and the high potential side power source VDDEL. The clocked inverter 76 operates as an inverter when the sampling signal SAM1 becomes active, and places the output terminal in a high impedance state when the sampling signal SAM1 becomes inactive. Accordingly, the logic level obtained by inverting the data signal Dj during the active period of the sampling signal SAM1 is written into the capacitor element 90, while the logic level written during the inactive period is held. Accordingly, the capacitive element 90 acts as a storage means.
A feature of the present invention is that noise is removed by generating a sampling signal SAM1 (control signal) for controlling the pixel circuit PXL in the vicinity of the pixel circuit PXL. Therefore, the pixel circuit PXL can be configured in any way. Good.

(3) Modification 3
In the above-described embodiment, Modification 1 and Modification 2, the control circuit CTL is provided for each pixel circuit PXL. However, one control circuit CTL may be provided for each pixel block.
FIG. 8 shows a block diagram of the i-th pixel block Bi according to the third modification. As shown in FIG. 8, the pixel block Bi includes 89 pixel circuits PXL1 to PXL89 and one control circuit CTL. In this case, the control circuit CTL and the pixel circuit PXL may be configured as shown in FIG. 2, or may be configured as shown in FIG. 6 or as shown in FIG.
Since the pixel circuits PXL1 to PXL89 included in the pixel block Bi are driven simultaneously, the sampling signal SAMi is common. Therefore, the sampling signal SAMi can be generated by one control circuit CTL based on the shift signal SRi supplied to the pixel block Bi and the shift signal SRi + 1 supplied to the next pixel block Bi + 1. As a result, the number of control circuits CTL can be greatly reduced to simplify the configuration.

(3) Modification 4
In the above-described embodiment and Modifications 1 to 3, the pixel circuit PXL is driven in units of pixel blocks, but may be driven in units of pixel circuits.
FIG. 9 shows a block diagram of a control circuit and a pixel circuit according to the fourth modification. In this case, the i-th control circuit CTL is supplied with the shift signal SRi and the next shift signal SRi + 1 to generate the sampling signal SAMi. In this case, the control circuit CTL and the pixel circuit PXL may be configured as shown in FIG. 2, or may be configured as shown in FIG. 6 or as shown in FIG.

<Image forming apparatus>
FIG. 10 is a longitudinal side view illustrating an example of an image forming apparatus using the head unit 10 described above. This image forming apparatus includes four organic EL array exposure heads 10K, 10C, 10M, and 10Y having the same configuration, and four corresponding photosensitive drums (image carriers) 110K, 110C, and 110M having the same configuration. , 110Y, respectively, and is configured as a tandem image forming apparatus. The organic EL array exposure heads 10K, 10C, 10M, and 10Y are configured by the head unit 10 described above.

  As shown in FIG. 10, the image forming apparatus is provided with a driving roller 121 and a driven roller 122, and includes an intermediate transfer belt 120 that is circulated and driven in the direction of the arrow shown in the drawing. Photosensitive members 110K, 110C, 110M, and 110Y having photosensitive layers are arranged on the outer peripheral surface as four image carriers arranged at predetermined intervals with respect to the intermediate transfer belt 120. K, C, M, and Y added after the reference sign mean black, cyan, magenta, and yellow, respectively, and indicate that the photoconductors are black, cyan, magenta, and yellow, respectively. The same applies to other members. The photoreceptors 110K, 110C, 110M, and 110Y are rotationally driven in synchronization with the driving of the intermediate transfer belt 120.

Around each photoconductor 110 (K, C, M, Y), charging means (corona charger) 111 (K) for uniformly charging the outer peripheral surface of the photoconductor 110 (K, C, M, Y), respectively. , C, M, Y) and the outer peripheral surface uniformly charged by the charging means 111 (K, C, M, Y) are synchronized with the rotation of the photoconductor 110 (K, C, M, Y). The organic EL array exposure head 10 (K, C, M, Y) as described above of the present invention that sequentially scans the lines is provided.
Further, a developing device 114 (K) that applies toner as a developer to the electrostatic latent image formed by the organic EL array exposure head 10 (K, C, M, Y) to form a visible image (toner image). , C, M, Y).

  Here, in each organic EL array exposure head 10 (K, C, M, Y), the array direction of the organic EL array exposure head 10 (K, C, M, Y) is the photosensitive drum 110 (K, C, M). , Y) along the bus. The light emission energy peak wavelength of each organic EL array exposure head 10 (K, C, M, Y) and the sensitivity peak wavelength of the photoconductor 110 (K, C, M, Y) are set to substantially coincide with each other. ing.

  The developing device 114 (K, C, M, Y) uses, for example, a non-magnetic one-component toner as a developer, and the one-component developer is conveyed to the developing roller by a supply roller, for example, and adhered to the developing roller surface. The film thickness of the developer is regulated by a regulation blade, and the developing roller is brought into contact with or increased in thickness by the photoreceptor 110 (K, C, M, Y). The toner image is developed by attaching a developer according to the potential level.

The black, cyan, magenta, and yellow toner images formed by the four-color single-color toner image forming station are sequentially primary-transferred onto the intermediate transfer belt 120 and sequentially superimposed on the intermediate transfer belt 120 to form a full color. It becomes. The recording medium 102 fed one by one from the paper feed cassette 101 by the pickup roller 103 is sent to the secondary transfer roller 126. The toner image on the intermediate transfer belt 120 is secondarily transferred to the recording medium 102 such as a sheet by the secondary transfer roller 126 and is fixed on the recording medium 102 by passing through the fixing roller pair 127 as a fixing unit. Thereafter, the recording medium 102 is discharged onto a paper discharge tray formed in the upper part of the apparatus by a paper discharge roller pair 128.
As described above, since the image forming apparatus of FIG. 9 uses the organic EL array as the writing means, the apparatus can be made smaller than when the laser scanning optical system is used.

Next, another embodiment of the image forming apparatus according to the present invention will be described.
FIG. 11 is a vertical side view of the image forming apparatus. In FIG. 11, the image forming apparatus includes, as main constituent members, a rotary developing device 161, a photosensitive drum 165 functioning as an image carrier, an exposure head 167 provided with an organic EL array, an intermediate transfer belt 169, and a sheet. A conveyance path 174, a fixing roller heating roller 172, and a paper feed tray 178 are provided. The exposure head 167 is configured by the head unit 10 described above.
In the developing device 161, the developing rotary 161a rotates counterclockwise about the shaft 161b. The inside of the development rotary 161a is divided into four, and image forming units for four colors of yellow (Y), cyan (C), magenta (M), and black (K) are provided. The developing rollers 162a to 162d and the toner supply rollers 163a to 163 are respectively arranged in the image forming units for the four colors. Further, the toner is regulated to a predetermined thickness by the regulation flades 164a to 164d.

The photosensitive drum 165 is charged by a charger 168 and is driven in a direction opposite to the developing roller 162a by a drive motor (not shown), for example, a step motor. The intermediate transfer belt 169 is stretched between the driven roller 170b and the drive roller 170a, and the drive roller 170a is connected to the drive motor of the photosensitive drum 165 to transmit power to the intermediate transfer belt. By driving the drive motor, the drive roller 170a of the intermediate transfer belt 169 is rotated in the opposite direction to the photosensitive drum 165.
The paper conveyance path 174 is provided with a plurality of conveyance rollers, a pair of paper discharge rollers 176, and the like, and conveys the paper. An image (toner image) on one side carried on the intermediate transfer belt 169 is transferred to one side of the paper at the position of the secondary transfer roller 171. The secondary transfer roller 171 is separated from and brought into contact with the intermediate transfer belt 169 by a clutch, and is brought into contact with the intermediate transfer belt 169 when the clutch is turned on, so that an image is transferred onto the sheet.

The sheet on which the image has been transferred as described above is then subjected to a fixing process by a fixing device having a fixing heater. The fixing device is provided with a heating roller 172 and a pressure roller 173. The sheet after the fixing process is drawn into the discharge roller pair 176 and proceeds in the direction of arrow F. When the paper discharge roller pair 176 rotates in the reverse direction from this state, the paper reverses its direction and advances in the double-sided printing conveyance path 175 in the direction of arrow G. The sheets are picked up one by one from the paper feed tray 178 by the pickup roller 179.
For example, a low-speed brushless smoke is used as a drive motor for driving the conveyance roller in the sheet conveyance path. The intermediate transfer belt 169 uses a step motor because it requires color misregistration correction. Each of these motors is controlled by a signal from a control means (not shown).

In the state shown in the drawing, a yellow (Y) electrostatic latent image is formed on the photosensitive drum 165, and a high voltage is applied to the developing roller 128a, whereby a yellow image is formed on the photosensitive drum 165. When all of the yellow back side and front side images are carried on the intermediate transfer belt 169, the development rotary 161a rotates 90 degrees.
The intermediate transfer belt 169 rotates once and returns to the position of the photosensitive drum 165. Next, two images of cyan (C) are formed on the photosensitive drum 165, and this image is carried on the yellow image carried on the intermediate transfer belt 169. Thereafter, the 90-degree rotation of the development rotary 161 and the one-rotation process after the image is carried on the intermediate transfer belt 169 are repeated in the same manner.

  For carrying four color images, the intermediate transfer belt 169 rotates four times, and then the rotation position is further controlled to transfer the image onto the sheet at the position of the secondary transfer roller 171. The paper fed from the paper feed tray 178 is transported by the transport path 174, and the color image is transferred to one side of the paper at the position of the secondary transfer roller 171. The sheet on which the image is transferred on one side is reversed by the discharge roller pair 176 as described above, and stands by on the conveyance path. Thereafter, the sheet is conveyed to the position of the secondary transfer roller 171 at an appropriate timing, and the color image is transferred to the other side. The housing 180 is provided with an exhaust fan 181.

  Note that the above-described light emitting device may be applied to an image reading device. The image reading apparatus includes a light emitting unit that irradiates a light beam on an object and a reading unit that reads the light beam reflected by the object and outputs an image signal. The light emitting device described above is used for the light emitting unit. It is characterized by that. Here, the light emitting unit may move and the reading unit may be fixed, or the light emitting unit and the reading unit may move together. In the latter case, the reading unit may be constituted by a TFT, and the reading unit and the light emitting unit may be formed on a single substrate. Examples of such an image reading apparatus include a scanner and a barcode reader.

It is a block diagram which shows the structure of the light-emitting device of this invention. It is a circuit diagram of the unit circuit of the device. It is a timing chart of the same circuit. 3 is an equivalent circuit diagram of a latch circuit 70 used in the circuit. FIG. 10 is a circuit diagram of a unit circuit according to Modification 1. FIG. 10 is a timing chart of a unit circuit according to Modification 1. 10 is a circuit diagram of a unit circuit according to Modification 2. FIG. 10 is a circuit diagram of a unit circuit according to Modification 3. FIG. 10 is a circuit diagram of a unit circuit according to Modification 4. FIG. It is a vertical side view which shows an example of an image forming apparatus. It is a vertical side view which shows the other example of an image forming apparatus.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Light-emitting device (head part), A1-A3 ... area | region, P1-P89 ... Unit circuit, B1-B40 ... Pixel block, Ls1-Ls41 ... Signal line, L1-L89 ... Data signal line, SR1-SR41 ... Shift signal , D1 to D89 ... data signal, 60 ... NOR circuit, 61 ... NAND circuit, CTL ... control circuit, PXL ... pixel circuit, 85 ... OLED element (light emitting element), 110Y, 110M, 110C, 110K ... photoconductor.

Claims (8)

A shift register that sequentially shifts a start pulse and generates a plurality of shift signals so that an active period of a certain shift signal and an active period of a next shift signal overlap each other by a predetermined period;
A plurality of pixel circuits having respective light emitting elements which emit the supplied light magnitude corresponding to the magnitude of the driving current control signal for controlling the turning on and off of the light emitting element based on said shift signal A light emission control unit comprising a plurality of control circuits for generating
A plurality of data signal lines provided between the light emission control unit and the shift register and supplying a data signal to each of the plurality of pixel circuits;
Wherein provided to intersect the plurality of data signal lines, a plurality of the shift signal line for supplying a plurality of shift signals to the plurality of control circuits,
The shift register generates a shift signal corresponding to each pixel circuit,
Each of the plurality of control circuits is provided corresponding to each of the plurality of pixel circuits, and an active period of a shift signal corresponding to the pixel circuit overlaps an active period of a shift signal corresponding to the next pixel circuit. Activating the control signal in the predetermined period;
Each of the plurality of pixel circuits includes a storage unit that captures and stores the data signal during a period in which the control signal from the corresponding control circuit is active, and drives the light emitting element according to the storage content of the storage unit Supply means for supplying current,
A light emitting device characterized by that . A shift register that sequentially shifts a start pulse and generates a plurality of shift signals so that an active period of a certain shift signal and an active period of a next shift signal overlap each other by a predetermined period;
A plurality of pixel circuits each including a light emitting element that emits light having a magnitude corresponding to the magnitude of the supplied drive current, and a control signal for controlling lighting / extinction of the light emitting element based on the shift signal A light emission control unit comprising a plurality of control circuits for generating
A plurality of data signal lines provided between the light emission control unit and the shift register and supplying a data signal to each of the plurality of pixel circuits;
A plurality of shift signal lines provided to intersect with the plurality of data signal lines and supplying the plurality of shift signals to the plurality of control circuits;
The plurality of pixel circuits are divided into a plurality of blocks,
The plurality of control circuits are provided corresponding to the plurality of pixel circuits,
The shift register generates a shift signal corresponding to each block,
Each of the control circuits belonging to a certain block, and Te the predetermined period odors and active period of the shift signal corresponding to the active period and the next block of the shift signal corresponding to the block overlaps activates the control signal,
Each of the plurality of pixel circuits includes a storage unit that captures and stores the data signal during a period in which the control signal from the corresponding control circuit is active, and drives the light emitting element according to the storage content of the storage unit Supply means for supplying current,
Light emission device characterized in that. A shift register that sequentially shifts a start pulse and generates a plurality of shift signals so that an active period of a certain shift signal and an active period of a next shift signal overlap each other by a predetermined period;
A plurality of pixel circuits each including a light emitting element that emits light having a magnitude corresponding to the magnitude of the supplied drive current, and a control signal for controlling lighting / extinction of the light emitting element based on the shift signal A light emission control unit comprising a plurality of control circuits for generating
A plurality of data signal lines provided between the light emission control unit and the shift register and supplying a data signal to each of the plurality of pixel circuits;
A plurality of shift signal lines provided to intersect with the plurality of data signal lines and supplying the plurality of shift signals to the plurality of control circuits;
The plurality of pixel circuits are divided into a plurality of blocks,
The plurality of control circuits are provided corresponding to the plurality of blocks, respectively.
The shift register generates a shift signal corresponding to each block,
Control circuit belonging to a certain block, and Te the predetermined period odors and active period of the shift signal corresponding to the active period and the next block of the shift signal corresponding to the block overlaps activates the control signal, the control signal respectively supplied to the pixel circuits belonging to the block,
Each of the plurality of pixel circuits includes a storage unit that captures and stores the data signal during a period in which the control signal from the corresponding control circuit is active, and drives the light emitting element according to the storage content of the storage unit Supply means for supplying current,
Light emission device characterized in that. The shift register generates the shift signal to be active at a low level;
The control circuit includes a NOR circuit.
The light emitting device according to any one of claims 1 to 3 . The shift register generates the shift signal to be active at a high level,
The control circuit includes a NAND circuit.
The light emitting device according to any one of claims 1 to 3 .   A first supply terminal for supplying a high-potential-side power signal to each of the plurality of pixel circuits and each of the plurality of control circuits;
  A second supply terminal for supplying a low potential power signal to each of the plurality of pixel circuits and each of the plurality of control circuits;
  As the distance from the first supply terminal and the second supply terminal becomes longer, the number of the pixel circuits included in each block is reduced.
  The light-emitting device according to claim 2, wherein: A photoreceptor on which an image is formed by irradiation of light;
A head unit that irradiates the photosensitive member with light and forms the image;
An image forming apparatus characterized in that the light-emitting device according to the head portion in any one of claims 1 to 6. A first region in which a plurality of pixel circuits each including a light emitting element that emits light having a magnitude corresponding to the magnitude of a supplied drive current is formed, and a data signal is supplied to each of the plurality of pixel circuits. A driving method of a light emitting device, comprising: a second region in which a plurality of data signal lines and a plurality of signal lines intersecting the plurality of data signal lines are formed,
The start pulse is sequentially shifted according to the clock signal, the active period of the active period and the next shift signal of a shift signal to generate each shift signals corresponding to the respective pixel circuits so as to overlap by a predetermined period,
Transmitting each of the shift signals to the first region via the plurality of signal lines,
Supplying the data signals to the plurality of pixel circuits via the plurality of data signal lines;
In the first region, wherein each pixel circuit, the data signal the pixel circuits in the predetermined period and an active period overlaps a shift signal corresponding to the active period and the next pixel circuits of a shift signal corresponding to the pixel circuit Activate the control signal to capture
In each of the plurality of pixel circuits, the data signal is captured and stored in a period in which the corresponding control signal is active, and the driving current is supplied to the light emitting element according to the stored content.
A driving method of a light-emitting device.

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