JP4702077B2 - Electro-optical device and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress the unevenness in the gradation of each electrooptical optical element while suppressing the scale of peripheral circuits. <P>SOLUTION: The correction data A of each unit circuit U is supplied in a first period Pa and the correction data G of each unit circuit U is supplied in a second period Pb, to a signal line L. Each unit circuit Ui includes an electrooptical element E which is the gradation meeting a driving current Idr, a data acquisition circuit 30 which sequentially acquires data from the signal line L, a correction circuit 50 which generates a reference current Is[i] meeting the correction data A, a drive transistor Tdr controlling the drive current Idr supplied to the electrooptical element E according to the gradation data G and the reference current Is[i] generated by the correction circuit 50, and a route control circuit 40 outputting the correction data A acquired in the first period Pa by the data acquisition circuit 30 to the correction circuit 50, and supplying the potential meeting the gradation data G acquired in the second period Pb by the data acquisition circuit 30 to the gate of the drive transistor Tdr. <P>COPYRIGHT: (C)2007,JPO&amp;INPIT

Description

The present invention relates to an organic light emitting diode (hereinafter referred to as “OLED (Organic Light Emitting Diode)”.
The present invention relates to a technique for controlling various electro-optic elements such as elements).

Conventionally, an electro-optical device having a configuration in which a plurality of unit circuits including an electro-optical element and a circuit for controlling the electro-optical element are arranged has been proposed. In this type of electro-optical device, gradations of a plurality of electro-optical elements are caused by variations in characteristics of each electro-optical element (for example, light emission efficiency) and characteristics of transistors constituting each unit circuit (for example, threshold voltage). (Brightness) unevenness may occur. In order to suppress such gradation unevenness, for example, Patent Document 1 discloses that each electro-optical element is corrected after the gradation data (data specifying the gradation) of each electro-optical element is corrected based on the correction data. A configuration for driving is disclosed.
JP 2005-283816 A

However, in the configuration of Patent Document 1, an arithmetic circuit for correcting gradation data based on correction data is indispensable.
There is a problem that the scale of the “peripheral circuit” is enlarged. In view of such circumstances, an object of the present invention is to solve the problem of suppressing gradation unevenness of each electro-optical element while suppressing the scale of peripheral circuits.

In order to solve the above problems, the electro-optical device according to the first aspect of the present invention includes a plurality of unit circuits and correction data of each unit circuit in a first period (for example, the first period Pa in FIG. 3). And a signal line (for example, a signal line L in FIG. 2) to which gradation data of each unit circuit is supplied in a second period (for example, the second period Pb in FIG. 3) different from the first period. Each of the plurality of unit circuits includes an electro-optic element having a gradation corresponding to a drive current (for example, the drive current Idr in FIG. 2) and data acquisition means for sequentially acquiring data from the signal line (for example, FIG. 2). Data acquisition circuit 30), correction means (for example, correction circuit 50 in FIG. 2) for generating reference currents (for example, reference currents Is [1] to Is [n] in FIG. 2) corresponding to the correction data, and electro-optics The drive current supplied to the element is converted into gradation data and the reference current generated by the correction means. Driving means (for example, the driving transistor Tdr in FIG. 2) to be controlled, and the correction data acquired by the data acquisition means in the first period to the correction means, and the gradation data acquired by the data acquisition means in the second period Path control means (for example, the path control circuit 40 in FIG. 2) for outputting to the drive means. In addition, the specific example of this aspect is later mentioned as 1st Embodiment and 3rd Embodiment.

In the above configuration, since each unit circuit is provided with a correction unit that generates a reference current that is the basis of the drive current based on the correction data, the peripheral circuit that corrects the gradation data based on the correction data is theoretical. Is not necessary. Accordingly, the scale of the peripheral circuit of the electro-optical device can be reduced. Further, since the signal line is used for both the correction data transmission and the gradation data transmission, the configuration is compared with the configuration in which the wiring for transmitting the correction data and the wiring for transmitting the gradation data are formed separately. Simplified. For example, since the correction data and the gradation data are input to the signal line from a common terminal, the number of terminals can be reduced as compared with a configuration in which each is input to a separate terminal. Therefore, it is possible to reduce the possibility that a defect occurs in the connection between each terminal and the outside, thereby improving the reliability of the electro-optical device.

Although the peripheral circuit for correcting the gradation data based on the correction data is not necessary in principle, the correction means of each unit circuit adjusts the reference current based on the correction data (that is, the drive current) Is not intended to exclude from the scope of the present invention an electro-optical device having a configuration in which the peripheral circuit corrects gradation data. In the electro-optical device in which a plurality of types of correction is performed, according to the configuration in which at least one correction is performed by the correction unit of each unit circuit, it is not necessary to perform the correction in the peripheral circuit. Compared with the conventional configuration in which the peripheral circuit executes this correction, the expected effect of the present invention that the scale of the peripheral circuit can be reduced is certainly exhibited. For example, the variation of the characteristics of each electro-optic element can be suppressed by the correction by the correction means of each unit circuit, and the peripheral circuit can execute gamma correction on the gradation data.

The electro-optical element in the present invention is an element (so-called current-driven electro-optical element) in which optical characteristics such as luminance and transmittance are changed by supplying current. A typical example of the electro-optical device according to the present invention is a light-emitting device that employs, as an electro-optical element, a light-emitting element (for example, an OLED element) that emits light with luminance corresponding to the current value of the drive current. The present invention is also applied to the adopted electro-optical device.

A typical example of the driving means in the present invention is a transistor (for example, the driving transistor Tdr in FIG. 2) inserted on the path of the driving current, but the form of the driving means is arbitrarily changed. For example, a transistor arranged in parallel with the electro-optical element on a path branched from the path from the correction circuit to the electro-optical element may be used as the driving unit. In this configuration, the ratio of the drive current flowing through the electro-optic element to the current flowing through the transistor in the reference current is changed by controlling the conduction state (resistance between the source and drain) of the transistor according to the gradation data. Therefore, the electro-optic element can be driven to a gradation corresponding to the gradation data.

The “plurality of unit circuits” in the present invention may be all unit circuits included in the electro-optical device or a part of unit circuits. For example, the dummy circuit is excluded even in a configuration in which a dummy circuit (a unit circuit that is exclusively used for inspection and testing and is not actually driven) is included in all the unit circuits included in the electro-optical device. If the requirements of the present invention are satisfied for “a plurality of unit circuits”, the electro-optical device is naturally included in the scope of the present invention, without needing to discuss the feasibility of the requirements for other unit circuits (dummy circuits). It is. In addition, for example, in an electro-optical device including a plurality of electro-optical elements having different display colors (for example, red, green, and blue), for example, correction may be performed only for electro-optical elements having a specific display color. Good.
In this configuration, if the requirements of the present invention are satisfied for the “plurality of unit circuits” corresponding to the electro-optical elements of a specific display color, the unit circuits corresponding to other display colors satisfy the requirements of the present invention. Regardless of whether the electro-optical device is included in the scope of the present invention.

In a preferred aspect of the present invention, the correction unit includes a storage unit (for example, the holding circuit 52 in FIG. 4) that stores correction data supplied from the path control unit, and a current value corresponding to the correction data stored in the storage unit. Current source (for example, current source transistor 54 in FIG. 4). According to this configuration, since the storage means for storing the correction data is installed in each unit circuit, if the correction data is stored in the storage means of each unit circuit prior to driving each electro-optic element, the gradation It is not necessary to supply correction data to each unit circuit every time data is transferred. Therefore, the amount of data to be transmitted from the outside to the electro-optical device can be reduced as compared with a configuration in which each unit circuit does not have storage means. As the storage means, for example, SRAM (Stat
Various memory elements such as ic Random Access Memory (DRAM) and DRAM (Dynamic Random Access Memory) are employed.
In a more specific configuration, the correction unit includes a plurality of current generation units (for example, current generation units C1 to C3 in FIG. 4) each corresponding to a bit of the correction data, and each of the correction data output from the path control unit. A correction data line to which bits are supplied serially (for example, the correction data line LA in FIG. 4).
And each of the plurality of current generators acquires acquisition means (for example, transmission gate 61 of FIG. 5) that acquires the bit corresponding to the current generator from the correction data line.
), Storage means for storing the bits acquired by the acquisition means (for example, the latch circuit 64 in FIG. 5), and a current source for generating current corresponding to the bits stored in the storage means (for example, current sources in FIGS. 4 and 5) The reference current is generated by adding the currents generated by the current sources of the respective current generation units.

In a more preferable aspect (for example, a first embodiment described later), a selection unit (for example, the selection circuit 20 in FIG. 2) for sequentially selecting each unit circuit is provided in each of the first period and the second period. The data acquisition unit in each of the unit circuits acquires data from the signal line when the selection unit selects the unit circuit, and the selection unit selects each unit circuit in the first period (for example, the cycle in FIG. 3). T1) is longer than the period (for example, period T2 in FIG. 3) in which the selection unit selects each unit circuit in the second period. In other words, the path control means of each unit circuit outputs correction data to the correction means over a longer period than the output of gradation data to the drive means. According to these aspects, it is possible to ensure a sufficient period for taking correction data from the signal line into each unit circuit. Therefore, it is possible to reliably supply correction data to the correction means of each unit circuit.
In a configuration in which a transistor whose gate is set to a potential corresponding to gradation data is used as a driving unit, or in a configuration in which the correction unit includes a storage unit or a current source, the operation of outputting correction data to the correction unit is In many cases, the load is higher than the operation of outputting the adjustment data. Therefore, it can be said that this aspect in which the time for taking in correction data can be sufficiently secured is particularly effective in such a case.

The electro-optical device according to the second aspect of the present invention includes a first unit circuit (for example, the first unit circuit Ua in FIG. 6) and a second unit circuit (for example, the second unit circuit Ub in FIG. 6). A plurality of circuit portions (for example, the circuit portions UB1 to UBN in FIG. 6) and the second period in the first period (for example, the first period Pa in FIG. 7).
The first signal line (for example, the gradation data of each first unit circuit is supplied in a second period (for example, the second period Pb in FIG. 7) different from the first period, while the correction data of the unit circuit is supplied. The signal line La) of FIG. 6 and the second signal line (to which the correction data of each first unit circuit is supplied in the first period and the grayscale data of each second unit circuit is supplied in the second period (FIG. 6). For example, the signal line Lb in FIG. 6)
It comprises. Each of the first unit circuit and the second unit circuit includes an electro-optic element having a gradation corresponding to a drive current (for example, the drive current Idr in FIG. 6) and data acquisition means for acquiring data (for example, the data acquisition in FIG. 6). Circuit 30), correction means for generating reference currents (for example, reference currents Is [1] to Is [n] in FIG. 6) corresponding to the correction data, and the electro-optic element. Driving means (for example, the driving transistor Tdr in FIG. 6) that controls the driving current according to the gradation data and the reference current generated by the correcting means, and path control that controls the output destination of the data acquired by the data acquiring means 6 (for example, the path control circuit 40 in FIG. 6) The data acquisition unit of each first unit circuit sequentially acquires data from the first signal line, and the data acquisition unit of each second unit circuit receives the second signal. Get data sequentially from the line. To, in each of the plurality of circuit portions,
The path control means of the first unit circuit outputs the correction data acquired by the data acquisition means of the first unit circuit during the first period to the correction means of the second unit circuit, and the data acquisition means of the first unit circuit Outputs the gradation data acquired in the second period to the driving means of the first unit circuit, and the second
The path control means of the unit circuit outputs the correction data acquired by the data acquisition means of the second unit circuit during the first period to the correction means of the first unit circuit, and the data acquisition means of the second unit circuit The gradation data acquired in the two periods is output to the driving unit of the second unit circuit. In addition,
A specific example of this aspect will be described later as a second embodiment.

In the above configuration, correction means is installed in each unit circuit, and each of the first signal line and the second signal line is used for both transmission of correction data and transmission of gradation data. Therefore, the same operations and effects as the electro-optical device according to the first aspect are exhibited. In the second aspect, in each of the plurality of circuit units, the path control unit of the first unit circuit is on the side opposite to the electro-optical element of the second unit circuit as viewed from the correction unit of the second unit circuit. It is possible to employ a configuration in which the path control unit of the second unit circuit is arranged on the side opposite to the electro-optic element of the first unit circuit as viewed from the correction unit of the first unit circuit. According to this configuration, the wiring connecting the path control means of the first unit circuit and the correction means of the second unit circuit, or the wiring connecting the path control means of the second unit circuit and the correction means of the first unit circuit ( For example, it is not necessary to form the correction data line LA) in FIG. 6 so as to cross the array of the electro-optical elements. Therefore, there is an advantage that the space available for forming the electro-optic element can be expanded.

In the electro-optical device according to the second aspect, first selection means (for example, the first selection circuit 21 in FIG. 6) that sequentially selects each first unit circuit in each of the first period and the second period; , Second selection means for sequentially selecting each second unit circuit in each of the first period and the second period (for example, the second unit in FIG. 6).
A selection circuit 22), and the data acquisition means of each first unit circuit acquires data from the first signal line when the first selection means selects the first unit circuit, and each second unit circuit The data acquisition unit of the circuit acquires data from the second signal line when the second selection unit selects the second unit circuit. According to this aspect, since the selection of the first unit circuit by the first selection unit and the selection of the second unit circuit by the second selection unit are performed in parallel, correction data and gradation data of all unit circuits are performed. The length of time for supplying the can be shortened. In this aspect, the timing at which the first selection unit selects each first unit circuit and the timing at which the second selection unit selects each second unit circuit may be substantially matched. According to this configuration, the first selection unit and the second selection unit share a signal (for example, the clock signal CLKa and the clock signal CLKb in FIG. 7) that defines the operation timing of the first selection unit and the second selection unit. It becomes possible to do.

The electro-optical device according to the invention is used in various electronic apparatuses. A typical example of this electronic device is
1 is an image forming apparatus using an electro-optical device of the present invention as an exposure device (optical head). This image forming apparatus includes an image carrier (for example, the photosensitive drum 110 in FIG. 1) on which a latent image is formed on an image forming surface by exposure, the electro-optical device of the present invention that exposes the image forming surface, and a latent image. Developer (
For example, a developer that forms a visible image by the adhesion of toner. However, the use of the electro-optical device according to the present invention is not limited to exposure. For example, the electro-optical device of the present invention can be used as a display device for various electronic devices. Examples of this type of electronic device include a personal computer and a mobile phone. In addition, the present invention can be applied to various illumination devices such as a device (backlight) that is disposed on the back side of the liquid crystal device and illuminates the device, and a device that is mounted on an image reading device such as a scanner and irradiates light on a document. An optical device can be employed.

The present invention is also specified as a method for driving an electro-optical device. The electro-optic device
The electro-optical element is generated by a correction unit (for example, the correction circuit 50 in FIGS. 2 and 6) that generates a reference current according to the correction data, and by supplying a drive current according to the gradation data and the reference current generated by the correction unit. A plurality of unit circuits each including driving means for driving (for example, the driving transistor Tdr in FIGS. 2 and 6) are provided. According to the driving method according to each aspect described below, the same operations and effects as the electro-optical device according to each aspect described above are exhibited.

In the driving method according to the first aspect, the correction data of each unit circuit is supplied to the signal line (for example, the signal line L in FIG. 2) in the first period (for example, the first period Pa in FIG. 3). The grayscale data of each unit circuit is supplied to the signal line in a second period (for example, the second period Pb in FIG. 3) different from that in the first period. The correction data is input, and the input correction data is supplied to the correction means of the unit circuit. In the second period, gradation data is sequentially input from the signal line to each unit circuit. The tone data is supplied to the driving means of the unit circuit. In addition, the specific example of this aspect is later mentioned as 1st Embodiment or 3rd Embodiment.

In the driving method according to the second aspect, the correction data of each second unit circuit is transferred to the first signal line (for example, the first signal line La in FIG. 6) in the first period (for example, the first period Pa in FIG. 7). And supplying correction data of each first unit circuit to a second signal line (for example, the second signal line Lb in FIG. 6),
In a second period different from the first period (for example, the second period Pb in FIG. 7), the gradation data of each first unit circuit is supplied to the first signal line, and the gradation data of the second unit circuit is supplied to the second period. While being supplied to the signal line, in the first period, the correction data supplied to the first signal line is supplied to the correction means of each second unit circuit, and the correction data supplied to the second signal line is supplied to each of the first signal lines. The gradation data supplied to the correction means of the one unit circuit is supplied to the driving means of each first unit circuit and is supplied to the second signal line in the second period. The tone data is supplied to the correction means of each second unit circuit. A specific example of this aspect will be described later as a second embodiment.

<A: First Embodiment>
FIG. 1 is a perspective view showing a partial configuration of an image forming apparatus using the electro-optical device according to the first embodiment of the present invention as an exposure device (optical head). As shown in the figure, the image forming apparatus includes an electro-optical device 10, a condensing lens array 15, and a photosensitive drum 110. The electro-optical device 10 includes a number of electro-optical elements (not shown in FIG. 1) arranged linearly on the surface of the substrate 12. These electro-optical elements emit light selectively according to the form of an image to be printed on a recording material such as paper. The photosensitive drum 110 is supported by a rotating shaft extending in the main scanning direction, and rotates in the sub-scanning direction (the direction in which the recording material is conveyed) with the outer peripheral surface facing the electro-optical device 10.

The condensing lens array 15 is disposed in the gap between the electro-optical device 10 and the photosensitive drum 110. The condensing lens array 15 includes a large number of gradient index lenses arranged in an array with each optical axis directed to the electro-optical device 10. Such a condensing lens array 15
For example, SLA (Selfoc Lens Array) available from Nippon Sheet Glass Co., Ltd. (Selfoc / SELFOC is a registered trademark of Nippon Sheet Glass Co., Ltd.).

Light emitted from each electro-optical element of the electro-optical device 10 passes through each refractive index distribution type lens of the condensing lens array 15 and then reaches the surface of the photosensitive drum 110. By this exposure, a latent image (electrostatic latent image) corresponding to a desired image is formed on the surface of the photosensitive drum 110. In the present embodiment, it is assumed that a latent image in which pixels are arranged in a matrix form in a horizontal (main scanning direction) n columns × vertical (sub scanning direction) m rows is formed (each of m and n is 2). More natural numbers).

FIG. 2 is a block diagram illustrating an electrical configuration of the electro-optical device 10, and FIG. 3 is a timing chart illustrating waveforms of signals used for driving the electro-optical device 10. As shown in FIG. 2, the electro-optical device 10 has a structure in which a selection circuit 20 and n unit circuits U (U 1 to Un) are arranged on the surface of the substrate 12. The unit circuits U1 to Un are arranged along the main scanning direction. Each unit circuit U includes an electro-optic element E. Various signals and data are supplied to the electro-optical device 10 from a control device (for example, a CPU or a controller, hereinafter referred to as “higher-level device”) of the image forming apparatus.

As shown in FIG. 3, the period during which the electro-optical device 10 operates is divided into a first period Pa and a second period Pb. The second period Pb is a period during which the luminance of each electro-optical element E is actually controlled according to the image to be formed on the recording material. In other words, the second period Pb is a period in which an image corresponding to the light emission of each electro-optical element E within that period is actually formed on the recording material and output. On the other hand, the first period Pa is a period in which the gradation control of each electro-optical element E is stopped. For example, a period for initializing the state of each part of the electro-optical device 10 immediately after the power is turned on, or a period during which the gradation of each electro-optical element E is not reflected in an image output to the outside (for example, a plurality of recording materials The first interval Pa corresponds to the interval (interval between sheets) when an image is formed on the first interval Pa.

The selection circuit 20 in FIG. 2 is means for sequentially selecting the n unit circuits U1 to Un in the order of arrangement (that is, the order from the unit circuit U1 to the unit circuit Un). The selection circuit 20 of the present embodiment is an n-bit shift register corresponding to the total number of unit circuits U1 to Un, and, as shown in FIG. 3, from the host device in each of the first period Pa and the second period Pb. The selection signals S1 to Sn are output by sequentially shifting a predetermined pulse signal (not shown) in synchronization with the supplied clock signal CLK. Therefore, as shown in FIG. 3, the selection signals S1 to Sn transition to the high level in order for each cycle of the clock signal CLK. The transition of the selection signal Si (i is an integer satisfying 1 ≦ i ≦ n) to the high level means selection of the unit circuit Ui.

As shown in FIG. 3, the cycle of the clock signal CLK changes between the first period Pa and the second period Pb. That is, the period T1 of the clock signal CLK in the first period Pa is longer than the period T2 in the second period Pb. Therefore, the period (T1) in which each unit circuit U is selected in the first period Pa is longer than the period (T2) in which each unit circuit U is selected in the second period Pb.

As shown in FIG. 2, each unit circuit U includes an electro-optical element E, a drive transistor Tdr, a data acquisition circuit 30, a path control circuit 40, and a correction circuit 50. The electro-optical element E is an element having a gradation corresponding to the driving current Idr. The electro-optical element E in this embodiment is an organic EL (
OLED in which a light-emitting layer made of an electroluminescent material is interposed in the gap between the anode and the cathode
It is an element and emits light with a luminance corresponding to the current value of the drive current Idr supplied to the light emitting layer. The gradation of the electro-optic element E in the unit circuit Ui is specified by gradation data Gi. The gradation data Gi in the present embodiment is 1-bit digital data that designates whether to turn on (high gradation) or turn off (low gradation) for the i-th electro-optic element E.

The correction circuit 50 is means for generating a reference current Is [i] that serves as a reference for the drive current Idr (a specific configuration will be described later). The drive transistor Tdr has a reference current I output from the correction circuit 50.
As means for generating a drive current Idr having a current value corresponding to s [i] and gradation data Gi (that is, means for driving the electro-optical element E based on the reference current Is [i] and gradation data Gi) Function. The drive transistor Tdr of the present embodiment is a p-channel transistor (typically a thin film transistor) interposed between the correction circuit 50 and the anode of the electro-optic element E. The driving transistor Tdr is controlled to be in an on state (low resistance state) or an off state (high resistance state) by supplying a voltage corresponding to the gradation data Gi to the gate. Drive transistor Tdr
Is turned on, the electro-optic element E emits light by supplying the reference current Is [i] as the drive current Idr. On the other hand, when the drive transistor Tdr is turned off and the path of the reference current Is [i] is interrupted, the current value of the drive current Idr becomes zero and the electro-optical element E is turned off.

By the way, an error due to the manufacturing technique may occur in the characteristics of the electro-optical element E in each unit circuit U. As described above, if the drive current Idr having the same current value is supplied to all the electro-optical elements E even though the respective characteristics (for example, light emission efficiency) are different, the actual luminance of each electro-optical element E is determined. Variation occurs in (gradation). In order to suppress the luminance variation as described above, in this embodiment, the reference current Is [i] generated by the correction circuit 50 of each unit circuit Ui is the correction data Ai generated for the unit circuit Ui. Is set to a current value corresponding to.

The correction data Ai corresponding to one unit circuit Ui is 3-bit digital data composed of the most significant bit a1 [i], the next bit a2 [i], and the least significant bit a3 [i]. It is generated in advance for each electro-optical element E according to the result of measuring the luminance of each electro-optical element E in advance or the operation of the electro-optical device 10 by the user. For example, after supplying the drive current Idr having the same current value to each, the actual luminance of all the electro-optic elements E is measured, and all the results are based on the measurement results (the luminance variation at the time of non-correction). The correction data A1 to An are determined for the unit circuits U1 to Un so that the luminance of the electro-optical element E is made uniform.

The signal line L shown in FIG. 2 is a wiring for transmitting data input from the host device to the terminal Td to each unit circuit U. The signal line L in this embodiment is also used for transmission of correction data A1 to An and transmission of gradation data G1 to Gn.

More specifically, in the first period Pa, as shown in FIG. 3, the correction data A1 to An
Are sequentially supplied from the host device to the signal line L via the terminal Td. The first period Pa is divided into three periods P1 to P3. In the period P1, the most significant bits a1 [1] to a1 [n] in each of the correction data A1 to An are serially supplied to the signal line L in this order. Similarly, in the period P2, the next bits a2 [1] to a2 [n] in the correction data A1 to An are supplied to the signal line L, and in the period P3, the least significant bits a3 [1] to a3 [n ] Is supplied to the signal line L. On the other hand, in the second period Pb, the gradation data G1 to Gn are sequentially supplied to the signal line L. The correction data A1 to An and the gradation data G1 to Gn are supplied to the signal line L at a timing synchronized with the clock signal CLK. The period T1 in the first period Pa of the clock signal CLK is the second.
Since it is longer than the period T2 in the period Pb, the transmission frequency of each bit of the correction data A1 to An (
1 / T1) is lower than the transmission frequency (1 / T2) of the gradation data G1 to Gn.

Next, a specific configuration of the unit circuits U1 to Un will be described with reference to FIGS. In addition,
Since the configuration of all the unit circuits U1 to Un is the same, only the configuration of one unit circuit Ui will be described below to serve as the description of all the unit circuits U1 to Un.

The data acquisition circuit 30 of the unit circuit Ui receives each bit a1 [i of the correction data Ai in the first period Pa.
] To a3 [i] from the signal line L and the gradation data Gi from the signal line L in the second period Pb. As shown in FIG. 4, the transmission gate 31 and the latch circuit 3
5 and the like. The input terminals of the transmission gates 31 in all the unit circuits U1 to Un are connected in common to the signal line L.

The transmission gate 31 is a switch that controls electrical connection (conduction / non-conduction) between the signal line L and the latch circuit 35, and is a period during which the selection signal Si is maintained at a high level (the logic level of the selection signal Si is inverted) (The period in which the signal inverted by 32 maintains the low level). Therefore, the data acquisition circuit 30 of the unit circuit Ui supplies the data supplied to the signal line L during the period in which the selection signal Si is maintained at the high level (each bit a1 [i] of the correction data Ai in the first period Pa). ~ A3 [i] or gradation data G in the second period Pb
i) is taken in via the transmission gate 31.

Latch circuit 35 includes a clocked inverter 351 and an inverter 352. The output terminal of the clocked inverter 351 is connected to the output terminal of the transmission gate 31 and the input terminal of the inverter 352. The input terminal of the clocked inverter 351 and the path control circuit 40 are connected to the output terminal of the inverter 352. The clocked inverter 351 is in a high impedance state during a period in which the selection signal Si maintains a high level. On the other hand, when the selection signal Si transits to a low level, the clocked inverter 351 functions as an inverter. Therefore, in the period in which the selection signal Si is maintained at the low level, the data acquired by the transmission gate 31 immediately before that is held in the latch circuit 35 and output to the path control circuit 40. More specifically, in the first period Pa, each bit a1 [i] of the correction data Ai at the timing when the selection signal Si transitions to a low level.
~ A3 [i] are latched in order. On the other hand, in the second period Pb, the gradation data Gi is sequentially latched every time the selection signal Si changes to the low level.

The path control circuit 40 is means for changing the output destination of the data acquired from the signal line L by the data acquisition circuit 30 in accordance with the path control signal WRT and the inverted path control signal WRTX. As shown in FIG. 3, the path control signal WRT maintains a high level in the first period Pa and at the same time the second period Pb.
This signal maintains a low level at. The inverted path control signal WRTX is a signal obtained by inverting the logic level of the path control signal WRT.

As shown in FIG. 4, the path control circuit 40 includes two transmission gates 42 and 43.
And an n-channel transistor 45 and a p-channel transistor 46. The transmission gate 42 is a switch that controls electrical connection between the data acquisition circuit 30 and the correction circuit 50 (correction data line LA). On the other hand, the transmission gate 43 is a switch for controlling the electrical connection between the data acquisition circuit 30 and the drive transistor Tdr.
Transmission gate 42 and transmission gate 43 are alternatively turned on in response to path control signal WRT and inverted path control signal WRTX. That is, the route control signal WR
In the first period Pa in which T maintains a high level, the transmission gate 42 maintains the on state and the transmission gate 43 maintains the off state. On the other hand, in the second period Pb in which the path control signal WRT maintains the low level, the transmission gate 42 maintains the off state and the transmission gate 43 maintains the on state.

The transistor 45 is a switch that controls electrical connection between the ground potential Gnd and the correction data line LA, and is turned on in the second period Pb in which the inversion path control signal WRTX is at a high level. The transistor 46 is a switch that controls electrical connection between the power supply potential Vdd and the gate of the driving transistor Tdr, and is turned on in the first period Pa in which the inversion path control signal WRTX is at a low level.

With the above configuration, in the first period Pa, each bit a1 [i] to a3 [i] of the correction data Ai output from the data acquisition circuit 30 is sequentially transferred to the correction data line LA via the transmission gate 42. On the other hand, the power supply potential Vdd is supplied to the gate via the transistor 46, whereby the drive transistor Tdr is turned off. Therefore, the first period Pa
In, all the electro-optic elements E are turned off. On the other hand, in the second period Pb, the potential of the correction data line LA is maintained at the ground potential Gnd as the transistor 45 is turned on, while the gradation data Gi output from the data acquisition circuit 30 is maintained. The corresponding potential is supplied to the gate of the drive transistor Tdr via the transmission gate 43. Therefore, in the second period Pb, the gradation (lighting / non-lighting) of each electro-optical element E is controlled according to the gradation data Gi.

As shown in FIG. 4, the correction circuit 50 includes three current generators C (C1 to C3) corresponding to the number of bits of the correction data Ai and one correction data line LA. The current generators C1 to C3 are connected to the path control circuit 40 (more specifically, the transmission gate 42 via the correction data line LA).
Common output terminal). The k-th current generation unit Ck (k is an integer satisfying 1 ≦ k ≦ 3) obtains and holds the bit ak [i] of the correction data Ai from the correction data line LA, and the holding circuit 52. And a current source transistor 54 for generating a current Ik corresponding to the bit ak [i] held in The current source transistors 54 of the current generators C1 to C3 are p-channel transistors in which each source is connected to the power supply potential Vdd and each drain is connected to the source of the driving transistor Tdr.

FIG. 5 is a block diagram showing a configuration of the current generator Ck (C1 to C3). As shown in the figure, the holding circuit 52 of the current generator Ck includes a transmission gate 61 and an inverter 62.
And a latch circuit 64 and a switch 66. The input terminal of the transmission gate 61 in each of the three current generators C1 to C3 is commonly connected to the correction data line LA. Further, the write signal MSk is commonly supplied to the transmission gate 61 and the latch circuit 64 in the current generator Ck of the unit circuits U1 to Un. The write signals MS1 to MS3 are signals for alternatively selecting one of the three current generators C1 to C3 in each of the unit circuits U1 to Un.

As shown in FIG. 3, the write signals MS1 to MS3 are sequentially shifted to a high level in the first period Pa. That is, the write signal MS1 becomes high level during the period P1 during which the most significant bits a1 [1] to a1 [n] in each of the correction data A1 to An are supplied to the signal line L. Similarly, the write signal MS2 becomes high level during the period P2 during which the next bits a2 [1] to a2 [n] are transmitted to the signal line L, and the write signal MS3 becomes high level during the period P3. Become. On the other hand, in the second period Pb, the write signals MS1 to MS3 maintain the low level.

The transmission gate 61 in FIG. 5 is a switch for controlling the electrical connection between the correction data line LA and the latch circuit 64, and is a period during which the write signal MSk is maintained at a high level (the logic level of the write signal MSk is changed to an inverter). The signal inverted by 62 is turned on in the period Pk during which the signal is maintained at a low level. On the other hand, the latch circuit 64 includes a clocked inverter 641 and an inverter 642, similarly to the latch circuit 35 of the data acquisition circuit 30. Since the clocked inverter 641 functions as an inverter during the period in which the write signal MSk maintains the low level, the latch circuit 64 outputs the output (bit ak [i] of the transmission gate 61 immediately before the write signal MSk transitions to the low level. ]).

As described above, the bit ak [i] of the correction data Ai acquired from the signal line L by the data acquisition circuit 30 by the selection signal Si is transmitted through the transmission gate 61 which is turned on by the high level write signal MSk. It is taken in from the correction data line LA to the current generator Ck,
It is held by the latch circuit 64 from the time when the write signal MSk transits to the low level (end point of the period Pk). When this operation is executed by all the unit circuits U1 to Un in each of the periods P1 to P3, each unit circuit Ui holds 3-bit correction data Ai. The correction data Ai is also retained in the second period Pb after the first period Pa has elapsed.

The switch 66 is means for controlling the current source transistor 54 to be in an on state or an off state in accordance with the bit ak [i] held in the latch circuit 64.
1 and transmission gate 662. When the bit ak [i] is “1”, the transmission gate 661 maintains the on state and the transmission gate 662 maintains the off state. Therefore, when the on potential Von is supplied to the gate through the transmission gate 661, the current source transistor 54 is turned on. As a result, a current Ik flows through the current source transistor 54. On the other hand, bit ak [i]
Is “0”, the transmission gate 661 maintains the OFF state and the transmission gate 662 changes to the ON state. Accordingly, the gate potential of the current source transistor 54 is set to the off potential Voff. As a result, the current source transistor 5
4 transitions to the off state and the current Ik is cut off.

As described above, each of the three current source transistors 54 is selectively turned on according to each bit of the correction data A. Then, the one or more current source transistors 5 turned on
The reference current Is [i] is generated by the addition of the current Ik flowing through 4. The characteristic of the three current source transistors 54 included in one unit circuit U is that the relative ratio of the current values of the currents I1 to I3 that flow when each of the current source transistors 54 is turned on is "I1: I2: I3 = 4: 2". : 1 ”. Accordingly, the reference current Is [i] is set at any one of the seven levels according to the correction data A of the unit circuit Ui. That is, the correction circuit 50 functions as a DAC (Digital to Analog Converter) that generates a reference current Is [i] having a current value corresponding to the correction data Ai.

Here, the configuration in which the characteristics of the current source transistors 54 are different from each other is illustrated.
By arranging a number of transistors having the same characteristics in parallel according to the weight value, each of the currents I1 to I3 can be set to a current value according to a desired weight value. For example, instead of the current source transistor 54 of the current generator C2, two transistors having the same characteristics as the current source transistor 54 of the current generator C3 are arranged in parallel, and the current source transistor 54 of the current generator C1 is arranged.
Instead of the above, the relative ratio of the currents I1 to I3 can also be expressed as “I1: I2: I3 = 4: 2:” by arranging in parallel four transistors having the same characteristics as the current source transistor 54 of the current generator C3.
1 "can be set.

According to the above configuration, the current value of the drive current Idr that determines the gradation of the electro-optic element E of the unit circuit Ui is based on the reference current Is [i] and the gradation data Gi corresponding to the correction data Ai. Be controlled. Therefore, even if the characteristics of the electro-optical elements E and the characteristics of the elements (particularly the drive transistors Tdr) constituting the unit circuits U1 to Un vary, by appropriately selecting the correction data A1 to An Variation in gradation of each electro-optic element E can be suppressed.
Then, the correction circuit 50 for generating the reference current Is [i] corresponding to the correction data Ai is provided for each unit circuit U.
Therefore, a circuit for correcting the gradation data Gi based on the correction data Ai is not necessary in principle. Therefore, according to this embodiment, the scale of the peripheral circuit of the electro-optical device 10 can be reduced.

Further, in the present embodiment, since one signal line L is used for both transmission of correction data A1 to An and transmission of gradation data G1 to Gn, wiring for transmitting correction data A1 to An and gradation data are used. There are various advantages as compared with the configuration in which the wirings for transmitting G1 to Gn are separately formed. For example, there is no need to distinguish between the correction data A1 to An and the gradation data G1 to Gn for the process of outputting data from the host device to the electro-optical device 10, so that the processing load on the host device is reduced. is there. Further, the correction data A1 to An and the gradation data G1 to Gn have a common terminal T.
Since the correction data A1 to An and the gradation data G1 to Gn are input to separate terminals, the number of terminals can be reduced. Therefore, the possibility that a problem occurs in the connection between each terminal and the outside is reduced, and thereby the reliability of the electro-optical device 10 can be improved. Here, in the image forming apparatus, conveyance of the recording material and the photosensitive drum 11 are performed.
Since vibration is generated in the electro-optical device 10 at the time of driving 0, etc., there is a circumstance that the portion of the electro-optical device 10 that is connected to the outside is easily damaged. Therefore, the configuration of the present embodiment that can reduce the number of terminals is particularly suitable for the electro-optical device 10 used in the image forming apparatus.

Incidentally, the correction circuit 50, which is the output destination of the correction data Ai, is larger in circuit scale than the output destination (drive transistor Tdr) of the gradation data Gi. Further, the length of the correction data line LA through which the correction data Ai is transmitted is longer than the path through which the gradation data Gi is transmitted. Therefore,
If operations such as fetching the correction data Ai for each unit circuit Ui and supplying the correction data Ai to the correction circuit 50 are executed at the same speed as the gradation data Gi, each bit of the correction data Ai is stored in the latch circuit 64 of the correction circuit 50. May not be stored reliably. In the present embodiment, the period T1 for outputting the correction data A1 to An to the correction circuit 50 from the path control circuit 40 is set to be longer than the period T2 for outputting the gradation data G1 to Gn. Sufficient time is taken for taking [i] to a3 [i] into the correction circuit 50. Therefore, the correction data A1 to An
Can be held in the correction circuit 50 accurately and reliably.

<B: Second Embodiment>
Next, a second embodiment of the present invention will be described. Of the present embodiment, elements common to the first embodiment are denoted by the same reference numerals as above, and detailed description thereof is omitted as appropriate.

FIG. 6 is a block diagram illustrating a configuration of the electro-optical device 10 according to the present embodiment, and FIG.
3 is a timing chart showing the waveform of a signal in each part of the electro-optical device 10; FIG.
As shown in FIG. 2, the electro-optical device 10 includes n unit circuits U arranged along the main scanning direction, and a first selection circuit 21 and a second selection circuit 22 arranged at positions sandwiching these unit circuits U. A first signal line La and a second signal line Lb are included. Hereinafter, the odd-numbered unit circuits U (hereinafter referred to as “first unit circuits Ua”) and the even-numbered unit circuits U adjacent to the right side thereof (see “first unit circuit Ua”) as viewed from the left in FIG.
Hereinafter, a pair with “second unit circuit Ub” is expressed as “circuit unit UB (UB1 to UBN)” (N = n / 2).

The first selection circuit 21 includes each first unit circuit U in each of the first period Pa and the second period Pb.
A means for sequentially selecting a. As shown in FIG. 7, the first selection circuit 21 of the present embodiment is
The selection signals SA1 to SAN output to each first unit circuit Ua are set to the high level in order for each cycle of the clock signal CLKa. Similarly, the second selection circuit 22 outputs selection signals SB1 to SBN that sequentially become high level for each cycle of the clock signal CLKb to each second unit circuit Ub, whereby the first period Pa and the second period are output. Each second unit circuit Ub is sequentially selected in each Pb. The clock signal CLKa and the clock signal CLKb are signals having the same waveform. Therefore, as shown in FIG. 7, the selection signal SAj (j is an integer satisfying 1 ≦ j ≦ N) and the selection signal SBj have the same waveform. That is, at the timing when the first selection circuit 21 selects the first unit circuit Ua of the circuit unit UBj, the second selection circuit 22 selects the second unit circuit Ub of the same circuit unit UBj. Further, in the clock signal CLKa and the clock signal CLKb, the cycle T1 in the first period Pa is longer than the cycle T2 in the second period Pb, as in the first embodiment. 6 illustrates the configuration in which the clock signal CLKa and the clock signal CLKb are input to separate terminals, the clock signal (for example, the clock signal CLKa in FIG. 7) input to one terminal is the first selection. It may be configured to be supplied to both the circuit 21 and the second selection circuit 22.

As shown in FIG. 7, the correction data A of each second unit circuit Ub and the gradation data G of each first unit circuit Ua are serially supplied to the first signal line La. More specifically, in the first period Pa, each bit of the correction data A (A2, A4,..., An) of the second unit circuit Ub is transferred to the first signal line La every cycle T1 of the clock signal CLKa. Supplied. In the second period Pb, the gradation data G (G1, G3,..., Gn-1) of the first unit circuit Ua is supplied to the first signal line La every cycle T2 of the clock signal CLKa. . Further, the correction data A of each first unit circuit Ua and the gradation data G of each second unit circuit Ub are serially supplied to the second signal line Lb. That is, in the first period Pa, the correction data A (A1, A3,..., An− of the first unit circuit Ua.
1) is supplied to the second signal line Lb in a cycle T1, and in the second period Pb, the gradation data G (G2, G4,..., Gn) of the second unit circuit Ub is supplied in the cycle T2. 2 is supplied to the two signal lines Lb.

The unit circuit U (each of the first unit circuit Ua and the second unit circuit Ub) includes an electro-optic element E, a drive transistor Tdr, a data acquisition circuit 30, a path control circuit 40, and a correction circuit 50.
Specific configurations of these units are the same as those in the first embodiment. However, each first unit circuit Ua
The data acquisition circuit 30, the path control circuit 40, and the correction circuit 50 of each second unit circuit Ub are located on the first selection circuit 21 side with an array of n electro-optic elements E interposed therebetween, whereas The data acquisition circuit 30 and the path control circuit 40 of the two unit circuit Ub and the correction circuit 50 of each first unit circuit Ua are located on the second selection circuit 22 side with the arrangement of the electro-optic elements E interposed therebetween. Accordingly, the path control circuit 40 of the first unit circuit Ua belonging to the circuit unit UBj is opposite to the electro-optical element E of the second unit circuit Ub when viewed from the correction circuit 50 of the second unit circuit Ub belonging to the same circuit unit UBj. Placed on the side. The path control circuit 40 of the second unit circuit Ub belonging to the circuit unit UBj is opposite to the electro-optical element E of the first unit circuit Ua when viewed from the correction circuit 50 of the first unit circuit Ua belonging to the circuit unit UBj. Placed on the side.

The data acquisition circuit 30 of the first unit circuit Ua belonging to the circuit unit UBj sequentially acquires data from the first signal line La in accordance with the selection signal SAj supplied from the first selection circuit 21. That is, the data acquisition circuit 30 in the first unit circuit Ua of the circuit units UB1 to UBN receives each bit (a1 [2], a1 [4],... Of the correction data A of the second unit circuit Ub in the first period Pa. , A1 [n], a2
[2], a2 [4], ..., a2 [n], a3 [2], a3 [4], ..., a3 [n]) are obtained in order at the period T1, and in the second period Pb Gradation data G (G1, G3,..., Gn-1) of the first unit circuit Ua are acquired in order at a cycle T2.

On the other hand, the data acquisition circuit 30 of the second unit circuit Ub in the circuit unit UBj is the second selection circuit 2.
Data is sequentially acquired from the second signal line Lb according to the selection signal SBj supplied from the second signal line Lb. That is, the data acquisition circuit 30 in the second unit circuit Ub of the circuit units UB1 to UBN receives each bit (a1 [1], a1 [3],..., A1 [n−) of the correction data A of the first unit circuit Ua. 1], a2 [1], a2 [3
],..., A2 [n-1], a3 [1], a3 [3],..., A3 [n-1]) are sequentially acquired in the first period Pa, and the second unit circuit Ub The gradation data G (G2, G4,..., Gn) is acquired in order in the second period Pb.

Further, the path control circuit 40 of the first unit circuit Ua belonging to the circuit unit UBj belongs to the drive transistor Tdr of the first unit circuit Ua and the circuit unit UBj as the output destination of the data acquired by the previous data acquisition circuit 30. Switching is performed by the correction circuit 50 of the second unit circuit Ub. That is, the path control circuit 40 of the first unit circuit Ua corrects the correction data (A2, A4,... Supplied during the first period Pa.
, An) is sequentially output to the correction circuit 50 of the second unit circuit Ub of the circuit unit UBj, and the gradation data G (G1, G3,..., Gn− supplied in the second period Pb is output. A potential corresponding to 1) is supplied to the gate of the drive transistor Tdr of the first unit circuit Ua.

Similarly, the path control circuit 40 of the second unit circuit Ub belonging to the circuit unit UBj determines the output destination of the data supplied from the data acquisition circuit 30 as the drive transistor Tdr of the second unit circuit Ub and the circuit unit UBj. Switching is performed with the correction circuit 50 of the unit circuit Ua. That is, the path control circuit 40 of the second unit circuit Ub receives the correction data A (A1, A3,..., Supplied during the first period Pa.
An-1) is sequentially output to the correction circuit 50 of the first unit circuit Ua of the circuit unit UBj, and the gradation data G (G2, G4,..., Gn) supplied in the second period Pb. ) In accordance with the second potential
This is supplied to the gate of the drive transistor Tdr of the unit circuit Ub. Also in the above configuration, the correction circuit 50 and the drive transistor Tdr of each unit circuit U operate in the same manner as in the first embodiment.
In the present embodiment, the same effects as those of the first embodiment are achieved.

By the way, in the electro-optical device 10 of the first embodiment, as shown in FIG. 2, since the electro-optical element E is interposed in the gap between the correction circuit 50 and the path control circuit 40 of each unit circuit U, main scanning is performed. It is necessary to form the correction data line LA so as to cross the arrangement of the electro-optic elements E along the direction. On the other hand, in the present embodiment, the correction circuit 50 of the first unit circuit Ua belonging to the circuit unit UBj and the path control circuit 40 of the second unit circuit Ub (circuit unit UBj) that supplies correction data A thereto. The electro-optic element E and the driving transistor Tdr are not interposed in the gap. The same applies to the gap between the correction circuit 50 of the second unit circuit Ub and the path control circuit 40 of the first unit circuit Ua. Therefore, it is not necessary to form the correction data line LA so as to cross the arrangement of the electro-optic elements E. Since the wiring around the electro-optical element E is thus reduced, according to the present embodiment, the area of each electro-optical element E can be enlarged as compared with the first embodiment. In addition, the fact that the area of each electro-optical element E can be expanded means that the electric energy (current value or current density) to be supplied to the electro-optical element E in order to obtain a predetermined light emission intensity is reduced. Further, by reducing the electric energy supplied to the electro-optical element E, it is possible to obtain effects such as suppression of power consumption and extending the life of the electro-optical element E.

In the present embodiment, the data supply to each first unit circuit Ua and the data supply to each second unit circuit Ub are performed in parallel. There is also an advantage that the time length required for supplying the gradation data G is shortened to about half that of the first embodiment. In the first embodiment, each unit circuit U is selected by one selection circuit 20, whereas in this embodiment, two selection circuits (first selection circuit 21 and second selection circuit 22) 20 are used. Is required. However, the scale of each of the first selection circuit 21 and the second selection circuit 22 is about half that of the selection circuit 20 of the first embodiment (for example, an n / 2-bit shift register is sufficient). As a whole, the scale of the circuit related to the selection of each unit circuit U is not significantly enlarged as compared with the first embodiment.

<C: Third Embodiment>
Next, a third embodiment of the present invention will be described.
In the first embodiment, the configuration in which each of the n unit circuits U is selected by the selection circuit 20 is illustrated, but a method and a configuration for selecting the unit circuit U that is a data supply destination are arbitrary. In the present embodiment, the selection circuit 20 is not disposed on the substrate 12, and the unit circuits U are sequentially selected by a signal supplied from the host device. In addition, the same code | symbol is attached | subjected about the element which is common in 1st Embodiment among this embodiment, and the detailed description is abbreviate | omitted suitably.

FIG. 8 is a block diagram illustrating a configuration of the electro-optical device 10 according to the present embodiment, and FIG.
It is a timing chart which shows the waveform of the signal utilized by each part. As shown in FIG. 8, the n unit circuits U1 to Un are divided into M (M = n / 3) blocks B1 to BM in units of three. On the surface of the substrate 12, M signal lines L1 to LM each corresponding to a separate block are formed. The signal line Lh corresponding to one block Bh (h is an integer satisfying 1 ≦ h ≦ M)
Commonly connected to the data acquisition circuit 30 (input terminal of the transmission gate 31) in each of the three unit circuits U belonging to the block Bh.

In addition, the first unit circuit U (U1, U4,..., Un-) belonging to each of the blocks B1 to BM.
In 2), the selection signal SEL1 is supplied from the host device. Similarly, the selection signal SEL2 is supplied to the second unit circuits U (U2, U5,..., Un-1) of the blocks B1 to BM, and the third unit circuits U (U3, U6,...) Are supplied. .., Un) are supplied with a selection signal SEL3. As shown in FIG.
The selection signals SEL1 to SEL3 sequentially become active levels in a predetermined cycle (cycle T1 in the first period Pa and cycle T2 in the second period Pb).

The correction data A and gradation data G corresponding to each unit circuit U of the block Bh are supplied from the host device to the signal line Lh. More specifically, as shown in FIG. 9, in the first period Pa, each bit of the correction data A corresponding to each unit circuit U of the block Bh is sequentially supplied to the signal line Lh in the cycle T1. In the second period Pb, the gradation data G corresponding to each unit circuit U of the block Bh is sequentially supplied to the signal line Lh at the cycle T2.

By the above operation, in the first period Pa, when the selection signal SEL1 changes to high level, the bit of the correction data A is sent to the first unit circuit U (U1, U4,..., Un-2) of each block Bh. ak is taken in parallel. Similarly, when the selection signal SEL2 transits to the high level, the bit ak is taken into the second unit circuits U (U2, U5,..., Un-1), and when the selection signal SEL3 transits to the high level, the third Bit ak is taken into each of the first unit circuits U (U3, U6,..., Un). When the above operation is executed in each of the periods P1 to P3, the correction data A1 to An are held in the unit circuits U1 to Un as in the first embodiment.

On the other hand, in the second period Pb, when the selection signal SEL1 transits to a high level, the blocks B1 to
The gradation data G (G1, G4,..., Gn-2) is taken into the first unit circuit U of BM. Similarly, when the selection signal SEL2 transits to a high level, the gradation data G (G2, G5,..., Gn-1) is taken into the second unit circuit U, and when the selection signal SEL3 transits to a high level. The gradation data G (G3, G6,..., Gn) is taken into the third unit circuit U. With the above operation, as in the first embodiment, the electro-optic elements E of the unit circuits U1 to Un are driven to the gradation corresponding to the gradation data G1 to Gn.

Also in this embodiment, the same operation and effect as the first embodiment are exhibited. Further, in the present embodiment, since data is taken in parallel to one unit circuit U belonging to each of the blocks B1 to BM, correction data A and gradation data G are supplied to all the unit circuits U. Therefore, there is an advantage that the time length required for this is shortened compared to the first embodiment.

<D: Modification>
Various modifications can be made to each of the above embodiments. An example of a specific modification is as follows. In addition, you may combine each following aspect suitably.

(1) Modification 1
Of course, the number of bits of the correction data A is not limited to the above example. Therefore, the number of current generation units Ck constituting one correction circuit 50 is appropriately changed from the above examples. In each of the above embodiments, the electro-optic element E is represented by 1-bit gradation data G.
However, the gradation data G may be 2 bits or more. In this configuration, the drive current Idr flowing through the drive transistor Tdr is converted to the gradation data G
Accordingly, the gradation of the electro-optic element E is controlled in a multi-valued manner (any of three or more gradations). Further, in place of the signal line L in the first embodiment and the signal line La and the signal line Lb in the second embodiment, a phase output (serial-parallel conversion) of a signal (for example, an image signal) serially output from a host device is performed. A configuration in which a plurality of signal lines to which signals of each system are supplied is also employed.

(2) Modification 2
In each of the above embodiments, the configuration in which the OLED element is employed as the electro-optical element E is illustrated, but the present invention is also applied to various electro-optical devices 10 using other electro-optical elements E. For example, display devices using inorganic EL elements, field emission displays (FED: Field)
d Emission Display (SED), surface-conduction electron emission display (SED)
on Electron-emitter Display (Ballistic el)
The present invention can be applied to a display device using an ectron surface emitting display) and a light emitting diode in the same manner as the above embodiments.

<E: Electronic equipment>
Next, with reference to FIG. 10, an image forming apparatus which is one aspect of the electronic apparatus according to the invention will be described. This image forming apparatus is a tandem type full color image forming apparatus using a belt intermediate transfer body system.

In this image forming apparatus, four electro-optical devices 10K, 10C, each having the same configuration.
10M and 10Y are four photosensitive drums (image carriers) 110K having the same configuration.
110C, 110M, and 110Y are disposed at positions facing the image forming surface 110A. The electro-optical devices 10K, 10C, 10M, and 10Y have the same configuration as the electro-optical device 10 according to each of the above embodiments.

As shown in FIG. 10, this image forming apparatus is provided with a driving roller 121 and a driven roller 122. An endless intermediate transfer belt 120 is wound around these rollers 121 and 122, and an arrow indicates. As shown, the periphery of the rollers 121 and 122 is rotated. Although not shown, tension applying means such as a tension roller that applies tension to the intermediate transfer belt 120 may be provided.

Around the intermediate transfer belt 120, there are four photosensitive drums 1 each having a photosensitive layer on the outer peripheral surface.
10K, 110C, 110M, and 110Y are arranged at predetermined intervals. Subscript "
"K", "C", "M", and "Y" mean that they are used to form black, cyan, magenta, and yellow visible images, respectively. The same applies to other members. The photosensitive drums 110K, 110C, 110M, and 110Y are rotationally driven in synchronization with the driving of the intermediate transfer belt 120.

Around each photosensitive drum 110 (K, C, M, Y), a corona charger 111 (K, C,
M, Y), the electro-optical device 10 (K, C, M, Y), and the developing device 114 (K, C, M, Y)
And are arranged. The corona charger 111 (K, C, M, Y) uniformly charges the image forming surface 110A (outer peripheral surface) of the corresponding photosensitive drum 110 (K, C, M, Y). The electro-optical device 10 (K, C, M, Y) writes an electrostatic latent image on the charged image forming surface 110A of each photosensitive drum. In each electro-optical device 10 (K, C, M, Y), the photosensitive drum 1
A plurality of electro-optic element elements E are arranged along 10 (K, C, M, Y) buses (main scanning direction). The electrostatic latent image is written by the plurality of electro-optical elements E using the photosensitive drums 110 (K, C
, M, Y). The developing device 114 (K, C, M, Y) causes the photosensitive drum 110 (K, C, M, Y) to adhere to the electrostatic latent image with toner as a developer.
) To form a visible image (that is, a visible image).

Black, cyan, magenta, and black formed by such a four-color single color image forming station
The yellow visible images are sequentially transferred onto the intermediate transfer belt 120 to be superposed on the intermediate transfer belt 120. As a result, a full-color visible image is formed. Inside the intermediate transfer belt 120, four primary transfer corotrons (transfer devices) 112 (K, C,
M, Y) are arranged. The primary transfer corotrons 112 (K, C, M, Y) are respectively arranged in the vicinity of the photosensitive drums 110 (K, C, M, Y), and the photosensitive drums 110 (
By electrostatically attracting the visible image from K, C, M, Y), the visible image is transferred to the intermediate transfer belt 120 passing between the photosensitive drum and the primary transfer corotron.

A sheet 102 as an object (recording material) on which an image is to be finally formed is fed one by one from the sheet feeding cassette 101 by the pickup roller 103 and is subjected to secondary transfer with the intermediate transfer belt 120 in contact with the driving roller 121. Sent to the nip between the rollers 126. The full-color visible image on the intermediate transfer belt 120 is secondarily transferred to one side of the sheet 102 by the secondary transfer roller 126 and fixed on the sheet 102 through the fixing roller pair 127 as a fixing unit. . Thereafter, the sheet 102 is discharged onto a paper discharge cassette formed in the upper part of the apparatus by a paper discharge roller pair 128.

Next, another embodiment of the image forming apparatus according to the present invention will be described with reference to FIG. This image forming apparatus is a rotary developing type full-color image forming apparatus using a belt intermediate transfer body system. As shown in FIG. 11, around the photosensitive drum 110, there is a corona charger 16.
8, a rotary developing unit 161, and the electro-optical device 10 according to the above embodiment,
An intermediate transfer belt 169 is provided.

The corona charger 168 uniformly charges the outer peripheral surface of the photosensitive drum 110. The electro-optical device 10 writes an electrostatic latent image on the charged image forming surface 110 </ b> A (outer peripheral surface) of the photosensitive drum 110. In the electro-optical device 10, a plurality of electro-optical elements E are arranged along the bus (main scanning direction) of the photosensitive drum 110. The electrostatic latent image is written by irradiating the photosensitive drum 110 with light from these electro-optical elements E.

The developing unit 161 includes four developing units 163Y, 163C, 163M, and 163K.
The drums are arranged at an angular interval of ° and can be rotated counterclockwise about the shaft 161a. The developing units 163Y, 163C, 163M, and 163K supply yellow, cyan, magenta, and black toner to the photosensitive drum 110, respectively, and attach the toner as a developer to the electrostatic latent image, thereby causing the photosensitive drum 110 to adhere. A visible image (ie, a visible image) is formed.

The endless intermediate transfer belt 169 is wound around a driving roller 170a, a driven roller 170b, a primary transfer roller 166, and a tension roller, and is rotated around these rollers in a direction indicated by an arrow. The primary transfer roller 166 transfers the visible image to the intermediate transfer belt 169 that passes between the photosensitive drum 110 and the primary transfer roller 166 by electrostatically attracting the visible image from the photosensitive drum 110.

Specifically, in the first rotation of the photosensitive drum 110, an electrostatic latent image for a yellow (Y) image is written by the electro-optical device 10, and a developer image of the same color is formed by the developing unit 163Y.
Further, the image is transferred to the intermediate transfer belt 169. Further, in the next rotation, an electrostatic latent image for a cyan (C) image is written by the electro-optical device 10 and a developer image of the same color is formed by the developing device 163C, and the intermediate image is overlapped with the yellow image. The image is transferred to the transfer belt 169. In this way, during four rotations of the photosensitive drum 110, yellow, cyan, magenta,
The black visible image is sequentially superimposed on the intermediate transfer belt 169, and as a result, a full-color visible image is formed on the transfer belt 169. When images are finally formed on both sides of a sheet as an object on which an image is to be formed, the same color images of the front and back surfaces are transferred to the intermediate transfer belt 169, and then the front and back surfaces are transferred to the intermediate transfer belt 169. A full-color visible image is formed on the intermediate transfer belt 169 in such a manner that the visible image of the next color is transferred.

The image forming apparatus is provided with a sheet conveyance path 174 through which a sheet passes. The sheets are picked up one by one from the paper feed cassette 178 by the pick-up roller 179, advanced through the sheet transport path 174 by the transport roller, and between the intermediate transfer belt 169 and the secondary transfer roller 171 in contact with the drive roller 170a. Pass through the nip. The secondary transfer roller 171 transfers the developed image to one side of the sheet by electrostatically attracting a full-color developed image from the intermediate transfer belt 169 collectively. The secondary transfer roller 171 can be moved closer to and away from the intermediate transfer belt 169 by a clutch (not shown). And
The secondary transfer roller 171 moves the intermediate transfer belt 169 when transferring a full-color visible image onto the sheet.
And is separated from the secondary transfer roller 171 while the visible image is superimposed on the intermediate transfer belt 169.

The sheet on which the image has been transferred as described above is conveyed to the fixing device 172 and is passed between the heating roller 172a and the pressure roller 172b of the fixing device 172, whereby the visible image on the sheet is fixed. The sheet after the fixing process is drawn into the discharge roller pair 176 and proceeds in the direction of arrow F. In the case of double-sided printing, after most of the sheet passes through the paper discharge roller pair 176, the paper discharge roller pair 176 is rotated in the reverse direction.
75. Then, the visible image is transferred to the other surface of the sheet by the secondary transfer roller 171, the fixing process is performed again by the fixing device 172, and then the sheet is discharged by the discharge roller pair 176.

Since the image forming apparatus illustrated in FIGS. 10 and 11 uses a light source (exposure means) that employs an OLED element as the electro-optical element E, the apparatus is made smaller than when a laser scanning optical system is used. The Note that the electro-optical device 10 of the present invention can also be employed in an electrophotographic image forming apparatus other than those exemplified above. For example, the electro-optical device according to the present invention may be applied to an image forming apparatus that directly transfers a visible image from a photosensitive drum to a sheet without using an intermediate transfer belt, and an image forming apparatus that forms a monochrome image. The device 10 can be applied.

The use of the electro-optical device according to the present invention is not limited to exposure of a photoreceptor. For example, the electro-optical device of the present invention is employed in an image reading device such as a scanner as a line-type optical head (illumination device) that irradiates a reading target such as a document with light. As this type of image reading apparatus, there is a scanner, a copying machine or a reading part of a facsimile, a barcode reader, or a two-dimensional image code reader for reading a two-dimensional image code such as a QR code (registered trademark). An electro-optical device in which a plurality of electro-optical elements (particularly light-emitting elements) are arranged in a planar shape is also employed as a backlight unit arranged on the back side of the liquid crystal panel.

The electro-optical device of the present invention is also employed as a display device that displays an image. In this display device, a plurality of electro-optical elements E are arranged in a matrix form in the row direction and the column direction. Then, the scanning line driving circuit selects each row for each unit period (horizontal scanning period),
Correction data A or gradation data G is supplied to each electro-optical element E in the selected row. Examples of the electronic apparatus in which the electro-optical device of the present invention is used for displaying an image include a portable personal computer, a mobile phone, and a personal digital assistant (PDA: Personal Digital Terminal).
Assistants), digital still camera, TV, video camera, car navigation device, pager, electronic notebook, electronic paper, calculator, word processor, workstation, videophone, POS terminal, printer, scanner, copier, video player, touch panel Equipment and the like.

1 is a perspective view showing a partial configuration of an image forming apparatus according to a first embodiment. It is a block diagram which shows the structure of an electro-optical apparatus. It is a timing chart for demonstrating operation | movement of 1st Embodiment. It is a circuit diagram which shows the structure of one unit circuit. It is a circuit diagram which shows the structure of one electric current production | generation part. FIG. 6 is a block diagram illustrating a configuration of an electro-optical device according to a second embodiment. It is a timing chart for demonstrating operation | movement of 2nd Embodiment. FIG. 10 is a block diagram illustrating a configuration of an electro-optical device according to a third embodiment. It is a timing chart for explaining operation of a 3rd embodiment. It is a perspective view which shows the specific example (image forming apparatus) of the electronic device which concerns on this invention. It is a perspective view which shows the specific example (image forming apparatus) of the electronic device which concerns on this invention.

Explanation of symbols

10: electro-optical device, 15: condensing lens array, 110: photosensitive drum, 12 ...
... Substrate, U (U1 to Un) ... Unit circuit, Ua ... First unit circuit, Ub ... Second unit circuit, U
B (UB1 to UBN) ... Circuit part, B (B1 to BM) ... Block, L, L1 to LM ... Signal line, La ... First signal line, Lb ... Second signal line, Tdr ... Drive transistor, E ... electro-optic element, 20 ... selection circuit, 21 ... first selection circuit, 22 ... second selection circuit, 30 ... data acquisition circuit, 40 ... path control circuit, 50 ... correction Circuit 54... Current source transistor
Is [1] to Is [n]... Reference current, Idr... Drive current, A (A1 to An).
G1 to Gn) ... gradation data.

Claims (7)

A plurality of unit circuits;
A signal line to which correction data of each unit circuit is supplied in a first period and gradation data of each unit circuit is supplied in a second period different from the first period ;
Selecting means for sequentially selecting the unit circuits in each of the first period and the second period ;
Each of the plurality of unit circuits is
An electro-optic element having gradation according to the drive current;
Data acquisition means for sequentially acquiring data from the signal line when the selection means selects the unit circuit ;
Correction means for generating a reference current according to the correction data;
Drive means for controlling the drive current supplied to the electro-optic element according to gradation data and the reference current generated by the correction means;
And a path control means for outputting the gradation data by the data acquisition means has acquired in the second period to output the correction data to which the data acquisition means has acquired in the first period to the correction means to the drive means ,
The electro-optical device in which the selection unit selects the unit circuits in the first period is longer than the period in which the selection unit selects the unit circuits in the second period . A plurality of unit circuits;
A signal line for supplying correction data for each unit circuit in a first period and for supplying gradation data for each unit circuit in a second period different from the first period;
Each of the plurality of unit circuits is
An electro-optic element having gradation according to the drive current;
Data acquisition means for sequentially acquiring data from the signal line;
Correction means for generating a reference current according to the correction data;
Drive means for controlling the drive current supplied to the electro-optic element according to gradation data and the reference current generated by the correction means;
And a path control means for outputting the gradation data by the data acquisition means has acquired in the second period to output the correction data to which the data acquisition means has acquired in the first period to the correction means to the drive means ,
The path control means of each unit circuit is an electro-optical device that outputs correction data to the correction means over a period longer than the output of gradation data to the drive means . A plurality of circuit units each including a first unit circuit and a second unit circuit;
A first signal line to which correction data of each of the second unit circuits is supplied in a first period and to which gradation data of each of the first unit circuits is supplied in a second period different from the first period; ,
A second signal line to which correction data of each first unit circuit is supplied in the first period and gradation data of each second unit circuit is supplied in the second period;
Each of the first unit circuit and the second unit circuit is:
An electro-optic element having gradation according to the drive current;
Data acquisition means for acquiring data;
Correction means for generating a reference current according to the correction data;
Drive means for controlling the drive current supplied to the electro-optic element according to gradation data and the reference current generated by the correction means;
Path control means for controlling the output destination of the data acquired by the data acquisition means,
The data acquisition means of each first unit circuit sequentially acquires data from the first signal line, the data acquisition means of each second unit circuit sequentially acquires data from the second signal line,
In each of the plurality of circuit units,
The path control unit of the first unit circuit outputs correction data acquired by the data acquisition unit of the first unit circuit during the first period to the correction unit of the second unit circuit, and The gradation data acquired by the data acquisition means in the second period is output to the driving means of the first unit circuit,
The path control unit of the second unit circuit outputs correction data acquired by the data acquisition unit of the second unit circuit during the first period to the correction unit of the first unit circuit, and An electro-optical device that outputs gradation data acquired by the data acquisition unit in the second period to the driving unit of the second unit circuit. In each of the plurality of circuit units,
The path control means of the first unit circuit is disposed on the side opposite to the electro-optic element of the second unit circuit as viewed from the correction means of the second unit circuit.
The electro-optical device according to claim 3 , wherein the path control unit of the second unit circuit is disposed on the opposite side of the electro-optical element of the first unit circuit as viewed from the correcting unit of the first unit circuit. First selection means for sequentially selecting the first unit circuits in each of the first period and the second period;
Second selection means for sequentially selecting each of the second unit circuits in each of the first period and the second period;
The data acquisition unit of each first unit circuit acquires data from the first signal line when the first selection unit selects the first unit circuit,
Said data acquisition means of each of the second unit circuit, an electro-optic of claim 3 or claim 4 wherein the second selection means obtains the data from the second signal line when selecting the second unit circuit apparatus. The electro-optical device according to claim 5 , wherein a timing at which the first selection unit selects the first unit circuits and a timing at which the second selection unit selects the second unit circuits substantially coincide with each other. An electronic device including an electro-optical device according to claim 1 to claim 6.

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