JP2009063954A - Data line driving circuit, electro-optical device, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To simplify a configuration of a data line driving circuit having an inspection function. <P>SOLUTION: This data line driving circuit 320 is provided with a latch 324 including twelve signal supply lines for supplying data D in parallel and n number of storage regions M and a shift register 321 setting selection signals Q1-Qn to active level sequentially. In this data line driving circuit 320, the data D in m system in which each selection signal Q is supplied when it is at the active level is sequentially held in each storage region M, and the data signal corresponding to the data D in the latch 324 is outputted. This data line driving circuit 320 includes inspection output lines C1-C4, n number of inspection switches 323 letting each of them include three blocks, and an output selection part 360 selecting p number of blocks of each inspection switch 323 sequentially. The block selected by the output selection part 360 among the inspection switches 323 corresponding to the selection signal Q at the active level outputs the data D in four systems corresponding to the selection signal Q into the inspection output lines C1-C4. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a technique for inspecting a data line driving circuit.

  A printer as an image forming apparatus uses an optical head for forming an electrostatic latent image on an image carrier such as a photosensitive drum. In addition, a display panel for performing image display is used in an active matrix liquid crystal display device. In the optical head, a plurality of light emitting elements are arranged in the main scanning direction. As the light emitting element, an EL (Electro Luminescent) element, a light emitting diode, or the like is used. In the display panel, liquid crystal pixels including switch elements and liquid crystal elements are arranged in the main scanning direction and the sub-scanning direction. In both cases, a data line driving circuit is provided in the main scanning direction, and performs processing for supplying data to each light emitting element or liquid crystal pixel.

  In general, a data line driving circuit is configured to include a data input line, a shift register, and the like. However, in an electro-optical device including the data line driving circuit, a product is actually put on the market from the viewpoint of guaranteeing reliability. It is necessary to inspect the data line driving circuit before.

In recent years, as a data line driving circuit, a line sequential system in which data for one line is stored in a latch and is collectively driven at a predetermined timing has been widely adopted. For example, Patent Document 1 discloses an inspection technique for a data line driving circuit adopting a line sequential method.
Japanese Patent Laid-Open No. 10-214065 (refer to FIG. 2 in particular)

  Conventionally, a data line driving circuit has been realized by an IC. However, in recent years, it is often formed by a TFT (Thin Film Transistor) from the viewpoint of cost reduction and reliability improvement by reducing the number of mounting points.

  When the data line driving circuit is realized by an IC, it is possible to check whether data is correctly stored in the data line driving circuit or whether the data is output correctly by measuring the output terminal of the IC with a tester. did it. However, when the TFT is formed, the output from the data line driving circuit is directly connected to the light emitting element or the liquid crystal pixel, so that it is necessary to provide a dedicated inspection circuit.

  In the data line driving circuit inspection method described in Patent Document 1, an inspection circuit having an inspection output terminal is provided independently of the data line driving circuit. However, in order to reduce the circuit mounting area by avoiding the wiring, it is desirable to provide the output circuit for inspection as much as possible on the data line driver circuit side. SUMMARY An advantage of some aspects of the invention is that it provides a data line driving circuit including a test output circuit.

  In order to solve the above problems, a data line driving circuit according to the present invention includes m signal supply lines to which m systems (m is a natural number) of data is supplied in parallel, and n (n is a natural number) storage areas. And a selection circuit that sequentially outputs an n-system selection signal that becomes an active level, and is supplied to the m signal supply lines when each selection signal becomes an active level. A data line driving circuit that sequentially holds the m-system data in each of the n storage areas, and outputs a data signal corresponding to the data held in the storage circuit to a plurality of data lines; k test output lines (k is a divisor of m), n test switches each including p (p = m / k) blocks, and each of the p blocks in each test switch And an output selection section for sequentially selecting The block selected by the output selection unit among the p blocks of the inspection switch corresponding to the selection signal that has reached the active level is the n-system data stored in the storage area corresponding to the selection signal. Of these, k systems of data are output to the k inspection output lines.

  According to the present invention, since the data held in the storage area is output from the inspection switch to the inspection output line, the storage circuit can be inspected. Further, since the selection signal from the selection circuit used when storing data in the storage circuit is also used as a signal for designating the storage area to be inspected, the storage area to be inspected is the selection circuit. The circuit is simplified compared to the configuration selected by a separate circuit. Furthermore, since the output selection unit sequentially selects each block of the inspection switch, the number of inspection output lines can be reduced as compared with the signal supply lines.

  In order to solve the above problems, a data line driving circuit according to the present invention includes m signal supply lines to which m systems (m is a natural number) of data is supplied in parallel, and n (n is a natural number) storage areas. A selection circuit that sequentially outputs an n-system selection signal that becomes an active level, and a signal output circuit that generates a data signal corresponding to the data stored in the storage circuit and outputs the data signal to a data line. And a data line driving circuit for sequentially holding the m systems of data supplied to the m signal supply lines in each of the n storage areas when each of the selection signals becomes an active level. And k test output lines (k is a divisor of m), n test switches each including p (p = m / k) blocks, and the p test outputs in each test switch. To select each block in turn A block selected by the output selection unit among the p blocks of the inspection switch corresponding to the selection signal that has reached an active level is stored in a storage area corresponding to the selection signal. The k-system data signals generated by the signal output circuit from the k-system data among the n-system data are output to the k inspection output lines.

  According to the present invention, since the data signal generated by the D / A converter is output from the inspection switch to the inspection output line, the D / A converter can be inspected. In addition, since the selection signal from the selection circuit is also used as a signal that specifies the data signal to be output, the circuit is simplified compared to a configuration in which a circuit separate from the selection circuit selects the data signal. Is done. Furthermore, since the output selection unit sequentially selects each block of the inspection switch, the number of inspection output lines can be reduced as compared with the signal supply lines.

  A data line driving circuit according to a preferred aspect of the present invention comprises a test object selection unit that selects either data stored in the memory circuit or a data signal output from the signal output circuit, and an active level, Among the p blocks of the inspection switch corresponding to the selection signal, the block selected by the output selection unit includes k-system data stored in the storage area corresponding to the selection signal and the signal output circuit. The inspection target selected by the inspection target selection unit among the k system data signals generated by is output to the k inspection output lines. According to this aspect, since the common inspection switch controls the output of the data held in the storage area and the output of the data signal generated by the signal output circuit, it is compared with the configuration in which both outputs are controlled by the individual inspection switches. Thus, there is an advantage that the data line driving circuit is simplified.

  In a preferred aspect of the present invention, the selection circuit sequentially sets the n selection signals to an active level within a period in which the output selection unit selects any of the p blocks. In another aspect, the output selection unit sequentially selects each of the p blocks within a period in which any of the n system selection signals is at an active level.

  The electro-optical device according to the present invention includes the data line driving circuit according to each of the above aspects and a plurality of pixels driven according to each data signal output from the data line driving circuit. The electro-optical device of the present invention is employed in various electronic apparatuses as a display device that displays an image, an exposure device that exposes an image carrier (for example, a photosensitive drum), or the like.

  Various embodiments of the present invention will be described with reference to the drawings. In addition, the same code | symbol is attached | subjected to the common part in each figure.

<1. Example>
FIG. 1 is a perspective view showing a partial configuration of an image forming apparatus using a light emitting device 10 including a data line driving circuit of the present invention as an optical head (exposure device). As shown in the figure, the image forming apparatus includes a light emitting device 10, a condensing lens array 15, and a photosensitive drum 110. The light emitting device 10 includes n (n is a natural number of 2 or more) light emitting elements. Light is emitted from the light emitting element. This emission is selectively performed according to the form of an image to be printed on a recording material such as paper. These lights travel to the condensing lens array 15. The photosensitive drum 110 is supported by a rotating shaft extending in the main scanning direction, and rotates in the sub-scanning direction (direction in which the recording material is conveyed) with the outer peripheral surface facing the light emitting device 10.

  The condensing lens array 15 is disposed in the gap between the light emitting device 10 and the photosensitive drum 110. The condensing lens array 15 includes a large number of gradient index lenses arranged in an array with each optical axis directed toward the light emitting device 10. Light emitted from each light emitting element of the light emitting device 10 passes through each refractive index distribution type lens of the condensing lens array 15 and then reaches the surface of the photosensitive drum 110. By this exposure, a latent image (electrostatic latent image) corresponding to a desired image is formed on the surface of the photosensitive drum 110.

  FIG. 2 is a block diagram showing a characteristic electrical configuration of the light emitting device 10. As shown in FIG. 2, the light emitting device 10 includes a light emitting element circuit group 310 including a plurality of light emitting elements, a data line driving circuit 320 including an n-bit shift register 321, a control unit 330, a data input terminal 340, and inspection data output. A terminal 350 and an output selection unit 360 are provided.

  The data line driving circuit 320 includes a latch, stores data for one line in the latch, and outputs data signals to a plurality of data lines at a predetermined timing to drive the light emitting element circuit group 310. The sequential method is adopted. A TFT is adopted for each switch constituting the data line driving circuit 320. The control unit 330 supplies the clock signal CLK and the start pulse SP to the data line driving circuit 320.

  Data D (D01 to D12) supplied to the data line driving circuit 320 is supplied to the data input terminal 340 from the outside. When the light emitting device 10 is actually used after being implemented in the image forming apparatus (hereinafter referred to as “in use”), data D corresponding to the latent image formed on the photosensitive drum 110 is input to the data input terminal 340. When the data line driving circuit 320 is inspected before the light emitting device 10 is shipped (hereinafter referred to as “inspection”), the inspection data D is input to the data input terminal 340. The 12-bit data D01 to D12 input to the data input terminal 340 are supplied to the data line driving circuit 320 in parallel via the 12 signal supply lines L. The data line driving circuit 320 processes the 12-bit data D01 to D12 in parallel with one pulse output from the shift register 321. For this reason, the data line driving circuit 320 as a whole handles data D of 12 × n bits per line. However, the number of signal supply lines L is not limited to 12.

  The inspection data output terminal 350 is a terminal for sequentially outputting the data for one line accumulated in the latch of the data line driving circuit 320 in a predetermined unit. By comparing the output data with the inspection data D, it can be determined whether or not the data is correctly stored in the latch. In the present embodiment, the inspection data output terminal 350 is connected to the data line driving circuit 320 by four inspection output lines C1 to C4. Since 4-bit data can be output in one output process, three output processes are required to output 12-bit data. The output selection unit 360 generates inspection selection signals E1 to E3 and supplies them to the data line driving circuit 320 from the three selection signal lines Ls. By sequentially setting the inspection selection signals E1 to E3 to active levels, data to be output in three output processes is selected.

  As described above, in the present embodiment, the inspection data output terminals 350 and the inspection output lines C1 to C4 that are used only at the time of inspection and not used at the time of use are less than the data input terminal 340 and the signal supply line L. The circuit scale of the drive circuit 320 can be reduced.

  FIG. 3 is a block diagram showing a configuration of the data line driving circuit 320. The data line driving circuit 320 includes an n-bit shift register 321 including n unit circuits (for example, flip-flop circuits) 321-1 to 321-n, and a start pulse SP supplied from the control unit 330. Are sequentially shifted in synchronization with the clock signal CLK to output n selection signals Q1 to Qn. As shown in FIG. 4, the selection signals Q1 to Qn sequentially become active levels.

  The data line driving circuit 320 includes n shift register switches 322 (322-1 to 322 -n) and n check switches 323 (corresponding to the unit circuits 321-1 to 321-n of the shift register 321). 323-1 to 323-n). The selection signal Qi output from the i-th unit circuit 321-i is input to the shift register switch 322-i (i = 1 to n) and each check switch 323-i.

  The latch 324 in FIG. 3 is a storage circuit that stores data for one line (12 × n bits). The latch 324 includes n storage areas M (M1 to Mn) corresponding to the unit circuits 321-1 to 321-n. Each storage area Mi is composed of 12-bit storage areas Mi-1 to Mi-12.

  Each shift register switch 322 includes 12 switches each corresponding to a separate signal supply line L. Each switch of the shift register switch 322-i is interposed between the signal supply line L and the storage area Mi and controls connection (conduction / non-conduction) between them. The twelve switches of the shift register switch 322-i are turned on simultaneously when the selection signal Qi transitions to the active level.

  Here, processing in the data line driving circuit 320 at the time of data input will be described. Note that the same processing is performed when data D is input during use and during inspection. At the time of data input, the inspection selection signals E1 to E3 are all set to an inactive level.

  As described above, the data D01 to data D12 are input to the data line driving circuit 320 in parallel via the twelve signal supply lines L. Data D (D01 to D12) is stored in the corresponding storage area Mi (Mi-1 to Mi-12) of the latch 324 via the shift register switch 322-i in the on state.

  That is, during the period when the selection signal Q1 output from the unit circuit 321-1 is at the active level, only the 12 switches of the shift register switch 322-1 are turned on all at once. At this time, the 12-bit data D01 to data D12 supplied to the signal supply line L are simultaneously stored in the 12 storage areas M1-1 to M1-12 of the latch 324.

  Next, during the period in which the selection signal Q2 output from the unit circuit 321-2 is at the active level, only 12 switches of the shift register switch 322-2 are turned on all at once. At this time, the data D01 to data D12 supplied to the signal supply line L are simultaneously stored in the 12 storage areas M2-1 to M2-12 of the latch 324. Here, the 12-bit data D01 to D12 change in synchronization with the shift operation by the shift register 321.

  The above processing is performed until the selection signal Qn output from the unit circuit 321-n reaches the active level, whereby the storage areas M1-1 to M1-12, M2-1 to M2-12,. The data D for 12 × n bits is stored in −1 to Mn−12. The D / A converter 325 is converted into a data signal in which a voltage value or a current value is set according to the data D stored in the latch 324, and is output to the light emitting element circuit group 310 all at once.

  Next, inspection of data of 12 × n bits stored in the latch 324 will be described. The inspection is performed by storing the inspection data D in the latch 324 according to the above procedure and then outputting each data to the outside. In other words, when the output data does not match the original inspection data D, it can be determined that the data line driving circuit 320 is defective.

  The selection signals Q1 to Qn output from the shift register 321 are also supplied to the corresponding inspection switches 323. The inspection switch 323-i is a switch for selectively guiding the data stored in the storage area Mi of the latch 324 to the inspection output lines C1 to C4.

  Each inspection switch 323-i is divided into three blocks (323-i-1, 323-i-2, 323-i-3). Here, the number of blocks of one inspection switch 323 is the number of bits of data D input to the data line driving circuit 320, that is, the number of signal supply lines L, the number of bits of data output at one time during inspection, That is, it is a value divided by the number of inspection output lines C, which matches the number of selection signal lines Ls. The inspection selection signals E1 to E3 are signals for sequentially selecting each block of the inspection switches 323-1 to 323-n.

  Each block includes a plurality of switches between the storage area M of the latch 324 and the test output line C, and an AND circuit for controlling each switch. The logical product circuit simultaneously turns on the switches in the block when both the selection signal Q from the shift register 321 and the inspection selection signal E from the selection signal line Ls are at the active level.

  In this example, the first block 323-1-1 stores the data accumulated in the storage area M 1-1 on the inspection output line C 1, the data accumulated on the storage area M 1-2 on the inspection output line C 2, and the storage area The data stored in M1-3 is guided to the inspection output line C3, and the data stored in the storage area M1-4 is guided to the inspection output line C4. In the next block 323-1-2, the data accumulated in the storage area M1-5 is stored in the inspection output line C1, the data value stored in the storage area M1-6 is stored in the inspection output line C2, and the storage area M1. The data stored in −7 is guided to the inspection output line C3, and the data D stored in the storage area M1-8 is guided to the inspection output line C4.

  A specific procedure will be described. First, when only the inspection selection signal E1 is set to the active level and the start pulse SP is input to the shift register 321, the selection signal Q1 output from the unit circuit 321-1 transitions to the active level, and the first inspection switch 323 is activated. Each switch in the first block 323-1-1 of -1 is turned on. Therefore, the data stored in the storage area M1-1 is output to the inspection output line C1, and the data stored in the storage area M1-2 is output to the inspection output line C2, and stored in the storage area M1-3. The data is output to the inspection output line C3, and the data stored in the storage area M1-4 is output to the inspection output line C4.

  Next, when the selection signal Q2 from the unit circuit 321-2 transitions to the active level, each switch of the first block 323-2-1 of the second check switch 323-2 is turned on. Therefore, the data stored in the storage area M2-1 is output to the inspection output line C1, and the data stored in the storage area M2-2 is output to the inspection output line C2, and stored in the storage area M2-3. The data is output to the inspection output line C3, and the data stored in the storage area M2-4 is output to the inspection output line C4.

  Thereafter, each time each of the selection signals Q3 to Qn transits to the active level, data is transferred from the storage areas Mi-1 to Mi-4 of the latch 324 corresponding to the first block of each check switch 323, and the check output lines C1 to C4. Are output sequentially.

  Next, when only the inspection selection signal E2 is set to the active level and the start pulse SP is input to the shift register 321, the storage areas Mi-5 to Mi-8 of the latch 324 corresponding to the second block of each inspection switch 323 are used. Data is sequentially output to the inspection output lines C1 to C4. Finally, when only the inspection selection signal E3 is set to the active level and the start pulse SP is input to the shift register 321, the storage areas Mi-9 to Mi-12 of the latch 324 corresponding to the third block of each inspection switch 323 are used. Data is sequentially output to the inspection output lines C1 to C4. As a result, all the 12 × n-bit data stored in the storage areas M1-1 to Mn-12 of the latch 324 are output.

  As shown in FIG. 4, the selection signals Q1 to Qn output from the shift register 321 sequentially become active levels during the period when any of the inspection selection signals E1 to E3 is set to the active level. In order to output the inspection selection signals E1 to E3, the output selection unit 360, for example, “00” in synchronization with the start pulse SP input to the shift register 321 as shown in FIG. A decoder that sequentially inputs 2-bit signals “01” and “10” and sequentially sets any one of the test selection signals E1 to E3 to the active level can be configured.

  Alternatively, as shown in FIG. 5B, a shift register that generates inspection selection signals E1 to E3 by sequentially shifting the start pulse SP input to the shift register 321 is used as the output selection unit 360. Can do. Of course, other circuits may be used.

  As described above, according to the present embodiment, the selection signals Q1 to Qn used when storing the data D in the latch 324 are also used for selecting the storage area M to be inspected. As compared with the configuration in which the storage area M is selected at the time of inspection using a separate signal, the circuit is simplified. Further, since 12-bit data in the storage area Mi selected by the selection signal Qi is output in a time-sharing manner by the inspection selection signals E1 to E3, the number of inspection output lines C is reduced compared to the signal supply line L. Can do. Here, for example, when the data line driving circuit 320 is configured using TFTs with low electron mobility, it is necessary to secure a sufficient number of signal supply lines L in order to prevent a reduction in processing speed. Therefore, in the configuration in which the same number of inspection output lines C as the signal supply lines L are formed, complication of the configuration of the light emitting device 10 becomes serious. On the other hand, according to the present embodiment, the number of inspection output lines C is smaller than that of the signal supply lines L, thereby preventing the configuration from becoming complicated. That is, this embodiment is particularly effective when it is necessary to increase the number of signal supply lines L for the reason that the data line driving circuit 320 is constituted by TFTs.

  In the above example, the n selection signals Q1 to Qn are sequentially set to the active level within the period in which any of the inspection selection signals E1 to E3 is at the active level. However, as illustrated in FIG. Within the period in which the selection signal Q is at the active level, the inspection selection signals E1 to E3 may be sequentially set to the active level and data may be output from each inspection output line C. The operation in this case is as follows.

  That is, when the start pulse SP is input to the shift register 321 and the inspection selection signal E1 is set to the active level while the selection signal Q1 from the unit circuit 321-1 is at the active level, the first inspection switch 323-1 is provided. Each switch of the first block 323-1-1 is turned on. Therefore, the data stored in the storage area M1-1 is output to the inspection output line C1, and the data stored in the storage area M1-2 is output to the inspection output line C2, and stored in the storage area M1-3. The data is output to the inspection output line C3, and the data stored in the storage area M1-4 is output to the inspection output line C4.

  Next, when the inspection selection signal E2 is set to the active level while the selection signal Q1 is maintained at the active level, each switch of the second block 323-1-2 of the first inspection switch 323-1 is turned on. Therefore, the data stored in the storage area M1-5 is output to the inspection output line C1, and the data stored in the storage area M1-6 is output to the inspection output line C2, and stored in the storage area M1-7. Data is output to the inspection output line C3, and data stored in the storage area M1-8 is output to the inspection output line C4.

  Further, when the inspection selection signal E3 is set to the active level while the selection signal Q1 is maintained at the active level, the switches of the third block 323-1-3 of the first inspection switch 323-1 are turned on. Therefore, the data stored in the storage area M1-9 is output to the inspection output line C1, and the data stored in the storage area M1-10 is output to the inspection output line C2, and stored in the storage area M1-11. The data is output to the inspection output line C3, and the data stored in the storage area M1-12 is output to the inspection output line C4.

  As a result, all 12-bit data stored in the storage areas M1-1 to M1-12 corresponding to the selection signal Q1 is output. Next, when the selection signal Q2 becomes an active level, 12-bit data stored in the storage areas M2-1 to M2-12 is sequentially output to the test output lines C1 to C4 in a time-sharing manner by 4 bits. Is done. Thereafter, the same processing is performed until the selection signal Qn reaches the active level, so that all 12 × n-bit data stored in the latch 324 is output to the inspection data output terminal 350.

<2. Modification>
In the above example, a circuit for checking whether data is correctly stored in the latch 324 has been described. Next, a circuit for inspecting the D / A converter 325 will be described with reference to FIG. The circuit shown in FIG. 7 can be basically the same as the circuit shown in FIG. However, what is output to the inspection output line C via the inspection switch 323 is not the data held in the latch 324 but the data signal after analog conversion by the D / A converter 325.

  That is, each switch of the inspection switch 323 is interposed between the output terminal of each data signal of the D / A converter 325 and each of the inspection output lines C1 to C4 to control the connection therebetween. The four data signals are sent to the test output line via the block selected by the test selection signal E at the active level among the three blocks of the test switch 323-i to which the selection signal Qi at the active level is supplied. It is output to the outside via C1 to C4. Therefore, the process of dividing the 12 data signals into 4 systems and outputting them to the respective test output lines C1 to C4 is repeated n times. In order to output an analog current value or voltage value to the inspection output line C, the inspection switch 323 uses an analog switch.

  Each inspection target selection unit that switches the target output from the inspection switch 323 to each inspection output line C1 to C4 between the data held in the storage area M of the latch 324 and the data signal generated by the D / A converter 325 You may make it provide between the switch 323, the latch 324, and the D / A converter 325. FIG. That is, in the block selected by the inspection selection signal E among the three blocks of the inspection switch 323-i selected by the selection signal Qi, the inspection object selection unit selects the data D (latch 324). In the same manner as in the first embodiment, each data is output from the storage area Mi of the latch 324 to the inspection output lines C1 to C4, and the inspection object selection unit selects the data signal (D / A converter 325). In the same manner as in the configuration of FIG. 7, each data signal is output from the D / A converter 325 to the inspection output lines C1 to C4. According to the above configuration, since the inspection switch 323 is used for both the inspection of the latch 324 and the inspection of the D / A converter 325, the light emission is performed as compared with the case where the inspection switch 323 is individually provided for each inspection. There is an advantage that the configuration of the device 10 (data line driving circuit 320) is simplified.

<3. Image forming apparatus>
The light emitting device 10 according to each of the above aspects can be used as a line type optical head for writing a latent image on an image carrier in an image forming apparatus using an electrophotographic system. Examples of the image forming apparatus include a printer, a printing part of a copying machine, and a printing part of a facsimile. FIG. 8 is a longitudinal sectional view showing an example of an image forming apparatus using the light emitting device 10 as a line type optical head. This image forming apparatus is a tandem type full color image forming apparatus using a belt intermediate transfer body system.

  In this image forming apparatus, four organic EL arrays 10K, 10C, 10M, and 10Y having the same configuration are exposed to four photosensitive drums (image carriers) 110K, 110C, 110M, and 110Y having the same configuration. It is arranged at each position. The organic EL arrays 10K, 10C, 10M, and 10Y are the light-emitting devices 10 according to any one of the embodiments exemplified above.

  As shown in FIG. 8, this image forming apparatus is provided with a driving roller 121 and a driven roller 122. An endless intermediate transfer belt 120 is wound around these rollers 121 and 122, and an arrow indicates. As shown, the periphery of the rollers 121 and 122 is rotated. Although not shown, tension applying means such as a tension roller that applies tension to the intermediate transfer belt 120 may be provided.

  Around the intermediate transfer belt 120, four photosensitive drums 110K, 110C, 110M, and 110Y each having a photosensitive layer on the outer peripheral surface are arranged at a predetermined interval. The subscripts K, C, M, and Y mean that they are used to form black, cyan, magenta, and yellow visible images, respectively. The same applies to other members. The photosensitive drums 110K, 110C, 110M, and 110Y are rotationally driven in synchronization with the driving of the intermediate transfer belt 120.

  Around each photosensitive drum 110 (K, C, M, Y), there is a corona charger 111 (K, C, M, Y), an organic EL array 10 (K, C, M, Y), and development. A device 114 (K, C, M, Y) is arranged. The corona charger 111 (K, C, M, Y) uniformly charges the outer peripheral surface of the corresponding photosensitive drum 110 (K, C, M, Y). The organic EL array 10 (K, C, M, Y) writes an electrostatic latent image on the charged outer peripheral surface of the photosensitive drum. Each organic EL array 10 (K, C, M, Y) is installed such that the arrangement direction of the plurality of light emitting elements P is along the bus (main scanning direction) of the photosensitive drum 110 (K, C, M, Y). Is done. The electrostatic latent image is written by irradiating the photosensitive drum with light by the plurality of light emitting elements P described above. The developing device 114 (K, C, M, Y) forms a visible image, that is, a visible image on the photosensitive drum by attaching toner as a developer to the electrostatic latent image.

  The black, cyan, magenta, and yellow developed images formed by the four-color single-color image forming station are sequentially transferred onto the intermediate transfer belt 120 to be superimposed on the intermediate transfer belt 120. As a result, a full-color image is obtained. Four primary transfer corotrons (transfer devices) 112 (K, C, M, Y) are arranged inside the intermediate transfer belt 120. The primary transfer corotron 112 (K, C, M, Y) is disposed in the vicinity of the photosensitive drum 110 (K, C, M, Y), and the photosensitive drum 110 (K, C, M, Y). The electrostatic image is electrostatically attracted from the toner image to transfer the visible image to the intermediate transfer belt 120 passing between the photosensitive drum and the primary transfer corotron.

  A sheet 102 as an object on which an image is to be finally formed is fed one by one from the sheet feeding cassette 101 by the pickup roller 103, and between the intermediate transfer belt 120 and the secondary transfer roller 126 in contact with the driving roller 121. Sent to the nip. The full-color visible image on the intermediate transfer belt 120 is secondarily transferred to one side of the sheet 102 by the secondary transfer roller 126 and fixed on the sheet 102 through the fixing roller pair 127 as a fixing unit. . Thereafter, the sheet 102 is discharged onto a paper discharge cassette formed in the upper part of the apparatus by a paper discharge roller pair 128.

  Next, another embodiment of the image forming apparatus according to the present invention will be described.

  FIG. 9 is a longitudinal sectional view of another image forming apparatus using the light emitting device 10 as a line type optical head. This image forming apparatus is a rotary developing type full-color image forming apparatus using a belt intermediate transfer body system. In the image forming apparatus illustrated in FIG. 9, a corona charger 168, a rotary developing unit 161, an organic EL array 167, and an intermediate transfer belt 169 are provided around the photosensitive drum 165.

  The corona charger 168 uniformly charges the outer peripheral surface of the photosensitive drum 165. The organic EL array 167 writes an electrostatic latent image on the charged outer peripheral surface of the photosensitive drum 165. The organic EL array 167 is the optical heads 10 and 10A of each aspect exemplified above, and is installed so that the arrangement direction of the plurality of light emitting elements P is along the bus line (main scanning direction) of the photosensitive drum 165. The electrostatic latent image is written by irradiating the photosensitive drum 165 with light from these light emitting elements P.

  The developing unit 161 is a drum in which four developing units 163Y, 163C, 163M, and 163K are arranged at an angular interval of 90 °, and can rotate counterclockwise about the shaft 161a. The developing units 163Y, 163C, 163M, and 163K supply yellow, cyan, magenta, and black toners to the photosensitive drum 165, respectively, and attach the toner as a developer to the electrostatic latent image, thereby the photosensitive drum 165. A visible image, that is, a visible image is formed.

  The endless intermediate transfer belt 169 is wound around a driving roller 170a, a driven roller 170b, a primary transfer roller 166, and a tension roller, and is rotated around these rollers in a direction indicated by an arrow. The primary transfer roller 166 transfers the visible image to the intermediate transfer belt 169 that passes between the photosensitive drum and the primary transfer roller 166 by electrostatically attracting the visible image from the photosensitive drum 165.

  Specifically, in the first rotation of the photosensitive drum 165, an electrostatic latent image for a yellow (Y) image is written by the organic array 167, and a developed image of the same color is formed by the developing unit 163Y. The image is transferred to the transfer belt 169. Further, in the next rotation, an electrostatic latent image for a cyan (C) image is written by the organic array 167, a developed image of the same color is formed by the developing device 163C, and an intermediate transfer is performed so as to overlap the yellow developed image. Transferred to the belt 169. Then, during the four rotations of the photosensitive drum 165, yellow, cyan, magenta, and black visible images are sequentially superimposed on the intermediate transfer belt 169. As a result, a full-color visible image is formed on the transfer belt 169. It is formed. When images are finally formed on both sides of a sheet as an object on which an image is to be formed, the same color images of the front and back surfaces are transferred to the intermediate transfer belt 169, and then the front and back surfaces are transferred to the intermediate transfer belt 169. A full-color visible image is obtained on the intermediate transfer belt 169 by transferring the visible image of the next color.

  The image forming apparatus is provided with a sheet conveyance path 174 through which a sheet passes. The sheets are picked up one by one from the paper feed cassette 178 by the pick-up roller 179, advanced through the sheet transport path 174 by the transport roller, and between the intermediate transfer belt 169 and the secondary transfer roller 171 in contact with the drive roller 170a. Pass through the nip. The secondary transfer roller 171 transfers the developed image to one side of the sheet by electrostatically attracting a full-color developed image from the intermediate transfer belt 169 collectively. The secondary transfer roller 171 can be moved closer to and away from the intermediate transfer belt 169 by a clutch (not shown). The secondary transfer roller 171 is brought into contact with the intermediate transfer belt 169 when a full-color visible image is transferred onto the sheet, and is separated from the secondary transfer roller 171 while the visible image is superimposed on the intermediate transfer belt 169.

  The sheet on which the image has been transferred as described above is conveyed to the fixing device 172 and is passed between the heating roller 172a and the pressure roller 172b of the fixing device 172, whereby the visible image on the sheet is fixed. The sheet after the fixing process is drawn into the discharge roller pair 176 and proceeds in the direction of arrow F. In the case of double-sided printing, after most of the sheet passes through the paper discharge roller pair 176, the paper discharge roller pair 176 is rotated in the reverse direction and introduced into the double-sided printing conveyance path 175 as indicated by an arrow G. The Then, the visible image is transferred to the other surface of the sheet by the secondary transfer roller 171, the fixing process is performed again by the fixing device 172, and then the sheet is discharged by the discharge roller pair 176.

  Since the image forming apparatus illustrated in FIGS. 8 and 9 uses the light emitting element P as an exposure unit, the apparatus can be made smaller than when a laser scanning optical system is used. It should be noted that the optical head of the present invention can also be used in electrophotographic image forming apparatuses other than those exemplified above. For example, the optical head according to the present invention can be applied to an image forming apparatus that directly transfers a visible image from a photosensitive drum to a sheet without using an intermediate transfer belt, and an image forming apparatus that forms a monochrome image. Is possible.

The image forming apparatus to which the light emitting device according to the present invention is applied is not limited to the image forming apparatus. For example, an optical head to which the function of the data line driving circuit 320 of the present invention is applied as a lighting device in various electronic devices. Examples of such electronic devices include facsimile machines, copiers, multifunction machines, and printers. In these electronic devices, an optical head in which a plurality of light emitting elements are arranged in a planar shape is suitably employed.
<4. Display device>
Further, the data line driver circuit of the present invention can be applied to an active matrix liquid crystal display device and other display devices by being combined with a scanning line driver circuit. The configuration in this case will be described with reference to FIG. This figure is a block diagram showing an example of the configuration of the display device. This display device includes a pixel area AA, a scanning line driving circuit 210, a data line driving circuit 320 to which the present invention is applied, a control circuit 230, and a power supply circuit 240.

  Among these, M scanning lines 201 are formed in the pixel area AA in parallel with the X direction. Further, N data lines 203 are formed in parallel with the Y direction orthogonal to the X direction. A pixel circuit P is provided corresponding to each intersection of the scanning line 201 and the data line 203. Each pixel circuit P is supplied with a power supply voltage VDDEL via a power supply line 205.

  The scanning line driving circuit 210 generates scanning signals Y1, Y2, Y3,..., YM for sequentially selecting a plurality of scanning lines 201. The scanning signals Y1 to YM are generated by sequentially transferring the Y transfer start pulse DY in synchronization with the Y clock signal YCLK.

  The data line driving circuit 320 outputs data signals X1, X2, X3, and X to each of the pixel circuits P corresponding to the selected scanning line 201 based on the output gradation data Dout (data D in each of the above forms). ..., XN is supplied. In this example, the gradation signals X1 to XN are pulse signals that specify gradation luminance by a pulse width.

  The control circuit 230 generates various control signals such as a Y clock signal YCLK, an X clock signal XCLK, an X transfer start pulse DY, and a Y transfer start pulse DY, and sends them to the scanning line drive circuit 210 and the data line drive circuit 320. Output. In addition, the control circuit 230 performs image processing such as gamma correction on the input gradation data Din supplied from the outside to generate output gradation data Dout.

  Electronic devices using display devices include mobile phones, personal computers, personal digital assistants, digital still cameras, television monitors, viewfinder type, monitor direct-view type video tape recorders, car navigation devices, pagers, and electronic notebooks. , Calculators, word processors, workstations, videophones, POS terminals, devices equipped with touch panels, and the like. And the display apparatus mentioned above is applicable as a display part of these various electronic devices.

1 is a perspective view showing a partial configuration of an image forming apparatus using an optical head including a data line driving circuit of the present invention. It is a block diagram which shows the characteristic electric constitution of a light-emitting device. It is a block diagram which shows the structure of a data line drive circuit. 6 is a timing chart showing the relationship between selection signals Q1 to Qn and inspection selection signals E1 to E3. It is a block diagram which shows the structural example of an output selection part. It is a timing chart which shows another example of the relation between selection signals Q1-Qn and inspection selection signals E1-E3. It is a block diagram which shows another example of a structure of a data line drive circuit. 1 is a longitudinal sectional view illustrating an example of an image forming apparatus. It is a longitudinal cross-sectional view which shows another example of an image forming apparatus. It is a block diagram which shows the structure of a display apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Light-emitting device, 15 ... Condensing lens array, 110 ... Photosensitive drum, 310 ... Light emitting element circuit group, 320 ... Data line drive circuit, 321 ... Shift register, 322 ... Shift register switch, 323 ... Inspection switch, 324 ...... Latch, 325, D / A converter, 330, control unit, 340, data input terminal, 350, inspection data output terminal, 360, output selection unit

Claims (7)

m signal supply lines to which m systems (m is a natural number) of data are supplied in parallel, a storage circuit having n storage areas (n is a natural number), and n systems of selection signals that sequentially become active levels. And a selection circuit for outputting the m-series data supplied to the m signal supply lines when each selection signal becomes an active level, sequentially to each of the n storage areas. And a data line driving circuit for outputting a data signal corresponding to the data held in the storage circuit to a plurality of data lines,
k test output lines (k is a divisor of m);
n check switches each including p (p = m / k) blocks;
An output selection unit that sequentially selects each of the p blocks in each inspection switch;
Of the p blocks of the check switch corresponding to the selection signal that has reached the active level, the block selected by the output selection unit is the n-system data stored in the storage area corresponding to the selection signal. A data line driving circuit, wherein the k lines of data are output to the k inspection output lines. m signal supply lines to which m systems (m is a natural number) of data are supplied in parallel, a storage circuit having n storage areas (n is a natural number), and n systems of selection signals that sequentially become active levels. And a signal output circuit that generates a data signal corresponding to the data stored in the storage circuit and outputs the data signal to the data line, and when each selection signal becomes an active level, the m A data line driving circuit for sequentially holding the m systems of data supplied to one signal supply line in each of the n storage areas;
k test output lines (k is a divisor of m);
n check switches each including p (p = m / k) blocks;
An output selection unit that sequentially selects each of the p blocks in each inspection switch;
Of the p blocks of the check switch corresponding to the selection signal that has reached the active level, the block selected by the output selection unit is the n-system data stored in the storage area corresponding to the selection signal. A data line driving circuit, wherein k data signals generated by the signal output circuit from k data are output to the k test output lines. An inspection object selection unit for selecting either the data stored in the storage circuit and the data signal output by the signal output circuit;
Of the p blocks of the inspection switch corresponding to the selection signal that has reached the active level, the block selected by the output selection unit is the k-system data stored in the storage area corresponding to the selection signal and the block 3. The data line driving circuit according to claim 2, wherein the inspection target selected by the inspection target selection unit among the k data signals generated by the signal output circuit is output to the k inspection output lines. 4. . The selection circuit sequentially sets the n system selection signals to an active level within a period in which the output selection unit selects any of the p blocks. The data line driving circuit according to any one of the above items. The output selection unit sequentially selects each of the p blocks within a period in which any of the n selection signals is at an active level. 2. A data line driving circuit according to item 1. A data line driving circuit according to any one of claims 1 to 5,
An electro-optical device comprising: a plurality of pixels driven according to each data signal output from the data line driving circuit. An electronic apparatus comprising the electro-optical device according to claim 6.

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