JP4498891B2 - Semiconductor power converter - Google Patents

Description

  The present invention relates to a semiconductor power conversion device having a plurality of main circuit potentials, and more particularly to a semiconductor power conversion device improved to suppress fluctuations in neutral point potential.

  Conventionally, a semiconductor power conversion device that controls output voltage by a so-called PWM (pulse width modulation) control system, for example, an inverter device, uses a self-extinguishing element such as an IGBT in its main circuit, and only a predetermined period for each modulation period. It outputs a pulsed voltage that turns on and controls its average voltage. When the inverter device reaches the 3rd level, a mode for outputting a zero voltage is added in addition to the positive voltage and the negative voltage, and PWM of four self-extinguishing elements per arm which is doubled as compared with the 2 level inverter device. Although it is necessary to perform control, the basic concept of control remains the same.

  In a three-level inverter device, when the output frequency is low and therefore the output voltage is low, when the voltage reference and the modulation carrier are compared to create a gate control pulse, the pulse is allowed due to the characteristics of the self-extinguishing element. There has been a problem that the pulse width cannot be reduced (hereinafter referred to as the minimum on-pulse width).

  In order to solve this problem, a so-called rectangular modulation system has been proposed. In this rectangular modulation method, a predetermined bias value is added to the three-phase voltage reference to avoid PWM modulation near zero voltage, and the polarity of the three-phase voltage reference is controlled as the same polarity, and this polarity is switched at a predetermined cycle. (For example, refer to Patent Document 1).

  Next, neutral point voltage fluctuations of the three-level inverter device will be described. It is known that a current that fluctuates at a frequency three times the AC frequency flows into the DC neutral point of the three-level inverter device. This current is shunted to the positive and negative DC capacitors, resulting in a change in neutral point potential.

As a technique for suppressing the fluctuation of the neutral point potential, there is known a system in which a difference between positive and negative capacitor voltages is detected and a voltage reference is shift-corrected based on the difference. In recent years, in order to further improve the correction accuracy, in addition to this method, a method of adding an offset to a three-phase voltage reference according to a specific phase of a triangular wave carrier signal has been proposed (for example, Patent Document 2). reference.).
JP-A-5-268773 (page 4-6, FIG. 1) JP 2003-169480 A (page 4-5, FIG. 1)

  The neutral point potential suppression method disclosed in Patent Document 2 is effective when a normal modulation method is performed, but is not effective in the rectangular modulation method disclosed in Patent Document 1. there were. The reason for this is that rectangular modulation is basically a control system that performs the same polarity control, and switching between positive and negative is to balance the devices that are energized, with a switching period that is always fixed to positive or negative simultaneously for the three phases. This is because they are switched.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a semiconductor power conversion device that can suppress a potential fluctuation at a neutral point in any operation mode. .

  In order to achieve the above object, a semiconductor power conversion device according to the present invention converts a three-level DC input into an AC power and supplies it to a load, and the three-level power conversion based on a voltage reference. Control means for controlling the output of the voltage detector, and a voltage detector for detecting the voltage deviation between the positive side and the negative side of the three-level DC input, wherein the control means is configured such that the voltage reference is less than a predetermined value. A rectangular modulation means for adding a predetermined bias value while switching between positive and negative polarities at the reference period to the voltage reference, and negative and positive sides of the reference period in a direction to decrease the voltage deviation according to the voltage deviation. And a time ratio adjusting means for adjusting the time ratio on the side.

  According to the present invention, it is possible to provide a semiconductor power conversion device that can suppress a potential fluctuation at a neutral point in any operation mode.

  Embodiments of the present invention will be described below with reference to the drawings.

  A semiconductor power conversion device according to a first embodiment of the present invention will be described with reference to FIGS. 1 and 2.

1 is a block configuration diagram of a semiconductor power conversion device according to a first embodiment of the present invention.

  The DC power supply 11 supplies a positive voltage + E and a negative voltage −E across the neutral point N to the three-level power converter 12, and the AC output of the three-level power converter 12 drives the AC motor 13. ing. The DC power supply 11 normally has a configuration in which AC input from the AC power supply is converted into DC by a converter circuit, and the converted DC voltage is smoothed by a smoothing filter circuit such as a capacitor, but other DC generating means is used. May be. Further, the three-level converter 12 forms a conversion arm by connecting power devices having reflux diodes connected in antiparallel to form a conversion arm, bridges the conversion arm, and connects the midpoints of the serially connected conversion arms. Is clamped to the potential of the neutral point N using a diode.

  A current detector 21 is provided on the output side of the three-level power converter 12, and voltage detectors 22A and 22B for detecting positive and negative voltages are provided on the output side of the DC power supply 11, respectively. . Furthermore, a speed detector 23 is attached to the AC motor 13. The signals detected by the current detector 21, the voltage detectors 22A and 22B, and the speed detector 23 are given to the control unit 30 as a feedback signal. Hereinafter, the configuration of the control unit 30 for controlling the three-level converter 12 will be described.

  The signal detected by the speed detector 23 is compared with the speed reference by the speed controller 31 and outputs a current reference that minimizes the difference. This current reference is compared with the current feedback detected by the current detector 21 by the current controller 32, and a voltage reference that minimizes the difference is output. The voltage reference 33 and positive and negative DC feedback voltages detected by the voltage detectors 22A and 22B are applied to the voltage modulator 33, and a modulation process described later is performed. Then, the modulated voltage reference is subjected to PWM modulation by the PWM modulator 34 to obtain the gate signal of each power device constituting the three-level power converter 12. Hereinafter, the internal configuration of the voltage modulator 33 will be described.

  FIG. 1B shows an internal configuration of the voltage modulator 33, and particularly shows a configuration in the case of performing rectangular modulation when the voltage reference is a predetermined value or less.

  The subtractor 35 subtracts the negative DC voltage feedback detected by the voltage detector 22B from the positive DC voltage feedback detected by the voltage detector 22A, and the DC voltage feedback deviation, which is the obtained deviation output, is positively and negatively energized. The time adjuster 36 is given. The positive / negative energization time adjuster 36 determines the energization time ratio between the positive side and the negative side of the modulated voltage reference according to the DC voltage feedback deviation.

  Based on the above result, the switching period when the bias (positive) and the bias (negative) for ensuring the minimum on-pulse is switched by the positive / negative bias switch 38 is instantaneously compensated, and this compensation signal is output from the current controller 32. Are added to the three-phase voltage reference of each phase by the adders 39A, 39B and 39C to obtain a voltage reference after rectangular modulation.

  FIG. 2 shows one period of the compensation signal in the voltage modulator 33. 2A shows a compensation signal when there is no DC feedback deviation in normal rectangular modulation, FIG. 2B shows a compensation signal when the DC voltage feedback deviation is positive, and FIG. The compensation signal when the DC voltage feedback deviation is negative is shown. As shown in FIG. 2B, when the DC voltage feedback deviation is positive and powering, if the compensation is made so that the positive power is supplied more than the negative power, the DC voltage positive potential decreases as a result. To do. On the other hand, as shown in FIG. 2C, when the DC voltage feedback deviation is negative and powering, if the compensation is made so that the negative power is supplied more than the positive power, the DC voltage positive potential is obtained as a result. descend. Note that when the regenerative operation is performed, the circuit is configured to perform the reverse operation to the above.

  Due to the effects described above, the potential fluctuation at the neutral point is suppressed in the semiconductor power conversion device according to the first embodiment. However, since the first embodiment uses the switching period as the compensation amount, the operation amount in the control becomes a discrete value determined by the switching time, and the compensation quantum amount is relatively large.

  In the configuration shown in FIG. 1, the important point of the present invention is that the voltage modulator 33 is operated in accordance with the voltage reference and the DC voltage feedback deviation. Therefore, the present invention can be applied even to a configuration in which the speed controller 31, the current detector 21, and the current controller 32 are omitted and voltage control is performed. Further, the load of the three-level power converter is not necessarily the AC motor 13, and may be a reactor for adjusting reactive power or the like.

  Hereinafter, Example 2 of the semiconductor power conversion device according to the present invention will be described with reference to FIGS. 3 and 4.

  FIG. 3 is a block diagram showing the configuration of the voltage modulator of the semiconductor power conversion device according to the second embodiment of the present invention. In each part of the second embodiment, the same parts as those of the voltage modulator of the semiconductor power conversion device according to the first embodiment of FIG. 1B are denoted by the same reference numerals, and the description thereof is omitted. The second embodiment is different from the first embodiment in that the DC voltage feedback deviation is amplified by the amplifier 40 and this output is added to the output of the positive / negative bias switch 38 by the adder 41 to obtain a compensation signal. Is a point.

  FIG. 4 shows waveforms of output voltage and neutral point potential fluctuation in the above configuration. In the first embodiment, when the rectangular modulation is performed, the method of adding the modulation compensation amount for suppressing the neutral point potential fluctuation with respect to the three-phase voltage reference as in the normal modulation is not adopted. This is for preventing a distortion in the line voltage by adding a different bias amount for each switching.

  In the waveform shown in FIG. 4, FIG. 4A shows “no compensation”, FIG. 4B shows 2% compensation on the positive side, and FIG. 4C shows 2 on the negative side. This is a waveform when% compensation is added. Here, 2% compensation means that the ratio of the output of the amplifier 40 to the bias amount is 2%. In FIG. 4, the U-phase line voltage as a representative of the three-phase voltages is shown together with the behavior of the neutral point potential.

  The case of “no compensation” indicates a state where the neutral points are balanced, but conversely, this indicates that there is no compensation capability when the neutral points change. On the other hand, the case where the compensation of ± 2% is added slowly compensates for the neutral point potential, but it can be seen that a slight distortion of the line voltage occurs. As described above, in the rectangular modulation, the method of adding the compensation value to each of the three-phase voltage references is not generally adopted because the line voltage distortion occurs although the neutral point potential fluctuation compensation effect is small. However, when implemented in parallel with the method of changing the positive / negative switching period of the first embodiment, the middle of the control with the large control quantum amount as described above can be filled. Therefore, according to the present embodiment, neutral point potential fluctuation compensation that is more realistic can be achieved by using the line voltage distortion within the allowable range.

  FIG. 5 is a block diagram showing the configuration of the voltage modulator of the semiconductor power conversion device according to the third embodiment of the present invention. About each part of this Example 3, the same part as each part of the voltage modulator of the semiconductor power converter device which concerns on Example 1 of FIG.1 (b) is shown with the same code | symbol, and the description is abbreviate | omitted. The third embodiment differs from the first embodiment in that a positive / negative energization time adjuster 36A with a threshold is provided in place of the positive / negative energization time adjuster 36.

  The positive / negative energization time adjuster 36A with a threshold value corrects the switching cycle only when the value of the DC voltage feedback deviation exceeds a predetermined threshold value.

  According to the semiconductor power conversion device of the third embodiment, the correction of the first embodiment is performed when the neutral point potential fluctuation becomes a predetermined value or more. In normal operation, since the operation is performed with a positive and negative switching cycle, neutral point potential fluctuations are unlikely to occur. When a disturbance such as a sudden change in current occurs, the power consumption of the positive and negative DC voltages becomes unbalanced, so performing the necessary neutral point potential fluctuation compensation is effective for stable motor drive. It is.

  FIG. 6 is a block diagram showing the configuration of the voltage modulator of the semiconductor power conversion device according to the fourth embodiment of the present invention. In each part of the fourth embodiment, the same parts as those of the voltage modulator of the semiconductor power conversion device according to the first embodiment of FIG. 1B are denoted by the same reference numerals, and the description thereof is omitted. The fourth embodiment is different from the first embodiment in that an average value calculation type positive / negative energization time adjuster 36B is provided in place of the positive / negative energization time adjuster 36.

  The average value calculation type positive / negative energization time adjuster 36A calculates an average value of the fluctuating DC voltage feedback deviation by a filter operation or a prediction operation, and outputs a positive / negative energization time adjustment signal for this average value.

  In the rectangular modulation, the positive / negative deviation of the DC voltage periodically changes every time the switching is switched between positive and negative. Stricter control can be performed by calculating the average value of this period. This avoids unnecessary neutral point potential fluctuation compensation as much as possible, and a more stable motor drive can be realized.

  The average value used in the present embodiment may be the average value of the above-described fluctuations per cycle, or may be the average value of all fluctuations.

BRIEF DESCRIPTION OF THE DRAWINGS The block block diagram of the semiconductor power converter device which concerns on Example 1 of this invention. The waveform which shows 1 period of the compensation signal of the voltage modulator of the semiconductor power converter device which concerns on Example 1 of this invention. The block block diagram which shows the structure of the voltage modulator of the semiconductor power converter device which concerns on Example 2 of this invention. The output voltage and neutral point potential waveform of the semiconductor power converter device concerning Example 2 of the present invention. The block block diagram which shows the structure of the voltage modulator of the semiconductor power converter device which concerns on Example 3 of this invention. The block block diagram which shows the structure of the voltage modulator of the semiconductor power converter device which concerns on Example 4 of this invention.

Explanation of symbols

11 DC power source 12 3-level power converter 13 AC motor 21 Current detector 22A, 22B DC voltage detector 23 Speed detector 30 Control unit 31 Speed controller 32 Current controller 33 Voltage modulator 34 PWM modulator 35 Subtractor 36 Positive / negative energization time adjuster 36A Threshold positive / negative energization time adjuster 36B Average value calculation type positive / negative energization time adjuster 37 Adder 38 Positive / negative bias switching device 39A, 39B, 39C Adder 40 Amplifier 41 Adder

Claims (4)

A three-level power converter that converts a three-level DC input into AC power and supplies the load
Control means for controlling the output of the three-level power converter based on a voltage reference;
A voltage detector for detecting a voltage deviation between the positive side and the negative side of the three-level DC input;
The control means includes
When the voltage reference is less than or equal to a predetermined value, rectangular modulation means for adding a predetermined bias value while switching between positive and negative polarities at a predetermined switching period to the voltage reference and in a direction to decrease the voltage deviation according to the voltage deviation A semiconductor power conversion device comprising: a time ratio adjusting means for adjusting a time ratio between the positive side and the negative side of the switching cycle. The control means includes
The semiconductor power conversion device according to claim 1, wherein the bias value is corrected in a direction of decreasing the voltage deviation according to the voltage deviation. The time ratio adjusting means is
3. The semiconductor power conversion device according to claim 1, wherein when the voltage deviation exceeds a predetermined threshold value, a time ratio between the positive side and the negative side of the reference period is adjusted. . The time ratio adjusting means is
Having a function of obtaining an average value of the voltage deviation that fluctuates;
3. The semiconductor power conversion device according to claim 1, wherein a time ratio between the positive side and the negative side of the reference period is adjusted according to an average value of the voltage deviation.

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