JP4451095B2 - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

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Publication number
JP4451095B2
JP4451095B2 JP2003284369A JP2003284369A JP4451095B2 JP 4451095 B2 JP4451095 B2 JP 4451095B2 JP 2003284369 A JP2003284369 A JP 2003284369A JP 2003284369 A JP2003284369 A JP 2003284369A JP 4451095 B2 JP4451095 B2 JP 4451095B2
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Japan
Prior art keywords
diffusion layer
insulating film
silicon layer
gate electrode
layer
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Expired - Fee Related
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JP2003284369A
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Japanese (ja)
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JP2005051186A (ja
JP2005051186A5 (enrdf_load_stackoverflow
Inventor
英司 吉田
徹 田中
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Fujitsu Semiconductor Ltd
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Fujitsu Semiconductor Ltd
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Priority to JP2003284369A priority Critical patent/JP4451095B2/ja
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Publication of JP2005051186A5 publication Critical patent/JP2005051186A5/ja
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JP2003284369A 2003-07-31 2003-07-31 半導体記憶装置 Expired - Fee Related JP4451095B2 (ja)

Priority Applications (1)

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JP2003284369A JP4451095B2 (ja) 2003-07-31 2003-07-31 半導体記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003284369A JP4451095B2 (ja) 2003-07-31 2003-07-31 半導体記憶装置

Publications (3)

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JP2005051186A JP2005051186A (ja) 2005-02-24
JP2005051186A5 JP2005051186A5 (enrdf_load_stackoverflow) 2006-08-17
JP4451095B2 true JP4451095B2 (ja) 2010-04-14

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JP2003284369A Expired - Fee Related JP4451095B2 (ja) 2003-07-31 2003-07-31 半導体記憶装置

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100673016B1 (ko) 2005-12-06 2007-01-24 삼성전자주식회사 반도체 소자 및 그 형성 방법
JP4664833B2 (ja) * 2006-02-15 2011-04-06 株式会社東芝 半導体記憶装置
US8648403B2 (en) 2006-04-21 2014-02-11 International Business Machines Corporation Dynamic memory cell structures
JP2008153567A (ja) * 2006-12-20 2008-07-03 Elpida Memory Inc 半導体メモリ及びその製造方法

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JP2005051186A (ja) 2005-02-24

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