JP4402396B2 - Method for manufacturing semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a thin film transistor used for a liquid crystal display device, an organic EL display device, and the like and a manufacturing method thereof.

  In recent years, an active matrix type display device having advantages such as high contrast and an unlimited number of pixels has been used for liquid crystal display devices (see Japanese Patent Application Laid-Open No. 2001-290171). In an active matrix substrate used in this active matrix display device, pixel electrodes arranged in a matrix on an insulating substrate are independently driven using active elements such as thin film transistors (TFTs). In particular, a TFT using a crystalline silicon film (polysilicon film) as an active layer has high field-effect mobility, so that various functional circuits can be formed.

  Transistor characteristics required for forming a functional circuit include high current driving capability, low off-leakage current characteristics, and long-term reliability. Among the long-term reliability, the transistor structure greatly affects the hot carrier deterioration characteristic. The single drain structure of the N-channel TFT has a large current driving capability and is a simple structure, so it can be manufactured at a low cost with a small number of process steps. However, since it has poor resistance to hot carrier deterioration, it can be driven at a low voltage of several volts. Only applicable. There is also a problem that off-leakage current is high.

  On the other hand, the LDD (lightly doped drain) structure has a feature that it can increase resistance to hot carrier deterioration and can also reduce off-leakage current. However, in order to increase the resistance to hot carrier deterioration, it is necessary to set the impurity concentration in the low concentration region (LDD region) on the drain side to a low concentration, and the current driving capability is greatly reduced. In addition, when the impurity concentration in the LDD region is increased in order to increase the current driving capability, there is a problem that resistance to hot carrier deterioration is weakened.

  As a structure for solving these problems, a gate overlap LDD structure (GOLD structure) is known (see Japanese Patent Application Laid-Open No. 2001-210833). The GOLD structure has a high current driving force and a very excellent feature against hot carrier deterioration resistance. However, the GOLD structure has a larger off-leakage current than the LDD structure and is not preferable as a pixel switching element of a liquid crystal display device or an organic EL display device that needs to hold a pixel signal. In addition, since the GOLD structure has a large overlap capacitance between the gate electrode and the drain electrode, when used in a pixel switching element, fluctuation of the pixel signal due to voltage fluctuation of the gate electrode becomes a problem. As described above, each transistor structure has advantages and disadvantages. Therefore, one type of transistor structure cannot satisfy all requirements. Therefore, although the process is complicated, an attempt has been made to obtain desired circuit characteristics and panel display characteristics by combining several transistor structures.

JP 2001-290171 (pages 9 to 10, FIG. 5) JP 2001-210833 (pages 4-5, FIG. 2)

  As described above, each conventional transistor structure has advantages and disadvantages, and therefore, one type of transistor structure cannot satisfy all requirements. Therefore, it is conceivable to obtain desired circuit characteristics and panel display characteristics by combining several transistor structures. However, when a plurality of transistor structures are combined, the process becomes complicated, and the number of masks and the number of loading / unloading between apparatuses increase, resulting in poor efficiency.

  Further, in a conventional method for manufacturing a thin film transistor, it is necessary to perform high temperature heat treatment for activating impurities after ion implantation of a high concentration impurity into the source and drain regions using the gate electrode as a mask. For this reason, only a material excellent in heat resistance can be used as a gate electrode material, and inexpensive and low resistance Al or Al alloy cannot be used as a gate electrode material. However, due to the high-speed driving of the circuit and the increase in the size of the pixel display device, signal delay and voltage drop due to gate electrode wiring resistance become problems, so cheap and low resistance Al or Al alloy is used as the gate electrode material It is requested to do.

  The present invention has been made in consideration of the above-described circumstances, and its purpose is to reduce the number of masks and reduce the number of loading / unloading operations between apparatuses, thereby improving the tact efficiency and reducing the manufacturing cost. It is an object to provide a semiconductor device that can be reduced and a manufacturing method thereof. Another object of the present invention is to provide a semiconductor device using a cheap and low-resistance gate electrode material and a method for manufacturing the same.

In order to solve the above problems, a method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer in a driver circuit portion on a substrate and forming a second semiconductor layer in a pixel portion on the substrate. When,
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a source region and a drain region in each of the first semiconductor layer and the second semiconductor layer by introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer;
Forming a first gate electrode on each of the first semiconductor layer and the second semiconductor layer via the gate insulating film;
Forming an LDD region at least on the drain region side of each of the first semiconductor layer and the second semiconductor layer by introducing a second impurity into each of the first semiconductor layer and the second semiconductor layer; When,
Forming a first insulating film on the first gate electrode and the gate insulating film;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on the first insulating film of the drive circuit unit;
Comprising
The second gate electrode is electrically connected to the first gate electrode in the driving circuit unit and is formed to cover at least a part of the LDD region in the driving circuit unit.

  According to the method for manufacturing a semiconductor device, since the second gate electrode is formed after the heat treatment for activating the impurities in the source region, the drain region, and the LDD region, the material for the second gate electrode is low. An inexpensive resistor can be used. Further, a gate overlap LDD thin film transistor can be formed in the driver circuit portion and an LDD thin film transistor can be formed in the pixel portion while suppressing an increase in the number of steps.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer in a driver circuit portion on a substrate and forming a second semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a source region and a drain region in each of the first semiconductor layer and the second semiconductor layer by introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer;
Forming two first gate electrodes on the first semiconductor layer via the gate insulating film, and forming the first gate electrode on the second semiconductor layer via the gate insulating film; ,
Forming an LDD region at least on the drain region side of each of the first semiconductor layer and the second semiconductor layer by introducing a second impurity into each of the first semiconductor layer and the second semiconductor layer; When,
Forming a first insulating film on the first gate electrode and the gate insulating film;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on the at least one first gate electrode of the drive circuit section via the first insulating film;
Comprising
The second gate electrode is electrically connected to the at least one first gate electrode in the drive circuit unit, and is formed to cover at least a part of the LDD region in the drive circuit unit. To do.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer in a driver circuit portion on a substrate and forming a second semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
A first conductivity type source is introduced into each of the first semiconductor layer and the second semiconductor layer by introducing a first impurity of the first conductivity type into each of the first semiconductor layer and the second semiconductor layer. Forming regions and drain regions;
Forming two first gate electrodes on the first semiconductor layer via the gate insulating film, and forming the first gate electrode on the second semiconductor layer via the gate insulating film; ,
By introducing a second impurity of the first conductivity type into each of the first semiconductor layer and the second semiconductor layer, an LDD is provided on at least the drain region side of each of the first semiconductor layer and the second semiconductor layer. Forming a region;
Forming a second conductivity type source region and drain region in the first semiconductor layer by introducing a second conductivity type impurity into the first semiconductor layer;
Forming a first insulating film on the first gate electrode and the gate insulating film;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on the at least one first gate electrode of the drive circuit section via the first insulating film;
Comprising
The second gate electrode is electrically connected to the at least one first gate electrode in the drive circuit unit, and is formed to cover at least a part of the LDD region in the drive circuit unit. To do.

In the method for manufacturing a semiconductor device according to the present invention, after the step of forming the second gate electrode, a step of forming a second insulating film on the second gate electrode, the second insulating film, Forming a connection hole located on each of the first gate electrode and the second gate electrode of the drive circuit portion in the first insulating film; and a conductive film in the connection hole and on the second insulating film The method further comprises the step of electrically connecting the first gate electrode and the second gate electrode by forming the first and second gate electrodes.
In addition, although the said connection hole may be single or plural, what is necessary is just to form a connection hole by one processing process. Thereby, the number of processing of opening the connection hole can be reduced, and the process can be shortened.
In the method for manufacturing a semiconductor device according to the present invention, after the step of forming the second gate electrode, a step of forming a second insulating film on the second gate electrode, the second insulating film, Forming a connection hole in the first insulating film on the first gate electrode and the second gate electrode of the drive circuit unit; and forming a conductive film in the connection hole and on the second insulating film. Forming the first gate electrode and the second gate electrode to form an electrical connection.
In the method for manufacturing a semiconductor device according to the present invention, the first insulating film may be a multilayer film in which a SiON film and a SiN film are stacked.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer in a driver circuit portion on a substrate and forming a second semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a source region and a drain region in each of the first semiconductor layer and the second semiconductor layer by introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer;
A first gate electrode is formed on the first semiconductor layer via the gate insulating film, and a first gate electrode and a first capacitor electrode are formed on the second semiconductor layer via the gate insulating film. Process,
Forming an LDD region at least on the drain region side of each of the first semiconductor layer and the second semiconductor layer by introducing a second impurity into each of the first semiconductor layer and the second semiconductor layer; When,
Forming an insulating film on the first gate electrode, the first capacitor electrode, and the gate insulating film;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on the insulating film of the drive circuit unit and forming a second capacitor electrode on the first capacitor electrode of the pixel unit via the insulating film;
Comprising
The second gate electrode is electrically connected to the first gate electrode in the driving circuit unit and is formed to cover at least a part of the LDD region in the driving circuit unit.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer in a driver circuit portion on a substrate and forming a second semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a source region and a drain region in each of the first semiconductor layer and the second semiconductor layer by introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer;
Forming a first gate electrode on each of the first semiconductor layer and the second semiconductor layer via the gate insulating film;
Forming an LDD region at least on the drain region side of each of the first semiconductor layer and the second semiconductor layer by introducing a second impurity into each of the first semiconductor layer and the second semiconductor layer; When,
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on the first gate electrode and the gate insulating film of the drive circuit unit;
Comprising
The second gate electrode is electrically connected to the first gate electrode in the driving circuit unit and is formed to cover at least a part of the LDD region in the driving circuit unit.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer in a driver circuit portion on a substrate and forming a second semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
By introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer, a source region and a drain region are formed in the first semiconductor layer, and a source region is formed in the second semiconductor layer, Forming a drain region and a first capacitor electrode;
Forming a first gate electrode on each of the first semiconductor layer and the second semiconductor layer via the gate insulating film;
Forming an LDD region at least on the drain region side of each of the first semiconductor layer and the second semiconductor layer by introducing a second impurity into each of the first semiconductor layer and the second semiconductor layer; When,
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
A second gate electrode is formed on the first gate electrode and the gate insulating film of the drive circuit unit, and a second capacitor electrode is formed on the first capacitor electrode of the pixel unit via the gate insulating film. Process,
Comprising
The second gate electrode is electrically connected to the first gate electrode in the driving circuit unit and is formed to cover at least a part of the LDD region in the driving circuit unit.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer in a driver circuit portion on a substrate and forming a second semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer and the second semiconductor layer on the gate insulating film;
By introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer using the conductive film as a mask, a source region and a drain region are respectively added to the first semiconductor layer and the second semiconductor layer. Forming a step;
Forming a first gate electrode made of the conductive film on the first semiconductor layer and the second semiconductor layer via the gate insulating film by processing the conductive film;
By introducing a second impurity into each of the first semiconductor layer and the second semiconductor layer using the first gate electrode as a mask, at least a drain region of each of the first semiconductor layer and the second semiconductor layer Forming an LDD region on the side;
Forming an insulating film on the first gate electrode and the gate insulating film;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on the insulating film of the drive circuit unit;
Comprising
The second gate electrode is electrically connected to the first gate electrode in the driving circuit unit and is formed to cover at least a part of the LDD region in the driving circuit unit.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer in a driver circuit portion on a substrate and forming a second semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer and the second semiconductor layer on the gate insulating film;
By introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer using the conductive film as a mask, a source region and a drain region are respectively added to the first semiconductor layer and the second semiconductor layer. Forming a step;
By processing the conductive film, a first gate electrode made of the conductive film is formed on the first semiconductor layer via the gate insulating film, and the gate insulating film is formed on the second semiconductor layer. Forming a first gate electrode and a first capacitor electrode made of the conductive film through,
By introducing a second impurity into each of the first semiconductor layer and the second semiconductor layer using the first gate electrode as a mask, at least a drain region of each of the first semiconductor layer and the second semiconductor layer Forming an LDD region on the side;
Forming an insulating film on the first gate electrode, the first capacitor electrode, and the gate insulating film;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on the insulating film of the drive circuit unit and forming a second capacitor electrode on the capacitor electrode of the pixel unit via the insulating film;
Comprising
The second gate electrode is electrically connected to the first gate electrode in the driving circuit unit and is formed to cover at least a part of the LDD region in the driving circuit unit.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer in a driver circuit portion on a substrate and forming a second semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer and the second semiconductor layer on the gate insulating film;
By introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer using the conductive film as a mask, a source region and a drain region are respectively added to the first semiconductor layer and the second semiconductor layer. Forming a step;
Forming a first gate electrode made of the conductive film on the first semiconductor layer and the second semiconductor layer via the gate insulating film by processing the conductive film;
By introducing a second impurity into each of the first semiconductor layer and the second semiconductor layer using the first gate electrode as a mask, at least a drain region of each of the first semiconductor layer and the second semiconductor layer Forming an LDD region on the side;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on the first gate electrode and the gate insulating film of the drive circuit unit;
Comprising
The second gate electrode is electrically connected to the first gate electrode in the driving circuit unit and is formed to cover at least a part of the LDD region in the driving circuit unit.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer in a driver circuit portion on a substrate and forming a second semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer and the second semiconductor layer on the gate insulating film;
By introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer using the conductive film as a mask, a source region and a drain region are formed in the first semiconductor layer and the second semiconductor layer is formed. Forming a source region, a drain region and a first capacitor electrode in the semiconductor layer;
Forming a first gate electrode made of the conductive film on the first semiconductor layer and the second semiconductor layer via the gate insulating film by processing the conductive film;
By introducing a second impurity into each of the first semiconductor layer and the second semiconductor layer using the first gate electrode as a mask, at least a drain region of each of the first semiconductor layer and the second semiconductor layer Forming an LDD region on the side;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
A second gate electrode is formed on the first gate electrode and the gate insulating film of the drive circuit unit, and a second capacitor electrode is formed on the first capacitor electrode of the pixel unit via the gate insulating film. Process,
Comprising
The second gate electrode is electrically connected to the first gate electrode in the driving circuit unit and is formed to cover at least a part of the LDD region in the driving circuit unit.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer and a second semiconductor layer in a driver circuit portion on a substrate and forming a third semiconductor layer in a pixel portion on the substrate. ,
Forming a gate insulating film on the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer on the gate insulating film;
Forming a first resist mask overlying the second semiconductor layer;
By introducing an N-type first impurity into each of the first semiconductor layer and the third semiconductor layer using the first resist mask and the conductive film as a mask, the first semiconductor layer and the third semiconductor layer are introduced. Forming a source region and a drain region in each of the semiconductor layers;
Removing the first resist mask;
By processing the conductive film, a first gate electrode made of the conductive film is formed on each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer with the gate insulating film interposed therebetween. Forming, and
By introducing an N-type second impurity into each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer using the first gate electrode as a mask, the first semiconductor layer and the first semiconductor layer Forming an LDD region in each of the three semiconductor layers;
Forming a second resist mask covering above the first semiconductor layer and the third semiconductor layer;
Forming a source region and a drain region in the second semiconductor layer by introducing a P-type impurity into the second semiconductor layer using the second resist mask and the first gate electrode as a mask;
Removing the second resist mask;
Forming an insulating film on the first gate electrode and the gate insulating film;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on the insulating film of the drive circuit unit;
Comprising
The second gate electrode above the first semiconductor layer is electrically connected to the first gate electrode on the first semiconductor layer, and at least a part of the LDD region of the first semiconductor layer Is formed to cover
The second gate electrode above the second semiconductor layer is electrically connected to the first gate electrode on the second semiconductor layer, and at least a part of the drain region of the second semiconductor layer It is formed so that it may cover.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer and a second semiconductor layer in a driver circuit portion on a substrate and forming a third semiconductor layer in a pixel portion on the substrate. ,
Forming a gate insulating film on the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer on the gate insulating film;
Forming a first resist mask overlying the second semiconductor layer;
By introducing an N-type first impurity into each of the first semiconductor layer and the third semiconductor layer using the first resist mask and the conductive film as a mask, the first semiconductor layer and the third semiconductor layer are introduced. Forming a source region and a drain region in each of the semiconductor layers;
Removing the first resist mask;
By processing the conductive film, two first gate electrodes made of the conductive film are formed on the first semiconductor layer via the gate insulating film, and the second semiconductor layer and the third semiconductor layer are formed. Forming a first gate electrode made of the conductive film on each of the semiconductor layers via the gate insulating film;
By introducing an N-type second impurity into each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer using the first gate electrode as a mask, the first semiconductor layer and the first semiconductor layer Forming an LDD region in each of the three semiconductor layers;
Forming a second resist mask covering above the first semiconductor layer and the third semiconductor layer;
Forming a source region and a drain region in the second semiconductor layer by introducing a P-type impurity into the second semiconductor layer using the second resist mask and the first gate electrode as a mask;
Removing the second resist mask;
Forming an insulating film on the first gate electrode and the gate insulating film;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on each of at least one first gate electrode above the first semiconductor layer and the first gate electrode above the second semiconductor layer via the insulating film; ,
Comprising
The second gate electrode above the first semiconductor layer is electrically connected to the at least one first gate electrode above the first semiconductor layer, and the LDD region of the first semiconductor layer Formed so as to cover at least a part of
The second gate electrode above the second semiconductor layer is electrically connected to the first gate electrode above the second semiconductor layer, and is at least one of the drain regions of the second semiconductor layer. It is formed so that a part may be covered.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer and a second semiconductor layer in a driver circuit portion on a substrate and forming a third semiconductor layer in a pixel portion on the substrate. ,
Forming a gate insulating film on the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer on the gate insulating film;
Forming a first resist mask overlying the second semiconductor layer;
By introducing an N-type first impurity into each of the first semiconductor layer and the third semiconductor layer using the first resist mask and the conductive film as a mask, the first semiconductor layer and the third semiconductor layer are introduced. Forming a source region and a drain region in each of the semiconductor layers;
Removing the first resist mask;
By processing the conductive film, two first gate electrodes made of the conductive film are formed on the second semiconductor layer via the gate insulating film, and the first semiconductor layer and the third semiconductor layer are formed. Forming a first gate electrode made of the conductive film on each of the semiconductor layers via the gate insulating film;
By introducing an N-type second impurity into each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer using the first gate electrode as a mask, the first semiconductor layer and the first semiconductor layer Forming an LDD region in each of the three semiconductor layers;
Forming a second resist mask covering above the first semiconductor layer and the third semiconductor layer;
Forming a source region and a drain region in the second semiconductor layer by introducing a P-type impurity into the second semiconductor layer using the second resist mask and the first gate electrode as a mask;
Removing the second resist mask;
Forming an insulating film on the first gate electrode and the gate insulating film;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on each of the first gate electrode above the first semiconductor layer and at least one first gate electrode above the second semiconductor layer via the insulating film; ,
Comprising
The second gate electrode above the first semiconductor layer is electrically connected to the first gate electrode above the first semiconductor layer, and is at least one of the LDD regions of the first semiconductor layer. Formed to cover the part,
The second gate electrode above the second semiconductor layer is electrically connected to the at least one first gate electrode above the second semiconductor layer, and the drain region of the second semiconductor layer Is formed so as to cover at least a part thereof.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer and a second semiconductor layer in a driver circuit portion on a substrate and forming a third semiconductor layer in a pixel portion on the substrate. ,
Forming a gate insulating film on the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer on the gate insulating film;
Forming a first resist mask overlying the second semiconductor layer;
By introducing an N-type first impurity into each of the first semiconductor layer and the third semiconductor layer using the first resist mask and the conductive film as a mask, the first semiconductor layer and the third semiconductor layer are introduced. Forming a source region and a drain region in each of the semiconductor layers;
Removing the first resist mask;
By processing the conductive film, a first gate electrode made of the conductive film is formed on the first semiconductor layer and the second semiconductor layer via the gate insulating film, and the third semiconductor layer is formed. Forming a first gate electrode and a first capacitor electrode made of the conductive film on the semiconductor layer via the gate insulating film;
By introducing an N-type second impurity into each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer using the first gate electrode as a mask, the first semiconductor layer and the first semiconductor layer Forming an LDD region in each of the three semiconductor layers;
Forming a second resist mask covering above the first semiconductor layer and the third semiconductor layer;
Forming a source region and a drain region in the second semiconductor layer by introducing a P-type impurity into the second semiconductor layer using the second resist mask and the first gate electrode as a mask;
Removing the second resist mask;
Forming an insulating film on the first gate electrode, the first capacitor electrode, and the gate insulating film;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on the insulating film of the drive circuit unit and forming a second capacitor electrode on the first capacitor electrode of the pixel unit via the insulating film;
Comprising
The second gate electrode above the first semiconductor layer is electrically connected to the first gate electrode on the first semiconductor layer, and at least a part of the LDD region of the first semiconductor layer Is formed to cover
The second gate electrode above the second semiconductor layer is electrically connected to the first gate electrode on the second semiconductor layer, and at least a part of the drain region of the second semiconductor layer It is formed so that it may cover.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer and a second semiconductor layer in a driver circuit portion on a substrate and forming a third semiconductor layer in a pixel portion on the substrate. ,
Forming a gate insulating film on the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer on the gate insulating film;
Forming a first resist mask overlying the second semiconductor layer;
By introducing an N-type first impurity into each of the first semiconductor layer and the third semiconductor layer using the first resist mask and the conductive film as a mask, the first semiconductor layer and the third semiconductor layer are introduced. Forming a source region and a drain region in each of the semiconductor layers;
Removing the first resist mask;
By processing the conductive film, two first gate electrodes made of the conductive film are formed on the first semiconductor layer via the gate insulating film, and the gate insulating film is formed on the second semiconductor layer. A first gate electrode made of the conductive film is formed through a film, and a first gate electrode and a first capacitor electrode made of the conductive film are formed on the third semiconductor layer through the gate insulating film. Process,
By introducing an N-type second impurity into each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer using the first gate electrode as a mask, the first semiconductor layer and the first semiconductor layer Forming an LDD region in each of the three semiconductor layers;
Forming a second resist mask covering above the first semiconductor layer and the third semiconductor layer;
Forming a source region and a drain region in the second semiconductor layer by introducing a P-type impurity into the second semiconductor layer using the second resist mask and the first gate electrode as a mask;
Removing the second resist mask;
Forming an insulating film on the first gate electrode, the first capacitor electrode, and the gate insulating film;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on each of the at least one first gate electrode above the first semiconductor layer and the first gate electrode above the second semiconductor layer via the insulating film; Forming a second capacitor electrode on the first capacitor electrode of the pixel portion via the insulating film;
Comprising
The second gate electrode above the first semiconductor layer is electrically connected to the at least one first gate electrode above the first semiconductor layer, and the LDD region of the first semiconductor layer Formed so as to cover at least a part of
The second gate electrode above the second semiconductor layer is electrically connected to the first gate electrode above the second semiconductor layer, and is at least one of the drain regions of the second semiconductor layer. It is formed so that a part may be covered.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer and a second semiconductor layer in a driver circuit portion on a substrate and forming a third semiconductor layer in a pixel portion on the substrate. ,
Forming a gate insulating film on the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer on the gate insulating film;
Forming a first resist mask overlying the second semiconductor layer;
By introducing an N-type first impurity into each of the first semiconductor layer and the third semiconductor layer using the first resist mask and the conductive film as a mask, the first semiconductor layer and the third semiconductor layer are introduced. Forming a source region and a drain region in each of the semiconductor layers;
Removing the first resist mask;
By processing the conductive film, a first gate electrode made of the conductive film is formed on the first semiconductor layer via the gate insulating film, and the gate insulating film is formed on the second semiconductor layer. Two first gate electrodes made of the conductive film are formed, and a first gate electrode and a first capacitor electrode made of the conductive film are formed on the third semiconductor layer via the gate insulating film. Process,
By introducing an N-type second impurity into each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer using the first gate electrode as a mask, the first semiconductor layer and the first semiconductor layer Forming an LDD region in each of the three semiconductor layers;
Forming a second resist mask covering above the first semiconductor layer and the third semiconductor layer;
Forming a source region and a drain region in the second semiconductor layer by introducing a P-type impurity into the second semiconductor layer using the second resist mask and the two first gate electrodes as a mask; and ,
Removing the second resist mask;
Forming an insulating film on the first gate electrode, the first capacitor electrode, and the gate insulating film;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a second gate electrode on each of the first gate electrode above the first semiconductor layer and at least one first gate electrode above the second semiconductor layer via the insulating film; Forming a second capacitor electrode on the first capacitor electrode of the pixel portion via the insulating film;
Comprising
The second gate electrode above the first semiconductor layer is electrically connected to the first gate electrode above the first semiconductor layer, and is at least one of the LDD regions of the first semiconductor layer. Formed to cover the part,
The second gate electrode above the second semiconductor layer is electrically connected to the at least one first gate electrode above the second semiconductor layer, and the drain region of the second semiconductor layer Is formed so as to cover at least a part thereof.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer in a driver circuit portion on a substrate and forming a second semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a first conductive film located above each of the first semiconductor layer and the second semiconductor layer on the gate insulating film;
Forming a second conductive film on the first conductive film;
The first conductive film is left above the channel regions and LDD regions of the first and second semiconductor layers, and the second conductive film is left above the channel regions of the first and second semiconductor layers. Forming a first gate electrode comprising the first conductive film and the second conductive film on the gate insulating film by processing;
By introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer using the first gate electrode as a mask, a source region and a first region are introduced into the first semiconductor layer and the second semiconductor layer, respectively. A drain region is formed, and a second impurity is introduced into each of the first semiconductor layer and the second semiconductor layer using the second conductive film of the first gate electrode as a mask, whereby the first semiconductor layer and Forming an LDD region on at least the drain region side of each of the second semiconductor layers;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a third conductive film on the first gate electrode and the gate insulating film;
Forming a resist mask on the third conductive film so as to cover the channel region and the LDD region of the first semiconductor layer;
The third conductive film and the first conductive film are etched using the resist mask and the second conductive film of the first gate electrode as a mask, so that the first gate electrode and the gate insulating film of the driving circuit portion are etched. Forming a second gate electrode made of the third conductive film thereon and removing the first conductive film existing above the LDD region of the second semiconductor layer of the pixel portion;
Comprising
The second gate electrode is formed to cover at least a part of the first gate electrode and at least a part of the LDD region in the drive circuit unit.

  According to the method for manufacturing the semiconductor device, the first conductive film is processed so as to remain above the channel region and the LDD region of the semiconductor layer and the second conductive film is left above the channel region of the semiconductor layer, When the first impurity is introduced into the drain region, the first gate electrode is used as a mask, and when the second impurity is introduced into the LDD region, the second conductive film of the first gate electrode is used as a mask. For this reason, it is possible to reduce the number of masks and the number of loading / unloading operations between apparatuses, and the tact efficiency can be increased. Further, the third conductive film and the first conductive film are etched using the resist mask and the second conductive film of the first gate electrode as a mask, so that the third conductive film is formed on the first gate electrode and the gate insulating film of the driver circuit portion. A second gate electrode made of a conductive film is formed, and the first conductive film existing above the LDD region of the second semiconductor layer of the pixel portion is removed. Thus, by performing the etching process of the third conductive film and the etching process of the first conductive film in the same process, the number of masks can be reduced as compared with the case of performing in separate processes, and it is carried into and out of the etching apparatus. The number of times can be reduced. In addition, since the second gate electrode is formed after the heat treatment for activating the impurities in the source region, the drain region, and the LDD region, a low-resistance and inexpensive material is used for the second gate electrode. be able to. Further, a gate overlap LDD thin film transistor can be formed in the driver circuit portion and an LDD thin film transistor can be formed in the pixel portion while suppressing an increase in the number of steps.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first semiconductor layer in a driver circuit portion on a substrate and forming a second semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a first conductive film located above each of the first semiconductor layer and the second semiconductor layer on the gate insulating film;
Forming a second conductive film on the first conductive film;
The first conductive film is processed so as to remain above the channel region and LDD region of the semiconductor layer and the second conductive film is left above the channel region of the semiconductor layer. Forming a first gate electrode comprising the first conductive film and the second conductive film;
By introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer using the first gate electrode as a mask, a source region and a first region are introduced into the first semiconductor layer and the second semiconductor layer, respectively. A drain region is formed, and a second impurity is introduced into each of the first semiconductor layer and the second semiconductor layer using the second conductive film of the first gate electrode as a mask, whereby the first semiconductor layer and Forming an LDD region on at least the drain region side of each of the second semiconductor layers;
Forming an insulating film on the first gate electrode and the gate insulating film;
Activating the impurities in the source region, the drain region, and the LDD region by performing a heat treatment;
Forming a third conductive film on the insulating film;
Forming a resist mask on the third conductive film so as to cover the channel region and the LDD region of the first semiconductor layer;
The third conductive film, the insulating film, and the first conductive film are etched using the resist mask and the second conductive film of the first gate electrode as a mask, so that the first gate electrode and the A second gate electrode made of the third conductive film is formed on the gate insulating film via the insulating film, and a first conductive film existing above the LDD region of the second semiconductor layer of the pixel portion is formed. Removing, and
Comprising
The second gate electrode is formed to cover at least a part of the first gate electrode and at least a part of the LDD region in the drive circuit unit.

In the method for manufacturing a semiconductor device according to the present invention, the insulating film may be a multilayer film in which a SiON film and a SiN film are stacked.
In the method for manufacturing a semiconductor device according to the present invention, the second gate electrode is preferably formed of a film made of Al or an Al alloy.
Al or Al alloy is an inexpensive and low resistance material.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a semiconductor layer over a substrate,
Forming a gate insulating film on the semiconductor layer;
Forming a first conductive film on the gate insulating film;
Forming a second conductive film on the first conductive film;
Processing to leave the first conductive film above the channel region and LDD region of the semiconductor layer and leave the second conductive film above the channel region of the semiconductor layer;
A source region and a drain region are formed in the semiconductor layer by introducing a first impurity into the semiconductor layer using the first conductive film and the second conductive film as a mask, and the semiconductor is formed using the second conductive film as a mask. Forming an LDD region in the semiconductor layer by introducing a second impurity into the layer;
Forming a gate electrode composed of the first conductive film and the second conductive film by processing the first conductive film so as to remain above the channel region of the semiconductor layer;
It is characterized by comprising.

  According to the method for manufacturing the semiconductor device, the first conductive film is processed so as to remain above the channel region and the LDD region of the semiconductor layer and the second conductive film is left above the channel region of the semiconductor layer, When the first impurity is introduced into the drain region, the first conductive film and the second conductive film are used as a mask, and when the second impurity is introduced into the LDD region, the second conductive film is used as a mask. For this reason, it is possible to reduce the number of masks and the number of loading / unloading operations between apparatuses, and the tact efficiency can be increased.

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a semiconductor layer over a substrate,
Forming a gate insulating film on the semiconductor layer;
Forming a first conductive film on the gate insulating film;
Forming a second conductive film on the first conductive film;
Processing to leave the first conductive film above the channel region and LDD region of the semiconductor layer and leave the second conductive film above the channel region of the semiconductor layer;
A source region and a drain region are formed in the semiconductor layer by introducing a first impurity into the semiconductor layer using the first conductive film and the second conductive film as a mask, and the semiconductor is formed using the second conductive film as a mask. Forming an LDD region in the semiconductor layer by introducing a second impurity into the layer;
Using the second conductive film as a mask, the first conductive film is etched in a tapered manner while the first conductive film is retracted, and the gate insulating film is etched to thereby form a first gate electrode composed of the first conductive film and the second conductive film. And forming a step portion in the gate insulating film located on the LDD region;
It is characterized by comprising.

  According to the above method for manufacturing a semiconductor device, since the step portion is formed in the gate insulating film located on the LDD region, the film thickness of the gate insulating film on the LDD region can be changed stepwise. As a result, it is possible to obtain an effect (electric field relaxation effect) that moderates the change in electric field strength in the LDD region.

  In the method for manufacturing a semiconductor device according to the present invention, after the step of forming the step portion, at least a part of the first gate electrode and at least a part of the LDD region on the drain region side are covered. It is also possible to further include a step of forming the second gate electrode.

A semiconductor device according to the present invention includes a drive circuit unit disposed on a substrate,
A first thin film transistor formed in the drive circuit unit;
A pixel portion disposed on the substrate;
A second thin film transistor formed in the pixel portion;
A semiconductor device comprising:
The first thin film transistor includes a source region and a drain region, an LDD region formed at least on the drain region side, a first gate electrode formed on a channel region via a gate insulating film, and the first gate A second gate electrode formed on the electrode through a first insulating film, electrically connected to the first gate electrode, and arranged to cover at least a part of the LDD region. ,
The second thin film transistor includes a source region and a drain region, an LDD region formed at least on the drain region side, and a first gate electrode formed on the channel region via a gate insulating film. It is characterized by being.
In the semiconductor device according to the present invention, the first insulating film may be a multilayer film in which a SiON film and a SiN film are stacked.

A semiconductor device according to the present invention includes a drive circuit unit disposed on a substrate,
A first thin film transistor formed in the drive circuit unit;
A pixel portion disposed on the substrate;
A second thin film transistor formed in the pixel portion;
A semiconductor device comprising:
The first thin film transistor includes a source region and a drain region, an LDD region formed at least on the drain region side, a first gate electrode formed on the LDD region and the channel region via a gate insulating film, And a second gate electrode formed on the first gate electrode and arranged to cover at least a part of the first gate electrode and at least a part of the LDD region,
The second thin film transistor includes a source region and a drain region, an LDD region formed at least on the drain region side, and a first gate electrode formed on the channel region via a gate insulating film. It is characterized by being.

  The semiconductor device according to the present invention may further include a second insulating film formed between the first gate electrode and the second gate electrode in the first thin film transistor.

Further, in the semiconductor device according to the present invention, the second insulating film formed on the second gate electrode of the first thin film transistor, the second insulating film and the first insulating film are formed, and the first insulating film is formed. A connection hole located on each of the first gate electrode and the second gate electrode of one thin film transistor; and the first gate electrode and the second gate formed in the connection hole and on the second insulating film. And a conductive film to which the electrodes are electrically connected.
Further, in the semiconductor device according to the present invention, the second insulating film formed on the second gate electrode of the first thin film transistor, the second insulating film and the first insulating film are formed, and the first insulating film is formed. A connection hole located on the first gate electrode and on the second gate electrode of the thin film transistor; and the first gate electrode and the second gate electrode formed in the connection hole and on the second insulating film. And a conductive film electrically connected to each other.

  Further, in the semiconductor device according to the present invention, the first gate electrode of the first thin film transistor is formed on the first conductive film and the first conductive film formed above the channel region and the LDD region. And a second conductive film formed above the channel region.

  The semiconductor device according to the present invention further includes a gate scan electrode line connected to the first gate electrode of the second thin film transistor, and the gate scan electrode line includes the first gate line and the first gate line. It is also possible to have a second gate line formed on the gate line with an insulating film interposed therebetween.

  The semiconductor device according to the present invention further includes a capacitor element formed in the pixel portion and holding a pixel signal transmitted to the pixel portion via the second thin film transistor, A first capacitor electrode formed in the same layer as the first gate electrode, the insulating film formed on the first capacitor electrode, and formed on the insulating film and in the same layer as the second gate electrode It is also possible to comprise the second capacitor electrode.

  The semiconductor device according to the present invention further includes a capacitor element formed in the pixel portion and holding a pixel signal transmitted to the pixel portion via the second thin film transistor, A first capacitor electrode formed in the same layer as the source region and the drain region; the gate insulating film formed on the first capacitor electrode; and the second gate electrode formed on the gate insulating film; It is also possible to consist of a second capacitor electrode formed in the same layer.

  In the semiconductor device according to the present invention, the second gate electrode is preferably formed of a laminated film in which a barrier film and a film made of Al or Al alloy are laminated, or a film made of Al or Al alloy.

  The semiconductor device according to the present invention further includes a third thin film transistor formed in the driver circuit portion, and the third thin film transistor is a transistor having a conductivity type opposite to that of the first thin film transistor. , A source region and a drain region, a first gate electrode formed on the channel region through a gate insulating film, and an insulating film formed on the first gate electrode through the insulating film, and electrically connected to the first gate electrode And a second gate electrode disposed so as to cover at least a part of the drain region.

A semiconductor device according to the present invention includes a semiconductor layer formed on a substrate,
A source region and a drain region formed in the semiconductor layer;
An LDD region formed on at least the drain region side of the semiconductor layer;
A gate insulating film formed on the semiconductor layer;
A first gate electrode formed on the gate insulating film;
A step portion formed on the gate insulating film and positioned on the LDD region;
It is characterized by comprising.

  In the semiconductor device according to the present invention, a second gate electrode formed on the first gate electrode and disposed so as to cover at least a part of the first gate electrode and at least a part of the LDD region may further include It can also be provided.

  As described above, according to the present invention, it is possible to provide a semiconductor device and a method for manufacturing the same that can reduce the manufacturing cost by increasing the efficiency of tact by reducing the number of masks and the number of loading / unloading between devices. be able to. In addition, according to the present invention, it is possible to provide a semiconductor device using a gate electrode material that is inexpensive and has low resistance, and a method for manufacturing the semiconductor device.

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of the present invention will be described below with reference to the drawings.
(Embodiment 1)
1 to 5 are cross-sectional views showing a method of manufacturing an LCD (liquid crystal display) substrate according to Embodiment 1 of the present invention.

First, as shown in FIG. 1A, a glass substrate 1 is prepared, and a base insulating film 2 made of a silicon oxynitride film or the like is formed over the glass substrate 1. The base insulating film 2 is formed as a barrier film (movable ion prevention film) so that the alkali metal contained in the glass substrate does not diffuse into the semiconductor layer. For example, the SiN film having a thickness of 50 to 100 nm and Further, a SiO ₂ film having a thickness of 50 to 100 nm as a stress relaxation layer formed thereon by CVD or sputtering is used. Further, a silicon nitride film containing oxygen (SiNO film) may be used instead of the SiN film, or a silicon oxide film containing SiO2 (SiON film) or TEOS film may be used instead of the SiO ₂ film. Also good. Further, a quartz substrate may be used instead of the glass substrate 1.

  Next, an amorphous silicon film 3 having a thickness of 40 to 100 nm is formed on the base insulating film 2 by using a plasma CVD method, a low pressure CVD method, or a sputtering method.

  Next, a solution containing a metal element, for example, a nickel acetate salt solution containing 1 to 100 ppm of nickel in terms of weight is applied onto the amorphous silicon film 3 by a spin coater using a spinner, and a catalyst element containing layer (not shown) Z). Note that a solution containing nickel is used here, but a solution containing another metal element can also be used. As other metal elements, it is also possible to use one or more selected from the group of iron, cobalt, ruthenium, palladium, osmium, iridium, platinum, copper, gold and the like.

  Thereafter, the substrate 1 is subjected to a heat treatment, for example, at a temperature of 550 ° C. and a heating time of 1 hour, thereby releasing hydrogen contained in the amorphous silicon film. Next, by heating the substrate 1 at a temperature of 500 to 650 ° C. for a heating time of 1 to 24 hours (for example, a heating time of 550 ° C. for 4 hours), as shown in FIG. A crystalline silicon film 3 a is formed on the substrate 2. The heating method at this time may be by laser irradiation.

  Next, in order to improve the crystallinity of the crystalline silicon film 3a, the crystalline silicon film 3a is irradiated with laser light.

  Thereafter, as shown in FIG. 1C, the crystalline silicon film 3a is etched into a desired shape, whereby a semiconductor layer (active layer) 4 made of the crystalline silicon film is formed on the base insulating film 2. ~ 6 are formed.

Next, as shown in FIG. 1D, a gate insulating film 7 made of a SiO ₂ film having a thickness of 100 nm is formed on the semiconductor layers 4 to 6 and the base insulating film 2 by plasma CVD or sputtering. Next, a first conductive film 8 made of a tantalum nitride film having a thickness of 30 to 60 nm is formed on the gate insulating film 7 by sputtering. Next, a second conductive film 9 made of a tungsten film having a thickness of 200 to 400 nm is formed on the first conductive film 8 by sputtering. Note that channel doping for adjusting the threshold voltage of the transistor may be performed before the first conductive film 8 is formed.

  Thereafter, a photoresist film is applied on the second conductive film 9, and the photoresist film is exposed and developed to form a resist pattern on the second conductive film 9.

  Next, as shown in FIG. 2A, the first and second conductive films 8 and 9 are etched into a tapered shape while the resist pattern 10 is retracted.

  Thereafter, as shown in FIG. 2B, only the second conductive film 9 is selectively etched using the resist pattern 10 as a mask. Thereby, the first conductive film 8 is exposed, and the second conductive film 9 is processed so that the exposed length is about 1 μm in the channel direction. Next, the resist pattern 10 is removed.

  Next, a photoresist film is applied over the entire surface including the first and second conductive films 8 and 9, and the photoresist film is exposed and developed to thereby form a resist pattern 11 covering a region where a P-channel thin film transistor is to be formed. Is formed.

Next, the semiconductor layers 4 to 6 are doped with high-concentration N-type impurities such as phosphorus for forming source and drain regions using the resist pattern 11 as a mask. Phosphorus doping conditions vary depending on the thickness of the gate insulating film 7 and the impurity activation conditions, but in this embodiment, since the gate insulating film 7 is formed with a SiO ₂ film of 100 nm, the acceleration voltage is 40 kV and the dose is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ atoms / cm ² . Thus, the N-type impurity is introduced into the source and drain regions 22 to 27 of the semiconductor layers 4 and 6 in the region where the N-channel type thin film transistor is formed, and the end portion of the semiconductor layer 5 in the region where the P-channel type thin film transistor is formed. N-type impurities are also introduced into 28 and 29. Note that the LDD region may be formed by simultaneously doping the semiconductor layer under the exposed portion of the first conductive film 8 during the doping of phosphorus for forming the source and drain regions. Since the controllability is better when the LDD region is doped in the process, in this embodiment, the semiconductor layer under the exposed portion of the first conductive film 8 is hardly doped.

  Thereafter, as shown in FIG. 2C, the exposed portion of the first conductive film 8 is removed by etching the first conductive film 8 using the second conductive film 9 as a mask. The gate electrodes 12 to 15 and the capacitor electrode (capacitor wiring) 16 made of the second conductive films 8 and 9 are formed.

  Next, as shown in FIG. 3A, a low concentration N-type impurity, for example phosphorus, is ion-implanted into the semiconductor layers 4 to 6 to form an LDD region using the gate electrodes 12 to 15 and the capacitor electrode 16 as a mask. To do. As a result, the channel regions 17 to 21 of the N-channel type thin film transistor have substantially the same dimensions as the gate electrodes, and the LDD regions 30, 31, and 34 to 39 are also formed in a self-aligned manner with respect to the gate electrodes. Further, phosphorus is also introduced into the source and drain regions 32 and 33 of the P-channel type thin film transistor. The LDD region may be formed at least on the drain region side.

  As described above, when the high concentration N-type impurity is ion-implanted into the source and drain regions, the first conductive film 8 is used as a mask. When the low-concentration N-type impurity is ion-implanted into the LDD region, the gate electrodes 12 to 15 are used. Since the mask is used as a mask, the number of masks can be reduced and the number of loading / unloading operations between apparatuses can be reduced, and the tact efficiency can be increased.

Thereafter, as shown in FIG. 3B, a photoresist film is applied on the entire surface including the gate electrodes 12 to 15 and the capacitor electrode 16, and the photoresist film is exposed and developed, whereby an N-channel thin film transistor. A resist pattern 40 is formed so as to cover the region where the film is formed. Next, using the resist pattern 40 and the gate electrode 13 as a mask, the semiconductor layer 5 is doped with, for example, boron as a high concentration P-type impurity for forming the source and drain regions.
When phosphorus is doped on the entire surface of the substrate without forming the resist pattern 11, both N-type impurities and P-type impurities are introduced into the semiconductor layer 5 in the boron introduction step. The doping amount needs to exceed the carrier density of the previously introduced N-type impurity, and the boron doping amount is made larger than that of the N-type impurity.

  Next, as shown in FIG. 3C, the resist pattern 40 is removed. In this manner, the driver circuit portion 43 including the N-channel thin film transistor 41 and the P-channel thin film transistor 42 is formed, and the pixel portion 46 including the N-channel thin film transistor 44 and the capacitor 45 is formed.

  In this embodiment, a multi-gate type in which one element has a plurality of gate electrodes is used as the N-channel thin film transistor 44 of the pixel portion 46. However, a single gate structure in which one element has one gate electrode is used. It is also possible to use.

  Thereafter, as shown in FIG. 4A, an insulating film 47 is formed over the entire surface including the gate electrode and the capacitor electrode. The insulating film 47 may be a multilayer film in which a silicon oxide film containing nitrogen (SiON film) and a silicon nitride film (SiN film) are stacked. Next, heat treatment is performed at a temperature of 550 ° C. At this time, since the gate electrode and the electrode are covered with the insulating film 47, the gate electrode and the electrode can be prevented from being oxidized. By this heat treatment, impurities introduced into the semiconductor layer are activated, and Ni contained in the channel region is taken into the high concentration impurity regions (source and drain regions) to perform gettering. For the heat treatment, any of furnace annealing, lamp annealing, and laser annealing may be used. Next, a third conductive film 48 made of a low resistance material is formed on the insulating film 47. The third conductive film 48 may be formed of a laminated film in which a barrier film such as titanium nitride and a film made of Al or Al alloy are laminated, or a film made of Al or Al alloy.

  Next, a photoresist film (not shown) is applied on the third conductive film 48, and the photoresist film is exposed and developed to form a resist pattern on the third conductive film 48. The Next, by etching the third conductive film 48 using this resist pattern as a mask, an insulating film 47 is interposed on the gate electrodes 12 and 13 of the thin film transistors of the driver circuit section 43 as shown in FIG. The second gate electrodes 48 a and 48 b are formed, and the second capacitor electrode 48 c is formed on the capacitor electrode 16 with the insulating film 47 interposed therebetween. The second capacitive electrode 48 c, the insulating film 47 and the capacitive electrode 16 constitute a capacitive element 45.

In this way, the N-channel type thin film transistor 41 of the drive circuit unit 43 has a gate overlap LDD structure, the P-channel type thin film transistor 42 of the drive circuit unit has a gate overlap structure, and the N-channel type thin film transistor 44 of the pixel unit 46 has an LDD structure. It can be. A thin film transistor having a gate overlap structure has a large current driving capability and good resistance to hot carrier deterioration at a power supply voltage of 10 to 20V. In addition, it has been confirmed that the thin film transistor having the LDD structure formed at the same time is effective in suppressing off-leakage current because the LDD region is not covered with the second gate electrode. That is, in a liquid crystal display device that displays a pixel by holding a pixel signal in a capacitor element, it is preferable to use a thin film transistor having an LDD structure that is excellent in suppressing off-leakage current as a switching element of the pixel, and a current driving circuit as a peripheral driver circuit. It is preferable to use a gate overlap LDD structure that is excellent in driving force and excellent in hot carrier deterioration resistance. This is the same for the organic EL display device.
In this embodiment, the P-channel thin film transistor 42 is manufactured as a gate overlap structure, but the present invention is not limited to this, and the P-channel thin film transistor may be manufactured as a single gate structure or an LDD structure. Is possible.

  The second gate electrode is preferably made of a low-resistance metal material in order to reduce the resistance of the gate electrode wiring required as the circuit operation speed increases and the panel size increases. Although it is possible to use Cu or Ag as the low resistance metal material, a single layer film of Al or Al alloy generally used as a source and drain electrode material or a laminated film mainly composed of an Al electrode is used. Is preferred. Such a film has an advantage that it can be easily etched and can use the same apparatus as the formation of the source and drain electrodes. Although Al or Al alloy is inferior in heat resistance, there is no problem because the second gate electrode is formed after heat treatment for activating the impurities. That is, since the heat treatment process at 450 ° C. or higher is completed before the low resistance material film made of Al or Al alloy is formed, there is no problem even if Al or Al alloy is used.

Next, an insulating film containing hydrogen, for example, a silicon nitride film 49, is formed on the entire surface including the second gate electrodes 48a and 48b and the second capacitor electrode 48c by a plasma CVD method, and then a heat treatment for hydrogenation at 350 ° C. or higher. I do. Thereby, the crystal defect part of a semiconductor layer (crystalline silicon film) can be hydrogen-terminated. In this embodiment, the hydrogenation heat treatment is performed after forming the silicon nitride film 49 containing hydrogen. However, after the SiO ₂ film is formed, the atmosphere contains 3 to 100% hydrogen. It is possible to terminate the crystal defect portion with hydrogen by performing a heat treatment at 350 ° C. or higher. Since the relative dielectric constant of the silicon nitride film is about twice that of the SiO ₂ film, the burden of circuit operation can be reduced as compared with the case of using the silicon nitride film, and the capacitance between the electrodes can be reduced. .

  Here, FIG. 4C shows the N-channel thin film transistor 41 of the driver circuit portion 43 shown in FIG. 4B. As shown in FIG. 4C, the second gate electrode 48a may overlap with an end portion of the source region and an end portion of the drain region. On the other hand, FIGS. 4D and 4E are modifications of FIG. 4C. That is, as shown in FIG. 4D, the second gate electrode does not cover the entire low-concentration impurity region (LDD region) but may cover a part thereof, or FIG. As shown in FIG. 3, the second gate electrode may cover the drain side low concentration impurity region and may not cover the source side low concentration impurity region.

  That is, the second gate electrode in the N-channel thin film transistor 41 of the drive circuit unit 43 may be formed so as to be electrically connected to the gate electrode 12 and cover at least a part of the LDD region on the drain region side. Further, the second gate electrode in the P-channel thin film transistor 42 of the drive circuit unit 43 may be formed so as to be electrically connected to the gate electrode and cover at least a part of the drain region.

  Thereafter, as shown in FIG. 5A, an organic insulating film 50 having self-flatness such as acrylic is formed on the silicon nitride film 49. In this embodiment, an organic insulating film such as acrylic is used, but an inorganic insulating film such as a silicon oxide film may be used.

  Next, as shown in FIG. 5B, a pixel electrode 51 made of a transparent conductive film such as ITO is formed on the organic insulating film 50.

  Next, as shown in FIG. 5C, contact holes (connection holes) are formed on the source and drain regions and on the second electrode in the organic insulating film 50, the silicon nitride film 49, the insulating film 47, and the gate insulating film 7. It is formed by an etching method. Next, a conductive film made of a low resistance material is formed in the contact hole and on the organic insulating film 50, and this conductive film is etched. Accordingly, source and drain electrodes 52 to 57 made of conductive films are formed on the N-channel thin film transistor 41, the P-channel thin film transistor 42, and the N-channel thin film transistor 44 of the pixel portion 46, respectively. The second capacitor electrode 48 c and the pixel electrode 51 are connected. The source and drain electrodes 52 to 57 may be single-layer electrodes such as Al and Cu, but in order to prevent diffusion of the electrode material to the semiconductor layer and to prevent hillocks caused by stress migration or the like, A stacked structure in which TiN / Al / TiN / Ti is sequentially stacked from the upper layer may be employed.

Next, a semiconductor device manufactured by the above-described manufacturing method will be described.
FIG. 6 is a plan view showing the semiconductor device according to the first embodiment of the present invention. This semiconductor device shows a drive circuit portion and a pixel portion. 8A is a cross-sectional view taken along line CC ′ and line AA ′ shown in FIG. 6, and FIG. 8C is a cross-sectional view taken along line DD ′ shown in FIG. FIG.

The drive circuit unit is configured as follows.
As shown in FIG. 6 and FIGS. 8A and 8C, the drive circuit section has a glass substrate 1, and a semiconductor layer 4 is formed on the glass substrate 1 with a base insulating film 2 interposed therebetween. Has been. A gate electrode 12 composed of first and second conductive films 8 and 9 is formed on the semiconductor layer 4 via a gate insulating film 7. The semiconductor layer 4 includes a channel region 17 located below the gate electrode 12, LDD regions 30 and 31 located at both ends of the channel region 17, a source located at both ends (opposite to the channel region) of the LDD region, and Drain regions 22 and 23 are formed.

  A second gate electrode 48a made of a third conductive film is formed on the gate electrode 12 with an insulating film 47 interposed therebetween. The second gate electrode 48a covers the gate electrode 12 and the LDD regions 30 and 31, and the source And a portion of the drain region. A silicon nitride film 49 is formed on the second gate electrode 48 a and the insulating film 47, and an organic insulating film 50 is formed on the silicon nitride film 49.

  The organic insulating film 50, the silicon nitride film 49, the insulating film 47, and the gate insulating film 7 have contact holes (connection holes) 50a to 50c located on the source region, the drain region, the gate electrode 12, and the second gate electrode 48a. Is formed. A source electrode 52, a drain electrode 53, and a wiring 58 made of a conductive film are formed in the contact holes 50 a to 50 c and on the organic insulating film 50. The source electrode 52 is electrically connected to the source region 22, the drain electrode 53 is electrically connected to the drain region 23, and the wiring 58 is electrically connected to the gate electrode 12 and the second gate electrode 48a.

  The wiring 58 may be connected to the gate electrode 12 and the second gate electrode 48a by one contact hole as shown in FIG. 8C, but the contact hole is connected as shown in FIG. 8D. The gate electrode 12 and the second gate electrode 48a may be formed separately, and the gate electrode 12 and the second gate electrode 48a may be connected by separate contact holes. By adopting such a structure of the wiring 58 and the contact hole 50c, an increase in the number of processes can be suppressed.

The pixel portion is configured as follows.
As shown in FIGS. 6 and 8A, the pixel portion includes a glass substrate 1, and a semiconductor layer 6 is formed on the glass substrate 1 with a base insulating film 2 interposed therebetween. On the semiconductor layer 6, gate electrodes 14 and 15 and a capacitance electrode (capacitance wiring) 16 including first and second conductive films 8 and 9 are formed via a gate insulating film 7. The semiconductor layer 6 includes channel regions 19 and 20 positioned below the gate electrodes 14 and 15, LDD regions 34 to 37 positioned at both ends of each channel region, and both ends of the LDD region (opposite to the channel region). Positioned source and drain regions 24-26 are formed.

  A second capacitor electrode 48c made of a third conductive film is formed on the capacitor electrode 16 with an insulating film 47 interposed therebetween, so that a sufficient capacity is secured. A gate scanning electrode line 48 d made of a third conductive film is formed on the end portions of the gate electrodes 14 and 15 via an insulating film 47. The third conductive film is made of a low-resistance material, and by forming the gate scanning electrode line 48d with a low-resistance material, it is possible to prevent a delay of an electric signal due to an increase in the size of the panel. A silicon nitride film 49 is formed on the second capacitor electrode 48 c, the gate scanning electrode line 48 d and the insulating film 47, and an organic insulating film 50 is formed on the silicon nitride film 49. A pixel electrode 51 is formed on the organic insulating film 50.

  The organic insulating film 50, the silicon nitride film 49, the insulating film 47, and the gate insulating film 7 have contacts on the source region, the drain region, the gate electrodes 14 and 15, the gate scanning electrode line 48d, and the second capacitor electrode 48c. Holes 50d to 50g are formed. A source electrode (source line) 56, a drain electrode 57 and a wiring 59 made of a conductive film are formed in the contact holes 50 d to 50 g and on the organic insulating film 50. The source electrode 56 is electrically connected to the source region 24, and the drain electrode 57 is electrically connected to the drain region 26. The drain electrode 57 is electrically connected to the second capacitor electrode 48 c and the pixel electrode 51. The wiring 59 is electrically connected to the gate electrodes 14 and 15 and the gate scanning electrode line 48d. Further, the gate scanning electrode line 48 d and the capacitor wiring 16 are arranged so as to intersect the source line 56.

  According to Embodiment 1, the gate overlap LDD structure thin film transistor and the LDD structure thin film transistor can be formed over the same substrate without increasing the number of steps. In addition, after forming a thin film transistor having an LDD structure, a second gate electrode for forming a gate overlap LDD structure and reducing the resistance of the gate electrode wiring is formed after performing a heat treatment for activating the impurity. An Al-based material having low heat resistance can be used. Thereby, even a large image display device can be driven at high speed, and an image display device with excellent image display performance can be realized at low cost.

  In this embodiment, the gate scan electrode line 48d is formed of the third conductive film, but the gate scan electrode line 48d can be formed of the first to third conductive films. In this case, the gate scanning electrode line 48d includes a first gate line made of the first and second conductive films and a second conductive film made of the third conductive film formed on the first gate line via the insulating film 47. And a gate line. Thereby, the delay of the electric signal by the enlargement of a panel can be prevented more.

FIG. 7 is a plan view showing a modification of the semiconductor device according to the first embodiment of the present invention. This semiconductor device shows a drive circuit portion and a pixel portion. FIG. 8B is a cross-sectional view along the line cc ′ and the line BB ′ shown in FIG. 7 and 8B, the same parts as those in FIGS. 6 and 8A are denoted by the same reference numerals, and only different parts will be described.
Note that the cross-sectional view along the line DD ′ shown in FIG. 7 is the same as that shown in FIG.

Since the drive circuit section is the same as that of the first embodiment, description thereof is omitted.
The pixel portion is configured as follows.
As shown in FIGS. 7 and 8B, a source electrode line (source line) 60 made of a third conductive film is formed on the gate insulating film 47. A silicon nitride film 49 is formed on the source line 60, the second capacitor electrode 48 c and the insulating film 47, and an organic insulating film 50 is formed on the silicon nitride film 49.

  In the organic insulating film 50, the silicon nitride film 49, the insulating film 47, and the gate insulating film 7, contact holes (on the source region, the drain region, the gate electrodes 14 and 15, the second capacitor electrode 48c, and the source line 60) Connection holes) 50d to 50h are formed. A gate scanning electrode line 61, a drain electrode 57, and a second wiring 62 made of a conductive film are formed in the contact holes 50d to 50h and on the organic insulating film 50. The gate scanning line 61 is electrically connected to the gate electrodes 14 and 15. The drain electrode 57 is electrically connected to the drain region 26 and is also electrically connected to the second capacitor electrode 48 c and the pixel electrode 51. The second wiring 62 is electrically connected to the source region 24 and the source line 60. Further, the gate scanning electrode line 61 and the capacitor wiring 16 are arranged so as to intersect the source line 60.

  In this modification, the source line 60 is formed of the third conductive film. However, the source line 60 can be formed of the first to third conductive films.

(Embodiment 2)
9 to 11 are sectional views showing a method for manufacturing an LCD substrate according to the second embodiment of the present invention. In this LCD substrate, only an N-channel thin film transistor is formed on the substrate. In the first embodiment, the N-channel thin film transistor and the P-channel thin film transistor are manufactured in the driver circuit portion, whereas the single-channel thin film transistor according to the second embodiment is used for the purpose of process reduction.

  First, as shown in FIG. 9A, a base insulating film 2 is formed on a glass substrate 1, semiconductor layers 4 and 6 are formed on the base insulating film 2, and the semiconductor layers 4 and 6 and the base are formed. A gate insulating film 7 is formed on the insulating film 2, a first conductive film 8 is formed on the gate insulating film 7, and a second conductive film 9 is formed on the first conductive film 8. Then, the second conductive film 9 is etched into a tapered shape. The steps up to here are substantially the same as those in FIGS. 1 to 2A, but the capacitor electrode 16 of Embodiment 1 is not formed in this embodiment.

  Next, as shown in FIG. 9B, high-concentration N-type impurities such as phosphorous for forming the source, drain regions 22 to 26 and the capacitor electrode are formed using the resist pattern 10 and the second conductive film 9 as a mask. Are implanted into the semiconductor layers 4 and 6. The phosphorus ion implantation conditions are the same as in the first embodiment.

  Thereafter, as shown in FIG. 9C, only the second conductive film 9 is selectively etched using the resist pattern 10 as a mask. Thereby, the first conductive film 8 is exposed, and the second conductive film 9 is processed so that the exposed length is about 1 μm in the channel direction.

  Next, as shown in FIG. 9D, the exposed portion of the first conductive film 8 is removed by etching the first conductive film 8 using the resist pattern 10 and the second conductive film 9 as a mask. As a result, gate electrodes 12, 14 and 15 made of the first and second conductive films 8 and 9 are formed.

  Thereafter, as shown in FIG. 10A, the resist pattern 10 is removed. Next, using the gate electrodes 12, 14, and 15 as a mask, a low concentration N-type impurity, for example, phosphorus for forming an LDD region is ion-implanted into the semiconductor layers 4 and 6. As a result, the channel regions 17, 19, and 20 of the N-channel thin film transistor have substantially the same dimensions as the gate electrodes, and the LDD regions 30, 31, and 34 to 37 are also formed in a self-aligned manner with respect to the gate electrodes. . Further, phosphorus is also introduced into the formation region of the capacitor element. The LDD region may be formed at least on the drain region side.

  Next, heat treatment is performed at a temperature of 550 ° C. At this time, since the gate electrode is exposed, heat treatment is performed in an atmosphere with very little oxygen so that the gate electrode is not oxidized. By this heat treatment, impurities introduced into the semiconductor layer are activated, and Ni contained in the channel region is taken into the high concentration impurity regions (source and drain regions) to perform gettering.

  Thereafter, as shown in FIG. 10B, a third conductive film 48 made of a low-resistance material (eg, Al, Cu, Ag, etc.) is formed over the entire surface including the gate electrode.

  Next, as shown in FIG. 10C, a photoresist film is applied on the third conductive film 48, and this photoresist film is exposed and developed, whereby the third conductive film 48 is formed on the third conductive film 48. A resist pattern 63 is formed. Next, by etching the third conductive film 48 using the resist pattern 63 as a mask, a second gate electrode 48a is formed on the gate electrode 12 of the thin film transistor of the drive circuit unit 43, and a high-concentration impurity serving as a capacitor electrode A second capacitor electrode 48 c is formed on the diffusion layer 26 via the gate insulating film 7.

  In this manner, the N-channel thin film transistor in the driver circuit portion 143 can have a gate overlap LDD structure, and the N-channel thin film transistor 144 in the pixel portion 146 can have an LDD structure. A thin film transistor having a gate overlap structure has a large current driving capability and good resistance to hot carrier deterioration at a power supply voltage of 10 to 20V. In addition, it has been confirmed that a thin film transistor having an LDD structure formed at the same time is effective in suppressing off-leakage current. That is, in a liquid crystal display device that displays a pixel by holding a pixel signal in a capacitor element, it is preferable to use a thin film transistor having an LDD structure that is excellent in suppressing off-leakage current as a switching element of the pixel, and a current driving circuit as a peripheral driver circuit. It is preferable to use a gate overlap LDD structure that is excellent in driving force and excellent in hot carrier deterioration resistance. This is the same for the organic EL display device.

  The second gate electrode is preferably a low-resistance metal material, and as the low-resistance metal material, it is preferable to use a single layer film of Al or an Al alloy, or a laminated film mainly composed of an Al electrode, as in the first embodiment. .

  The second capacitive electrode 48c, the gate insulating film 7 and the capacitive electrode 26 constitute a capacitive element 45. By making the capacitive element 45 the same as the thin film transistor structure and making the capacitive electrode 26 the same layer as the source and drain regions, a stable capacitance can be obtained even when the second capacitive electrode 48c is set to 0V. Further, by reducing the thickness of the gate insulating film 7, the area of the capacitor element can be reduced. Therefore, it is preferable that the gate insulating film in the capacitor element formation region be etched to reduce the thickness in the step of etching the first conductive film 8 illustrated in FIG. As a result, the area of the capacitive element can be reduced without increasing the number of etching steps.

  Here, FIG. 10D illustrates an N-channel thin film transistor of the driver circuit portion 143 illustrated in FIG. As shown in FIG. 10D, the second gate electrode 48a may cover the gate electrode 12 and the LDD regions 30 and 31, and may cover part of the drain region 23a. On the other hand, FIGS. 10E and 10F are modified examples of FIG. That is, as shown in FIG. 10E, the second gate electrode may cover a part of the LDD region (low-concentration impurity region) (in other words, the whole may not be covered). 10F, the second gate electrode may cover part of the gate electrode and the low concentration impurity region on the drain region side and may not cover the low concentration impurity region on the source side. . However, the end portion of the second gate electrode may extend from the dotted line a shown in FIG.

  That is, the second gate electrode in the N-channel thin film transistor of the driver circuit portion 143 may be formed so as to be electrically connected to the gate electrode 12 and cover at least part of the LDD region on the drain region side.

  Thereafter, as shown in FIG. 11A, an insulating film containing hydrogen, for example, a silicon nitride film 49 is formed on the entire surface including the second gate electrode 48a and the second capacitor electrode 48c, and then 350 ° C. or higher. A hydrogenation heat treatment is performed. This step is similar to the step of terminating the crystal defect portion of the semiconductor layer shown in FIG.

  Next, a self-flat organic insulating film 50 such as acrylic is formed on the silicon nitride film 49. In this embodiment, an organic insulating film such as acrylic is used, but an inorganic insulating film such as a silicon oxide film may be used.

  Next, as shown in FIG. 11B, a pixel electrode 51 made of a transparent conductive film such as ITO is formed on the organic insulating film 50.

  Next, as shown in FIG. 11C, contact holes (connection holes) are formed in the organic insulating film 50, the silicon nitride film 49, and the gate insulating film 7 over the source and drain regions by an etching method. Next, a conductive film made of a low resistance material is formed in the contact hole and on the organic insulating film 50, and this conductive film is etched. Thus, source and drain electrodes 52, 53, 56, and 57 made of a conductive film are formed on the N-channel thin film transistor in the driver circuit portion 143 and the N-channel thin film transistor 144 in the pixel portion, respectively, and the electrode 57 is formed on the pixel electrode 51. Connected. The source and drain electrodes 52, 53, 56, and 57 may be single-layer electrodes such as Al and Cu. However, the source and drain electrodes 52, 53, 56, and 57 prevent diffusion of the electrode material to the semiconductor layer and prevent hillocks caused by stress migration or the like. In this case, a stacked structure in which TiN / Al / TiN / Ti is sequentially stacked from the upper layer may be employed.

  Differences between the semiconductor device manufactured by the manufacturing method described above and the semiconductor device according to Embodiment 1 will be described.

  Only N-channel thin film transistors are formed in the driver circuit portion 143 and the pixel portion 146, and no P-channel thin film transistors are formed. The capacitor element 145 is for holding a pixel signal transmitted to the pixel through the pixel switching element, and is a capacitor electrode formed of a high-concentration impurity region in the same layer as the source and drain regions of the N-channel thin film transistor 144. And the gate insulating film 7 of the thin film transistor 144 and the second capacitor electrode 48c.

  In the second embodiment, the same effect as in the first embodiment can be obtained.

(Embodiment 3)
12A to 12C are cross-sectional views showing a method for manufacturing an LCD substrate according to Embodiment 3 of the present invention. The same parts as those in FIGS. Explain.
In this LCD substrate, only an N-channel thin film transistor is formed on the substrate. The third embodiment differs from the second embodiment in a gate electrode processing step and an impurity introduction step.

The process illustrated in FIG. 12A is similar to the process illustrated in FIG.
Next, after selectively etching only the second conductive film 9 using the resist pattern 10 as a mask, the resist pattern 10 is removed. Thus, as shown in FIG. 12B, the first conductive film 8 is exposed, and the second conductive film 9 is processed so that the exposed length becomes about 1 μm in the channel direction.

  Next, using the first conductive film 8 and the second conductive film 9 as a mask, high-concentration N-type impurities such as phosphorus ions are formed in the semiconductor layers 4 and 6 for forming the source, drain regions 22 to 26 and the capacitor electrode. inject. The phosphorus ion implantation conditions are the same as in the first embodiment.

  Next, using the second conductive film 9 as a mask, low-concentration N-type impurities, such as phosphorus, for forming LDD regions are ion-implanted into the semiconductor layers 4 and 6. As a result, phosphorus passes through the exposed portion d of the first conductive film 8 and the gate insulating film 7 and is introduced into the LDD regions 30, 31, 34 to 37 of the semiconductor layers 4, 6.

  Thereafter, as shown in FIG. 12C, the exposed portion d of the first conductive film 8 is removed by etching the first conductive film 8 using the second conductive film 9 as a mask. Then, gate electrodes 12, 14 and 15 made of the second conductive films 8 and 9 are formed. The subsequent steps are the same as those shown in FIGS. 10B and 10C and FIGS.

  Also in the third embodiment, the same effect as in the second embodiment can be obtained. In Embodiment 3, ion implantation is performed in the source and drain regions by using the presence or absence of the first conductive film 8 (corresponding to the exposed portion d and the region c) in the step shown in FIG. And the step of implanting ions into the LDD region can be performed continuously. For this reason, the number of times the etching apparatus and the ion implantation apparatus are carried in and out can be reduced as compared with the second embodiment in which these steps are not performed continuously. However, when it is difficult to implant ions through the exposed portion d of the first conductive film 8, it is preferable to use the second embodiment.

  Of the manufacturing steps of the semiconductor device of the first embodiment, the steps corresponding to the steps of FIGS. 12A to 12C shown in the third embodiment are replaced with the steps of FIGS. 12A to 12C. It is also possible to implement.

(Embodiment 4)
13A to 13C are cross-sectional views showing a method for manufacturing an LCD substrate according to the fourth embodiment of the present invention. The same reference numerals are given to the same portions as those in FIGS. 12A to 12C. Only the different parts will be explained.

  The steps up to and including the step shown in FIG. On the gate insulating film 7, gate electrodes 12, 14, 15 made of a first conductive film and a second conductive film are formed. Next, heat treatment is performed at a temperature of 550 ° C. as shown in FIG. At this time, since the gate electrode is exposed, heat treatment is performed in an atmosphere with very little oxygen so that the gate electrode is not oxidized. By this heat treatment, impurities introduced into the semiconductor layer are activated, and Ni contained in the channel region is taken into the high concentration impurity regions (source and drain regions) to perform gettering. Thereafter, a third conductive film 48 made of a low resistance material (for example, Al, Cu, Ag, etc.) is formed on the entire surface including the gate electrode.

  Next, as shown in FIG. 13B, a photoresist film is applied on the third conductive film 48, and this photoresist film is exposed and developed, whereby the third conductive film 48 is formed on the third conductive film 48. A resist pattern 63 is formed. Next, the third conductive film 48 and the first conductive film 8 are etched using the resist pattern 63 and the second conductive film 9 as a mask, so that the second conductive film 48 is formed on the gate electrode 12 of the thin film transistor of the drive circuit unit 43. A gate electrode 48a is formed, the first conductive film 8 exposed from the second conductive film 9 in the pixel portion is removed, and the high-concentration impurity diffusion layer 26 serving as a capacitor electrode is interposed on the first insulating film 7 via the gate insulating film 7. A two-capacitance electrode 48c is formed. The second capacitive electrode 48c, the gate insulating film 7 and the capacitive electrode 26 constitute a capacitive element 45.

  Thus, by performing the etching process of the third conductive film 48 and the etching process of the first conductive film 8 in the same process (simultaneously or successively), the number of masks can be reduced as compared with the case where they are performed in separate processes. It is possible to reduce the number of times of carrying in / out the etching apparatus.

  Thereafter, as shown in FIG. 13C, the resist pattern 63 is removed, and a self-flat organic insulating film 50 such as acrylic is formed on the entire surface including the gate electrode. In this embodiment, an organic insulating film such as acrylic is used, but an inorganic insulating film such as a silicon oxide film may be used. Since the subsequent steps are the same as those in the second embodiment, description thereof is omitted.

  In the fourth embodiment, the same effect as in the first embodiment can be obtained.

  13A to 13C corresponds to the steps of FIGS. 13A to 13C shown in Embodiment Mode 4 among the manufacturing steps of the semiconductor device of Embodiment Modes 1 to 3. It can also be implemented instead.

(Embodiment 5)
14A to 14C are cross-sectional views illustrating a method for manufacturing an LCD substrate according to Embodiment 5 of the present invention. The steps up to and including the step shown in FIG. However, as shown in FIG. 14A, the capacitor electrode 16 formed of the first conductive film 8 and the second conductive film 9 is formed in the capacitor element formation region of the pixel portion, and the third semiconductor. The difference is that the layer 6 is separated into a capacitor element formation region and a thin film transistor formation region.

  Next, an insulating film 47 is formed over the entire surface including the gate electrode and the capacitor electrode. Next, heat treatment is performed at a temperature of 550 ° C. At this time, since the gate electrode and the electrode are covered with the insulating film 47, the gate electrode and the electrode can be prevented from being oxidized. By this heat treatment, impurities introduced into the semiconductor layer are activated, and Ni contained in the channel region is taken into the high concentration impurity regions (source and drain regions) to perform gettering. Next, a third conductive film 48 made of a low resistance material is formed on the insulating film 47.

  Next, as shown in FIG. 14B, a photoresist film is applied on the third conductive film 48, and this photoresist film is exposed and developed, whereby the third conductive film 48 is formed on the third conductive film 48. A resist pattern 63 is formed. Next, the third conductive film 48, the insulating film 47, and the first conductive film 8 are etched using the resist pattern 63 and the second conductive film 9 as a mask. As a result, the second gate electrode 48a is formed on the gate electrode 12 of the thin film transistor of the drive circuit section 43 via the insulating film 47, and the first conductive film 8 exposed from the second conductive film 9 of the pixel section is formed. The third conductive film 48 d is left on the capacitor electrode 16 with the insulating film 47 interposed therebetween. Note that the insulating film 47 and the gate insulating film 7 can also be used as the insulating film of the capacitor.

  Thus, by performing the etching process of the third conductive film 48 and the etching process of the first conductive film 8 in the same process (simultaneously or successively), the number of masks can be reduced as compared with the case where they are performed in separate processes. By doing so, the number of times of carrying in and out of the etching apparatus can be reduced.

  Thereafter, as shown in FIG. 14C, the resist pattern 63 is removed, and an organic insulating film 50 having self-flatness such as acrylic is formed on the entire surface including the gate electrode. In this embodiment, an organic insulating film such as acrylic is used, but an inorganic insulating film such as a silicon oxide film may be used. Since the subsequent steps are the same as those in the second embodiment, description thereof is omitted.

  In the fifth embodiment, the same effect as in the first embodiment can be obtained.

  14A to 14C corresponds to the steps of FIGS. 14A to 14C shown in Embodiment Mode 5 among the manufacturing steps of the semiconductor devices of Embodiment Modes 1 to 4. It can also be implemented instead.

(Embodiment 6)
15A to 15D are cross-sectional views illustrating a method for manufacturing an LCD substrate according to Embodiment 6 of the present invention. Since the steps up to and including the step shown in FIG. 12B of Embodiment 3 are the same, the following steps will be described.

  As shown in FIG. 15A, the second conductive film 9 is used as a mask to etch the first conductive film 8 in a tapered shape while retreating. At this time, since the gate insulating film 7 is also etched, a step is generated in the gate insulating film located on the LDD region.

  Next, heat treatment is performed at a temperature of 550 ° C. At this time, since the gate electrode is exposed, heat treatment is performed in an atmosphere with very little oxygen so that the gate electrode is not oxidized. By this heat treatment, impurities introduced into the semiconductor layer are activated, and Ni contained in the channel region is taken into the high concentration impurity regions (source and drain regions) to perform gettering.

  Thereafter, as shown in FIG. 15B, a third conductive film 48 made of a low-resistance material (eg, Al, Cu, Ag, etc.) is formed over the entire surface including the gate electrode.

  Next, as shown in FIG. 15C, a photoresist film is applied over the third conductive film 48, and this photoresist film is exposed and developed, whereby the third conductive film 48 is formed on the third conductive film 48. A resist pattern 63 is formed. Next, the third conductive film 48 and the first conductive film 8 are etched using the resist pattern 63 and the second conductive film 9 as a mask. As a result, the second gate electrode 48a is formed on the gate electrode 12 of the thin film transistor in the drive circuit unit 43, the first conductive film 8 exposed from the second conductive film in the thin film transistor in the pixel unit 46 is removed, and the capacitance A second capacitor electrode 48 c is formed on the high-concentration impurity diffusion layer 26 serving as an electrode through the gate insulating film 7. The second capacitive electrode 48c, the gate insulating film 7 and the capacitive electrode 26 constitute a capacitive element 45.

  Thereafter, as shown in FIG. 15D, the resist pattern 63 is removed, and an organic insulating film 50 having self-flatness such as acrylic is formed on the entire surface including the gate electrode. In this embodiment, an organic insulating film such as acrylic is used, but an inorganic insulating film such as a silicon oxide film may be used. Since the subsequent steps are the same as those in the second embodiment, description thereof is omitted.

  In the sixth embodiment, the same effect as in the second embodiment can be obtained. Further, as shown in FIG. 15D, since a step is formed in the gate insulating film 7 located on the LDD region (low concentration impurity region) of the thin film transistor, the thickness of the gate insulating film in the region e and the region f. Is different. Therefore, the film thickness of the gate insulating film on the LDD region can be changed stepwise. That is, when the transistor is used, the electric field strength differs between the region e and the region f, and the electric field strength in the region f can be made smaller than that in the region e. As a result, it is possible to obtain an effect (electric field relaxation effect) that moderates the change in electric field strength in the LDD region.

  Note that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, the capacitive element according to the first embodiment can be used as a capacitive element according to another embodiment, and the capacitive element according to the second embodiment can also be used as a capacitive element according to another embodiment. In addition, the capacitive element according to the fifth embodiment can be used as a capacitive element according to another embodiment.

(A)-(D) are sectional drawings which show the preparation methods of the LCD substrate by Embodiment 1 of this invention. (A)-(C) show the manufacturing method of the LCD substrate by Embodiment 1 of this invention, and are sectional drawings which show the process following FIG.1 (D). (A)-(C) show the manufacturing method of the LCD substrate by Embodiment 1 of this invention, and are sectional drawings which show the process following FIG.2 (C). (A), (B) is a sectional view showing a method for manufacturing an LCD substrate according to Embodiment 1 of the present invention and showing the next step of FIG. 3 (C). FIG. 7B is a cross-sectional view of an N-channel thin film transistor in a driving circuit section shown in FIG. 5B, and FIGS. 5D and 5E are cross-sectional views showing a modification of the N-channel thin film transistor shown in FIG. (A)-(C) are the manufacturing methods of the LCD substrate by Embodiment 1 of this invention, and are sectional drawings which show the process following FIG. 4 (B). 1 is a plan view showing a semiconductor device according to a first embodiment of the present invention. It is a top view which shows the modification of the semiconductor device by Embodiment 1 of this invention. (A) is sectional drawing along the CC 'line and AA' line shown in FIG. 6, (B) is along the cc 'line and BB' line shown in FIG. FIG. 6C is a cross-sectional view taken along the line DD ′ shown in FIG. 6. (A)-(D) are sectional drawings which show the preparation methods of the LCD substrate by Embodiment 2 of this invention. FIGS. 9A to 9C are cross-sectional views illustrating a method for manufacturing an LCD substrate according to Embodiment 2 of the present invention and illustrating the next step of FIG. 9D, and FIG. FIG. 6C is a cross-sectional view of an N-channel thin film transistor in a driving circuit section shown in FIG. 3C, and FIGS. 5E and 5F are cross-sectional views showing modifications of the N-channel thin film transistor shown in FIG. (A)-(C) show the manufacturing method of the LCD substrate by Embodiment 2 of this invention, and are sectional drawings which show the process following FIG.10 (C). (A)-(C) are sectional drawings which show the manufacturing method of the LCD substrate by Embodiment 3 of this invention. (A)-(C) are sectional drawings which show the preparation methods of the LCD substrate by Embodiment 4 of this invention. (A)-(C) are sectional drawings which show the preparation methods of the LCD substrate by Embodiment 5 of this invention. (A)-(D) are sectional drawings which show the preparation methods of the LCD substrate by Embodiment 6 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Glass substrate 2 ... Base insulating film 3 ... Amorphous silicon film 3a ... Crystalline silicon film 4-6 ... Semiconductor layer (active layer)
DESCRIPTION OF SYMBOLS 7 ... Gate insulating film 8 ... 1st electrically conductive film 9 ... 2nd electrically conductive film 10, 11 ... Resist pattern 12-15 ... Gate electrode 16 ... Capacitance electrode (capacitance wiring)
17 to 21 Channel region 22 to 27 Source and drain regions 28 and 29 End portions of the semiconductor layer 30, 31, 34 to 39 Low concentration impurity region (LDD region)
32, 33 ... Source and drain regions 40 ... Resist pattern 41, 44 ... N channel type thin film transistor 42 ... P channel type thin film transistor 43 ... Drive circuit part 45 ... Capacitor element 46 ... Pixel part 47 ... Insulating film 48 ... Third conductive film 48a, 48b ... second gate electrode 48c ... second capacitor electrode 48d ... gate scanning electrode line 49 ... silicon nitride film 50 ... organic insulating film 50a-50g ... contact hole (connection hole)
51 ... Pixel electrodes 52-57 ... Source and drain electrodes 58, 59 ... Wiring 60 ... Source electrode lines (source lines)
61 ... Gate scanning electrode line 62 ... Second wiring 63 ... Resist pattern 143, 144 ... N-channel type thin film transistor 145 ... Capacitance element

Claims (12)

Forming a first semiconductor layer in the drive circuit portion on the substrate and forming a second semiconductor layer in the pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a source region and a drain region in each of the first semiconductor layer and the second semiconductor layer by introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer;
Two first gate electrodes and a first capacitor electrode are formed on the second semiconductor layer via the gate insulating film, and the first gate electrode is formed on the first semiconductor layer via the gate insulating film. Forming a step;
By introducing a second impurity into each of the first semiconductor layer and the second semiconductor layer, LDD regions are formed on the source region side and the drain region side of the first semiconductor layer and the second semiconductor layer, respectively. Forming, and
Forming a first insulating film on the first gate electrode , the first capacitor electrode, and the gate insulating film;
By performing heat treatment, impurities in the source region, the drain region, and the LDD region are activated, and then a second gate electrode is formed on the first gate electrode of the drive circuit portion via the first insulating film. Forming and forming a second capacitor electrode on the first capacitor electrode of the pixel portion via the first insulating film ;
Comprising
The second gate electrode, a semiconductor, characterized in that the pre-Symbol connected first gate electrode and electrically, is formed so as to cover at least a part of the LDD region in the driving circuit portion in the driver circuit portion Device fabrication method. Oite to claim 1, a method for manufacturing a semiconductor device wherein the first insulating film is a multilayer film formed by laminating a SiON film and the SiN film. Forming a first semiconductor layer in the drive circuit portion on the substrate and forming a second semiconductor layer in the pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a source region and a drain region in each of the first semiconductor layer and the second semiconductor layer by introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer;
A first gate electrode is formed on the first semiconductor layer via the gate insulating film, and a first gate electrode and a first capacitor electrode are formed on the second semiconductor layer via the gate insulating film. Process,
By introducing a second impurity into each of the first semiconductor layer and the second semiconductor layer, LDD regions are formed on the source region side and the drain region side of the first semiconductor layer and the second semiconductor layer, respectively. Forming, and
Forming an insulating film on the first gate electrode, the first capacitor electrode, and the gate insulating film;
By performing the heat treatment, the source region, the drain region and activating the impurity of the LDD region, then the said pixel unit to form the second gate electrode before SL on the insulating film of the driver circuit portion Forming a second capacitor electrode on the first capacitor electrode via the insulating film;
Comprising
The semiconductor device, wherein the second gate electrode is electrically connected to the first gate electrode in the drive circuit portion and covers at least a part of the LDD region in the drive circuit portion. Manufacturing method. Forming a first semiconductor layer in the drive circuit portion on the substrate and forming a second semiconductor layer in the pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer and the second semiconductor layer on the gate insulating film;
By introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer using the conductive film as a mask, a source region and a drain region are respectively added to the first semiconductor layer and the second semiconductor layer. Forming a step;
By processing the conductive film, a first gate electrode made of the conductive film is formed on the first semiconductor layer via the gate insulating film, and the gate insulating film is formed on the second semiconductor layer. Forming a first gate electrode and a first capacitor electrode made of the conductive film through,
By introducing a second impurity into each of the first semiconductor layer and the second semiconductor layer using the first gate electrode as a mask, the source region side of each of the first semiconductor layer and the second semiconductor layer And forming a LDD region on the drain region side;
Forming an insulating film on the first gate electrode, the first capacitor electrode, and the gate insulating film;
By performing heat treatment, impurities in the source region, the drain region, and the LDD region are activated, and then a second gate electrode is formed on the insulating film of the driver circuit portion and the first portion of the pixel portion is formed . Forming a second capacitor electrode on the one capacitor electrode via the insulating film;
Comprising
The semiconductor device, wherein the second gate electrode is electrically connected to the first gate electrode in the drive circuit portion and covers at least a part of the LDD region in the drive circuit portion. Manufacturing method. Forming a first semiconductor layer and a second semiconductor layer in a drive circuit portion on a substrate and forming a third semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer on the gate insulating film;
Forming a first resist mask overlying the second semiconductor layer;
By introducing an N-type first impurity into each of the first semiconductor layer and the third semiconductor layer using the first resist mask and the conductive film as a mask, the first semiconductor layer and the third semiconductor layer are introduced. Forming a source region and a drain region in each of the semiconductor layers;
Removing the first resist mask;
By processing the conductive film, a first gate electrode made of the conductive film is formed on each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer with the gate insulating film interposed therebetween. Forming, and
By introducing an N-type second impurity into each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer using the first gate electrode as a mask, the first semiconductor layer and the first semiconductor layer Forming an LDD region in each of the three semiconductor layers;
Forming a second resist mask covering above the first semiconductor layer and the third semiconductor layer;
Forming a source region and a drain region in the second semiconductor layer by introducing a P-type impurity into the second semiconductor layer using the second resist mask and the first gate electrode as a mask;
Removing the second resist mask;
Forming an insulating film on the first gate electrode and the gate insulating film;
Activating impurities in the source region, the drain region, and the LDD region by performing a heat treatment, and then forming a second gate electrode on the insulating film of the drive circuit unit;
Comprising
The second gate electrode above the first semiconductor layer is electrically connected to the first gate electrode on the first semiconductor layer, and at least a part of the LDD region of the first semiconductor layer Is formed to cover
The second gate electrode above the second semiconductor layer is electrically connected to the first gate electrode on the second semiconductor layer, and at least a part of the drain region of the second semiconductor layer A method for manufacturing a semiconductor device, characterized by comprising: Forming a first semiconductor layer and a second semiconductor layer in a drive circuit portion on a substrate and forming a third semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer on the gate insulating film;
Forming a first resist mask overlying the second semiconductor layer;
By introducing an N-type first impurity into each of the first semiconductor layer and the third semiconductor layer using the first resist mask and the conductive film as a mask, the first semiconductor layer and the third semiconductor layer are introduced. Forming a source region and a drain region in each of the semiconductor layers;
Removing the first resist mask;
By processing the conductive film, two first gate electrodes made of the conductive film are formed on the third semiconductor layer via the gate insulating film, and the second semiconductor layer and the first semiconductor layer are formed . Forming a first gate electrode made of the conductive film on each of the semiconductor layers via the gate insulating film;
By introducing an N-type second impurity into each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer using the first gate electrode as a mask, the first semiconductor layer and the first semiconductor layer Forming an LDD region in each of the three semiconductor layers;
Forming a second resist mask covering above the first semiconductor layer and the third semiconductor layer;
Forming a source region and a drain region in the second semiconductor layer by introducing a P-type impurity into the second semiconductor layer using the second resist mask and the first gate electrode as a mask;
Removing the second resist mask;
Forming an insulating film on the first gate electrode and the gate insulating film;
By performing a heat treatment, impurities in the source region, the drain region, and the LDD region are activated, and then, the first gate electrode above the first semiconductor layer and the second semiconductor layer above Forming a second gate electrode on each of the first gate electrodes via the insulating film;
Comprising
The second gate electrode above the first semiconductor layer, said previous SL above the first semiconductor layer is connected first gate electrode and electrically, at least of the LDD region of said first semiconductor layer Formed to cover a part,
The second gate electrode above the second semiconductor layer is electrically connected to the first gate electrode above the second semiconductor layer, and is at least one of the drain regions of the second semiconductor layer. A method for manufacturing a semiconductor device, characterized by being formed so as to cover a portion. Forming a first semiconductor layer and a second semiconductor layer in a drive circuit portion on a substrate and forming a third semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer on the gate insulating film;
Forming a first resist mask overlying the second semiconductor layer;
By introducing an N-type first impurity into each of the first semiconductor layer and the third semiconductor layer using the first resist mask and the conductive film as a mask, the first semiconductor layer and the third semiconductor layer are introduced. Forming a source region and a drain region in each of the semiconductor layers;
Removing the first resist mask;
By processing the conductive film, a first gate electrode made of the conductive film is formed on the first semiconductor layer and the second semiconductor layer via the gate insulating film, and the third semiconductor layer is formed. Forming a first gate electrode and a first capacitor electrode made of the conductive film on the semiconductor layer via the gate insulating film;
By introducing an N-type second impurity into each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer using the first gate electrode as a mask, the first semiconductor layer and the first semiconductor layer Forming an LDD region in each of the three semiconductor layers;
Forming a second resist mask covering above the first semiconductor layer and the third semiconductor layer;
Forming a source region and a drain region in the second semiconductor layer by introducing a P-type impurity into the second semiconductor layer using the second resist mask and the first gate electrode as a mask;
Removing the second resist mask;
Forming an insulating film on the first gate electrode, the first capacitor electrode, and the gate insulating film;
By performing heat treatment, impurities in the source region, the drain region, and the LDD region are activated, and then a second gate electrode is formed on the insulating film of the driver circuit portion and the first portion of the pixel portion is formed. Forming a second capacitor electrode on the one capacitor electrode via the insulating film;
Comprising
The second gate electrode above the first semiconductor layer is electrically connected to the first gate electrode on the first semiconductor layer, and at least a part of the LDD region of the first semiconductor layer Is formed to cover
The second gate electrode above the second semiconductor layer is electrically connected to the first gate electrode on the second semiconductor layer, and at least a part of the drain region of the second semiconductor layer A method for manufacturing a semiconductor device, characterized by comprising: Forming a first semiconductor layer and a second semiconductor layer in a drive circuit portion on a substrate and forming a third semiconductor layer in a pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer;
Forming a conductive film located above each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer on the gate insulating film;
Forming a first resist mask overlying the second semiconductor layer;
By introducing an N-type first impurity into each of the first semiconductor layer and the third semiconductor layer using the first resist mask and the conductive film as a mask, the first semiconductor layer and the third semiconductor layer are introduced. Forming a source region and a drain region in each of the semiconductor layers;
Removing the first resist mask;
By processing the conductive film, a first gate electrode made of the conductive film is formed on the first semiconductor layer and the second semiconductor layer via the gate insulating film, and the third semiconductor layer is formed. Forming two first gate electrodes and a first capacitor electrode made of the conductive film on the semiconductor layer via the gate insulating film;
By introducing an N-type second impurity into each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer using the first gate electrode as a mask, the first semiconductor layer and the first semiconductor layer Forming an LDD region in each of the three semiconductor layers;
Forming a second resist mask covering above the first semiconductor layer and the third semiconductor layer;
Forming a source region and a drain region in the second semiconductor layer by introducing a P-type impurity into the second semiconductor layer using the second resist mask and the first gate electrode as a mask;
Removing the second resist mask;
Forming an insulating film on the first gate electrode, the first capacitor electrode, and the gate insulating film;
By performing heat treatment, impurities in the source region, the drain region, and the LDD region are activated, and then a second gate electrode is formed on the insulating film of the driver circuit unit, and the pixel unit Forming a second capacitor electrode on the first capacitor electrode via the insulating film;
Comprising
The second gate electrode above the first semiconductor layer, said previous SL above the first semiconductor layer is connected first gate electrode and electrically, at least of the LDD region of said first semiconductor layer Formed to cover a part,
The second gate electrode above the second semiconductor layer is electrically connected to the first gate electrode above the second semiconductor layer, and is at least one of the drain regions of the second semiconductor layer. A method for manufacturing a semiconductor device, characterized by being formed so as to cover a portion. Forming a first semiconductor layer in the drive circuit portion on the substrate and forming a second semiconductor layer in the pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a first conductive film located above each of the first semiconductor layer and the second semiconductor layer on the gate insulating film;
Forming a second conductive film on the first conductive film;
The first conductive film is processed so as to remain above the channel region and LDD region of the semiconductor layer and the second conductive film is left above the channel region of the semiconductor layer. Forming a first gate electrode comprising the first conductive film and the second conductive film;
By introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer using the first gate electrode as a mask, a source region and a first region are introduced into the first semiconductor layer and the second semiconductor layer, respectively. A drain region is formed, and a second impurity is introduced into each of the first semiconductor layer and the second semiconductor layer using the second conductive film of the first gate electrode as a mask, whereby the first semiconductor layer and Forming LDD regions on the source region side and the drain region side of each of the second semiconductor layers;
Performing a heat treatment to activate impurities in the source region, the drain region, and the LDD region, and then forming a third conductive film on the first gate electrode and the gate insulating film;
Forming a resist mask on the third conductive film so as to cover the channel region and the LDD region of the first semiconductor layer;
The third conductive film and the first conductive film are etched using the resist mask and the second conductive film of the first gate electrode as a mask, so that the first gate electrode and the gate insulating film of the driving circuit portion are etched. Forming a second gate electrode made of the third conductive film thereon and removing the first conductive film existing above the LDD region of the second semiconductor layer of the pixel portion;
Comprising
The method for manufacturing a semiconductor device, wherein the second gate electrode is formed so as to cover at least a part of the first gate electrode and at least a part of the LDD region in the driver circuit portion. Forming a first semiconductor layer in the drive circuit portion on the substrate and forming a second semiconductor layer in the pixel portion on the substrate;
Forming a gate insulating film on the first semiconductor layer and the second semiconductor layer;
Forming a first conductive film located above each of the first semiconductor layer and the second semiconductor layer on the gate insulating film;
Forming a second conductive film on the first conductive film;
The first conductive film is processed so as to remain above the channel region and LDD region of the semiconductor layer and the second conductive film is left above the channel region of the semiconductor layer. Forming a first gate electrode comprising the first conductive film and the second conductive film;
By introducing a first impurity into each of the first semiconductor layer and the second semiconductor layer using the first gate electrode as a mask, a source region and a first region are introduced into the first semiconductor layer and the second semiconductor layer, respectively. A drain region is formed, and a second impurity is introduced into each of the first semiconductor layer and the second semiconductor layer using the second conductive film of the first gate electrode as a mask, whereby the first semiconductor layer and Forming LDD regions on the source region side and the drain region side of each of the second semiconductor layers;
Forming an insulating film on the first gate electrode and the gate insulating film;
Performing a heat treatment to activate impurities in the source region, the drain region, and the LDD region, and then forming a third conductive film on the insulating film;
Forming a resist mask on the third conductive film so as to cover the channel region and the LDD region of the first semiconductor layer;
The third conductive film, the insulating film, and the first conductive film are etched using the resist mask and the second conductive film of the first gate electrode as a mask, so that the first gate electrode and the A second gate electrode made of the third conductive film is formed on the gate insulating film via the insulating film, and a first conductive film existing above the LDD region of the second semiconductor layer of the pixel portion is formed. Removing, and
Comprising
The method for manufacturing a semiconductor device, wherein the second gate electrode is formed so as to cover at least a part of the first gate electrode and at least a part of the LDD region in the driver circuit portion. In claims 3 to any one of claims 8 and 10. The method for manufacturing a semiconductor device, wherein the insulating film has a multilayer film formed by laminating a SiON film and the SiN film. In claims 1 to 11, a method for manufacturing a semiconductor device wherein the second gate electrode, characterized in that it is formed with a film made of Al or Al alloy.

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