JP4393903B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine such as a pachinko gaming machine in which a player plays a predetermined game and a predetermined number of game media are paid out as prizes.

  As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a prize area such as a prize opening provided in the game area, a predetermined number of prize balls are paid out to the player. There is something to be done. The game medium is paid out by a payout device. The payout device is generally controlled by a payout control means including a payout control microcomputer mounted on the payout control board. Since the progress of the game is controlled by game control means including a game control microcomputer mounted on the main board, information that can specify the number of winning balls based on the winning of the game medium in the winning area is obtained from the game control means. It is transmitted to the payout control means.

  The number of winning balls corresponding to the winning is determined, for example, as 10 or 15, depending on each of the plurality of winning areas provided. There are some gaming machines that pay out a ball for each win when a win occurs, but in order to shorten the total payout time, if consecutive wins occur, a prize ball based on multiple wins is awarded. There are also gaming machines that pay out in a lump without dividing. For example, when winnings corresponding to 10 winning balls are generated three times in succession, 30 winning balls are continuously paid out in a lump.

  Further, when the payout control means is performing the prize ball payout control, if the information regarding the new prize ball payout is received from the game control means, the payout control means newly sets the number of unpaid prize balls at that time. There is a gaming machine that controls such that the number of prize balls is added and paid out in a lump including prize balls based on newly generated winnings (see, for example, Patent Document 1).

Japanese Patent Laid-Open No. 2001-212321 (paragraphs 0039-0048, FIGS. 4 and 5)

  However, in the gaming machine described in Patent Document 1, the payout sensor that detects the game ball after it has been paid out from the payout device driven by the payout motor has detected the last game ball (by detecting the game ball). On the condition that the value stored in the payout number storage area has become 0), the payout motor is stopped assuming that the payout of the game ball has ended. Then, when the payout sensor detects the last game ball, there is a possibility that a new game ball is paid out by driving the payout motor. That is, there is a problem that the accuracy of the continuous payout control that is not divided for each prize ball that is executed in order to realize quick prize ball payout is low.

  Therefore, an object of the present invention is to provide a gaming machine that can perform more reliable payout control while realizing quick payout of game media.

In the gaming machine according to the present invention, a player plays a predetermined game, and pays out a predetermined number of game media as a prize according to the establishment of a predetermined payout condition (for example, a winning of a game ball into a winning opening). A payout control command transmitting means for controlling the progress of a game and transmitting a payout control command (for example, a payout control command for a prize ball number command) for instructing a payout number of game media when a predetermined payout condition is satisfied. (For example, a game control microcomputer including a CPU 56) including a game ball control unit (for example, a part for executing a prize ball process shown in FIG. 18), a payout unit (for example, a ball payout device 97) for paying out game media, and a payout A payout drive means (for example, payout motor 289) for driving the means to pay out the game medium, and a payout for controlling the payout drive means in accordance with a payout control command received from the game control means Control means (for example, a payout control microcomputer including a payout control CPU 371), and the payout control means stores data indicating the payout number of game media in accordance with the payout control command. For example, a prize ball payout scheduled total counter formed in the RAM of the payout control microcomputer and payout control command receiving means for receiving payout control commands (for example, a part for executing command reception interrupt processing in the payout control means, 26) and when the payout control command receiving means receives the payout control command, the adding means for adding the payout number instructed by the payout control command to the data stored in the prize game medium number data storage means (For example, refer to FIG. 27 for a part for executing a command analysis process in the payout control means) When the stored data indicates that there is a game medium to be paid out, payout starting means for starting driving of the payout driving means (for example, steps S631 to S635 and steps S627 and S628 in the payout control means). And an increase determination means for determining whether or not the data stored in the prize game medium number data storage means has increased when the payout driving means is driving the payout means (for example, payout) A portion for executing the process of step S694 in the control means) and an increase number specifying means for specifying the increase number when the increase determining means determines that the data is increasing (for example, the process of step S695 in the payout control means) A portion for executing a process for calculating the difference between the two) and a drive amount until the payout of the game medium of the payout driving means can be specified. Drive amount data storage means (for example, a payout operation counter) for storing data, and drive amount update means (for example, subtract the data stored in the drive amount data storage means by the amount corresponding to the drive amount of the payout drive means) The portion of the payout control means that executes the processing of step S513), and when the payout driving means is driving the payout means, data indicating the drive amount according to the increase number specified by the increase number specifying means Drive amount data addition means (for example, a portion for executing addition processing in step S695 in the payout control means) for executing drive amount addition processing for adding to the data stored in the data storage means, and payout drive means by the payout start means after the driving of is started, Day driving amount data addition means regardless of whether performing the drive amount addition processing, the driving amount data storage means stores Payout stop means (for example, the value of the payout operation counter in the payout motor brake process of step S525 in the payout control means) that stops the driving of the payout drive means when the value reaches the value (for example, 0) corresponding to the end of payout of the game medium. And a portion for executing a process of stopping the driving of the payout motor 289 in response to the value of 0 becoming zero).

  The payout control means holds the data stored in the prize game medium number data storage means when the drive amount data addition means adds the data, the previous prize game medium number data storage means (for example, the RAM in the payout control microcomputer) And the increase determination means includes data stored in the prize game medium number data storage means and data stored in the previous prize game medium number data storage means. Are compared to determine whether or not the data has increased (for example, by the process of step S694), and the increase number specifying means determines the data stored in the prize game medium number data storage means and the previous prize game medium number data. The difference from the data stored in the storage means is specified as the increase number (for example, by the process of step S695) It may be configured.

  The prize game medium number data that sets the data stored in the prize game medium number data storage means to the previous prize game medium number data storage means when the payout control means determines that the data has increased. It may be configured to include setting means (for example, a part for executing the process of step S697 in the payout control means).

  When the payout control means finishes paying out the game media, the payout control means executes initialization means (for example, the process of step S672 in the payout control means) that initializes the data set in the last prize game medium number data storage means. Part).

  Included is a payout detection means (for example, a payout number count switch 301) that detects a game medium paid out from the payout means and outputs a detection signal only to the payout control means, and the payout control means indicates a game media lending request. Lending control means for controlling the payout driving means based on the lending control command (for example, the BRQ signal from the card unit 50) to perform the gaming medium lending control (for example, the part for executing the processing of steps S623 to S628 in the payout control means) And a prize ball lending control process (see FIG. 30), and the detection signal input from the payout detecting means detects the prize game medium paid out based on the payout control command. A payout determination means (for example, a payout control means) for determining whether the signal is a detection signal of a game medium paid out based on a loan control command. And the number of prize game media based on the detection signal when the payout determination means determines that the signal is a detection signal for the prize game medium paid out based on the payout control command. There may be provided a prize game medium number subtraction means (for example, a portion for executing the processing of steps S602 and S604A in the payout control means) for subtracting the data stored in the data storage means.

  The game control means includes a game control microcomputer, and a plurality of effect control microcomputers (for example, display) for controlling effect devices (for example, variable display device 9, lamp / LED, speaker 27) for performing game effects, respectively. A control microcomputer, a light emitter control microcomputer, a voice control microcomputer), a game control board (for example, a display control board 80, a lamp control board 35, and a voice control board 70) on which game control means is mounted; A game control microcomputer and a plurality of effect control microcomputers mounted on a power supply board (for example, power supply board 910) for supplying power to a plurality of effect control boards on which each of the plurality of effect control microcomputers is mounted. System reset for system reset Power supply monitoring means (for example, a power supply monitoring circuit 920) for outputting a video signal, and a specific effect control microcomputer (for example, a display control microcomputer) among the plurality of effect control microcomputers is provided from the game control means. A process for receiving a transmitted control signal (for example, a display control command), and a control signal (for example, a lamp control command) for another effect control microcomputer (for example, a light emitter control microcomputer, a sound control microcomputer). Voice control command) is transmitted, and the power supply monitoring means does not go through the effect control board (for example, the display control board 80) on which the specific effect control microcomputer is mounted, and other effect control micros Production control board with a computer (for example, lamp control) Plate 35 may be configured to output the system reset signal to the voice control board 70).

  A predetermined payout condition is established by winning a game medium in each of a plurality of winning areas provided in the gaming area, and a winning medium is detected according to each of the plurality of winning areas and a winning detection signal is generated. Game medium detection means (for example, prize opening switches 29a, 30a, 33a, 39a, count switch 23 and start opening switch 14a) to be output to the game control means are provided, and the payout control command transmission means is used to input a prize detection signal. In response, the payout control command may be transmitted immediately (allowing a delay of several ms for control).

  The payout control means includes a payout control microcomputer, and the payout control command transmission means transmits a take-in control command indicating the payout number of game media and a take-in signal (for example, a payout INT signal) instructing the take-in of the payout control command. The take-in signal is connected to the interrupt terminal of the payout control microcomputer (see FIG. 5), and the payout control command receiving means is activated based on the input of the take-in signal to the interrupt terminal. It may be configured to receive a payout control command (for example, the processes in steps S853 and S855) by the loading process (see FIG. 26).

According to the first aspect of the present invention, the game machine includes an adding means for adding the number of payouts instructed by the payout control command to data stored in the prize game medium number data storage means, and a prize game medium number data storage means. An increase determination means for determining whether or not the stored data has increased, an increase number specifying means for specifying the increase number when it is determined that the increase determination means is increasing, and a payout drive means is a payout means Drive amount data for performing drive amount addition processing for adding data indicating the drive amount according to the increase number specified by the increase number specifying means to the data stored in the drive amount data storage means when driving Data stored in the drive amount data storage means regardless of whether or not the drive amount data addition means has executed the drive amount addition processing after the addition means and the drive of the payout drive means are started by the payout start means . Play Since it has a structure including a payout stop means for stopping the drive of the payout driving means when the value corresponding to the end of payout of the medium is reached, it is possible to pay out the premium game medium quickly and accurately Game media can be paid out.

  In the invention described in claim 2, it is determined whether or not the data has increased by comparing the data stored in the premium game medium number data storage means with the data stored in the previous premium game medium number data storage means. Since it is comprised so that it may determine, an increase number can be pinpointed correctly with a simple structure.

  According to the third aspect of the present invention, when the increase determination means determines that the data has increased, the data stored in the prize game medium number data storage means is set in the previous prize game medium number data storage means. Since it is comprised, an increase number can be pinpointed correctly with a simple structure.

  In the invention described in claim 4, since the data set in the previous prize game medium number data storage means is initialized when the continuous game medium payout is completed, the next data In the determination of whether or not the increase has occurred, the increase number is not specified incorrectly.

  In the invention according to claim 5, when it is determined that the signal is a detection signal of a prize game medium paid out based on a payout control command, the prize game medium number data storage means stores it based on the detection signal. Since the data is subtracted, the number of parts is reduced and the cost of the gaming machine can be reduced.

  According to the sixth aspect of the present invention, the power source monitoring means is not connected to the effect control board on which the specific effect control microcomputer is mounted, and the system is applied to the effect control board on which another effect control microcomputer is mounted. Since it is configured to output a reset signal, the specific effect control microcomputer receives the control signal transmitted from the game control means and transmits the control signal to the other effect control microcomputer. In the configuration, even when an abnormality occurs on the board on which the specific effect control microcomputer is mounted, the other effect control microcomputers can be surely reset.

  In the invention according to claim 7, since the payout control command transmitting means in the game control means is configured to immediately send out the payout control command in response to the input of the winning detection signal, the payout control command can be quickly controlled. Can be communicated to the means.

  In the invention described in claim 8, the payout control command receiving means in the payout control means is configured to receive a payout control command by an interrupt process activated based on an input signal input to the interrupt terminal. Therefore, the payout control means can quickly receive the payout control command.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
First, the overall configuration of a pachinko gaming machine that is an example of a gaming machine will be described. FIG. 1 is a front view of a pachinko gaming machine as viewed from the front. In the following embodiments, a pachinko gaming machine will be described as an example. However, the gaming machine according to the present invention is not limited to a pachinko gaming machine, and a predetermined number of gaming media are paid out as prizes according to the game. It can also be applied to other gaming machines such as slot machines.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape, and a game frame attached to the inside of the outer frame so as to be openable and closable. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided in the game frame so as to be opened and closed. The game frame includes a front frame (not shown) installed to be openable and closable with respect to the outer frame, a mechanism plate to which mechanism parts and the like are attached, and various parts attached to them (excluding a game board described later). Is a structure including

  As shown in FIG. 1, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2 is a hitting ball supply tray (upper plate) 3. Under the hitting ball supply tray 3, an extra ball receiving tray 4 for storing game balls that cannot be accommodated in the hit ball supply tray 3 and a hitting operation handle (operation knob) 5 for launching the game balls are provided. A game board 6 is detachably attached to the back surface of the glass door frame 2. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. A game area 7 is formed on the front surface of the game board 6.

  Near the center of the game area 7, there is provided a variable display device (special symbol display device) 9 including a plurality of variable display portions each variably displaying a symbol as identification information. The variable display device 9 has, for example, three variable display portions (symbol display areas) of “left”, “middle”, and “right”. In addition, the variable display device 9 is provided with four special symbol start memory display areas (start memory display areas) 18 for displaying the number of effective winning balls that have entered the start winning opening 14, that is, the start memory number. Each time there is a valid start prize, the display color changes (for example, changes from blue display to red display), and the start storage display area is increased by one. Each time the variable display of the variable display device 9 is started, the start memory number display area where the display color is changed is reduced by 1 (that is, the display color is returned to the original). In addition, you may provide the display (special symbol start memory display) which displays the start memory | storage number separately from the variable display apparatus 9. FIG.

  Below the variable display device 9, a variable winning ball device 15 is provided as a start winning port 14. The winning ball that has entered the start winning opening 14 is guided to the back of the game board 6 and detected by the start opening switch 14a. A variable winning ball device 15 that opens and closes is provided below the start winning opening 14. The variable winning ball device 15 is opened by a solenoid 16.

  An open / close plate 20 that is opened by a solenoid 21 in a specific gaming state (big hit state) is provided below the variable winning ball device 15. The opening / closing plate 20 is a means for opening and closing a large winning opening (variable winning ball apparatus). Of the winning balls guided from the opening / closing plate 20 to the back of the game board 6, the winning ball entering one (V winning area: special area) is detected by the V count switch 22, and the winning ball from the opening / closing board 20 is counted. 23. On the back of the game board 6, a solenoid 21A for switching the route in the special winning opening is also provided.

  When a game ball wins the gate 32 and is detected by the gate switch 32a, the variable display of the normal symbol display 10 is started. In this embodiment, variable display is performed by alternately lighting the left and right lamps (a symbol can be visually recognized when the lamp is lit). For example, if the right lamp is lit when the variable display ends, it is a win. When the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined number of times. In the vicinity of the normal symbol display 10, a normal symbol start memory display 41 having a display unit with four LEDs for displaying the number of winning balls entered into the gate 32 is provided. Each time there is a prize at the gate 32, the normal symbol start memory display 41 increases the number of LEDs to be turned on by one. Each time variable display on the normal symbol display 10 is started, the number of LEDs to be lit is reduced by one.

  The game board 6 is provided with a plurality of winning ports (ordinary winning ports) 29, 30, 33, and 39. The winning holes 29, 30, 33, and 39 for the game balls are awarded to the winning port switches 29a and 30a, respectively. , 33a, 39a. Each winning opening 29, 30, 33, 39 constitutes a winning area provided in the game board 6 as an area for accepting game media and allowing winning. The start winning opening 14 and the big winning opening also constitute a winning area that accepts game media and allows winning. Around the left and right of the game area 7, there are provided decorative lamps 25 blinking and displayed during the game, and at the lower part there is an outlet 26 for absorbing a game ball that has not won a prize. Two speakers 27 that emit sound effects are provided on the left and right upper portions outside the game area 7. On the outer periphery of the game area 7, a top frame lamp 28a, a left frame lamp 28b, and a right frame lamp 28c are provided. Further, a decoration LED is installed around each structure (such as a big prize opening) in the game area 7. The top frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, and the decoration LED are examples of a decorative light emitter provided in the gaming machine.

  In this example, a prize ball LED 51 that is lit while paying out a prize ball is provided in the vicinity of the left frame lamp 28b, and a ball break LED 52 that is lit when the refill ball is cut is provided in the vicinity of the top frame lamp 28a. It has been. As described above, the pachinko gaming machine 1 of this embodiment is provided with lamps and LEDs as light emitters in various places. Further, a prepaid card unit (hereinafter also simply referred to as a “card unit”) that enables ball lending by inserting a prepaid card is installed adjacent to the pachinko gaming machine 1 (not shown).

  The card unit includes, for example, a use indicator lamp that indicates whether or not the card unit is in a usable state, a connection table direction indicator that indicates which side of the pachinko gaming machine 1 corresponds to the card unit, When checking the card insertion indicator lamp that indicates that a card has been inserted, the card insertion slot into which a card as a recording medium is inserted, and the card reader / writer mechanism provided on the back of the card insertion slot A card unit lock is provided to release the unit.

  The game balls launched from the hit ball launching device enter the game area 7 through the hit ball rail, and then descend the game area 7. When the game ball enters the start winning port 14 and is detected by the start port switch 14a, the special symbol starts variable display (variation) on the variable display device 9 if the variable display of the symbol can be started. If the variable display of the symbol cannot be started, the start memory number is increased by one.

  The variable display of the special symbol on the variable display device 9 stops when a certain time has elapsed. If the combination of special symbols at the time of stoppage is a jackpot symbol (specific display result), the game shifts to a jackpot gaming state. That is, the opening / closing plate 20 is opened until a predetermined time elapses or a predetermined number (for example, 10) of game balls wins. When a game ball wins the V winning area while the opening / closing plate 20 is opened and is detected by the V count switch 22, a continuation right is generated and the opening / closing plate 20 is opened again. The generation of the continuation right is allowed a predetermined number of times (for example, 15 rounds).

  When the combination of special symbols in the variable display device 9 at the time of stopping is a combination of jackpot symbols (probability variation symbols) with probability fluctuations, the probability of the next jackpot increases. That is, it becomes a more advantageous state for the player in the probability variation state.

  When the game ball wins the gate 32, the normal symbol display unit 10 is in a state where the normal symbol is variably displayed. Further, when the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the probability variation state, the probability that the stop symbol in the normal symbol display 10 becomes a winning symbol is increased, and the opening time and the number of times of opening of the variable winning ball device 15 are increased.

  Next, the structure of the back surface of the pachinko gaming machine 1 will be described with reference to FIG. FIG. 2 is a rear view of the gaming machine as seen from the back side.

  As shown in FIG. 2, on the back side of the gaming machine, a variable display control unit 49 including a display control board 80 on which a display control microcomputer for controlling the variable display device 9 is mounted, a game control microcomputer, and the like are mounted. A game control board (main board) 31 is installed. In addition, a payout control board 37 on which a payout control microcomputer for performing ball payout control is mounted is installed.

  The display control means is realized by a display control microcomputer or VDP mounted on the display control board 80. The gaming machine also includes various decoration LEDs provided on the game board 6, a normal symbol start memory display 41, a decoration lamp 25, a top frame lamp 28a provided on the frame side, a left frame lamp 28b, and a right frame. A lamp control board (not shown) on which lamp control means for controlling the lamp 28c and the like is mounted and a voice control board (not shown) on which voice control means for controlling the speaker 27 are installed are installed. Yes. The lamp control means is realized by a light emitter control microcomputer mounted on the lamp control board, other circuits, or the like. The voice control means is realized by a voice control microcomputer or other circuit mounted on the voice control board.

  Further, a power supply substrate 910 and a touch sensor substrate 91 on which a power supply circuit for generating DC30V, DC21V, DC12V, and DC5V is mounted are provided. Although most of the power supply substrate 910 overlaps with the main substrate 31, there is an exposed portion that is exposed so as to be visible from the outside without overlapping the main substrate 31. In this exposed portion, power supply to the main board 31 and each electrical component control board (display control board 80, payout control board 37, etc.) in the gaming machine 1 and each electrical component provided in the gaming machine is executed or cut off. A power switch as a power supply permission means for performing the backup, and a backup stored in a storage content holding means (for example, a backup RAM capable of holding the contents even when power supply is stopped) included in the main board 31 and the payout control board 37 A clear switch is provided as an operation means for clearing data. Furthermore, a replaceable fuse is provided inside the power switch in the exposed portion (inside the substrate).

  The electrical component control board (payout control board, display control board, lamp control board, voice control board) includes an electrical component control means (payout control means, display control means, lamp) including an electrical component control microcomputer, respectively. Control means, voice control means) are mounted. The payout control means and the display control means control electrical components (game device: ball payout device 97, variable display device 9 and the like) provided in the gaming machine according to a command signal (control signal) from the game control means. In addition, the light emitters such as lamps and LEDs and the electrical components such as the speaker 27 are controlled by the lamp control means and the sound control means in accordance with a command signal (control signal) from the display control means. Hereinafter, description may be made by including the main board 31 in the electric component control board. In that case, the electrical component control means mounted on the electrical component control board includes game control means. A substrate on which a microcomputer other than the main substrate 31 is mounted may be referred to as a sub-substrate. The display control means, the lamp control means, and the sound control means each include an effect control microcomputer that controls an effect device (variable display device 9, lamp / LED, speaker 27, etc.) for performing the game effect. The display control board, the lamp control board, and the sound control board correspond to the control means, and each correspond to an effect control board.

  On the back side of the gaming machine, a terminal board 160 provided with terminals for outputting various information to the outside of the gaming machine is installed above. The terminal board 160 includes at least a ball break terminal for introducing the output of the ball break detection switch 167 and outputting it externally, a prize ball terminal and a ball for outputting prize ball information (prize ball number signal) to the outside. A ball lending terminal for externally outputting lending information (ball lending number signal) is provided. In addition, an information terminal board (information output board) 34 provided with terminals for outputting various information from the main board 31 to the outside of the gaming machine is installed near the center.

  The game balls stored in the storage tank 38 pass through the guide rail 39 and reach the ball payout device covered with the payout case 40A through the curve rod. A ball break switch 187 as a game medium break detection means is provided on the upper part of the ball payout device. When the ball break switch 187 detects a ball break, the dispensing operation of the ball dispensing device stops. The ball break switch 187 is a switch for detecting the presence or absence of a game ball in the game ball passage, but the ball break detection switch 167 for detecting the shortage of supply balls in the storage tank 38 is also an upstream portion (storage tank 38). In the vicinity of the head). When the ball break detection switch 167 detects the shortage of game balls, the game machine is replenished to the game machine from the supply mechanism provided on the gaming machine installation island.

  When a large number of game balls as prizes based on winning a prize and game balls based on a ball lending request are paid out and the hitting ball supply tray 3 is full, the game balls are guided to the surplus ball receiving tray 4 through the surplus ball passage. Further, when the game ball is paid out, a sensing lever (not shown) presses a full tank switch (not shown) as the storage state detection means, and the full tank switch as the storage state detection means is turned on. In this state, the rotation of the payout motor in the ball payout device is stopped, the operation of the ball payout device is stopped, and the driving of the ball hitting device is also stopped.

  FIG. 3 is a front view (FIG. 3 (A)) and a cross-sectional view (FIG. 3 (B)) showing the ball dispensing device 97 covered with the dispensing case 40A. The ball payout device 97 is fixed to the lower part of the passage body installed between the ball break switch 187 and the ball payout device 97. The passage body has a ball passage for flowing down two rows of game balls whose flow-down direction is converted into the left-right direction by a curve saddle. A ball break switch 187 is installed on the upstream side of the ball passage. In practice, a ball break switch is installed in each ball passage. The ball break switch 187 detects the presence or absence of a game ball in the ball passage. When the ball break switch 187 stops detecting a game ball, the ball discharge device 97 has a payout motor (not shown in FIG. 3). The rotation is stopped and the payout of the game ball is immobilized.

  Further, the ball break switch 187 is locked by a locking piece at a position where, for example, it can be detected that 27 to 28 game balls are present in the ball path.

  In the ball payout device 97, a payout motor (not shown) by a stepping motor as a payout driving means rotates a cam 292 as a payout mechanism, for example, so that one game ball is paid one by one based on a ball lending request. put out. Also, below the ball payout device 97, for example, a payout number count switch 301 using a proximity switch is provided. Each time one game ball falls from the ball payout device 97, the payout number count switch 301 installed at the lower part of the flow-down path 293 is turned on. That is, the payout number count switch 301 detects a game ball actually paid out from the ball payout device 97. Therefore, the payout control means can count the number of game balls actually paid out by the detection signal of the payout number count switch 301. In this example, the payout number count switch 301 detects both the paid-out prize balls and rental balls. That is, the payout of prize balls and the payout of rental balls are detected by the same detection means. Therefore, the number of parts can be reduced, and the cost of the gaming machine can be reduced. However, the payout of the winning ball and the payout of the rental ball may be detected by separate detection means.

  Further, the ball payout device 97 is configured to perform both the prize ball payout and the ball lending, but the ball payout device that performs the prize ball payout and the ball payout device that performs the ball lending may be provided separately. Good. When separately provided, the payout means is composed of a ball payout device for paying out a prize ball and a ball payout device for lending a ball. Furthermore, for example, the configuration may be such that the winning ball payout and the ball lending are separated by changing the rotation direction of the cam or sprocket, or the ball payout device 97 exemplified in the present embodiment (the cam is rotated by the motor). The present invention can be applied to a ball payout device having any structure other than the above.

  FIG. 4 is a block diagram illustrating an example of a circuit configuration in the main board 31. 4 also shows the payout control board 37, the display control board 80, and the like. The main board 31 includes a basic circuit (corresponding to a game control microcomputer: game control means) 53 for controlling the pachinko gaming machine 1 according to a program, a gate switch 32a, a start port switch 14a, a V count switch 22, and a count switch 23. The input driver circuit 58 for supplying signals from the winning opening switches 29a, 30a, 33a, 39a and the clear switch 921 to the basic circuit 53, the solenoid 16 for opening / closing the variable winning ball apparatus 15, and the solenoid 21 for opening / closing the opening / closing plate 20. And a solenoid circuit 59 for driving the solenoid 21A for switching the route in the special winning opening in accordance with a command from the basic circuit 53.

  The gate switch 32a, the start port switch 14a, the V count switch 22, the count switch 23, the winning port switches 29a, 30a, 33a, 39a, and other switches may be referred to as sensors. That is, the name of the game medium detection means is not limited as long as it is a game medium detection means (game ball detection means in this example) that can detect a game ball. Each of the start port switch 14a, the V count switch 22, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a for performing the winning detection is also a winning detection means. Note that the winning detection means may be configured to collectively detect the respective game balls that have won separately a plurality of winning openings. In addition, even if a pass gate such as the gate switch 32a is used, if a prize ball is to be paid out, a game ball enters the pass gate is a prize, and a switch ( For example, the gate switch 32a) serves as a winning detection means. Further, in this embodiment, a game ball won in the V winning area is detected by the V count switch 22 and also by the count switch 23. Therefore, the number of game balls won in the big winning opening corresponds to the number detected by the count switch 23. However, the game balls that have won the V winning area may be detected only by the V count switch 22. In this case, the number of game balls won in the big winning opening is the sum of the number detected by the V count switch 22 and the number detected by the count switch 23.

  Further, according to the data given from the basic circuit 53, the jackpot information indicating the occurrence of the jackpot, the effective starting information indicating the number of starting winning balls used for starting the variable display of the symbols in the variable display device 9, the probability variation has occurred. An information output circuit 64 for outputting an information output signal such as probability variation information indicating the above to an external device such as a hall computer is mounted.

  A basic circuit 53 realized by a game control microcomputer includes a ROM 54 for storing a game control (game progress control) program and the like, and storage means used as a work memory (variable data storage means for storing variable data). RAM 55, CPU 56 for performing control operations in accordance with programs, and I / O port unit 57. In this embodiment, the ROM 54 and the RAM 55 are built in the CPU 56. That is, the CPU 56 is a one-chip microcomputer. The one-chip microcomputer only needs to have at least the RAM 55 built in, and the ROM 54 and the I / O port unit 57 may be externally attached or built in. Since the CPU 56 executes control according to the program stored in the ROM 54, the CPU 56 executes (or performs processing) hereinafter, specifically, the CPU 56 executes control according to the program. is there. The same applies to CPUs mounted on boards other than the main board 31. The game control means is realized by a basic circuit 53 realized by a game control microcomputer, but is mainly realized by a CPU 56 that executes control according to a program in the game control microcomputer.

  The RAM 55 is a backup RAM as a nonvolatile storage means that is partly backed up by a backup power source created on the power supply substrate 910. That is, even if the power supply to the gaming machine is stopped, a part of the contents of the RAM 55 is stored for a predetermined period (until the power supply of the backup power supply is disabled). In this example, at least data (a special symbol process flag or the like) corresponding to the game state, that is, the control state of the game control means is stored in the backup RAM. The data corresponding to the control state of the game control means is data necessary for restoring the control state before the occurrence of a power failure or the like based on the data when the power is restored after a power failure or the like occurs. In this embodiment, the entire RAM 55 is backed up.

  A reset signal from the power supply board 910 is input to the reset terminal of the CPU 56. When the reset signal changes from low level to high level, the CPU 56 starts operation. That is, the processing based on the program stored in the ROM 54 is started.

  The hitting ball launching device for hitting and launching the game ball includes a launch motor 94 controlled by a circuit on the payout control board 37, and the game ball is launched toward the game area 7 by the rotation of the launch motor 94. A drive signal for driving the firing motor 94 is transmitted to the firing motor 94 via the touch sensor substrate 91. The touch sensor detects that the player is touching the operation knob (hitting ball handle) 5 and a signal from the touch sensor is mounted on the touch sensor substrate 91 (the player touches the operation knob 5). Is transmitted to the payout control board 37 via a circuit including a detection circuit for detecting whether or not it is touched. The circuit on the payout control board 37 stops the driving of the firing motor 94 when the signal from the touch sensor circuit indicates an off state.

  In this embodiment, the lamp control means mounted on the lamp control board 35 controls the display of the normal symbol start memory display 41 and the decoration lamp 25 provided on the game board, and is provided on the frame side. The display control of the top frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, the prize ball lamp 51 and the ball-out lamp 52 is performed. Each lamp may be an LED or other types of light emitters. That is, a lamp or LED is an example of a light emitter. The display control of the variable display device 9 for variably displaying the special symbol and the normal symbol display 10 for variably displaying the normal symbol is performed by display control means mounted on the display control board 80.

  As shown in FIG. 4, in this embodiment, a display control command is transmitted from the main board 31 to the display control board 80 according to the control state. Then, the display control unit (specifically, the display control CPU 101) executes a process of receiving the display control command, and the lamp control unit (specifically, the lamp control CPU 351) of the lamp control board 35 performs lamp control. A process of transmitting a command is executed, and a process of transmitting a voice control command to the voice control means (specifically, the voice control CPU 701) of the voice control board 70 is executed.

  FIG. 5 is a block diagram showing components related to payout, such as the payout control board 37 and the ball payout device 97. As shown in FIG. 5, the payout control board 37 is equipped with a payout control microcomputer (an example of an electric component control microcomputer) including a payout control CPU 371. In this embodiment, the payout control microcomputer is a one-chip microcomputer and has at least a built-in RAM. Further, the RAM is backed up in the same manner as the RAM 55 in the main board 31. The payout control CPU 371, the RAM, the ROM (not shown) storing the payout control program, the I / O port, etc. constitute payout control means. Therefore, the payout control means is realized by a payout control CPU 371, a payout control microcomputer including a RAM, a ROM, and an I / O port, but is mainly realized by a payout control CPU 371 that executes control according to a program.

  Detection signals from the full tank switch 48 and the payout number count switch 301 are input to the I / O port 372 f of the payout control board 37 via the relay board 72. Detection signals from the ball break switch 187 and the payout motor position sensor 295 are input to the I / O port 372e of the payout control board 37 via the relay board 72. The payout motor position sensor 295 is a sensor including a light emitting element (LED) and a light receiving element for detecting the rotational position of the payout motor 289. The payout control CPU 371 of the payout control board 37 performs a ball payout process when the detection signal from the ball shortage switch 187 indicates a ball full state or when the detection signal from the full tank switch 48 indicates a full tank state. Stop. Furthermore, when the detection signal from the full tank switch 48 indicates a full tank state, the ball launching from the ball striking device is stopped.

  When there is a winning, the output circuit 67 of the main board 31 outputs a prize ball number command indicating the number of prize balls to be paid out as a payout control command (payout command signal). Then, an INT signal (strobe signal) for instructing fetching of the payout control command is output (turns on). A power supply confirmation signal (connection confirmation signal) indicating that the main board 31 is connected is also output from the output circuit 67 of the main board 31.

  The payout control command is input to the I / O port 372e via the input circuit 373A. The INT signal is input to a maskable interrupt terminal (hereinafter also simply referred to as an interrupt terminal) of the payout control CPU 371. The payout control CPU 371 inputs a payout control command via the I / O port 372e in an interrupt process based on the input of the INT signal to the interrupt terminal, and the number of game balls indicated by the award ball number command is received. In order to pay out, the ball paying device 97 is controlled to be driven. A power supply confirmation signal (connection confirmation signal) indicating that the main board 31 is connected is also output from the output circuit 67 of the main board 31.

  The payout control CPU 371 receives a prize ball information signal indicating the number of prize balls to be paid out and a ball lending number signal indicating the number of balls to be rented via the output port 372b as a terminal board (the frame external terminal board and the board external terminal board). Output) 160. A driver circuit is provided outside the output port 372b, but is not shown in FIG.

  Also, the payout control CPU 371 outputs an error signal to the error display LED 374 using a 7-segment LED via the output port 372c. Further, a signal for instructing turning on / off is output to the winning ball LED 51 and the ball running out LED 52 via the output port 372b. A detection signal from an error release switch 375 for releasing the error state is input to the input port 372f of the payout control board 37. The error cancel switch 375 is used to cancel the error state by software reset.

  Further, a drive signal from the payout control board 37 to the payout motor 289 is transmitted to the payout motor 289 in the payout mechanism portion of the ball payout device 97 via the output port 372a and the relay board 72. Although a driver circuit (motor drive circuit) is installed outside the output port 372a, the description is omitted in FIG. A drive signal from the payout control board 37 to the firing motor 94 is transmitted to the firing motor 94 via the output port 372 a and the touch sensor board 91.

  A card unit control microcomputer is mounted on a card unit 50 (not shown in FIG. 1) installed adjacent to the gaming machine. In addition, the card unit 50 is provided with an available display lamp, a connecting table direction indicator, a card insertion display lamp, a card insertion slot, and the like. A frequency display LED 60, a ball lending LED 61, a ball lending switch 62, and a return switch 63 provided in the vicinity of the hitting ball supply tray 3 are connected to the interface board (relay board) 66.

  A card lending switch signal indicating that the ball lending switch 62 has been operated and a return switch signal indicating that the return switch 63 has been operated are provided to the card unit 50 from the interface board 66 in accordance with the player's operation. . Further, a card balance display signal indicating a prepaid card balance and a ball lending display signal are given from the card unit 50 to the interface board 66. Between the card unit 50 and the payout control board 37, a connection signal (VL signal), a unit operation signal (BRDY signal), a ball lending request signal (BRQ signal), a ball lending completion signal (EXS signal) and a pachinko machine operation signal ( PRDY signal) is transmitted / received via the input port 372f and the output port 372d. An interface board 66 is interposed between the card unit 50 and the payout control board 37. Therefore, a signal such as a connection signal (VL signal) is transmitted and received between the card unit 50 and the payout control board 37 via the interface board 66 as shown in FIG.

  FIG. 6 is a block diagram illustrating a circuit configuration example of the display control board 80, the lamp control board 35, and the sound control board 70. In the display control board 80, the display control CPU 101 in the display control microcomputer operates in accordance with a program stored in a ROM (not shown), and in accordance with a strobe signal (display control INT signal) from the main board 31, A display control command is received via the input driver 102 and the input port 103. Further, the display control CPU 101 causes the VDP (video display processor) 109 to perform display control of the variable display device 9 using the LCD based on the display control command.

  Further, the display control CPU 101 outputs a voice control command to the voice control board 70 via the output port 104 and the output driver 110. Further, the display control CPU 101 outputs a lamp control command to the lamp control board 35 via the output port 105 and the output driver 106. In the lamp control board 35, the lamp control command from the display control board 80 is input to the lamp control CPU 351 in the light emitter control microcomputer via the input port of the I / O port section in the lamp control board 35.

  In the lamp control board 35, the lamp control CPU 351 performs the ceiling frame lamp according to the lighting / extinguishing pattern of the ceiling frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, and the decoration lamp 25 defined according to each control command. 28a, left frame lamp 28b, right frame lamp 28c, and decorative lamp 25 are turned on / off. The on / off pattern is stored in the built-in ROM or external ROM of the lamp control CPU 351. A signal for driving each lamp output by the lamp control CPU 351 is amplified by a lamp driver 354 and supplied to each lamp. A signal for driving each LED output from the output port 352 is amplified by the LED driving circuit 355 and supplied to each LED.

  As the game progresses, a voice control command for instructing voice output from the speaker 27 provided outside the gaming area 7 is output from the display control board 80 to the voice control board 70. In the voice control board 70, a voice control command from the display control board 80 is input to the voice control CPU 701 in the voice control microcomputer via the input port of the I / O port unit in the voice control board 70. The voice control CPU 701 reads data corresponding to the received voice control command from the voice data ROM 704 and outputs the data to the voice synthesis IC 703 using a digital signal processor, for example.

  Then, the voice synthesis IC 703 generates voice and sound effects according to instructions from the voice control CPU 701 and outputs them to the amplifier circuit 705. The amplification circuit 705 amplifies the output level of the voice control CPU 701 to a level corresponding to the volume set by the volume 706 (for example, the volume according to the operation state of the volume switch provided in the gaming machine). An audio signal is output to the speaker 27.

  Next, the configuration of the power supply substrate 910 will be described with reference to the block diagram of FIG. The power supply board 910 is provided with a power switch 914 for executing or shutting off power supply to each electrical component control board and mechanism component in the gaming machine. Note that the power switch 914 may be provided outside the power supply board 910 in the gaming machine. When the power switch 914 is in a closed state (on state), AC power (AC 24 V) is applied to the rectifier circuit 912 via a varistor 918 as an overvoltage protection circuit. In other words, power is supplied to the gaming machine.

  The power supply board 910 is installed independently of the electrical component control board (the main board 31 and the payout control board 37 and the like), and generates a voltage used by each board and mechanism component in the gaming machine. In this example, AC24V, VSL (DC + 30V), VLP (DC + 24V), VDD (DC + 12V) and VCC (DC + 5V) are generated. Further, a capacitor 916 serving as a storage holding means for holding the stored contents in the backup power supply (VBB), that is, the backup RAM, is charged from DC + 5V (VCC), that is, a power supply line for driving an IC or the like on each substrate. Further, a backflow prevention diode 917 is inserted between the +5 V line and the backup +5 V (VBB) line. Note that VSL is generated by rectifying and boosting AC 24 V with a rectifying element in the rectifying and smoothing circuit 915. VSL is a solenoid driving power source. VLP is a lamp lighting voltage, and is generated by rectifying AC24V with a rectifier element in the rectifier circuit 912.

  The DC-DC converter 913 serving as a power supply voltage generating unit has one or a plurality of regulator ICs (two regulator ICs 924A and 924B are shown in FIG. 7), and generates VDD and VCC based on VSL. Relatively large capacitors 923A and 923B are connected to the input sides of the regulator ICs (switching regulators) 924A and 924B. Accordingly, when the power supply to the gaming machine from the outside is stopped, the DC voltages such as VSL, VDD, VCC, etc., decrease relatively slowly.

  As shown in FIG. 7, AC24V is supplied to the connector 922B as it is. The VLP is supplied to the connector 922C. VCC, VDD and VSL are supplied to connectors 922A, 922B and 922C.

  The cable connected to the connector 922A is connected to the main board 31. The cable connected to the connector 922B is connected to the payout control board 37. Therefore, VBB is also supplied to the connectors 922A and 922B. The cable connected to the connector 922C is connected to the lamp control board 35. Each voltage is supplied to the display control board 80 and the audio control board 70 via the lamp control board 35.

  In addition, a clear switch 921 having a push button structure is mounted on the power supply board 910. When the clear switch 921 is pressed, a clear switch signal at a low level (on state) is output and transmitted to the payout control board 37 via the connector 922B. If the clear switch 921 is not pressed, a high level (off state) signal is output. The clear switch 921 may have a configuration other than the push button structure. Further, the clear switch 921 may be provided on a board other than the power supply board 910 such as the payout control board 37 or other places in the gaming machine.

  Further, the power supply board 910 has a system reset signal for each microcomputer mounted on each electric component control board (the microcomputer operation is prohibited at the reset level, and the microcomputer can be operated when the non-reset level is reached). Power supply monitoring circuit 920 that outputs a power-off signal, and a reset signal from the power-supply monitoring circuit 920 are amplified and output to the connectors 922A, 922B, and 922C, and the power-off signal is amplified. An output driver circuit 925 for outputting to the connector 922B is mounted. The system reset signal for the game control microcomputer is directly transmitted to the main board 31, but the system reset signal for the display control microcomputer and the voice control microcomputer is transmitted via the lamp control board 35 to the display control board 80. And transmitted to the voice control board 70. However, the power may be transmitted directly from the power supply board 910 to each of the display control board 80, the lamp control board 35, and the sound control board 70.

  The power supply monitoring circuit 920 is a circuit that realizes power supply monitoring means for outputting a power-off signal and reset signal generation means for generating a system reset signal. A commercially available power failure monitoring reset module IC is used as the power supply monitoring circuit 920. be able to. The power supply monitoring circuit 920 outputs a power-off signal when a period during which a predetermined voltage (for example, + 24V) used in the gaming machine is equal to or lower than a predetermined value (for example, + 17V) continues for a predetermined time (for example, 56 ms). . Specifically, the power-off signal is turned on (low level). Further, the power supply monitoring circuit 920 enters a state in which the system reset signal can be set to a low level when, for example, VCC becomes +4.5 V or less.

  When the power supply to the gaming machine is stopped, the power supply monitoring circuit 920 sets the system reset signal to a low level when a predetermined period has elapsed after the power-off signal is output (set to a low level). Become. In addition, when the power supply to the gaming machine is started and VCC exceeds +4.5 V, for example, the system reset signal is set to high level. In this case, after the power-off signal is not output (set to high level). From the condition that the predetermined period has elapsed, the system reset signal is set to the high level.

  Next, the operation of the gaming machine will be described. 8 and 9 are flowcharts showing main processing executed by the game control means on the main board 31. FIG. When the gaming machine is powered on and the input level of the reset terminal to which the system reset signal is input becomes high level, the CPU 56 performs a security check process that is a process for confirming whether the contents of the program are valid or not. After executing, the main processing after step S1 is started. In the main process, the CPU 56 first performs necessary initial settings.

  In the initial setting process, the CPU 56 first sets the interrupt prohibition (step S1). Next, the interrupt mode is set to interrupt mode 2 (step S2), and a stack pointer designation address is set to the stack pointer (step S3). Then, the built-in device register is initialized (step S4). In interrupt mode 2, the address synthesized from the value (1 byte) of the specific register (I register) of the CPU 56 and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is the interrupt address. This mode indicates

  Next, a software delay process for delaying the start timing of the game device control process (game control process) for controlling the progress of the game by software is executed. Specifically, first, the initialization wait number specification value 1 is set in the wait counter 1 (step S81). Also, the initialization wait number specification value 2 is set in the wait counter 2 (step S82). As the wait counters 1 and 2, general-purpose registers built in the CPU 56 are used. Then, the value of the wait counter 2 is decremented by 1 until the value of the wait counter 2 becomes 0 (steps S83 and S84). When the value of the weight counter 2 becomes 0, the value of the weight counter 1 is decremented by 1 (step S85). When the value of the weight counter 1 is not 0 (step S86), the process returns to step S82. If the value of the wait counter 1 is 0, the software delay process is terminated. The software delay process is executed to delay the timing at which the game control means starts the game control process from the timing at which the other electrical component control means starts the electrical component control.

  When the software delay processing ends, the CTC (counter / timer) and PIO (parallel input / output port), which are built-in devices (built-in peripheral circuits), are initialized (step S5), and then the RAM 55 is set in an accessible state. (Step S6). The CPU 56 used in this embodiment also includes an I / O port (PIO) and a timer / counter circuit (CTC).

  Next, the CPU 56 checks the state of the clear switch signal from the clear switch 921 input via the input port only once (step S7). When the on-state is detected in the confirmation, the CPU 56 executes a normal initialization process (steps S10 to S15). At the input port, the clear switch signal is on at a high level.

  For example, the game store clerk can turn on the clear switch signal by starting the power supply to the gaming machine while turning on the clear switch 921 (for example, turning on the power switch 914), and can be easily initialized. Processing can be executed. That is, RAM clear or the like can be performed.

  If the clear switch signal is not in the on state, whether or not data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) is performed when power supply to the gaming machine is stopped Confirm (step S8). In this embodiment, when power supply is stopped, a process for protecting data in the backup RAM area is performed. If it is confirmed that such protection processing has been performed, the CPU 56 determines that there is a backup. When it is confirmed that such a protection process has not been performed, the CPU 56 executes an initialization process.

  Whether or not the protection process has been performed depends on the value of the backup monitoring timer stored in the backup RAM area in the power supply stop process described later according to the execution of the data protection process in the backup RAM area (for example, It is confirmed by whether or not 2). Note that such a confirmation method is merely an example. For example, a flag indicating that the data protection process has been executed is set in the backup flag area in the power supply stop process, and the flag is set in step S8. If it is confirmed that there is a backup, it may be determined that there is a backup.

  If it is determined that there is a backup, the CPU 56 performs a data check of the backup RAM area (parity check in this example) (step S9). In this embodiment, clear data (00) is set in the checksum data area, and the checksum calculation start address is set in the pointer. Also, the number of checksum calculations corresponding to the number of data to be checksum is set. Then, the exclusive OR of the contents of the checksum data area and the contents of the RAM area pointed to by the pointer is calculated. The calculation result is stored in the checksum data area, the pointer value is incremented by 1, and the checksum calculation count value is decremented by 1. The above processing is repeated until the value of the checksum calculation count becomes zero. When the value of the checksum calculation count reaches 0, the CPU 56 inverts the value of each bit of the contents of the checksum data area and uses the inverted data as the checksum.

  In the power supply stop process, a checksum is calculated by the same process as described above, and the checksum is stored in the backup RAM area. In step S9, the calculated checksum is compared with the stored checksum. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, the initialization process (the processes of steps S10 to S15) executed when the power is turned on, not when the power supply is stopped. Execute.

  If the check result is normal, the CPU 56 performs a game state restoration process for returning the internal state of the game control means and the control state of the electric component control means such as the display control means to the state when the power supply is stopped. Specifically, the start address of the backup setting table stored in the ROM 54 is set as a pointer (step S91), and the contents of the backup setting table are sequentially set in the work area (area in the RAM 55) (step S92). ). The work area is backed up by a backup power source. In the backup setting table, initialization data for an area that may be initialized in the work area is set. As a result of the processing in steps S91 and S92, the saved contents of the work area that should not be initialized remain. The portion that should not be initialized is, for example, a portion in which data (such as a special symbol process flag) indicating a gaming state before stopping power supply is set.

  Further, the CPU 56 sets the start address of the backup command transmission table stored in the ROM 54 as a pointer (step S93), and power is supplied to the sub-boards (the payout control board 37 and the display control board 80) according to the contents. Control is performed so that a control command (recovery command) indicating the recovery is transmitted (step S94). Then, the process proceeds to step S15.

  In the initialization process, the CPU 56 first performs a RAM clear process (step S10). Further, the start address of the initialization setting table stored in the ROM 54 is set as a pointer (step S11), and the contents of the initialization setting table are sequentially set in the work area (step S12). By the processing of steps S11 and S12, for example, a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol left middle right symbol buffer, a total prize ball number storage buffer, a special symbol process flag, an award ball flag, a ball break An initial value is set for a flag for selectively performing processing according to a control state, such as a flag or a payout stop flag.

  Further, the CPU 56 sets the start address of the initialization command transmission table stored in the ROM 54 as a pointer (step S13), and transmits an initialization command for initializing the sub board according to the contents to the sub board. Processing is executed (step S14). Examples of the initialization command include a command indicating an initial symbol displayed on the variable display device 9.

  In step S15, the CPU 56 sets a CTC register built in the CPU 56 so that a timer interrupt is periodically generated every predetermined time (for example, 4 ms). That is, a value corresponding to, for example, 4 ms is set as an initial value in a predetermined register (time constant register). In this embodiment, it is assumed that a timer interrupt is periodically taken every 4 ms.

  When the execution of the initialization process (steps S10 to S15) is completed, the CPU 56 repeatedly executes the display random number update process (step S17) and the initial value random number update process (step S18). The CPU 56 disables the interrupt when the display random number update process and the initial value random number update process are executed (step S16), and interrupts when the display random number update process and the initial value random number update process are finished. The permission state is set (step S19). The display random number is a random number for determining a symbol displayed on the variable display device 9, and the display random number update process is a process for updating the count value of the counter for generating the display random number. It is. The initial value random number update process is a process for updating the count value of the counter for generating the initial value random number. The initial value random number is a random number for determining an initial value of a count value such as a counter for generating a random number for determining whether or not to make a big hit (a big hit determination random number generation counter). A game control process described later (a process in which a game control microcomputer controls itself a game device such as a variable display device 9, a variable winning ball device 15, a ball payout device 97 provided in the game machine, or In a process of transmitting a command signal for causing another microcomputer to control, also referred to as a gaming machine control process), when the count value of the jackpot determination random number generation counter makes one round, an initial value is set in the counter.

  Next, the game control process will be described. FIG. 10 is a flowchart showing the timer interrupt process. When a timer interrupt occurs during execution of the main process, specifically, during execution of the loop process of steps S16 to S19, the CPU 56 performs a timer interrupt process that is started in response to the occurrence of the timer interrupt. A game control process is executed. In the timer interrupt process, the CPU 56 first detects whether or not a power-off signal is output (whether or not it is turned on), and executes a power-off process when a power-off signal is output. A power-off process (power-off detection process) is executed (step S21). Subsequently, detection signals of switches such as the gate switch 32a, the start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a are input via the switch circuit 58, and their state is determined (switch) Process: Step S22). Specifically, if the state of the input port for inputting the detection signal of each switch is ON, the value of the switch timer provided corresponding to each switch is incremented by one.

  Next, a process of updating the count value of each counter for generating each determination random number such as a big hit determination random number used for game control is performed (step S23). The CPU 56 further performs a process of updating the count value of the counter for generating the display random number and the initial value random number (steps S24 and S25).

  Further, the CPU 56 performs special symbol process processing (step S26). In the special symbol process control, corresponding processing is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to the gaming state. The value of the special symbol process flag is updated during each process according to the gaming state. Further, normal symbol process processing is performed (step S27). In the normal symbol process, the corresponding process is selected and executed according to the normal symbol process flag for controlling the display state of the normal symbol display 10 in a predetermined order. The value of the normal symbol process flag is updated during each process according to the gaming state.

  Next, the CPU 56 performs a process of setting a display control command related to the special symbol in a predetermined area of the RAM 55 and sending the display control command (special symbol command control process: step S28). In addition, a display control command related to the normal symbol is set in a predetermined area of the RAM 55, and a process of sending the display control command is performed (normal symbol command control process: step S29).

  Further, the CPU 56 performs information output processing for outputting data such as jackpot information, start information, probability variation information supplied to the hall management computer, for example (step S30).

  Further, the CPU 56 executes prize ball processing for setting the number of prize balls based on the detection signals from the prize opening switches 29a, 30a, 33a, 39a, etc. (step S31). Specifically, a prize ball number command indicating the number of prize balls is transmitted to the payout control board 37 as a payout control command in response to detection of a winning based on the winning opening switch 29a, 30a, 33a, 39a being turned on. The payout control CPU 371 mounted on the payout control board 37 drives the ball payout device 97 according to the prize ball number command.

  And CPU56 performs the memory | storage process which checks the increase / decrease in the number-of-start winning memory | storage number (step S32). In addition, a test terminal process, which is a process for outputting a test signal for enabling the control state of the gaming machine to be confirmed outside the gaming machine, is executed (step S33). In this embodiment, a RAM area (output port buffer) corresponding to the output state of the output port is provided, but the CPU 56 outputs the contents related to the solenoid in the RAM area of the output port 3 to the output port. (Step S34: Solenoid output processing). Thereafter, the interrupt permission state is set (step S35), and the process is terminated.

  With the above control, in this embodiment, the game control process is started periodically (for example, every 4 ms). In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set, and the game control process is performed by the main process. May be executed. Further, the processing of steps S22 to S34 (except for steps S30 and S33) corresponds to a game control process for controlling the progress of the game.

  FIG. 11 is an explanatory diagram showing an example of a command form of a payout control command sent from the main board 31 to the payout control board 37. In this embodiment, the payout control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). The first bit (bit 7) of the MODE data is always “1”, and the first bit (bit 7) of the EXT data is always “0”. The command form shown in FIG. 11 is an example, and other command forms may be used. For example, a 1-byte command or a command with 3 or more bytes may be used. The display control command is also configured as shown in FIG.

  FIG. 12 is a timing chart showing the relationship between an 8-bit control signal (for example, a payout control command) and an INT signal (for example, a payout control signal INT) that constitute a control command for the electrical component control means. As shown in FIG. 12, the game control means turns the INT signal on after the MODE or EXT data is output to the output port. Further, the INT signal is turned off when a sufficient period of time has elapsed for interrupting the electric component control microcomputer. Further, after the second byte data is set as an output port, the INT signal is turned on, and then the NT signal is turned off.

  FIG. 13 is an explanatory diagram showing an example of the contents of the payout control command. In the example shown in FIG. 13, the command F0XX (H) of MODE = F0 (H) is used as the payout control command corresponding to the prize ball number command (payout number command). The number of payouts corresponding to the number of game balls to be paid out by “XX” being EXT is shown. FIG. 13 also shows a connection confirmation signal transmitted through one signal line. The connection confirmation signal is output when the main board 31 rises (when the game control unit starts the game control process) and notifies the payout control board 37 that the main board 31 has risen. A connection confirmation signal of the substrate 31). The connection confirmation signal is also a signal indicating that a prize ball can be paid out. In this embodiment, in the payout control means, the connection confirmation signal is generated when the cable including the signal line between the main board 31 and the payout control board is disconnected or the connector connecting the cable and the board is disconnected. However, the game control means mounted on the main board 13 may be turned off when any error is detected while the game is in progress.

  Next, transmission of the payout control command by the game control means will be described. FIG. 14 is an explanatory diagram showing an example of bit assignment of input ports in the game control means. As shown in FIG. 14, the bits 0 to 7 of the input port 0 are detected by the V count switch 22, the count switch 23, the gate switch 32a, the winning port switches 33a, 24a, 29a and 30a, and the start port switch 14a, respectively. A signal is input. In addition, the bits 0 and 1 of the input port 1 are input with a power-off signal from the power monitoring board 910 and a detection signal of the clear switch 921 from the power board 910, respectively. The detection signal from each switch is logically inverted in the input driver circuit 58.

  Next, the switch process (step S22) in the main process will be described. In this embodiment, when the ON state of the detection signal of each switch related to winning detection or gate passage continues for a predetermined time, it is determined that the switch is surely turned on, and processing corresponding to the switch on is started. FIG. 15 is an explanatory diagram showing each 1-byte buffer formed in the RAM 55 used in the switching process. The previous port buffer is a buffer in which the previous switch-on / off determination result (for example, 4 ms before) is stored. The port buffer is a buffer in which the contents of port 0 inputted this time are stored. The switch-on buffer is a buffer in which the corresponding bit is set to 1 when switch on is detected and the corresponding bit is set to 0 when switch off is detected.

  FIG. 16 is a flowchart illustrating a processing example of the switch process in step S22 in the game control process. In the switch process, the CPU 56 first inputs data input to the input port 0 (see FIG. 14) (step S101), and sets the input data in the port buffer (step S102). Next, the initial value of the weight counter formed in the RAM 55 is set (step S103), and the value of the weight counter is decremented by 1 until the value of the weight counter becomes 0 (steps S104 and S105).

  When the value of the wait counter becomes 0, the data of the input port 0 is input again (step S106), and a logical product is obtained for each bit between the input data and the data set in the port buffer (step S106). S107). Then, the logical product operation result is set in the port buffer (step S108). Of the two input data input from the input port 0 with a time interval of approximately [initial value of weight counter × (processing time of steps S104, S105)] by the processing of steps S103 to S108, both “ Only the bits that are “1” will be “1” in the port buffer. That is, if the ON state of the switch detection signal continues for the predetermined period [initial value of wait counter × (processing time of steps S104 and S105)], the corresponding bit in the port buffer becomes “1”.

  Further, the CPU 56 performs exclusive OR for each bit between the data previously set in the port buffer and the data set in the port buffer (step S109). In the result of the exclusive OR operation, the bit corresponding to the switch for which the previous switch-on / off determination result (for example, 4 ms before) differs from the switch-on / off determination result determined to be on this time is “ 1 ”. The CPU 56 further performs a logical product for each bit between the operation result of the exclusive OR and the data set in the port buffer (step S110). As a result, of the bits corresponding to the switches for which the previous switch on / off determination result and the switch on / off determination result determined to be on this time are different (according to the exclusive OR operation result), the current on Only the bit corresponding to the switch determined to be (by AND operation) remains as “1”.

  Then, the CPU 56 sets the operation result of the logical product in step S110 in the switch-on buffer (step S111), and sets the contents of the port buffer in which the operation result in step S108 is set in the previous port buffer (step S112). .

  By the above processing, among the switches that have been on for a predetermined period of time, the switch on / off determination result of the previous time (for example, 4 ms ago) was off, that is, the switch changed from the off state to the on state. The bit corresponding to the switch is “1” in the switch-on buffer.

  Then, the CPU 56 executes a winning switch check process (step S113). FIG. 17 is a flowchart showing a winning switch check process. In the winning switch check process, if the bit corresponding to the count switch 23 in the switch buffer is “1”, the CPU 56 increments the value of 15 counters (steps S131 and S132), and the normal winning opening switch (winning prize) in the switch buffer. If each bit corresponding to the mouth switch 29a, 30a, 33a, 39a) is “1”, the counter is incremented by 10 (steps S133 and S134), and the bit corresponding to the switch buffer is “1”. If so, four counters are incremented by 1 (steps S135 and S136). When it is detected in step S133 that there are a plurality of “1” bits, the value of the 10 counter is increased by a value corresponding to the number of bits. Further, the 15 counter, the 10 counter, and the 4 counter are 1-byte counters formed in the RAM 55, respectively.

  In this embodiment, 15 winning balls are paid out for winning through the big winning opening, 4 winning balls are paid out for winning through the starting winning opening 14, and winning through other ordinary winning openings. Suppose that 10 prize balls are paid out.

  FIG. 18 is a flowchart showing an example of a prize ball process in step 31 in the timer interrupt process. In the prize ball processing, the CPU 56 performs control (for example, setting in a register) for setting a command transmission table in which a payout control command indicating the number of prize balls according to the winning is stored, and performs control for transmitting the payout control command. . First, the value of the 15 counter is checked (step S211). The 15 counter is counted up when a game ball wins a big winning opening and the count switch 23 is turned on. If the value of the 15 counter is not 0, a command transmission table storing 15 prize ball number commands is set (step S212), and command control processing is executed (step S213). Further, the value of the 15 counter is decremented by 1 (step S214).

  If the value of the 15 counter is 0, the value of the 10 counter is checked (step S215). The ten counter is counted up when a game ball wins a normal winning opening and the winning opening switches 29a, 30a, 33a, 39a are turned on. If the value of the 10 counter is not 0, a command transmission table storing 10 winning ball number commands is set (step S216), and command control processing is executed (step S217). Also, the value of the 10 counter is decremented by 1 (step S218).

  If the value of the 10 counter is 0, the value of the 4 counter is checked (step S221). The four counter is counted up when the game ball wins the start winning opening and the start opening switch 14a is turned on. If the value of the four counter is not 0, the command transmission table for the four winning ball number instructions is set (step S222), and the command control process is executed (step S223). Also, the value of the four counter is decremented by -1 (step S224).

  As described above, when the game control means tries to output a payout control command to the payout control board 37, the command transmission table is set. Then, a payout control command is transmitted based on the contents of the command transmission table. The command transmission table is stored in the ROM 54. FIG. 19A is an explanatory diagram illustrating a configuration example of the command transmission table. One command transmission table is composed of 3 bytes with consecutive addresses, and INT data is set in the first byte. Further, MODE data of the first byte of the payout control command is set in the command data 1 of the second byte. Then, in the command data 2 of the third byte, EXT data of the second byte of the payout control command is set.

  In the process shown in FIG. 18, only a command transmission table setting process for one payout control command is performed per process, but a plurality of command transmission table setting processes may be performed. For example, when a plurality of winnings are stored in the 15 counter, 10 counter, and 4 counters, a plurality of command transmission table setting processes may be performed in one winning ball signal process.

  In the prize ball process, the processes of steps S212, S213, S216, S217, S222, and S223 are executed immediately when the 15 counter, 10 counter, or 4 counter reaches a non-zero value. In addition, the 15 counter, the 10 counter, or the 4 counter is detected when the corresponding switches 14a and 23 and winning port switches 29a, 30a, 33a, and 39a are turned on. Although there is a detection delay of several ms, it is immediately incremented by one. Accordingly, the game control means can immediately transmit a prize ball number command to the payout control means in response to the input of a winning detection signal from the winning detection means provided for each winning area.

  Although the payout control command will be described here, INT data, command data 1 and command data 2 are set in the command transmission table as shown in FIG. 19A when the display control command is transmitted. ing.

  FIG. 19B is an explanatory diagram showing a configuration example of INT data. Bit 0 in the INT data indicates whether or not a payout control command should be transmitted to the payout control board 37. In this example, if bit 0 is “1”, it indicates that a payout control command should be sent. Accordingly, “01 (H)” is set in the INT data in the command transmission table for the payout control command. Note that bit 1 of the INT data is a bit indicating whether or not a display control command should be sent. Therefore, “01 (H)” is set in the INT data in the command transmission table for the display control command.

  FIG. 20 is a flowchart illustrating a processing example of command control processing. The command control process is a process including a command transmission process. In the command control process, the CPU 56 first sets the address of the command transmission table (set in a register or the like) as a read pointer (step S231). Then, the data pointed to by the read pointer (in this case, the INT data of the command transmission table) is loaded into the argument 1 (step S232). The argument 1 is formed in the RAM 55, for example, and becomes input information for a command transmission process to be described later. Also, the read pointer is incremented by 1 (step S233). Therefore, the value pointed to by the read pointer matches the address of command data 1 in the command transmission table.

  Therefore, the CPU 56 reads the command data 1 and sets it as the argument 2 (step S234). The argument 2 is also formed in the RAM 55, for example, and becomes input information for command transmission processing to be described later. Then, the command transmission processing routine is called (step S235).

  FIG. 21 is a flowchart showing a command transmission routine. In the command transmission routine, the CPU 56 first sets the data set as the argument 1, that is, the INT data, in the work area determined as the comparison value (step S251). Next, the number of transmissions = 2 is set in the work area determined as the number of processes (step S252). Then, the address of the port for outputting the payout control command is set to the IO address (step S253).

  Next, the CPU 56 shifts the comparison value to the right by 1 bit (step S254). As a result of the shift process, it is confirmed whether or not the carry bit has become 1 (step S255). When the carry bit becomes 1, it means that the rightmost bit in the INT data is “1”. In this embodiment, two shift processes are performed. For example, when it is specified that a payout control command should be sent, the carry bit is set to 1 in the first shift process.

  When the carry bit becomes 1, the data set in the argument 2, in this case, command data 1 (that is, MODE data) is output to the address set as the IO address (step S 256). Since the port address for outputting the payout control command is set in the IO address when the first shift process is performed, the MODE data of the payout control command is output to the port 1 after all.

  Next, the CPU 56 adds 1 to the IO address (step S257) and subtracts 1 from the number of processes (step S258). It is assumed that the port address for outputting the display control command is set in the IO address by the addition process for the IO address. Then, the CPU 56 confirms the value of the number of processes (step S259), and if the value is not 0, returns to step S254. In step S254, the shift process is performed again.

  In the second shift process, the value of bit 1 in the INT data is pushed out, and the carry flag is set to “1” or “0” depending on the value of bit 1. Therefore, it is checked whether or not it is specified that the display control command should be sent. Thus, when each shift process is performed, an IO address corresponding to a command (payout control command, display control command) checked by the shift process is set as the IO address. Therefore, when the carry flag becomes “1”, the control command is sent to the output port corresponding to the payout control command or the display control command. That is, a single common module can perform control command transmission processing for each electric component control means.

  Next, the CPU 56 reads the content of the argument 1 storing the INT data before the start of the shift process (step S260), and outputs the read data to the output port for outputting the INT signal (step S261). . In the INT data, the bit corresponding to the output bit of the INT signal corresponding to the control command (payout control command, display control command) output in the processing of steps S251 to S259 is “1”. Therefore, the INT signal corresponding to the payout control command or the display control command is turned on.

  Next, the CPU 56 sets a predetermined value in the wait counter (step S262), and subtracts one by one until the value becomes 0 (steps S263 and S264). This process is a process for setting the ON period of the INT signal. When the value of the wait counter becomes 0, clear data (00) is set (step S265), and the data is output to the output port for outputting the INT signal (step S266). Therefore, the INT signal is turned off. Then, a predetermined value is set in the wait counter (step S262), and 1 is subtracted by one until the value becomes 0 (steps S268 and S269). This process is a process for setting a period until the start of output of EXT data.

  As described above, the MODE data of the first byte of the control command is transmitted. Therefore, the CPU 56 increments the read pointer by 1 in step S236 shown in FIG. Accordingly, the area of command data 2 in the third byte is designated by the read pointer. The CPU 56 loads the contents of the indicated command data 2 into the argument 2 (step S237).

  Next, the CPU 56 calls a command transmission processing routine (step S238). Therefore, the EXT data is transmitted at the same timing as the transmission of MODE data.

  As described above, a 2-byte control command (payout control command, display control command) is transmitted to the corresponding electrical component control means. When the electric component control means detects the falling edge of the INT signal, the control command capturing process is started. In addition, each electric component control means may start taking in the control command at the rising edge of the INT signal. Further, the polarity of the INT signal may be reversed from that shown in FIG.

  Next, the operation of the payout control means will be described. FIG. 22 is a flowchart showing main processing executed by the payout control means. In the main process, the payout control CPU 371 first performs necessary initial settings. That is, the payout control CPU 371 first sets the interruption prohibition (step S701). Next, the interrupt mode is set to interrupt mode 2 (step S702), and a stack pointer designation address is set to the stack pointer (step S703). The payout control CPU 371 initializes the built-in device register (step S704), initializes the CTC and PIO (step S705), and then sets the RAM in an accessible state (step S706). . Further, 0000 (H) is set in a predetermined register as each counter initial value used in the payout control process (step S707).

  In this embodiment, one channel of the built-in CTC is used in the timer mode. Accordingly, in the built-in device register setting process in step S704 and the process in step S705, register setting for setting the channel to be used to timer mode, register setting for permitting interrupt generation, and setting an interrupt vector. The register is set. The interrupt by the channel is used as a timer interrupt. For example, when it is desired to generate a timer interrupt every 2 ms, a value corresponding to 2 ms is set as an initial value in a predetermined register (time constant register).

  The interrupt vector set for the channel set to the timer mode corresponds to the start address of the timer interrupt process. Specifically, the start address of the timer interrupt process is specified by the value set in the I register and the interrupt vector. In the timer interruption process, a payout control process for controlling the payout means (including at least a process of driving the ball payout device 97 in response to a command signal related to award ball payout from the main board, and a ball payout device 97 in response to a ball lending request. A process for driving the program may be included.

  Next, the state of the clear switch signal from the clear switch 921 input through the input port is confirmed only once (step S708). When ON is detected in the confirmation (Y in step S708), the payout control CPU 371 executes an initialization process (steps S712 to S715). That is, when the clear switch 921 is turned on, initialization processing is executed.

  When the clear switch signal from the clear switch 921 is not in the on state, the data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) is performed when power supply to the gaming machine is stopped. It is confirmed whether it has been received (step S709). Whether or not the protection process has been performed depends on the value of the backup monitoring timer stored in the backup RAM area in the power supply stop process described later according to the execution of the data protection process in the backup RAM area (for example, It is confirmed by whether or not 10). Note that such a confirmation method is an example. For example, a flag indicating that data protection processing has been executed is set in the backup flag area in the power supply stop processing, and the flag is set in step S709. If it is confirmed that there is a backup, it may be determined that there is a backup.

  If it is determined that there is a backup, the payout control CPU 371 performs a data check (parity check in this example) in the backup RAM area (step S710). In this embodiment, clear data (00) is set in the checksum data area, and the checksum calculation start address is set in the pointer. Also, the number of checksum calculations corresponding to the number of data to be checksum is set. Then, the exclusive OR of the contents of the checksum data area and the contents of the RAM area pointed to by the pointer is calculated. The calculation result is stored in the checksum data area, the pointer value is incremented by 1, and the checksum calculation count value is decremented by 1. The above processing is repeated until the value of the checksum calculation count becomes zero. When the value of the checksum calculation count reaches 0, the CPU 56 inverts the value of each bit of the contents of the checksum data area and uses the inverted data as the checksum.

  In the power supply stop process, a checksum is calculated by the same process as described above, and the checksum is stored in the backup RAM area. In step S710, the calculated checksum is compared with the stored checksum. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state at the time of stopping the power supply, the payout control state restoration processing is not executed, and the initialization processing (steps S712 to S715) is executed.

  If the check result is normal, the payout control CPU 371 performs payout control state recovery processing. Specifically, the value of each counter formed in the backup RAM is set in a predetermined register as an initial value of a counter (such as a prize ball unpaid number counter) used in the payout control process (step S711). And the process after step S712 is performed.

  In the initialization process, the payout control CPU 371 first performs a RAM clear process (step S712). In addition, initial values are set in the flags and counters of the RAM area (step S713). The processing in step S713 includes processing for setting an initial value of the counter (for example, set in a predetermined register) to a counter (formed in the RAM) used in the payout control processing. Therefore, when the payout control state restoration process (step S711) is executed, the value of the counter stored in the backup RAM is set again in the counter. In other words, the counter value stored in the backup RAM is used as it is. That is, when the process of steps S712 and S713 is executed without executing the process of step S711, the payout control process is started from the initial state. Further, when the process of step S711 is executed and the processes of steps S712 and S713 are executed, the execution state of the payout control process is returned to the state before the power supply is stopped.

  Then, the CTC register provided in the payout control CPU 371 is set so that a timer interrupt is periodically received (step S714). That is, a value corresponding to the timer interrupt generation interval is set as an initial value in a predetermined register (time constant register). Since interruption is prohibited in step S701 of the initial setting process, interruption is permitted before the initialization process is completed (step S715). Thereafter, a loop process for monitoring the occurrence of a timer interrupt is entered. When a timer interrupt occurs, the payout control CPU 371 executes a timer interrupt process.

  FIG. 23 is a flowchart showing an example of timer interrupt processing executed by the payout control means. The payout control CPU 371 first detects whether or not a power-off signal is output (whether or not it is turned on), and executes a power-off process when the power-off signal is output. (Power-off detection processing) is executed (step S748). Thereafter, the payout control process after step S749 is executed. In the payout control process, the payout control CPU 371 first confirms whether or not a payout control command has been received, and executes a command analysis process for analyzing the contents of the payout control command if received (step S749). ).

  Next, an excitation pattern output process for the firing motor 94 (output of the patterns of the firing motors φ1 to φ4 to the output port 0) is performed (step S750). In the firing motor control process in step S752, the excitation pattern is stored in the excitation pattern buffer that is the RAM area. In step S750, the payout control CPU 371 outputs the contents of the excitation pattern buffer to the lower 4 bits of the output port 0. Perform the process.

  Next, the payout control CPU 371 performs input determination processing (step S751). The input determination process includes a process of checking the status of the detection signals of the payout number count switch 301 and the error release switch 375. Specifically, switch timers (payout number count switch timer, error release switch timer) corresponding to each of them are formed in the RAM, and when it is detected in the switch check process that they are on, the corresponding switch timer The value of the switch timer is incremented by one, and when it is detected that the switch is off, the corresponding switch timer value is cleared.

  Next, the payout control CPU 371 executes a firing motor control process (step S752). In the firing motor control process, the patterns of the firing motors φ1 to φ4 are stored in the excitation pattern buffer. When the firing motor 94 should be disabled, the patterns of the firing motors φ1 to φ4 that do not rotate the firing motor 94 are stored in the excitation pattern buffer. Also, the payout control CPU 371 executes a payout motor control process (step S753). In the payout motor control process, when the payout motor 289 is to be driven, a process for outputting the patterns of the payout motors φ1 to φ4 to the output port 0 is performed.

  Further, the payout control CPU 371 executes a prepaid card unit control process for communicating with the card unit 50 (step S754). Next, a prize ball lending control process for performing a control for paying out a lending ball in response to a ball lending request from the card unit 50 and performing a control for paying out the number of award balls indicated by a prize ball number command from the main board. Is executed (step S756).

  Then, the payout control CPU 371 executes error processing for detecting various errors (step S757). Further, an information output process for outputting prize ball information and ball lending information output to the outside of the gaming machine is executed (step S758). Further, a predetermined display is performed on the error display LED 374 according to the result of the error processing, and a display control process for lighting the prize ball LED 51 and the ball out LED 52 is executed (step S759). In the display control process, the payout control CPU 371 performs control for lighting the prize ball LED 51 when the prize ball REQ signal is on. Further, when the prize ball REQ signal is turned off, control for turning off the prize ball LED 51 is performed.

  In this embodiment, a RAM area corresponding to the output state of the output port is provided, but the payout control CPU 371 outputs the contents to the output port (step S760: output processing).

  FIG. 24 is an explanatory diagram showing an example of a counter used by the payout control means in the payout control process. In this embodiment, a prize-ball-payout-scheduled total counter that stores the total number of prize-balls to be paid out, which is the number obtained by cumulatively adding the numbers specified in the prize-ball number command, and an addition process (addition process) described later are executed. A total number of previous winning ball payout totals counter that stores the total number of winning ball payouts prior to being played, a payout operation counter in which a value corresponding to the number of revolutions of the payout motor 289 at the time of winning a prize ball is set, and a series of winning balls A winning ball unpaid number counter in which the number of winning balls at the time of paying is set and a lending ball unpaid number counter in which the number of lending balls is set are used. These counters are formed in the RAM.

  The payout operation counter is used to determine the rotation speed of the payout motor 289. The values of the award ball unpaid number counter and the lending ball unpaid number counter are decremented by 1 when the payout number count switch 301 is turned on (the game ball passes the switch). Therefore, the award ball unpaid number counter and the lending ball unpaid number counter detect that the game ball finally paid out by the payout motor 289 passes through the payout number count switch 301 (the count value becomes 0). Used to determine that the award ball lending and ball lending have been completed.

  In order to determine the rotation speed of the payout motor 289, a payout operation timer that determines a rotation time according to the payout number may be used instead of the payout operation counter. When the payout operation timer is used, the data held in the drive amount data storage means (in this case, the timer value of the payout operation timer) corresponds to the drive amount of the payout drive means (in this example, the payout motor 289). The driving amount updating means for subtracting the minute amount corresponds to executing a process of reducing the timer value of the payout operation timer as time elapses.

  FIG. 25 is an explanatory diagram showing a configuration example of a reception buffer for storing a payout control command received from the main board 31. In this example, a ring buffer type reception buffer capable of storing six 2-byte payout control commands is used. The reception buffer is configured by a 12-byte area of command reception buffers 1 to 12. A command reception number counter indicating in which area the received command is stored is used. The command reception number counter takes a value from 0 to 11.

  FIG. 26 is a flowchart showing command reception processing. An INT signal for payout control from the main board 31 is input to an interrupt terminal of the payout control CPU 371. Therefore, when the INT signal from the main board 31 is turned on, the payout control CPU 371 is interrupted, and the payout control command reception process shown in FIG. 26 is started. That is, the payout control means receives the payout control command by an interrupt process that is activated based on the input of an input signal to the interrupt terminal.

  In the payout control command reception process, the payout control CPU 371 first saves each register in the stack (step S850). Next, the data is read from the input port assigned to the input of the payout control command data (step S851). Then, it is confirmed whether or not it is the first byte of the 2-byte payout control command (step S852). Whether or not it is the first byte is confirmed by whether or not the first bit of the received command is “1”. The first bit being “1” should be the MODE byte (first byte) in the payout control command having a 2-byte configuration. Therefore, if the first bit is “1”, the payout control CPU 371 determines that the valid first byte has been received, and stores the received command in the confirmed command buffer indicated by the command reception number counter in the reception buffer area (step S31). S853).

  If it is not the first byte of the payout control command, it is confirmed whether or not the first byte has already been received (step S854). Whether or not it has already been received is confirmed by whether or not valid data is set in the reception buffer (deterministic command buffer).

  If the first byte has already been received, it is confirmed whether or not the first bit of the received 1 byte is “0”. If the first bit is “0”, it is determined that the valid second byte has been received, and the received command is stored in the confirmed command buffer indicated by the command reception number counter + 1 in the reception buffer area (step S855). The leading bit “0” is supposed to be the EXT byte (second byte) of the payout control command having a 2-byte configuration. If the confirmation result in step S854 indicates that the first byte has already been received, the process ends unless the first bit of the data received as the second byte is “0”.

  When the second byte of command data is stored in step S855, 2 is added to the command reception number counter (step S856). Then, it is confirmed whether or not the command reception counter is 12 or more (step S857). If it is 12 or more, the command reception number counter is cleared (step S858). Thereafter, the saved register is restored (step S859), and interrupt permission is set (step S859).

  FIG. 27 is a flowchart illustrating an example of the command analysis processing in step S749. In the command analysis process, the payout control CPU 371 checks whether or not the received payout control command (reception command) is in the reception buffer (step S501). If there is a received command, it is confirmed whether or not the received payout control command is a command for a prize ball number command (step S502). When there are a plurality of reception commands in the reception buffer, the confirmation in step S502 is performed for the reception command received most recently. If the received command is a command for a prize ball number command, the number designated by the prize ball number command is added to a prize ball payout total number counter (step S503).

  Here, the ball lending command from the card unit 50 will be described. FIG. 28 is a timing chart for explaining the communication between the payout control means of the gaming machine and the card unit 50. The payout control means turns on the PRDY signal when power supply to the gaming machine is started and a payout operation is possible. When the power supply is started, the card unit 50 turns on the VL signal as a connection signal. When a card is received in the card unit 50, the ball lending switch is operated and a ball lending switch signal is input, the card unit 50 outputs a BRDY signal to the payout control means. That is, the BRDY signal is turned on. When a predetermined delay time elapses from this point, the card unit 50 outputs a BRQ signal to the payout control means. That is, the BRQ signal is turned on.

  Then, when the payout control means turns on the EXS signal for the card unit 50 and detects the fall (off) of the BRQ signal from the card unit 50, the payout control unit 289 drives the payout motor 289 to set a predetermined number (for example, 25). Pay out the rental balls to the player. Then, when the payout is completed, the payout control means causes the EXS signal to the card unit 50 to fall. That is, the EXS signal is turned off.

  FIG. 29 is a flowchart showing the payout motor control process in step S753. In the payout motor control process, if the payout motor 289 is rotating (step S511), the payout control CPU 371 checks the detection output of the payout motor position sensor 295, and the detection output is turned on by the payout motor position sensor 295. If this is the case, the value of the payout operation counter is decremented by 1 (steps S512 and S513). Thereafter, any one of steps S521 to S526 is executed according to the value of the payout motor control code.

  For example, when the payout control CPU 371 detects that the value of the payout operation counter has reached a predetermined value (for example, 1) in the payout motor low speed process in step S524, the payout motor brake in step S525 is used to stop the payout motor 289. Start processing. Further, in this embodiment, when the payout motor 289 is rotated 1/2, one game ball is paid out, and the payout motor position sensor 295 is turned on twice during one rotation. Take as an example. Accordingly, when paying out n game balls, the payout motor position sensor 295 is turned on n times.

  In the payout motor normal process (step S521) executed when the value of the payout motor control code is 0, the payout control CPU 371 sets the pointer at the head address of the table stored in the ROM. The payout motor normal process setting table stores a payout motor excitation pattern table in which data of excitation patterns (payout motors φ1 to φ4) of each step for rotating the payout motor 289 at the time of ball payout is sequentially set. Yes.

  In the payout motor start preparation process (step S522) executed when the value of the payout motor control code is 1, the payout control CPU 371 outputs the output port buffer corresponding to the output state of the output port that outputs the payout motors φ1 to φ4. Perform processing such as setting the initial value of the excitation pattern. Then, the value of the dispensing motor control code is changed to 2.

  In the payout motor slow-up process (step S523) executed when the value of the payout motor control code is 2, the payout control CPU 371 starts the rotation of the payout motor 289 more smoothly than in the case of the constant speed process. Corresponds to the output state of the output port that outputs the payout motors φ1 to φ4 by reading the contents of the payout motor excitation pattern table at a long interval and gradually approaching the time interval in the case of constant speed processing Set the output port buffer. At the time of reading, the contents of the payout motor excitation pattern table at the address pointed to by the pointer are read and the value of the pointer is incremented by one. If a predetermined time has elapsed since the value of the payout motor control code becomes 2, the value of the payout motor control code is changed to 3.

  In the payout motor constant speed process (step S524) executed when the value of the payout motor control code is 3, the payout control CPU 371 periodically reads the contents of the payout motor excitation pattern table and pays out the payout motors φ1 to φ4. Is set in the output port buffer corresponding to the output state of the output port that outputs. When a predetermined time comes before the time when the payout motor 289 should be stopped (the time when the payout of the game ball is finished), the value of the payout motor control code is changed to 4. Whether or not a predetermined time has passed is confirmed, for example, by the value of the payout operation counter having reached a predetermined value (for example, 1).

  In the payout motor brake process (step S525) executed when the value of the payout motor control code is 4, the payout control CPU 371 has a longer interval than in the case of the constant speed process in order to stop the payout motor 289 smoothly. In addition, the content of the payout motor excitation pattern table is read at a time interval that gradually moves away from the time interval in the case of constant speed processing, and the output corresponding to the output state of the output port that outputs the payout motors φ1 to φ4 Set to port buffer. When the dispensing motor 289 is finally stopped, the value of the dispensing motor control code is changed to zero. The payout control CPU 371 finally stops the payout motor 289 by stopping driving the payout motor 289 when the value of the payout operation counter reaches a value corresponding to the end of payout of the game ball (for example, 0). Stop.

  In the ball biting payout motor brake process (step S526) executed when the value of the payout motor control code is 5, the payout control CPU 371 smoothes the payout motor 289 in the case of rotation for releasing the ball biting. The payout motor excitation pattern is longer than the rotation of the payout motor 289 for releasing the ball biting, and gradually away from the time interval in the case of constant speed processing. The contents of the table are read out and set in the output port buffer corresponding to the output state of the output port that outputs the dispensing motors φ1 to φ4. Note that the contents of the output port buffer corresponding to the output state of the output port that outputs the payout motors φ1 to φ4 are output to the output port in the output process of step S760. The payout control CPU 371 changes the value of the payout motor control code to 5 when it detects a ball bite in steps S523 to S525.

  FIG. 30 is a flowchart showing the prize ball lending control processing in step S756. In the winning ball lending control process, the payout control CPU 371 first executes a winning ball payout amount addition control (step S600). The prize ball payout number addition control is a process for adding the number of newly received prize ball number commands to the number of prize balls to be paid out.

  Next, when the payout control CPU 371 confirms that the detection signal of the payout number count switch 301 is turned on (step S601), the payout control CPU 371 determines whether or not the ball is being loaned based on the ball lending operation in progress flag ( Step S602). If the ball is being lent, the value of the unpaid ball rental counter is decremented by 1 (step S603). If not, the value of the prize ball unpaid counter is decremented by 1 (step S604). Thereafter, any one of steps S610 to S612 is executed according to the value of the payout control code.

  FIG. 31 is a flowchart showing the award ball payout amount addition control. In the prize ball payout addition control, the payout control CPU 371 determines whether there is a bit indicating an error state in a set error flag in which various error states are reflected in each bit, and the error state. If there is a bit indicating, the processing is terminated without doing anything (step S691). Further, it is determined whether or not the ball lending operation flag is set. If it is set, the processing is terminated without doing anything (step S692). Since the winning ball lending control process is executed every 2 ms, the winning ball payout addition control is also executed every 2 ms. However, in the error state due to the process of step S691, the processes after step S694 are not executed. Further, even during the ball lending process based on the ball lending request from the prepaid card unit 50, the processes after step S694 are not executed.

  Furthermore, the payout control CPU 371 determines whether or not the value of the payout operation counter has reached a predetermined value (for example, 1) (step S693). When the predetermined value is reached, the processing after step S694 is executed. However, if the predetermined value is not reached, the processing after step S694 is not executed. Note that the processing after step S694 is executed at the timing when the value of the payout operation counter is updated to a predetermined value (for example, when the value is changed from 2 to 1), and is not always executed in a state where the predetermined value is reached. Absent.

  In step S694, the payout control CPU 371 checks whether or not the content of the planned winning ball payout counter (PA) is the same as the content of the previous winning ball payout total counter (PB). If they are not the same, a process for adding the number of prize balls to be paid after step S695 (hereinafter referred to as an addition process or an addition process) is executed. The previous prize ball payout total counter (PB) is set with the content of the prize ball payout total counter (PA) at the start of the prize ball payout process and when the extra process (previous addition process) is executed. Yes. Further, when a prize ball number command is received from the game control means, the number instructed by the prize ball number command is added to a prize ball payout scheduled total counter (PA) (see FIG. 27). Accordingly, the fact that the content of the total number of winning ball payout counter (PA) is different from the content of the previous total number of paying ball counter (PB) means that a new winning ball number command has been received from the game control means. Therefore, if the conditions for prohibiting the addition of steps S691 to S693 are not satisfied, the addition process after step S695 is performed. The value of the payout operation counter is updated to a predetermined value when the payout motor 289 is rotating (see steps S511 and S513), that is, when a game ball is being paid out. According to the determination of 692, the process after step S695 is not executed during the non-execution of the prize ball payout.

  In step S695, the payout control CPU 371 adds, to the payout operation counter, a value corresponding to the difference between the content of the total prize ball payout total counter (PA) and the content of the previous prize ball payout total counter (PB). To update the payout operation counter (step S695). In addition, the difference between the contents of the total number of expected winning ball payout counter (PA) and the content of the total number of previous winning ball payout scheduled counter (PB) is added to the number of unpaid prize ball counter (step S696). Furthermore, the previous winning ball payout scheduled total counter (PB) is updated by setting the content of the expected winning ball payout total counter (PA) in the previous winning ball payout scheduled total counter (PB) (step S697). In this embodiment, when one game ball is paid out from the payout motor 289, the value of the payout operation counter is decremented by 1. Therefore, the addition value for the payout operation counter and the addition for the award ball non-payout number counter are added. The value is the same value.

  As described above, the addition process is executed only at the timing when the value of the payout operation counter is updated to a predetermined value. Therefore, it is possible to reduce the number of determinations as to whether or not the data has increased (the process of step S694), and to reduce the burden of the determination process.

  In step S697, instead of setting the content of the planned total payout ball counter (PA) in the previous total payout ball counter (PB), the planned total payout ball counter (PA) and the previous prize ball payout are set. The contents of the scheduled total counter (PB) may be cleared to zero. That is, when the increase determination means determines that the data has increased, the increase number specifying means moves the increase data stored in the prize game medium number data storage means to the payout operation counter (step S695). The stored contents of the prize game medium number data storage means (in this example, the prize ball payout scheduled total counter (PA)) and the previous prize game medium number data storage means (in this example, the previous prize ball payout scheduled total counter (PB)) are stored. It may be initialized. In such a case, it is possible to prevent the storage capacities of the premium game medium number data storage means and the previous premium game medium number data storage means from increasing.

  In this embodiment, since one game payout device 97 performs game ball payout based on the prize ball number command and game ball payout based on the loan request, when the ball lending process is executed, The prize ball payout process cannot be executed. Therefore, even if the extra process is performed while the ball lending process is being performed, the award ball payout is not performed, and therefore a meaningless process is performed. However, by prohibiting the extra process when performing the ball lending process, it is possible to improve the efficiency of the extra process so that the meaningless process is not executed.

  Similarly, the prize ball payout process cannot be executed in an error state. Therefore, even if the extra process is performed in an error state, the prize ball payout is not executed, and therefore a meaningless process is performed. However, by prohibiting the extra process in the error state, it is possible to improve the efficiency of the extra process so that the meaningless process is not executed. The addition process is executed collectively when the error state is canceled based on the operation signal from the error cancellation switch 375 (additions based on all prize ball number commands received in the error state are added. )

  FIG. 32 is a flowchart showing a payout start waiting process (step S610) executed when the payout control code is 0. In the payout start waiting process, the payout control CPU 371 does not execute the subsequent processes if the error bit is set (step S621).

  If the BRDY signal is not on (step S622), processing for paying out a prize ball after step S631 is executed. If the BRDY signal is on and the BRQ signal that is a ball lending request signal is on, a ball lending operation flag is set (steps S623 and S624). Then, “25” is set in the unpaid ball lending number counter (step S625), and “25” is set in the payout operation counter (step S626).

  The payout operation counter is referred to in the payout motor control process (step S768). That is, in the payout motor control process, control is performed to rotate the payout motor 289 by the number of rotations corresponding to the value set in the payout operation counter.

  Thereafter, the payout control CPU 371 sets a value (specifically “1”) corresponding to the payout motor activation preparation process (step S522) to the payout motor control code for selecting the process executed in the payout motor control process. It is set (step S627), the value of the payout control code is set to 1 (step S628), and the process is terminated.

  In step S631, the payout control CPU 371 checks whether or not the content of the winning ball payout scheduled total counter (PA) is 0 (step S631). If 0, the process ends. A value other than 0 (the number indicated by the prize ball number command) is added to the prize ball payout scheduled total counter (PA) when a prize ball number command is received from the game control means of the main board 31 in the command analysis process. ing. If the content of the total number of paying ball counters (PA) is not 0, the content of the total number of paying ball counters (PA) is set in the payout operation counter (step S632), and the number of winning balls in the award ball unpaid number counter is set as a prize ball. The contents of the payout scheduled total counter (PA) are set (step S633). In addition, the content of the total number of winning ball payouts counter (PA) is set in the previous number of paying ball payouts total counter (PB) (step S634). Then, a winning ball moving flag is set (step S635), and the process proceeds to step S627.

  FIG. 33 is a flowchart showing a payout motor stop waiting process (step S611) executed when the payout control code is 1. In the payout motor stop waiting process, the payout control CPU 371 checks whether or not the payout operation of the payout motor 289 has ended (step S641). For example, the payout control CPU 371 sets a flag to that effect when the payout motor brake process (step S525) in the payout motor control process ends, and confirms the flag in step S641 so that the payout motor 289 pays out. It can be confirmed whether or not the operation is completed.

  When the payout operation of the payout motor 289 is completed, the payout control CPU 371 sets the payout passing monitoring time in the payout control monitoring timer (step S642). The payout passing monitoring time is a time that has a margin in the time from when the last payout ball is paid out by the payout motor 289 until it passes through the payout number count switch 301. Then, the value of the payout control code is set to 2 (step S643), and the process ends.

  FIG. 34 and FIG. 35 are flowcharts showing a payout passing waiting process (step S612) executed when the value of the payout control code is 2. In the payout passing waiting process, when the prize ball is being paid out, it is determined that the payout has been completed normally if the value of the prize ball unpaid number counter is 0. Note that the value set in the payout operation counter for determining the rotation amount of the payout motor 289 corresponds to the value set in the award ball non-payout number counter at the start of the payout process, and the control here is performed. When executed, the value of the payout operation counter is 0 corresponding to the stop of the payout motor 289 (the payout motor 289 has been paid out). The payout motor 289 should have made a predetermined number of payouts, but the payout number count switch 301 provided at the bottom of the ball payout device 97 could only detect less than a predetermined number of payouts. Become. That is, the payout has not been completed normally.

  When the value of the award ball unpaid-out counter is not 0, if the error ball is not in an error state, a game ball re-payout operation is attempted. In the re-payout operation, when it is detected by the payout number count switch 301 that the game ball is actually paid out, it is determined that the payout has been completed normally.

  Further, when the ball lending is being paid out, it is determined that the payout has been completed normally if the value of the ball lending unpaid-out counter is 0. If the value of the ball lending unpaid number counter is not 0, if it is not an error state, a re-payout operation of the game ball or the remaining number of ball lending (corresponding to the value of the ball lending unpaid number counter) is attempted.

  As a specific process of the above description, in the payout passing waiting process, the payout control CPU 371 decrements the value of the payout control timer by 1 if the value of the payout control timer is not 0 (step S651). If the value of the payout control timer is not 0 (step S652), that is, if the payout control timer has not timed out, the process is terminated.

  If the payout control timer has timed out (step S652), it is determined whether or not a ball lending payout process (ball lending operation) has been executed (step S653). Whether or not the ball lending operation has been executed is confirmed by whether or not the ball lending operation in progress flag in the payout control state flag formed in the RAM is set. When the ball lending operation is not executed, that is, when the prize ball payout process (prize ball operation) is executed, the payout control CPU 371 checks the value of the award ball unpaid number counter (step S654). ). If the value of the prize ball unpaid number counter is 0, the following process is performed assuming that the prize ball payout process is normally completed.

  That is, the value set in the previous prize ball payout total counter (PB) is subtracted from the contents of the prize ball payout total counter (PA) (step S671). Then, the content of the previous winning ball payout scheduled total counter (PB) is cleared (initialized) to 0 (step S672).

  In addition, the payout ball detection bit, the re-payout operation bit, the winning ball operation flag and the ball lending operation bit in the payout control state flag are reset (step S655), the payout control code is set to 0 (step S656), and the processing is performed. The re-payout operation bit is a control bit used when the re-payout process is executed.

  In step S671, the content of the previous total number of payout balls counter (PB) is subtracted without clearing the content of the total number of payballs scheduled to be paid out (PA). In consideration of the fact that a new prize ball number command is received and the contents of the prize ball payout scheduled total counter (PA) may increase during the execution of.

  Further, although not explicitly shown in FIG. 34, the addition process is not executed while the payout passing waiting process is being executed. If executed, the initialization process of step S672 is executed in spite of the content of the previous winning ball payout scheduled total counter (PB) being updated, whereby the previous winning ball payout scheduled total counter (PB). This is because the number of prize balls paid out may not be accurate. Also, the value of the award ball unpaid out counter is increased (see step S696), and the check process in step S654 cannot be executed normally.

  The payout control CPU 371 determines that an error flag (specifically, a payout switch error error 1 bit, a payout switch error error 2 bit, and a payout case error bit when the value of the award ball unpaid number counter is not 0. The re-payout operation is executed on the condition that any one or a plurality of bits) is not set (step S659). If the error flag is set, the re-payout operation is not executed.

  In order to execute the re-payout process, the pay-out control CPU 371 first checks whether or not the re-payout operation in-progress bit is set (step S661). If not set, the re-payout operation in-progress bit is set (step S662), and a value corresponding to the value of the award ball unpaid number counter or the ball lending unpaid number counter is set in the payout operation counter (step S663). ). Thereafter, the payout control code is set to 1 (step S667), and the process is terminated.

  In step S661, when it is confirmed that the re-payout operation in-progress bit is set, the payout control CPU 371 does not pay out the game ball even when the re-payout process is executed (the payout number count switch 301 is set in the game ball). Is not detected), a payout case error bit in the error flag is set (step S666). At that time, the re-payout operation in-progress bit is reset (step S665). Then, the process ends.

  As described above, if the game ball is not paid out correctly even after performing the re-payout operation in the re-payout process (corrected payout process), the payout count switch non-passing error bit (payout) is assumed as a game ball payout operation failure. Case error bit) is set.

  Upon confirming that the ball lending / dispensing process (ball lending operation) has been executed in step S653, the payout control CPU 371 confirms whether or not the value of the unlapped ball lending number counter is 0 (step S657). . If it is 0, it is determined that the ball lending / dispensing process is normally completed, and the process proceeds to step S655.

  If the value of the ball lending unpaid number counter is not 0, an error flag (specifically, any one bit of the payout switch abnormal error 1 bit, the payout switch abnormal error 2 bit, and the payout case error bit) On the condition that (multiple bits) is not set (step S658), the re-payout process is executed. If the error flag is set, the re-payout process is not executed.

  Next, error processing will be described. FIG. 36 is an explanatory diagram showing the relationship between the type of error and the display of the LED 374 for error display. In the error flag (for example, 1 byte) formed in the RAM, there are bits corresponding to the errors shown in FIG. As shown in FIG. 36, when the connection confirmation signal from the main board 31 is turned off, the payout control CPU 371 displays “1” on the error display LED 374 as a main board non-connection error. I do.

  When the disconnection of the payout count switch 301 or a ball clogging occurs at the payout count switch 301, the error display LED 374 is controlled to display “2” as the payout switch abnormality detection error 1. The disconnection of the payout number count switch 301 or the occurrence of ball clogging in the payout number count switch 301 is determined by the detection signal of the payout number count switch 301 not being turned off.

  When the detection signal of the payout number count switch 301 is turned on even though the game ball is not paying out, a control for displaying “3” on the error display LED 374 as a payout switch abnormality detection error 2 is performed. Do. If the detection signal of the payout count switch 301 does not turn on despite the rotation abnormality of the payout motor 289 or the game ball being paid out, “4” is displayed on the error display LED 374 as a payout case error. Control. The specific method for detecting that the detection signal of the payout number count switch 301 is not turned on is as described above.

  In addition, when the lower pan is full, that is, when the full switch 48 is turned on, control is performed to display “6” on the error display LED 374 as a full error. When the supply ball is insufficient, that is, when the ball break switch 187 is turned on, control is performed to display “7” on the error display LED 374 as a ball break error.

  Further, when the VL signal from the card unit 50 is turned off, control is performed to display “8” on the error display LED 374 as a prepaid card unit unconnected error. When communication with the card unit 50 is performed at an improper timing, control is performed to display “9” on the error display LED 374 as a prepaid card unit communication error. The prepaid card unit communication error is detected in the prepaid card unit control process (step S754).

  Among the above errors, after a payout switch abnormality detection error 2, a payout case error or a prize ball REQ signal error occurs, the error release switch 375 is operated and an operation signal is output from the error release switch 375 (becomes turned on). The payout control means returns to the state before the error occurred.

  FIG. 37 is a flowchart showing the error processing in step S757. In the error processing, the payout control CPU 371 checks the error flag, and the set bits are only payout switch abnormality detection error 2, payout case error and prize ball REQ signal error (any one of the three). It is confirmed whether it is only a bit, or only two bits out of three, or only these three bits (step S801). If only those bits are set, it is confirmed whether or not the operation signal is turned on from the error release switch 375 (step S802). When the operation signal is turned on, the bits of the payout switch abnormality detection error 2, the payout case error, and the winning ball REQ signal error in the error flag are reset (step S807), and the process proceeds to step S808.

  When the processing of step S807 is executed, there may be an error bit that is not in the set state among the bits of the payout switch abnormality detection error 2, the payout case error, and the prize ball REQ signal error. There is no problem resetting error bits that are not in the state. As described above, in this embodiment, when an error (see FIG. 36) that causes the setting of the payout switch abnormality detection error 2, the payout case error, or the prize ball REQ signal error bit occurs, an error occurs. The error is released when the release switch 375 is pressed.

  In step S808, the payout control CPU 371 checks the detection signal of the full tank switch 48. If the detection signal of the full tank switch 48 is output (if it is in the ON state), the full tank error bit in the error flag is set (step S809). If the detection signal of the full tank switch 48 is in the OFF state, the full tank error bit is reset (step S810).

  Also, the payout control CPU 371 checks the detection signal of the ball break switch 187 (step S811). If the detection signal of the ball break switch 187 is output (if it is on), the ball break error bit in the error flag is set (step S812). If the detection signal of the ball break switch 187 is OFF, the ball break error bit is reset (step S813). When the ball break error bit is set, the bit corresponding to the ball break LED 52 in the output port 1 buffer is set to a value corresponding to the lighting state in the display control process of step S759.

  Further, the payout control CPU 371 checks the state of the connection confirmation signal from the main board 31 (step S815). If the connection confirmation signal is not output (if it is in the off state), the main board unconnected error bit is set. Set (step S816). If the connection confirmation signal is output (if it is on), the main board non-connection error bit is reset (step S817).

  Further, the payout control CPU 371 checks the value of the switch timer corresponding to the payout number count switch 301 among the switch timers in which the state of the detection signal of each switch is set, and the value is the switch on maximum time (for example, “ 240 ") (step S818), the bit of the payout switch abnormality detection error 1 is set in the error flag (step S819). If the value of the switch timer corresponding to the payout number count switch 301 is less than the switch-on maximum time, the bit of the payout switch abnormality detection error 1 is reset (step S820). Note that the value of each switch timer is incremented by 1 when the state of the input port to which the detection signal of each switch is input is switched on in the input determination process of step S751, and cleared by 0 when it is off. Accordingly, the fact that the value of the switch timer corresponding to the payout number count switch 301 exceeds the maximum switch-on time means that the payout number count switch 301 is in the ON state beyond the maximum switch-on time. Then, it is determined that the game ball is clogged at the disconnection of the payout number count switch 301 or at the portion of the payout number count switch 301.

  Further, the payout control CPU 371, when the value of the switch timer corresponding to the payout number count switch 301 becomes a switch-on determination value (eg, “2”) (step S821), the ball lending operation flag and the winning ball operation If both the middle flags are in the reset state, the game ball has passed through the payout number count switch 301 even though the payout operation is not in progress, and the bit of the payout switch abnormality detection error 2 in the error flag is set (steps S822 and S823). . If the ball lending operation flag or the winning ball operation flag is set, the bit of the payout switch abnormality detection error 2 is reset (step S824).

  Further, the payout control CPU 371 checks the input state of the VL signal from the card unit 50 (step S825). If the VL signal is not input (if it is in the OFF state), the prepaid card unit not yet out of the error flags is displayed. A connection error bit is set (step S826). If the VL signal is input (if it is on), the prepaid card unit unconnected error bit is reset (step S827).

  In the display control process in step S759, notification by display (numerical value display) corresponding to the error bit in the error flag is performed by the error display LED 374.

  FIG. 39 is an explanatory diagram showing an example of changes in the contents of the counter used in the prize ball payout control. The prize ball payout scheduled total counter, the previous prize ball payout scheduled total counter, the payout operation counter, and the prize ball non-payout number counter are cleared to 0 in the initialization process (specifically, the process of step S712). Thereafter, for example, when 15 prize ball number commands are received, the value of the prize ball payout total counter is 15 in the command analysis process. Then, when the prize ball payout process is started, 15 is set in the previous prize ball payout scheduled total counter, the payout operation counter, and the prize ball non-payout number counter (see steps S632 to S634). Thereafter, each time the payout motor position sensor 295 is turned on, the value of the payout operation counter is decremented by 1, and every time the payout number count switch 301 is turned on, the value of the award ball non-payout number counter is decremented by 1. In the meantime, for example, when 10 prize ball number commands are received, 10 is added to the prize ball payout scheduled total counter in the command analysis process to become 25.

  Then, a prize ball payout total counter (PA) is added by an addition process executed when the value of the payout operation counter reaches a predetermined value (in this example, “1”, but the predetermined value may not be 1). ) And the difference (10 in this example) between the contents of the previous award ball payout scheduled total counter (PB) are added to the payout operation counter and the award ball unpaid number counter. Accordingly, the value of the payout operation counter and the award ball non-payout number counter is 11. Further, the contents of the previous prize ball payout scheduled total counter (PB) are the same as the contents of the prize ball payout scheduled total counter (PA) (see steps S695 to S697).

  Thereafter, when the value of the unsuccessful prize ball counter reaches zero and the prize ball payout is completed, the previous prize ball payout total counter (PB) is determined from the content of the prize ball payout total counter (PA) (25 in this example). Is subtracted (the subtraction result is 0 in this example), and the previous award ball payout scheduled total counter (PB) is cleared.

  FIG. 40 is an explanatory diagram showing another example of changes in the contents of the counter used in the prize ball payout control. The contents of the total number of winning ball payout counter (PA) and the value of the previous winning ball payout total counter (PB) are 15, and 10 winning ball number commands are received during the paying out of the winning ball. And Then, in the command analysis process, 10 is added to the prize ball payout scheduled total counter to be 25.

  Then, by the addition process executed when the value of the payout operation counter reaches a predetermined value (for example, 1), the contents of the planned total payout ball counter (PA) and the total previous payball payout total counter (PB) (10 in this example) is added to the payout operation counter and the award ball non-payout number counter. Accordingly, the value of the payout operation counter and the award ball non-payout number counter is 11. Further, the contents of the previous winning ball payout scheduled total counter (PB) are the same as the contents of the winning ball payout scheduled total counter (PA).

  It is assumed that the prohibition condition for the extra process is satisfied when the winning ball payout process is continued (see steps S691 and S692). Therefore, it is assumed that the addition process is not executed, but 15 prize ball number commands and 10 prize ball number commands are received during that time. Then, in the command analysis process, 15 and 10 are added to the prize ball payout scheduled total counter to be 50.

  When the prohibition condition for the extra process is canceled, the contents of the total prize ball payout counter (PA) and the previous prize ball payout total counter are executed by the extra process executed when the value of the payout operation counter reaches a predetermined value. The difference between the contents of (PB) (25 in this example) is added to the payout operation counter and the award ball unpaid number counter, and the value of the payout operation counter and the award ball unpaid number counter becomes 26. Further, the contents of the previous winning ball payout scheduled total counter (PB) are the same as the contents of the winning ball payout scheduled total counter (PA).

  Thereafter, when the value of the award ball unpaid number counter becomes 0 and the award ball payout is completed, the previous award ball payout total counter (PB) is determined from the content of the award ball payout total counter (PA) (50 in this example). Is subtracted (the subtraction result is 0 in this example), and the previous award ball payout scheduled total counter (PB) is cleared.

  As described above, in this embodiment, in the command analysis process, the number based on the prize ball number command received from the game control means is used as a counter (for example, the control during the prize ball payout) (for example, Rather than immediately adding (adding) to the payout operation counter), it is used for the control during payout of a winning ball when a predetermined condition (for example, the value of the payout operation counter reaches a predetermined value) is satisfied. Add to the counter. Therefore, the number of executions of the extra process can be reduced as compared with the case where it is added to the counter used for the control during the payout of the prize ball every time the prize ball number command is received.

  In this embodiment, a method of using the previous award ball payout scheduled total counter is used to determine whether or not the number of prize balls to be paid out has increased, but such a method is an example, Other methods may be used. For example, a cumulative counter that cumulatively adds the number indicated by the prize ball number command received after the start of the prize ball payout process is provided, and in the addition process, the count value of the cumulative counter is added to the prize ball unpaid number counter and the payout operation counter. The contents of the cumulative counter may be cleared. In such a configuration, the cumulative counter corresponds to the prize game medium number data storage means to which the number instructed by the prize ball number command is added.

  Further, in this embodiment, the winning ball payout total number counter and the winning ball unpaid number counter are used together, but either one of the counters may be used. FIG. 41 is an explanatory diagram showing an example of changes in the contents of the counter used in the prize ball payout control when the prize ball unpaid number counter is not used. In this case, when the number-of-payout count switch 301 is turned on, 1 is subtracted from the values of the award winning ball payout total counter and the previous winning ball payout total counter.

  The winning ball payout total counter, the previous winning ball payout total counter and the payout operation counter are cleared to 0 in the initialization process in the main process. Thereafter, for example, when 15 prize ball number commands are received, the value of the prize ball payout total counter is 15 in the command analysis process. When the winning ball payout process is started, 15 is set in the previous winning ball payout scheduled total counter and the payout operation counter. Thereafter, each time the payout motor position sensor 295 is turned on, the value of the payout operation counter is decremented by 1, and every time the payout number count switch 301 is turned on, the values of the award ball payout scheduled total counter and the previous award ball payout scheduled total counter are 1. Subtracted. In the meantime, for example, when 10 prize ball number commands are received, 10 is added to the prize ball payout scheduled total counter in the command analysis process. At this time, if the value of the prize ball payout scheduled total counter is 6, it is updated to 16.

  Then, by the addition process executed when the value of the payout operation counter reaches a predetermined value, the difference between the contents of the award ball payout total counter (PA) and the content of the previous award ball payout total counter (PB) (this In the example, 10) is added to the payout operation counter. Therefore, the value of the payout operation counter is 11. Further, the contents of the previous winning ball payout scheduled total counter (PB) are the same as the contents of the winning ball payout scheduled total counter (PA). When the extra process is executed, the value of the prize ball payout scheduled total counter is reduced from 16 to 11 (because 5 payouts have been made).

  Thereafter, when the value of the prize ball payout scheduled total counter becomes 0 and the prize ball payout ends, the previous prize ball payout scheduled total counter (PB) is cleared. However, if the control is performed normally, the previous prize ball payout scheduled total counter (PB) is already zero.

  FIG. 42 is an explanatory diagram showing another example of changes in the contents of the counter used in the prize ball payout control. The contents of the total number of winning ball payout counters (PA) and the value of the total number of previous winning ball payouts total counter (PB) are 6, and 10 winning ball number commands are received during paying out the winning balls. And Then, in the command analysis process, 10 is added to the prize ball payout scheduled total counter to be 16.

  Then, by the addition process executed when the value of the payout operation counter reaches a predetermined value (for example, 1), the contents of the planned total payout ball counter (PA) and the total previous payball payout total counter (PB) (10 in this example) is added to the payout operation counter. Therefore, the value of the payout operation counter is 11. Further, the contents of the previous winning ball payout scheduled total counter (PB) are the same as the contents of the winning ball payout scheduled total counter (PA).

  It is assumed that the prohibition condition for the extra process is satisfied when the winning ball payout process is continued. Therefore, it is assumed that the addition process is not executed, but 15 prize ball number commands and 10 prize ball number commands are received during that time. Then, in the command analysis process, 15 and 10 are added to the prize ball payout scheduled total counter, for example, 28. At this time, the value of the total number of the previous winning ball payout scheduled total counter is 3.

  When the prohibition condition for the extra process is canceled, the contents of the total number of expected payout payout counter (PA) and the previous prize ball are obtained by the extra process executed when the value of the payout operation counter reaches a predetermined value (for example, 1). The difference (25 in this example) of the contents of the scheduled payout total counter (PB) is added to the payout operation counter, and the value of the payout operation counter becomes 26. Further, the contents of the previous winning ball payout scheduled total counter (PB) are the same as the contents of the winning ball payout scheduled total counter (PA).

  Thereafter, when the value of the prize ball payout scheduled total counter becomes 0 and the prize ball payout ends, the previous prize ball payout scheduled total counter (PB) is cleared.

  FIG. 43 is a flowchart showing a prize ball lending control process in an embodiment in which no prize ball unpaid number counter is used. In this embodiment, if the prize ball payout process is performed when the payout number count switch 301 is turned on, the values of the total prize ball payout total counter (PA) and the previous prize ball payout total counter (PB) are set. -1 (steps S604A and S604B). In addition, in the prize ball payout addition control (step S600), setting of the prize ball unpaid number counter (step S696 in FIG. 31) is not executed.

  FIG. 44 is a flowchart showing a payout start waiting process in an embodiment in which no prize ball payout counter is used. In this embodiment, unlike the above-described embodiment, a process (step S633) of setting the contents of a prize ball payout total counter (PA) in the prize ball unpaid-out number counter at the start of the prize ball payout process is performed. Do not execute.

  FIG. 45 and FIG. 46 are flowcharts showing the payout passing waiting process in the embodiment that does not use the prize ball non-payout number counter. In this embodiment, the payout control means confirms that the award ball payout process continuously executed without dividing the payout of game balls according to a plurality of prize ball number commands for each prize ball number command is completed. The determination is made when the value of the total number of prize balls to be paid out counter (PA) becomes 0 (step S654A). In addition, when the re-payout operation is started, the contents of the total number of expected winning balls (PA) are set in the payout operation counter (step S663A).

  Note that the processes in the payout control process other than the processes described here are the same as those in the above-described embodiment.

  As described above, in each of the above embodiments, in the command analysis process, the number based on the prize ball number command received from the game control means is used as a counter used for the control during the prize ball payout at that time. Rather than immediately adding (adding) to (for example, a payout operation counter), it is used for control during payout of a winning ball when a predetermined condition (for example, the value of the payout operation counter has reached a predetermined value) is satisfied. Is added to the counter. Therefore, the number of executions of the extra process can be reduced as compared with the case where it is added to the counter used for the control during the payout of the prize ball every time the prize ball number command is received.

  Note that the pachinko gaming machine of each of the above embodiments mainly has a predetermined game value when the stop symbol of the special symbol variably displayed on the variable display portion 9 based on the start winning is a combination of the predetermined symbols. Pachinko machines that can be granted to a player, but if there is a prize in a predetermined area of an electric accessory that is released based on the start prize, a pachinko machine that can be given a predetermined game value or start Even if it is a pachinko machine where a predetermined right is generated or continued when there is a prize for a predetermined electric combination that is released when the symbol of the symbol variably displayed based on the winning combination becomes a combination of the predetermined symbols The invention can be applied. Furthermore, the present invention can be applied to a slot machine as long as it has a configuration including a main board and a payout control board.

  The present invention can be applied to games such as pachinko gaming machines, and in particular, can be applied to gaming machines in which game control means and payout control means are provided separately.

It is the front view which looked at the pachinko game machine from the front. It is the rear view which looked at the gaming machine from the back. It is the front view and sectional drawing which show a ball dispensing apparatus. It is a block diagram which shows the circuit structural example of a game control board (main board). It is a block diagram which shows the circuit structural example of a payout control board. It is a block diagram showing a configuration example of an effect control board, a lamp control board and a sound control board. It is a block diagram which shows the structural example of a power supply board. It is a flowchart which shows the main process which CPU in a main board | substrate performs. It is a flowchart which shows the main process which CPU in a main board | substrate performs. It is a flowchart which shows a timer interruption process. It is explanatory drawing which shows one structural example of the payout control command. It is a timing diagram which shows the relationship between a control signal and an INT signal. It is explanatory drawing which shows an example of the content of the payout control command. It is explanatory drawing which shows the bit allocation example of the input port in a game control means. It is explanatory drawing which shows the buffer used by switch processing. It is a flowchart which shows an example of a switch process. It is a flowchart which shows an example of a winning switch check process. It is a flowchart which shows a prize ball process. It is explanatory drawing which shows the structure of a command transmission table. It is a flowchart which shows a command control process. It is a flowchart which shows a command transmission process. It is a flowchart which shows the main process which CPU for payout control performs. It is a flowchart which shows the timer interruption process which CPU for payout control performs. It is explanatory drawing which shows an example of the counter used in payout control processing. It is explanatory drawing which shows the example of 1 structure of a reception buffer. It is a flowchart which shows the example of the command reception processing of CPU for payout control. It is a flowchart which shows the example of a command analysis process. It is a flowchart which shows the example of a command analysis execution process. It is a flowchart which shows a payout motor control process. It is a flowchart which shows a prize ball lending control process. It is a flowchart which shows prize ball payout number addition control. It is a flowchart which shows the payout start waiting process. It is a flowchart which shows a payout motor stop waiting process. It is a flowchart which shows payout passage waiting processing. It is a flowchart which shows payout passage waiting processing. It is explanatory drawing which shows the relationship between the kind of error, and the display of LED for an error display. It is a flowchart which shows an error process. It is a flowchart which shows an error process. It is explanatory drawing which shows an example of the change of the content of the counter used in prize ball payout control. It is explanatory drawing which shows the other example of the change of the content of the counter used in prize ball payout control. It is explanatory drawing which shows the other example of the change of the content of the counter used in prize ball payout control. It is explanatory drawing which shows the other example of the change of the content of the counter used in prize ball payout control. It is a flowchart which shows the other example of a prize ball lending control process. It is a flowchart which shows the other example of the payout start waiting process. It is a flowchart which shows the other example of payout passage waiting processing. It is a flowchart which shows the other example of payout passage waiting processing.

Explanation of symbols

1 Pachinko machine 31 Game control board (main board)
37 Dispensing control board 56 CPU
97 ball dispensing device 289 dispensing motor 295 dispensing motor position sensor 301 dispensing number count switch 371 dispensing control CPU
374 LED for error display
375 Error release switch

Claims (9)

A gaming machine in which a player plays a predetermined game and pays out a predetermined number of game media as prizes according to establishment of a predetermined payout condition,
A game control means including a payout control command transmitting means for controlling the progress of the game and transmitting a payout control command for instructing the number of payouts of the game medium when a predetermined payout condition is satisfied;
A payout means for paying out game media;
Payout driving means for driving the payout means to pay out the game medium;
A payout control means for controlling the payout drive means according to the payout control command received from the game control means,
The payout control means includes
A prize game medium number data storage means for storing data indicating the number of game medium payouts according to the payout control command;
A payout control command receiving means for receiving the payout control command;
When the payout control command receiving means receives the payout control command, an adding means for adding the payout number instructed by the payout control command to the data stored in the prize game medium number data storage means;
A payout start means for starting driving of the payout drive means when the data stored in the prize game medium number data storage means indicates that there is a game medium to be paid out;
An increase determination means for determining whether or not the data stored in the premium game medium number data storage means has increased when the payout driving means is driving the payout means;
An increase number specifying means for specifying an increase number when the increase determining means determines that the data is increasing; and
Drive amount data storage means for storing data capable of specifying the drive amount until the payout of the game medium by the payout drive means; and
Drive amount update means for subtracting the data stored in the drive amount data storage means by an amount corresponding to the drive amount of the payout drive means;
When the payout driving means is driving the payout means, data indicating the drive amount according to the increase number specified by the increase number specifying means is added to the data stored in the drive amount data storage means. Driving amount data adding means for executing the driving amount addition processing ;
After the drive of the dispensing drive means is started by the payout starting means, wherein regardless of whether the drive amount data addition means executes the driving amount adding process, the driving amount data storage means stores A game machine comprising: payout stopping means for stopping the drive of the payout driving means when the stored data reaches a value corresponding to the end of payout of the game medium. The payout control means includes a previous prize game medium number data storage means for holding data stored in the prize game medium number data storage means when the drive amount data addition means adds data,
The increase determination means determines whether the data has increased by comparing the data stored in the prize game medium number data storage means with the data stored in the previous prize game medium number data storage means. And
The increase number specifying means specifies the difference between the data stored in the prize game medium number data storage means and the data stored in the previous prize game medium number data storage means as an increase number. Gaming machine. The payout control means sets the data stored in the prize game medium number data storage means in the previous prize game medium number data storage means when the increase determination means determines that the data has increased. The gaming machine according to claim 2, further comprising setting means. 4. The gaming machine according to claim 2, wherein the payout control means includes an initializing means for initializing data set in the previous prize game medium number data storage means when payout of the game media is completed. A payout detecting means for detecting a game medium paid out from the payout means and outputting a detection signal only to the payout control means;
Withdrawal control means
A lending control means for controlling the payout driving means based on a lending control command indicating a lending request for gaming media and performing lending control of gaming media;
Whether the detection signal input from the payout detection means is a detection signal of a prize game medium paid out based on the payout control command, or a detection signal of a game medium paid out based on the loan control command A payout determining means for determining whether or not
Data stored in the prize game medium number data storage means based on the detection signal when the payout determination means determines that it is a detection signal of the prize game medium paid out based on the payout control command A gaming machine according to any one of claims 1 to 4, further comprising a prize game medium number subtracting means for subtracting. The game control means includes a game control microcomputer,
A plurality of effect control microcomputers each controlling effect devices for performing game effects;
The game control board is mounted on a power supply board that supplies power to a game control board on which game control means is mounted and a plurality of stage control boards on which each of the plurality of stage control microcomputers is mounted. Power supply monitoring means for outputting a system reset signal for system resetting the computer and the plurality of effect control microcomputers;
A specific effect control microcomputer among the plurality of effect control microcomputers receives a control signal transmitted from the game control means and transmits a control signal to the other effect control microcomputers. Process and execute
The power supply monitoring means outputs the system reset signal to the effect control board on which the other effect control microcomputer is mounted without going through the effect control board on which the specific effect control microcomputer is mounted. The game machine according to any one of claims 1 to 5. The predetermined payout condition is established by winning a game medium in each of a plurality of winning areas provided in the gaming area,
Game medium detecting means for detecting a game medium won according to each of the plurality of winning areas and outputting a winning detection signal to the game control means;
The gaming machine according to any one of claims 1 to 6, wherein the payout control command transmission means immediately transmits a payout control command in response to the input of the winning detection signal. The payout control means includes a payout control microcomputer,
The payout control command transmission means transmits a take-in signal instructing taking-in of the payout control command together with a payout control command indicating the payout number of game media,
The capture signal is connected to an interrupt terminal of the payout control microcomputer,
The payout control command receiving means receives the payout control command by an interrupt process activated based on the input of the capture signal to the interrupt terminal. The gaming machine described in 1. An error state setting means for shifting the control state relating to the payout of the game medium to an error state when a predetermined condition is satisfied;
Determination prohibiting means for prohibiting the determination of the increase determination means in the error state
The gaming machine according to any one of claims 1 to 8.

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