JP2006068253A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent the delay of the transmission of control signals indicating the number of prize balls from a game control means to a putout control means and to surely receive the control signals in the putout control means. <P>SOLUTION: At the time of receiving putout REQ signals for instructing the number of the prize balls and putout number signals from a microcomputer for game control (microcomputer for games), a microcomputer for putout control (microcomputer for putout) transmits reception confirmation signals to the microcomputer for the games. At the time of receiving the reception confirmation signals, the microcomputer for the games subtracts the number specified by putout control signals from the contents of a total prize ball number storage buffer and stops the transmission of the putout REQ signals. Then, the microcomputer for the putout makes the instructed number of game balls be put out by controlling a ball putout device. Also, the microcomputer for the games judges that a communication error is generated when the reception confirmation signals are turned to an on state in a prize ball standby state and inhibits the transmission of the putout REQ signals and the putout number signals even when there are the prize balls not put out yet. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention is a pachinko gaming machine, a slot machine or the like that allows a player to play a predetermined game using a game medium and pays out a prize game medium as a prize based on the fact that a payout condition is established by the game. Related to the gaming machine.

  As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a prize area such as a prize opening provided in the game area, a predetermined number of prize balls are paid out to the player. There is something to be done. Furthermore, there is provided a variable display unit capable of changing the display state, and configured to give a predetermined game value to the player when the display result of the variable display unit is in a predetermined specific display mode. is there.

  Note that the game value is the right that the state of the variable winning ball device provided in the gaming area of the gaming machine is advantageous for a player who is likely to win a ball, or the advantageous state for a player. In other words, or a condition for winning a prize ball is easily established.

  In a pachinko gaming machine, the combination of a predetermined display mode with a display result of a variable display unit that displays a special symbol is usually referred to as “big hit”. When the big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the game shifts to a big hit gaming state where the hit ball is easy to win.

  Since the game progress in the gaming machine is controlled by a game control microcomputer such as a microcomputer, the number of winning balls based on winning is determined by the game control microcomputer. If the payout control microcomputer that controls the payout of the prize ball is mounted on a payout control board different from the main board on which the game control microcomputer is mounted, the game control microcomputer determines the number of prize balls. A control signal (prize ball number signal) is transmitted to the payout control board.

  In such a gaming machine, for example, game balls won in the winning area are stored as safe balls in a winning ball processing device, and the game control microcomputer receives a safe ball detection signal from the payout control microcomputer, and wins a prize. Some ball processing apparatuses transmit a prize ball number signal to a payout control board based on the storage of safe balls (see, for example, Patent Document 1).

Japanese Patent Laid-Open No. 11-244491 (paragraphs 0060 and 0074, FIG. 15)

  However, in the gaming machine described in Patent Document 1 described above, since the winning ball number signal cannot be transmitted unless the winning game balls are stored as safe balls, a winning occurs when the winning ball number signal is transmitted. As a result, there is a problem that it takes a long time to start paying out a prize ball after winning a prize.

  That is, in the gaming machine described in Patent Document 1, a winning ball is stored in the winning ball processing device, and when the winning ball detection switch detects the stored winning ball, the game control means controls the number of winning balls. A signal is transmitted to the payout control microcomputer, and when the payout of the winning ball based on the control signal indicating the number of winning balls is completed, the winning ball is discharged from the winning ball processing device so that the next winning ball can be detected. Therefore, when winnings occur continuously, transmission of the winning ball number signal from the game control microcomputer to the payout control microcomputer is delayed with respect to the occurrence of winnings. As a result, there is a possibility that the point at which the prize ball payout is actually started is delayed with respect to the occurrence of the winning.

  Further, in the gaming machine described in Patent Document 1, an error relating to communication between the game control microcomputer and the payout control microcomputer cannot be detected, and as a result, an error has occurred. The award ball number signal is transmitted from the game control microcomputer to the payout control microcomputer, and there is a problem that the award ball payout based on the control signal related to the award ball payout may not be performed normally.

  Therefore, the present invention provides a delay in the transmission of a control signal indicating the number of prize balls from the game control microcomputer to the payout control microcomputer in a game machine in which the game control microcomputer and the payout control microcomputer are provided separately. An object is to provide a gaming machine that can be prevented.

  The gaming machine according to the present invention allows a player to play a predetermined game using a game medium, and is based on the fact that a payout condition (for example, winning a game ball in a winning area) is established by the game. As a game machine for paying out a prize game medium, a game control microcomputer (for example, a game control microcomputer 560) for executing a game control process for controlling the progress of the game, and a payout means for paying out a prize game medium ( For example, a ball payout device 97) and a payout control microcomputer (for example, a payout control microcomputer 370) that executes a payout control process for controlling the payout means, the game control microcomputer stops power supply to the gaming machine. However, the stored contents can be retained for a predetermined period (for example, the power is backed up) and the payout conditions are met. A prize game medium number storage means (for example, a total prize ball number storage buffer or 4, 7, and 15 counters) for storing prize game medium number data capable of specifying the number of prize game media to be paid out based on And a payout command signal for designating the number of prize game media to be paid out to the payout control microcomputer based on the fact that the prize game medium number data is stored in the prize game medium number storage means. A payout command signal output means (for example, realized by the game control microcomputer 560 and the I / O port unit 57 for executing the processes of steps S254 and S255) which are turned on when the above is established; When the predetermined subtraction condition is satisfied after the command signal output means turns on the payout command signal, the scene stored in the prize game medium number storage means The prize game medium number data subtracting means (for example, the game control microcomputer 560 for executing the processes of steps S261 and S262) performs a subtraction process for subtracting a value corresponding to the payout number specified by the payout command signal from the game medium number data. Communication abnormality detecting means (for example, Steps S261, S266, S267, Steps S271, S275, S276, Step S281, and the like) for detecting an abnormality related to communication between the game control microcomputer and the payout control microcomputer. And the payout control microcomputer during a period in which power is supplied to the gaming machine, the game control microcomputer 560 executes the processes of S285, S286 and steps S291, S292, and S293. Is a withdrawal that retains the memory In response to receiving the payout command signal, the control side storage means (for example, the RAM mounted on the payout control board 37 that is not backed up by the power supply) and the receipt confirmation signal indicating that the payout command signal has been received are turned on. A reception confirmation signal output means (for example, realized by a payout control microcomputer 370 for executing the processing of steps S544 and S546 and an output port) to be put in the state, and a payout command signal to control the payout means. A prize game medium payout control means (for example, realized by a payout control microcomputer 370 that executes processes of steps S631, S633, S637, etc.) for executing a payout process for paying out a payout number of prize game media; In the signal path (see FIG. 19) different from the signal path for transmitting the reception confirmation signal, When the medium payout control means is executing a payout process, a payout operation signal output means for turning on a payout operation in-progress signal indicating that the payout process is being executed (for example, processing such as steps S561 and S562) The prize game medium number data subtracting means performs a subtraction process based on the establishment of a predetermined subtraction condition that the reception confirmation signal is turned on. (For example, the processing of steps S261 and S262), the payout command signal output means sets the payout command signal to the on state (for example, after N in step S245) that the predetermined command condition is satisfied that the payout operation signal is in the off state. In step S254, the communication abnormality detection means confirms reception when the payout command signal output means does not turn on the payout command signal. When it is detected that the number is turned on, it is determined that an abnormality relating to communication has occurred (eg, step S244), and the game control microcomputer determines that an abnormality relating to communication has occurred, A payout command signal transmission prohibiting means for prohibiting the payout command signal output means from turning on the payout command signal even if the prize game medium number data is stored in the prize game medium number storage means (for example, “Y” in step S244) ”Is realized by a game control microcomputer 560 that controls the prize ball process code not to be updated in the case of“

  The game control microcomputer includes payout command signal stop means (for example, realized by the game control microcomputer 560 that executes the process of step S263) for turning off the payout command signal, and a predetermined subtraction condition is satisfied. At this time, it may be configured such that the subtraction process is performed by the prize game medium number data subtracting means and the payout command signal is turned off by the payout command signal stopping means (for example, steps S262 and S263).

  The payout command signal output means, as means for turning on the payout command signal, executes a payout number signal output means for turning on a payout number signal indicating the payout number of the prize game medium (for example, processing of steps S255 and S203) And a capture request signal output means (for example, step S254) for turning on a capture request signal (for example, a payout REQ signal) for instructing capture of a payout number signal. The payout command signal stop means is a take-in request signal stop means for turning off the take-in request signal (for example, in step S263), which is realized by the game control microcomputer 560 that executes the process of S203. The acquisition request signal stop means includes a game control microcomputer 560 for executing processing). When more acquisition request signal is turned off, it may be configured so as to turn off the dispensing command signal.

  The game control microcomputer is a payout number signal stop means (for example, a game control microcomputer 560 that executes the processes of steps S291 and S297) that turns off the payout number signal when the payout operation in progress signal is turned off. The payout control microcomputer includes a payout operation signal stop means (for example, a payout operation signal stop means for turning off the payout operation signal in response to completion of execution of the payout process by the prize game medium payout control means (for example, (It is realized by the payout control microcomputer 370 that executes the processing of steps S571 and S572) and the payout number signal even if a predetermined time has elapsed after the payout operation signal stop means turns off the payout operation signal. Payout number signal error notification means for performing a predetermined error notification when it is detected that the state does not enter the OFF state For example, step S586, may be configured to include a by being) implemented by dispensing control microcomputer 370 executes the process of S785～S787.

  A payout command for notifying a predetermined error when the payout control microcomputer detects that the payout command signal does not turn off even if a predetermined time has elapsed after the reception confirmation signal output means turns on the reception confirmation signal. It may be configured to include signal error notification means (for example, realized by a payout control microcomputer 370 that executes the processes of steps S558 and S785 to S787).

  The prize game medium payout control means starts payout processing start means when the payout command signal is turned off. May be included).

  Power supply confirmation signal output for turning on the power confirmation signal transmitted to the payout control microcomputer when the game control microcomputer is in a state where power supply to the gaming machine is started and the game control process can be executed Means (for example, realized by a game control microcomputer 560 that executes the processes of steps S12 and S203), and when the payout control microcomputer is turned off, the prize game medium payout It is configured to include a prize game medium payout prohibiting means (for example, realized by a payout control microcomputer 370 executing the processes of steps S51, S53, S55, S57, and S541) for prohibiting the payout process by the control means. It may be.

  When the game control microcomputer detects that the reception confirmation signal is turned on when the payout command signal is not turned on, the power confirmation signal output stop means for turning off the power confirmation signal (for example, in step S247). It may be configured to include a game control microcomputer 560 that executes processing.

  A payout abnormality detecting means for detecting an abnormality relating to payout when the game control microcomputer detects that the payout operation in-progress signal does not turn off even after a predetermined time has elapsed since the payout operation in progress signal is turned on. (For example, it is realized by the game control microcomputer 560 that executes the processes of steps S291 to S293) and executes a control for giving a predetermined error notification when the payout abnormality detecting means detects an abnormality related to payout. The payout error notification means (implemented by the game control microcomputer 560 that executes the process of step S295, for example) may be included.

  Connection confirmation signal output means for turning on a connection confirmation signal transmitted to the game control microcomputer when the payout control microcomputer is in a state where power supply to the gaming machine is started and the payout process can be executed. (For example, realized by a payout control microcomputer 370 that executes the processes of steps S708 and S760), and when the game control microcomputer is in the off state, the payout command signal is in the on state. It may be configured to have a payout command signal on-state restricting means (for example, realized by a game control microcomputer 560 that executes the process of step S243B) for restricting the situation.

  On-state communication abnormality detection means for detecting a communication-related abnormality when the communication abnormality detection means detects that the payout operation signal does not turn on even if a predetermined time has elapsed after the reception confirmation signal is turned off. (For example, realized by a game control microcomputer 560 that executes the processing of steps S281, S285, and S286), and the game control microcomputer detects an abnormality related to communication by the on-state communication abnormality detection means In the payout operation signal error notifying means (for example, realized by the game control microcomputer 560 for executing the process of step S287) for executing a control for performing a predetermined error notification. Also good.

  According to the first aspect of the present invention, the game control microcomputer can hold the stored contents for a predetermined period even when the power supply to the game machine is stopped, and pays out the game machine based on the establishment of the payout condition. A prize game medium number storage means for storing a prize game medium number data capable of specifying the number of prize game media, and a payout control micro based on the fact that the prize game medium number data is stored in the prize game medium number storage means A payout command signal output means for turning on a payout command signal for designating the number of prize game medium payouts to a computer when a predetermined command condition is satisfied, and a payout command signal output means is a payout command. When a predetermined subtraction condition is satisfied after the signal is turned on, the payout specified by the payout command signal from the prize game medium number data stored in the prize game medium number storage means A prize game medium number data subtracting means for performing a subtraction process for subtracting a value corresponding to, and a communication abnormality detecting means for detecting an abnormality relating to communication between the game control microcomputer and the payout control microcomputer. It shows that the computer has received the payout command signal in response to receiving the payout command signal and the payout control side storage means for holding the stored contents during the period when power is supplied to the gaming machine A reception confirmation signal output means for turning on the reception confirmation signal; a prize game medium payout control means for executing a payout process for controlling the payout means and paying out a prize game medium of a payout number specified by the payout command signal; When the prize game medium payout control means is executing a payout process on a signal path different from the signal path for transmitting the reception confirmation signal. , A payout operation signal output means for turning on a payout operation signal indicating that the payout process is being executed, and the prize game medium number data subtracting means indicates that the reception confirmation signal has been turned on. Subtraction processing is performed as the predetermined subtraction condition is satisfied, and the payout command signal output means turns the payout command signal into the on state as the predetermined command condition is satisfied that the payout operation in-progress signal is off, and the communication abnormality detection means When the payout command signal output means detects that the reception confirmation signal is turned on when the payout command signal is not turned on, it determines that a communication abnormality has occurred, and the game control microcomputer When the detection means determines that an abnormality relating to communication has occurred, the payout command signal output means outputs the payout command signal output means even if the prize game medium number data is stored in the prize game medium number storage means. Since the payout command signal transmission prohibiting means for prohibiting the turnout of the payout command signal is included, the game control microcomputer and the payout are performed without delaying the time from the establishment of the payout condition to the start of sending the payout command signal. By bidirectional communication with the control microcomputer, there is an effect that the number of prize game media to be paid out is reliably transmitted from the game control microcomputer to the payout control microcomputer. Further, when the reception confirmation signal is turned on when the payout command signal is not turned on, even if the prize game medium number data is stored, the payout command signal is not transmitted, thereby causing an abnormal event. It is possible to inspect the cause of the abnormal event by preventing the game medium payout process from continuing when the occurrence of the game occurs.

  In the invention of claim 2, the game control microcomputer includes a payout command signal stop means for turning off the payout command signal, and when a predetermined subtraction condition is satisfied, the subtraction process is performed by the prize game medium number data subtraction means. Since the payout command signal is turned off by the payout command signal stop means, the payout command signal is excessive compared to the case where the payout command signal is kept on even after the reception confirmation signal is turned on. In addition, the possibility that the premium game medium is paid out can be reduced. That is, after the payout control microcomputer turns on the reception confirmation signal and starts payout processing, the power supply stops (for example, stops after paying out several premium game media), and then the power supply is restored to play the game. When the control microcomputer reproduces the on-state of the payout command signal, the payout control microcomputer may start payout processing again from the beginning to cause excessive payout. In the present invention, such a case occurs. The possibility is reduced.

  In the invention described in claim 3, the payout command signal stop means includes a take-in request signal stop means for turning off the take-in request signal, and the take-in request signal is turned off by the take-in request signal stop means. The payout control signal is configured to turn off the payout command signal, so the payout control microcomputer only monitors the signal line of the take-in request signal and starts communication related to the payout amount of the prize game medium. And the burden on communication can be reduced.

  According to a fourth aspect of the present invention, the payout control microcomputer comprises a payout operation signal stop means for turning off the payout operation signal in response to completion of execution of the payout process by the prize game medium payout control means, and payout A payout number signal error notifying means for performing a predetermined error notification when it is detected that the payout number signal is not turned off even if a predetermined time has elapsed after the operating signal stop means turns off the payout operation in progress signal; Therefore, when a disconnection or a short circuit occurs in the signal line that transmits the payout number signal, it can be notified. Further, in the case where a disconnection or short circuit occurs in the signal line and a large number of payouts is notified to the payout control microcomputer side, the prize game medium is paid out excessively. Then, it can be made not to let it be in such a situation.

  According to the fifth aspect of the present invention, when the payout control microcomputer detects that the payout command signal does not turn off even if a predetermined time elapses after the reception confirmation signal output means turns on the reception confirmation signal. Since it is configured to include a payout command signal error notifying means for performing a predetermined error notification, when a disconnection or a short circuit occurs in the signal line for transmitting the payout command signal, this can be notified. Further, in the case where a disconnection or short circuit occurs in the signal line and a large number of payouts is notified to the payout control microcomputer side, the prize game medium is paid out excessively. Then, it can be made not to let it be in such a situation.

  According to the sixth aspect of the present invention, the prize game medium payout control means includes a payout process starting means for starting payout processing when the payout command signal is turned off. The payout process is started after the subtraction process of the premium game medium number data stored in the premium game medium number storage means, and the possibility that the premium game medium is paid out excessively can be reduced. That is, if the game control microcomputer performs the subtraction process after the payout process is started, the power supply is stopped after the payout process is started and before the game control microcomputer performs the subtraction process (for example, several When the power supply is recovered thereafter, there is a possibility that excessive payout may occur because the subtraction process is not performed. In the present invention, such a possibility may occur. Has been reduced.

  According to the seventh aspect of the present invention, when the game control microcomputer starts supplying power to the gaming machine and is ready to execute the game control process, the power control confirmation signal transmitted to the payout control microcomputer is received. Including a power supply confirmation signal output means for turning on, and the payout control microcomputer including a prize game medium payout prohibiting means for prohibiting a payout process by the prize game medium payout control means when the power supply confirmation signal is turned off. Therefore, when the game control microcomputer is not communicably connected to the payout control microcomputer, the payout process is not executed, and the payout command signal is erroneously caused by noise or the like. Even if a situation occurs in which the on-state is recognized, the payout control microcomputer opens the payout process. It does not result in.

  According to the eighth aspect of the present invention, when the game control microcomputer detects that the reception confirmation signal is turned on when the payout command signal is not turned on, the power confirmation signal output for turning the power confirmation signal off is detected. Since it is configured to include the stopping means, the payout control microcomputer does not start payout processing in a communication abnormal state.

  According to the ninth aspect of the present invention, when the game control microcomputer detects that the payout operation in-progress signal does not turn off even after a predetermined time has elapsed since the payout operation in-progress signal is turned on. Since it is configured to include a payout abnormality detecting means for detecting an abnormality, and a payout error notifying means for executing control for performing a predetermined error notification when the payout abnormality detecting means detects an abnormality related to payout, If there is a possibility that the prize game medium has been paid out excessively (because the time during the payout operation is prolonged), this fact can be notified.

  In the invention according to claim 10, when the payout control microcomputer starts to supply power to the gaming machine and becomes ready to execute the payout process, the connection confirmation signal transmitted to the game control microcomputer is turned on. The game control microcomputer includes a payout command signal on-state restricting means for restricting the payout command signal from being turned on when the connection confirmation signal is in the off state. Since it is configured, in the case where the payout control microcomputer is not communicably connected to the game control microcomputer, transmission of the payout command signal is not started.

  In the invention according to claim 11, when the communication abnormality detecting means detects that the payout operation in-progress signal does not turn on even after a predetermined time has elapsed since the reception confirmation signal is turned off, the communication abnormality detecting means An on-state communication abnormality detection means for detecting, and the game control microcomputer performs a control for performing a predetermined error notification when the on-state communication abnormality detection means detects an abnormality relating to communication. Since it is configured to include the means, it can be easily recognized that the payout operation in-progress signal is not turned on, and the communication sequence can be prevented from proceeding in a communication abnormal state.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
First, the overall configuration of a pachinko gaming machine that is an example of a gaming machine will be described. FIG. 1 is a front view of a pachinko gaming machine as viewed from the front. In the following embodiments, a pachinko gaming machine will be described as an example. However, the gaming machine according to the present invention is not limited to a pachinko gaming machine, and can be applied to other gaming machines such as a slot machine.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape, and a game frame attached to the inside of the outer frame so as to be opened and closed. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided in the game frame so as to be opened and closed. The game frame includes a front frame (not shown) installed to be openable and closable with respect to the outer frame, a mechanism plate to which mechanism parts and the like are attached, and various parts attached to them (excluding a game board described later). Is a structure including

  As shown in FIG. 1, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2 is a hitting ball supply tray (upper plate) 3. Under the hitting ball supply tray 3, an extra ball receiving tray 4 for storing game balls that cannot be accommodated in the hit ball supply tray 3 and a hitting operation handle (operation knob) 5 for launching the game balls are provided. A game board 6 is detachably attached to the back surface of the glass door frame 2. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. A game area 7 is formed on the front surface of the game board 6.

  Near the center of the game area 7, there is provided a variable display device (special symbol display device) 9 including a plurality of variable display portions each variably displaying a symbol as identification information. The variable display device 9 has, for example, three variable display portions (symbol display areas) of “left”, “middle”, and “right”. In addition, the variable display device 9 is provided with four special symbol start memory display areas (start memory display areas) 18 for displaying the number of effective winning balls that have entered the start winning opening 14, that is, the start memory number. Each time there is a valid start prize, the display color changes (for example, changes from blue display to red display), and the start storage display area is increased by one. Each time the variable display of the variable display device 9 is started, the start memory number display area where the display color is changed is reduced by 1 (that is, the display color is returned to the original). In this example, since the symbol display area and the start memory display area are provided separately, the start memory number can be displayed even during variable display. The start memory display area may be provided in a part of the symbol display area. Further, the display of the start memory number may be interrupted during variable display. In this example, the start memory display area is provided in the variable display device 9. However, a display (special symbol start memory display) for displaying the start memory number may be provided separately from the variable display device 9. Good.

  Below the variable display device 9, a variable winning ball device 15 is provided as a start winning port 14. The variable winning ball device 15 is opened by a solenoid 16. The winning ball that has entered the start winning opening 14 is guided to the back of the game board 6 and detected by the start opening switch 14a.

  A variable winning ball apparatus 20 using an opening / closing plate that is opened by a solenoid 21 in a specific gaming state (big hit state) is provided below the variable winning ball apparatus 15. The variable winning ball apparatus 20 is a means for opening and closing the big winning opening. Of the game balls that have been won by the variable winning ball apparatus 20 and led to the back of the game board 6, the game balls that have entered one area (V winning area: special area) are detected by the V count switch 22 and placed in the other area. The entered game ball is detected by the count switch 23. On the back of the game board 6, a solenoid 21A for switching the route in the special winning opening is also provided.

  When the game ball passes through the gate 32 and is detected by the gate switch 32a, the variable display of the normal symbol display 10 is started. In this embodiment, variable display is performed by alternately lighting the left and right lamps (a symbol can be visually recognized when the lamp is lit). For example, if the right lamp is lit when the variable display ends, it is a win. When the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined number of times. In the vicinity of the normal symbol display 10, a normal symbol start memory display 41 having a display unit with four LEDs for displaying the number of winning balls that have passed through the gate 32 is provided. Each time there is a prize at the gate 32, the normal symbol start memory display 41 increases the number of LEDs to be turned on by one. Each time variable display on the normal symbol display 10 is started, the number of LEDs to be lit is reduced by one.

  Furthermore, the game board 6 is provided with a plurality of winning holes 29, 30, 33, 39. The winning holes 29, 30, 33, 39 for the game balls are awarded to the winning hole switches 29a, 30a, 33a, respectively. Detected by 39a. Each winning opening 29, 30, 33, 39 constitutes a winning area provided in the game board 6 as an area for accepting game media and allowing winning. The start winning opening 14 and the big winning opening also constitute a winning area that accepts game media and allows winning. In this embodiment, the winning opening switches 29a, 30a, 33a, 39a are provided corresponding to the respective winning openings 29, 30, 33, 39. A switch may be provided that collectively detects the game balls that have won.

  Around the left and right of the game area 7, there are provided decorative lamps 25 blinking and displayed during the game, and at the lower part there is an outlet 26 for absorbing a game ball that has not won a prize. Two speakers 27 that emit sound effects are provided on the left and right upper portions outside the game area 7. On the outer periphery of the game area 7, a top frame lamp 28a, a left frame lamp 28b, and a right frame lamp 28c are provided. Further, a decoration LED is installed around each structure (such as a big prize opening) in the game area 7. The top frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, and the decoration LED are examples of a decorative light emitter provided in the gaming machine.

  In this example, a prize ball LED 51 that is lit during award ball payout is provided in the vicinity of the left frame lamp 28b, and a ball break LED 52 that is lit when the supply ball is cut is provided in the vicinity of the right frame lamp 28c. It has been. As described above, the pachinko gaming machine 1 of this embodiment is provided with lamps and LEDs as light emitters in various places. Hereinafter, various lamps and various LEDs provided in the gaming machine may be collectively referred to as lamps / LEDs. Further, a prepaid card unit (hereinafter referred to as a card unit) that enables lending of a ball by inserting a prepaid card is installed adjacent to the pachinko gaming machine 1 (not shown).

  The card unit includes, for example, a use indicator lamp that indicates whether or not the card unit is in a usable state, a connection table direction indicator that indicates which side of the pachinko gaming machine 1 corresponds to the card unit, When checking the card insertion indicator lamp indicating that the card is inserted, the card insertion slot into which the card as a recording medium is inserted, and the card reader / writer mechanism provided on the back of the card insertion slot A card unit lock is provided to release the unit.

  The game balls launched from the hit ball launching device enter the game area 7 through the hit ball rail, and then descend the game area 7. When the game ball enters the start winning port 14 and is detected by the start port switch 14a, the special symbol starts variable display (variation) on the variable display device 9 if the variable display of the symbol can be started. If the variable display of the symbol cannot be started, the start memory number is increased by one.

  The variable display of the special symbol on the variable display device 9 stops when a certain time has elapsed. If the combination of special symbols at the time of stoppage is a jackpot symbol (specific display result), the game shifts to a jackpot gaming state. That is, the variable winning ball apparatus 20 is released until a predetermined time elapses or until a predetermined number (for example, 10) of gaming balls wins. When a game ball is won in the V winning area while the variable winning ball device 20 is opened and is detected by the V count switch 22, a continuation right is generated and the variable winning ball device 20 is opened again. The generation of the continuation right is allowed a predetermined number of times (for example, 15 rounds).

  When the combination of special symbols in the variable display device 9 at the time of stopping is a combination of jackpot symbols (probability variation symbols) with probability fluctuations, the probability of the next jackpot increases. That is, it becomes a more advantageous state for the player in the probability variation state.

  When the game ball passes through the gate 32, the normal symbol display unit 10 enters a state in which the normal symbol is variably displayed. Further, when the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the probability variation state, the probability that the stop symbol in the normal symbol display 10 becomes a winning symbol is increased, and the opening time and the number of times of opening of the variable winning ball device 15 are increased. That is, the opening time and the number of times of opening of the variable winning ball device 15 can be increased when the stop symbol of the normal symbol is a winning symbol or the stop symbol of the special symbol is a probabilistic symbol. Change to an advantageous state. It should be noted that increasing the number of times of opening is a concept including changing from a closed state to an open state.

  Next, the structure of the back surface of the pachinko gaming machine 1 will be described with reference to FIG. FIG. 2 is a rear view of the gaming machine as seen from the back side.

  As shown in FIG. 2, on the back side of the gaming machine, a variable display control unit 49 including an effect control board 80 on which an effect control microcomputer 100 (see FIG. 6) for controlling the variable display device 9 and the like is mounted, game control A game control board (main board) 31 on which a microcomputer or the like is mounted is installed. In addition, a payout control board 37 on which a payout control microcomputer for performing ball payout control is mounted is installed. The production control microcomputer 100 includes a variable display device 9 provided on the game board 6, various decoration LEDs, a normal symbol start memory display 41, a decoration lamp 25, and a top frame lamp 28a provided on the frame side. The left frame lamp 28b and the right frame lamp 28c are controlled to be turned on, and the sound generation from the speaker 27 is controlled. That is, the production control microcomputer 100 controls production electrical parts provided in the gaming machine.

  The effect control microcomputer 100 is realized by one effect control CPU 101 (see FIG. 6) mounted on the effect control board 80, but various decoration LEDs provided on the game board 6 and normal symbol start memory. The drive circuit for driving the display 41, the decoration lamp 25, the top frame lamp 28a, the left frame lamp 28b, and the right frame lamp 28c provided on the frame side is electrically connected to the effect control board 80. It is mounted on the lamp driver board. The drive circuit for driving the speaker 27 is mounted on a sound control board that is electrically connected to the effect control board 80.

  Further, a power supply substrate 910 and a touch sensor substrate 91 on which a power supply circuit for generating DC30V, DC21V, DC12V, and DC5V is mounted are provided. Although most of the power supply substrate 910 overlaps with the main substrate 31, there is an exposed portion that is exposed so as to be visible from the outside without overlapping the main substrate 31. In the exposed portion, power supply to the main board 31 and each electric component control board (the effect control board 80 and the payout control board 37) in the gaming machine 1 and each electric component provided in the gaming machine is executed or cut off. For clearing the backup data stored in the power switch as the power supply permission means and the storage content holding means included in the main board 31 (for example, the backup RAM capable of holding the contents even when the power supply is stopped) A clear switch is provided as an operation means. Furthermore, a replaceable fuse is provided inside the power switch in the exposed portion (inside the substrate).

  An electrical component control means including an electrical component control microcomputer is mounted on the electrical component control board. The electrical component control means is an electrical component (game device: ball payout device 97, variable display device 9, lamp, LED, etc.) provided in the gaming machine in accordance with a command (control signal) as a command signal from the game control means. The light emitter, speaker 27, etc.). Hereinafter, description may be made by including the main board 31 in the electric component control board. In that case, the electric component control means mounted on the electric component control board indicates each of the game control means and the means for controlling the electric components provided in the gaming machine in accordance with a command from the game control means. A board on which a microcomputer other than the main board 31 is mounted may be called a sub board.

  On the back side of the gaming machine, a terminal board 160 provided with terminals for outputting various information to the outside of the gaming machine is installed above. The terminal board 160 includes at least a ball break terminal for introducing the output of the ball break detection switch 167 and outputting it externally, a prize ball terminal for outputting prize ball information (prize ball number signal) and a ball. A ball lending terminal for externally outputting lending information (ball lending number signal) is provided. In addition, an information terminal board (information output board) 34 provided with terminals for outputting various information from the main board 31 to the outside of the gaming machine is installed near the center.

  The game balls stored in the storage tank 38 pass through the guide rails, reach the ball payout device covered with the payout case 40A via the curve cage. A ball break switch 187 as a game medium break detection means is provided on the upper part of the ball payout device. When the ball break switch 187 detects a ball break, the dispensing operation of the ball dispensing device stops. The ball break switch 187 is a switch for detecting the presence or absence of a game ball in the game ball passage, but the ball break detection switch 167 for detecting the shortage of supply balls in the storage tank 38 is also an upstream portion (storage tank 38). In the vicinity of the head). When the ball break detection switch 167 detects the shortage of game balls, the game machine is replenished to the game machine from the supply mechanism provided on the gaming machine installation island.

  When a large number of game balls as prizes based on winning a prize and game balls based on a ball lending request are paid out and the hitting ball supply tray 3 is full, the game balls are guided to the surplus ball receiving tray 4 through the surplus ball passage. When the game ball is further paid out, a sensing lever (not shown) presses a full tank switch (not shown) as a storage state detection means, and the full tank switch as a storage state detection means is turned on. In this state, the rotation of the payout motor in the ball payout device is stopped, the operation of the ball payout device is stopped, and the driving of the ball hitting device is also stopped.

  FIG. 3 is a front view (FIG. 3 (A)) and a cross-sectional view (FIG. 3 (B)) showing the ball dispensing device 97 covered with the dispensing case 40A. The ball payout device 97 is fixed to the lower portion of the passage body installed at the lower portion of the ball break switch 187. The passage body has a ball passage for flowing down two rows of game balls whose flow-down direction is converted into the left-right direction by a curve saddle. A ball break switch 187 is installed on the upstream side of the ball passage. In practice, a ball break switch is installed in each ball passage. The ball break switch 187 detects the presence or absence of a game ball in the ball passage. When the ball break switch 187 no longer detects a game ball, the ball discharge device 97 has a payout motor (not shown in FIG. 3). Rotation is stopped and game ball payout is immobilized.

  Further, the ball break switch 187 is locked by a locking piece at a position where it can be detected that 27 to 28 game balls are present in the ball passage.

  In the ball payout device 97, a payout motor (not shown) using a stepping motor rotates, for example, a cam, thereby paying out one winning ball or one game ball based on a ball lending request. Further, below the ball payout device 97, for example, a payout number count switch 301 using a proximity switch is provided. Each time one game ball falls from the ball payout device 97, the payout number count switch 301 is turned on. That is, the payout number count switch 301 detects a game ball actually paid out from the ball payout device 97. Therefore, the payout control means can count the number of game balls actually paid out by the detection signal of the payout number count switch 301. In this example, the payout number count switch 301 detects both the paid-out prize balls and rental balls. That is, the payout of prize balls and the payout of rental balls are detected by the same detection means. Therefore, the number of parts can be reduced, and the cost of the gaming machine can be reduced. However, the payout of the winning ball and the payout of the rental ball may be detected by separate detection means.

  In this embodiment, the ball payout device 97 is configured to perform both prize ball payout and ball lending. However, a ball payout device for paying out a prize ball and a ball payout device for lending a ball may be provided separately. When separately provided, the payout means is composed of a ball payout device for paying out a prize ball and a ball payout device for lending a ball. Furthermore, for example, it may be configured to change the direction of rotation of the cam or sprocket so as to separate the winning ball payout and the ball lending. The present invention can be applied to any structure other than the structure).

  FIG. 4 is a block diagram illustrating an example of a circuit configuration in the main board 31. FIG. 4 also shows a payout control board 37, an effect control board 80, and the like. The main board 31 includes a basic circuit (corresponding to game control means) 53 for controlling the pachinko gaming machine 1 according to a program, a gate switch 32a, a start port switch 14a, a V count switch 22, a count switch 23, a winning port switch 29a, 30a, 33a, 39a and an input driver circuit 58 for supplying a signal from the clear switch 921 to the basic circuit 53, a solenoid 16 for opening and closing the variable winning ball device 15, a solenoid 21 for opening and closing the variable winning ball device 20, and a special winning opening And a solenoid circuit 59 for driving the solenoid 21A for switching the path according to a command from the basic circuit 53.

  It should be noted that the gate switch 32a, the start port switch 14a, the V count switch 22, the count switch 23, the winning port switches 29a, 30a, 33a, 39a, and other switches may be referred to as sensors. That is, the name of the game medium detection means is not limited as long as it is a game medium detection means (game ball detection means in this example) that can detect a game ball. Each of the start port switch 14a, the V count switch 22, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a that perform winning detection is also a winning detection means that detects the winning of a game ball in the winning area. . Note that even if a passing gate such as the gate switch 32a is used, if a prize ball is to be paid out, a game ball entering the passing gate becomes a win, and a switch ( For example, the gate switch 32a) serves as a winning detection means. Furthermore, in this embodiment, since the game balls won in the V winning area are detected only by the V count switch 22, the number of game balls won in the big prize opening is determined by the number detected by the V count switch 22 and the count switch 23. It becomes the sum with the number of detection by. However, the game ball that has won the V winning area may be detected by the V count switch 22 and also by the count switch 23. In that case, the number of game balls won in the big winning opening corresponds to the number detected by the count switch 23.

  A switch common voltage (for example, + 12V) is supplied to each of the start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a. A switch common monitoring circuit 71 for monitoring the voltage is mounted. When the switch common monitoring circuit 71 detects that the switch common voltage has decreased to a predetermined value, the switch common monitoring signal input to the basic circuit 53 is turned off.

  Further, according to the data given from the basic circuit 53, the jackpot information indicating the occurrence of the jackpot, the effective starting information indicating the number of starting winning balls used for starting the variable display of the symbols in the variable display device 9, the probability variation has occurred. An information output circuit 64 for outputting an information output signal such as probability variation information indicating the above to an external device such as a hall computer is mounted.

  The basic circuit 53 includes a ROM 54 for storing a program for game control (game progress control), a RAM 55 as storage means (variation data storage means for storing fluctuation data) used as a work memory, and a control operation according to the program. A game control microcomputer 560 having a CPU 56 and an I / O port unit 57 are included. In this embodiment, the ROM 54 and the RAM 55 are built in the game control microcomputer 560. That is, the game control microcomputer 560 is a one-chip microcomputer. The one-chip microcomputer only needs to incorporate at least the RAM 55, and the ROM 54 may be external or built-in. Further, the I / O port unit 57 may be built in a one-chip microcomputer.

  In the game control microcomputer 560, the CPU 56 executes control in accordance with the program stored in the ROM 54. Therefore, hereinafter, the game control microcomputer 560 executes (or performs processing) specifically. Is that the CPU 56 executes control according to the program. The same applies to microcomputers mounted on substrates other than the main substrate 31. The game control means is realized by a basic circuit 53 including a game control microcomputer 560.

  The RAM 55 is a backup RAM as a non-volatile storage means that is partially or entirely backed up by a backup power source created on the power supply substrate 910. That is, even if the power supply to the gaming machine is stopped, a part or all of the contents of the RAM 55 is stored for a predetermined period (until the power supply of the backup power supply is disabled). In particular, at least data (special symbol process flag, etc.) corresponding to the game state, that is, the control state of the game control means, and data indicating the number of unpaid winning balls are stored in the backup RAM. Note that the data according to the control state of the game control means is data necessary for restoring the control state before the occurrence of a power failure or the like based on the data when the power supply is restored after a power failure or the like. . In this embodiment, it is assumed that the entire RAM 55 is backed up.

  The reset signal from the power supply board 910 is input to the reset terminal of the game control microcomputer 560, but the reset signal from the power supply board 910 is delayed by the delay circuit 69 in the main board 31. Since the reset signal is shared as a game control permission signal (a signal for making the CPU operable) to the game control microcomputer 560 and a payout control permission signal to the payout control microcomputer, the delay circuit 69 is used. Is a specific period determined by the delay amount in the delay circuit 69, compared to the timing at which the game control permission signal is input to the game control microcomputer 560, rather than the timing at which the payout control permission signal is input to the payout control microcomputer. Will be delayed. Further, a power-off signal output from the power supply substrate 910 is input to the basic circuit 53 (specifically, an input port).

  The hitting ball launching device for hitting and launching the game ball includes a launch motor 94 controlled by a circuit on the payout control board 37, and the game ball is launched toward the game area 7 by the rotation of the launch motor 94. A drive signal for driving the firing motor 94 is transmitted to the firing motor 94 via the touch sensor substrate 91. The touch sensor detects that the player is touching the operation knob (hitting ball handle) 5 and a signal from the touch sensor is mounted on the touch sensor substrate 91 (the player touches the operation knob 5). Is transmitted to the payout control board 37 via a circuit including a detection circuit for detecting whether or not it is touched. The circuit on the payout control board 37 stops the driving of the firing motor 94 when the signal from the touch sensor circuit indicates an off state. Note that the operation knob 5 is provided with a touch ring that adjusts the resilience and is a part that the player contacts. In the gaming machine, the touch sensor substrate 91 is disposed between the touch ring and the payout control substrate 37, and is disposed in the vicinity of the touch ring. Specifically, the wiring length between the touch ring and the touch sensor substrate 91 is shorter than the wiring length between the touch sensor substrate 91 and the payout control substrate 37.

  In this embodiment, the effect control means mounted on the effect control board 80 performs display control of the normal symbol start memory display 41 and the decoration lamp 25 provided on the game board 6, and the frame side Display control of the top frame lamp 28a, the left frame lamp 28b, and the right frame lamp 28c. The effect control means mounted on the effect control board 80 also performs display control of the variable display device 9 that variably displays special symbols and the normal symbol display 10 that variably displays normal symbols.

  Further, the game control microcomputer 560 used in this embodiment has a non-maskable interrupt terminal (NMI terminal) used to generate a non-maskable interrupt (NMI) that cannot be set to disable interrupt by software. ) And an interrupt terminal (INT terminal) used to generate an interrupt (external interrupt; maskable interrupt that can be disabled by software) from outside the game control microcomputer 560. However, this embodiment does not use non-maskable interrupts and external interrupts. Therefore, the NMI terminal and the INT terminal are pulled up to Vcc (+5 V) through resistors. Therefore, the input levels of the NMI terminal and the INT terminal are always high, and there is a possibility that the input level of the NMI terminal and the INT terminal falls due to noise or the like, and an interrupt is generated, as compared with the case where the terminal is open. To reduce.

  FIG. 5 is a block diagram showing components related to payout, such as the payout control board 37 and the ball payout device 97. As shown in FIG. 5, the payout control board 37 is equipped with a payout control microcomputer (an example of an electrical component control microcomputer) 370 including a payout control CPU 371. In this embodiment, the payout control microcomputer 370 is a one-chip microcomputer and incorporates at least a RAM. The payout control CPU 371, the RAM (not shown), the ROM (not shown) storing the payout control program, the I / O port, and the like constitute the payout control means. That is, the payout control means is realized by a payout control CPU 371, a payout control microcomputer 370 having a RAM and a ROM, and an I / O port. The I / O port may be built in the payout control microcomputer 370. The RAM in the payout control microcomputer 370 is not backed up. Therefore, when power is not supplied to the gaming machine, the stored contents of the RAM are not saved.

  Detection signals from the ball break switch 187, the full switch 48, and the payout count switch 301 are input to the I / O port 372 f of the payout control board 37 via the relay board 72. The detection signal from the payout motor position sensor 295 is input to the I / O port 372e of the payout control board 37 via the relay board 72. The payout motor position sensor 295 is a sensor composed of a light emitting element (LED) and a light receiving element for detecting the rotational position of the payout motor 289, and is used for detecting that the game ball is clogged, that is, so-called ball biting. . In the payout control microcomputer 370 mounted on the payout control board 37, the detection signal from the ball break switch 187 indicates a full ball state, or the detection signal from the full tank switch 48 indicates a full tank state. Then, the ball payout process is stopped. Further, when the detection signal from the full tank switch 48 indicates a full tank state, the ball launching from the ball striking device is stopped.

  When there is a winning game ball at the winning opening, the output circuit 67 of the main board 31 issues a payout command signal indicating a payout number signal indicating the number of prize balls to be paid out and a payout for receiving (receiving) a payout number signal. A REQ signal (capture request signal) is output (transmitted). Specifically, it is turned on. The payout number signal is composed of 5-bit data (binary 5-digit data) and is output through five signal lines. Note that the ON state of the signal, that is, the output state is a state where the signal is significant, and turning ON means that the signal receiving side is instructed to start some processing based on the signal. To do. For example, when the payout number signal indicating the number of winning balls and the payout REQ signal are turned on, this means that the payout control microcomputer 370 is instructed to recognize the payout number indicated by the payout number signal. To do. Alternatively, the signal may be turned on by outputting a signal, and the signal may be turned off by stopping the signal output. Alternatively, the on state and the off state may be switched by outputting a signal.

  The payout REQ signal and the payout quantity signal are input to the I / O port 372e via the input circuit 373A. When a payout number signal is input via the I / O port 372e, the payout control microcomputer 370 performs control for driving the ball payout device 97 to pay out the number of game balls indicated by the payout number signal. A power supply confirmation signal (connection confirmation signal) indicating that the main board 31 is connected is also output from the output circuit 67 of the main board 31. The payout REQ signal and the payout number signal correspond to a payout command signal for designating the payout number.

  When the payout control microcomputer 370 receives a payout command signal, it sends a reception confirmation signal to the main board 31. The reception confirmation signal is transmitted to the main board 31 via the output port 372b of the payout control board 37 and the output circuit 373B. Then, in the main board 31, the data is input to the game control microcomputer 560 via the input circuit 68 and the I / O port 57.

  The payout control microcomputer 370 receives, via the output port 372b, a prize ball information signal indicating the number of prize balls to be paid and a ball lending number signal indicating the number of balls lent. Output to 160). A driver circuit is provided outside the output port 372b, but is not shown in FIG.

  Further, the payout control microcomputer 370 outputs an error signal to the error display LED 374 by the 7 segment LED via the output port 372c. Further, a signal for instructing lighting / extinguishing is output to the winning ball LED 51 and the ball running out LED 52 via the output port 372b. A detection signal from an error release switch 375 for releasing the error state is input to the input port 372f of the payout control board 37. The error cancel switch 375 is used to cancel the error state by software reset.

  Further, a drive signal from the payout control microcomputer 370 to the payout motor 289 is transmitted to the payout motor 289 in the payout mechanism portion of the ball payout device 97 via the output port 372a and the relay board 72. Although a driver circuit (motor drive circuit) is installed outside the output port 372a, the description is omitted in FIG. The drive signal from the payout control microcomputer 370 to the firing motor 94 is transmitted to the firing motor 94 via the output port 372a and the touch sensor substrate 91.

  A card unit control microcomputer is mounted on the card unit 50 installed adjacent to the gaming machine. In addition, the card unit 50 is provided with a usable display lamp 151, a connecting table direction indicator 153, a card insertion display lamp 154, and a card insertion slot 155. A frequency display LED 60, a ball lending LED 61, a ball lending switch 62, and a return switch 63 provided in the vicinity of the hitting ball supply tray 3 are connected to the interface board (relay board) 66.

  A card lending switch signal indicating that the ball lending switch 62 has been operated and a return switch signal indicating that the return switch 63 has been operated are given to the card unit 50 from the interface board 66 in accordance with the player's operation. . Further, a card balance display signal indicating a prepaid card balance and a ball lending display signal are given from the card unit 50 to the interface board 66. Between the card unit 50 and the payout control board 37, a connection signal (VL signal), a unit operation signal (BRDY signal), a ball lending request signal (BRQ signal), a ball lending completion signal (EXS signal), and a pachinko machine operation signal ( PRDY signal) is transmitted / received via the input port 372f and the output port 372d. An interface board 66 is interposed between the card unit 50 and the payout control board 37. Therefore, a signal such as a connection signal (VL signal) is transmitted and received between the card unit 50 and the payout control board 37 via the interface board 66 as shown in FIG.

  When the power of the pachinko gaming machine 1 is turned on, the payout control microcomputer 370 mounted on the payout control board 37 outputs a PRDY signal to the card unit 50. The card unit control microcomputer outputs a VL signal when the power is turned on. The payout control microcomputer 370 determines the connected / unconnected state of the card unit 50 according to the input state of the VL signal. When a card is received in the card unit 50, the ball lending switch is operated and a ball lending switch signal is input, the card unit control microcomputer outputs a BRDY signal to the payout control board 37. When a predetermined delay time elapses from this point, the card unit control microcomputer outputs a BRQ signal to the payout control board 37.

  Then, the payout control microcomputer 370 raises the EXS signal to the card unit 50 and, upon detecting the fall of the BRQ signal from the card unit 50, drives the payout motor 289 to give a predetermined number of rental balls to the player. Pay out. When the payout is completed, the payout control microcomputer 370 causes the EXS signal to the card unit 50 to fall. Thereafter, on the condition that the BRDY signal from the card unit 50 is not in the ON state, a prize ball payout control is executed when a payout command signal is received from the game control means.

  The power supply voltage AC24V used in the card unit 50 is supplied from the payout control board 37. That is, power supply from the power supply board 910 to the card unit 50 is performed via the payout control board 37 and the interface board 66. In this example, a fuse for protecting the card unit 50 is provided in a 24 V AC power supply line for the card unit 50 arranged in the interface board 66, and a voltage higher than a predetermined voltage is supplied to the card unit 50. It is prevented.

  The payout control microcomputer 370 used in this embodiment includes a non-maskable interrupt terminal (NMI terminal) used for generating a non-maskable interrupt (NMI) and a maskable interrupt. And an interrupt terminal (INT terminal) that is used for generation. However, this embodiment does not use non-maskable interrupts and external interrupts. Therefore, the NMI terminal and the INT terminal are pulled up to Vcc (+5 V) through resistors.

  In this embodiment, the case where the card unit 50 is installed adjacent to the gaming machine as a separate body from the gaming machine is taken as an example, but the card unit 50 may be integrated with the gaming machine. . Further, the present invention can be applied even when a game ball corresponding to the amount of money is lent out in accordance with coin insertion.

  FIG. 6 is a block diagram illustrating a circuit configuration example of the effect control board 80, the lamp driver board 35, and the sound control board 70. The lamp driver board 35 and the sound control board 70 are not equipped with a microcomputer. In the effect control board 80, the effect control CPU 101 in the effect control microcomputer 100 (an example of an electric component control microcomputer) 100 operates according to a program stored in a ROM (not shown), and is taken from the main board 31. An effect control command is received via the input driver 102 and the input port 103 in response to the embedded signal (effect control INT signal). Further, the effect control microcomputer 100 causes the VDP (video display processor) 109 to perform display control of the variable display device 9 using the LCD based on the effect control command. The VDP 109 is sometimes called a GCL (graphic controller LSI).

  Furthermore, the production control microcomputer 100 outputs sound number data to the sound control board 70 via the output port 104 and the output driver 110. A bus (including an address bus, a data bus, and a control signal line such as a write / read signal) input / output to / from the effect control CPU 101 in the effect control microcomputer 100 is connected to the lamp driver board 35 via the bus driver 105. Has been extended.

  In the lamp driver board 35, a bus that is input to and output from the effect control CPU 101 is connected to the output port 352 and the expansion port 353 via the bus receiver 351. A signal for driving each lamp output from the output port 352 is amplified by the lamp driver 354 and supplied to each lamp. A signal for driving each LED output from the output port 352 is amplified by the LED driving circuit 355 and supplied to each LED.

  In this embodiment, the effect lamps / LEDs provided in the gaming machine are controlled by effect control means including the effect control microcomputer 100 mounted on the effect control board 80. Further, data for controlling the variable display device 9, the normal symbol display 10, the lamp / LED and the like are stored in the ROM. The production control microcomputer 100 controls the variable display device 9, the normal symbol display 10, the lamp / LED, and the like based on the data stored in the ROM. Then, the lamp / LED is driven via the output port 352 mounted on the lamp driver substrate 35 and each drive circuit. Therefore, when changing the model, it is necessary to make a design change such as changing the number of ports for the lamp driver board 35, but for the effect control board 80, it is only necessary to replace the ROM storing the program. There is no need to make design changes.

  Although the production control board 80, the lamp driver board 35, and the sound control board 70 are independent boards, they are installed in a single box on the back of the gaming machine, for example. Further, the expansion port 353 is installed in consideration of the case where the number of lamps / LEDs and the like is increased when changing the model, but it may not be installed.

  In the voice control board 70, the sound number data from the effect control board 80 is input to the voice synthesis IC 703 by a digital signal processor, for example, via the input driver 702. The voice synthesis IC 703 reads data corresponding to the sound number data from the voice data ROM 704, generates voice and sound effects corresponding to the read data, and outputs them to the amplifier circuit 705. The amplification circuit 705 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 703 to a level corresponding to the volume set by the volume 706 to the speaker 27.

  The data corresponding to the sound number data stored in the sound data ROM 704 is a collection of data indicating the sound effect or sound output mode in a predetermined time period (for example, a special symbol fluctuation period) in time series. When the voice number IC 703 receives the sound number data, the voice synthesis IC 703 performs sound output control according to the corresponding data in the voice data ROM 704. The sound output control according to the corresponding data is continued until the next sound number data is input. When the next sound number data is input, the speech synthesis IC 703 performs sound output control according to the data in the sound data ROM 704 corresponding to the newly input sound number data.

  In this embodiment, the sound and sound output from the speaker 27 are controlled by the effect control means including the effect control microcomputer 100, but the effect control means outputs the sound number data to the sound control board 70. Output. In the voice control board 70, the voice data ROM 704 stores a large amount of data for realizing voice and sound effects that can appear as the game progresses, and these data are associated with the sound number data. . Therefore, the production control means can realize sound output control only by outputting the sound number data. Note that the sound number data is, for example, 1-byte data, and is transferred to the sound control board 70 via a serial signal line or a parallel signal line.

  Next, the configuration of the power supply substrate 910 will be described with reference to the block diagram of FIG. The power supply board 910 is provided with a power switch 914 for executing or shutting off power supply to each electrical component control board and mechanism component in the gaming machine. Note that the power switch 914 may be provided outside the power supply board 910 in the gaming machine. When the power switch 914 is in a closed state (on state), AC power (AC 24 V) is applied to the input side (primary side) of the transformer 911. The transformer 911 is for electrically insulating the AC power supply (AC24V) and the inside of the power supply substrate 910, and its output voltage is also AC24V. A varistor 918 as an overvoltage protection circuit is installed on the input side of the transformer 911.

  The power supply board 910 is installed independently of the electric component control board (the main board 31, the payout control board 37, and the effect control board 80), and generates a voltage used by each board and mechanism component in the gaming machine. In this example, AC24V, VSL (DC + 30V), VLP (DC + 24V), VDD (DC + 12V) and VCC (DC + 5V) are generated. Further, a capacitor 916 serving as a storage holding means for holding the stored contents in the backup power supply (VBB), that is, the backup RAM, is charged from DC + 5V (VCC), that is, a power supply line for driving an IC or the like on each substrate. Further, a backflow prevention diode 917 is inserted between the +5 V line and the backup +5 V (VBB) line. Note that VSL is generated by rectifying and boosting AC 24 V with a rectifying element in the rectifying and smoothing circuit 915. VSL is a solenoid driving power source. VLP is a lamp lighting voltage, and is generated by rectifying AC24V with a rectifier element in the rectifier circuit 912.

  The DC-DC converter 913 serving as a power supply voltage generation unit has one or a plurality of regulator ICs (two regulator ICs 924A and 924B are shown in FIG. 7), and generates VDD and VCC based on VSL. Relatively large capacitors 923A and 923B are connected to the input sides of the regulator ICs (switching regulators) 924A and 924B. Accordingly, when the power supply to the gaming machine from the outside is stopped, the DC voltages such as VSL, VDD, VCC, etc., decrease relatively slowly.

  As shown in FIG. 7, AC24V output from the transformer 911 is supplied to the connector 922B as it is. The VLP is supplied to the connector 922C. VCC, VDD and VSL are supplied to connectors 922A, 922B and 922C.

  The cable connected to the connector 922A is connected to the main board 31. The cable connected to the connector 922B is connected to the payout control board 37. Therefore, VBB is also supplied to the connectors 922A and 922B. The cable connected to the connector 922C is connected to the lamp driver board 36. Each voltage is supplied to the effect control board 80 via the lamp driver board 36.

  In addition, a clear switch 921 having a push button structure is mounted on the power supply board 910. When the clear switch 921 is pressed, a low level (on state) clear switch signal is output and transmitted to the main board 31 via the connector 922A. If the clear switch 921 is not pressed, a high level (off state) signal is output. The clear switch 921 may have a configuration other than the push button structure. Further, the clear switch 921 may be provided other than the power supply board 910 in the gaming machine.

  Further, the power supply board 910 generates a reset signal for the microcomputer mounted on the electric component control board, amplifies the reset signal from the power supply monitor circuit 920 that outputs a power-off signal, and the power supply monitor circuit 920. In addition, an output driver circuit 925 that amplifies the power-off signal and outputs the amplified signal to the connector 922A is mounted on the connectors 922A, 922B, and 922C. The reset signal for the effect control microcomputer is transmitted to the effect control board 80 via the lamp driver board 36.

  The power supply monitoring circuit 920 is a circuit that realizes a power supply monitoring unit that outputs a power-off signal and a reset signal generation unit that generates a reset signal. As the power supply monitoring circuit 920, a commercially available power failure monitoring reset module IC should be used. Can do. The power supply monitoring circuit 920 outputs a power-off signal when a period during which a predetermined voltage (for example, + 24V) used in a gaming machine becomes equal to or lower than a predetermined value (for example, + 5V) continues for a predetermined time (for example, 56 ms). . Specifically, the power-off signal is turned on (low level). Further, the power supply monitoring circuit 920 enters a state in which the reset signal can be set to a low level, for example, when VCC becomes +4.5 V or less.

  When the power supply to the gaming machine is stopped, the power supply monitoring circuit 920 sets the reset signal to a low level on condition that a predetermined period has elapsed since the power-off signal was output (set to a low level). The predetermined period is a time sufficient for the game control microcomputer 560 mounted on the main board 31 to execute a power-off process described later. In addition, when the power supply to the gaming machine is started and Vcc exceeds +4.5 V, for example, the reset signal is set to high level. ) The reset signal is set to high level on condition that a predetermined period has elapsed. Therefore, when the microcomputer mounted on each electrical component control board (including the main board 31) starts control according to the program in response to the reset signal becoming high level, the power-off signal is always in the off state. It has become.

  The power-off signal from the power supply monitoring circuit 920, that is, the detection signal from the power supply monitoring means, is input to the game control microcomputer 560 via the input port 572 on the main board 31. Therefore, the gaming control microcomputer 560 can confirm the occurrence of the stop of the power supply to the gaming machine by monitoring the input signal of the input port 572.

  In this embodiment, the power supply monitoring means monitors the output of the power supply of a predetermined potential, and the voltage from the outside of the gaming machine (this implementation) is used as a detection condition related to the stop of the supply of power supplied to the gaming machine from the outside. In this embodiment, it is used that the predetermined DC voltage created from AC24V) is lower than the predetermined value. However, the detection condition is not limited to this, and if it is possible to detect that the power from the outside is cut off, Other conditions may be used. For example, the AC wave itself may be monitored and the AC wave may be detected as a detection condition, or the signal obtained by digitizing the AC wave may be monitored and the AC signal may be stopped when the digital signal becomes flat. May be used as a detection condition.

  8 and 9 are explanatory diagrams showing examples of output port assignment in the game control means. As shown in FIG. 8, the output port 0 is an output port for a payout control signal transmitted to the payout control board 37. Further, 8-bit data of the effect control command transmitted to the effect control board 80 is output from the output port 1. Note that the logic (for example, 0 is on) opposite to the “logic” (for example, 1 is on) shown in FIG. 8 and FIG. 9 may be used. When the signal line between the control board 37 and the payout control board 37 is disconnected or when the cable is disconnected (including no cable connection), the payout control microcomputer 370 always detects “OFF”. Is defined. Specifically, generally, when disconnection or disconnection of the cable occurs, a high level is detected on the signal receiving side, so the high level on the signal line between the main board 31 and the payout control board 37 is the game control means. The “logic” is determined to be in the off state at the output port at. Therefore, if necessary, an output buffer circuit for logically inverting the signal is provided outside the output port on the main board 31.

  In addition, a solenoid (large winning opening door solenoid) 21 for opening and closing a variable winning ball apparatus 20 that opens and closes a large winning opening from the output port 2, and a solenoid (large winning opening guide plate solenoid) for switching the path in the large winning opening ) 21A and a drive signal for a solenoid (normal electric accessory solenoid) 16 for opening and closing the variable winning ball device 15 is output. Further, an effect control INT signal (capture signal) for the effect control command transmitted to the effect control board 80 is also output. The effect control INT signal is a signal for instructing the effect control means to capture (receive) 8-bit data of the effect control command.

  Then, various information output signals from the output ports 3 and 4 to the information terminal board 34 and the terminal board 160 through the information output circuit 64, that is, output data of information related to control are output.

  FIG. 10 is an explanatory diagram showing an example of bit assignment of input ports in the game control means. As shown in FIG. 10, bits 0 to 7 of the input port 0 are detected by the V count switch 22, the count switch 23, the gate switch 32a, the winning port switches 33a, 39a, 29a, 30a, and the start port switch 14a, respectively. A signal is input. Also, the power-off signal from the power supply board 910, the detection signal of the clear switch 921, and the switch common monitoring signal are input to the bits 0 and 2 of the input port 1, respectively. The reception confirmation signal from the dispensing control board 37, the dispensing operation in-progress signal, and the connection confirmation signal are input to the bits 4 to 6 of the input port 1, respectively.

  Next, the operation of the gaming machine will be described. 11 and 12 show main processing executed by the game control microcomputer 560 in response to the start of power supply to the game machine and the reset signal to the game control microcomputer 560 becoming high level. It is a flowchart. When the input level of the reset terminal to which the reset signal is input becomes high level, the game control microcomputer 560 executes a security check process that is a process for confirming whether the contents of the program are valid, The main processing after S1 is started. In the main process, the game control microcomputer 560 first performs necessary initial settings.

  In the initial setting process, the game control microcomputer 560 first sets the interrupt prohibition (step S1). Next, the interrupt mode is set to interrupt mode 2 (step S2), and a stack pointer designation address is set to the stack pointer (step S3). Then, the built-in device register is set (initialized) (step S4).

  Next, a software delay process for delaying the start timing of the game device control process (game control process) for controlling the progress of the game by software is executed. Specifically, first, the initialization wait number designation value 1 is set in the wait counter 1 (step S81). Further, the initialization wait number specification value 2 is set in the wait counter 2 (step S82). Note that general-purpose registers built in the game control microcomputer 560 are used as the wait counters 1 and 2. Then, the value of the wait counter 2 is decremented by 1 until the value of the wait counter 2 becomes 0 (steps S83 and S84). When the value of the weight counter 2 becomes 0, the value of the weight counter 1 is decremented by 1 (step S85). When the value of the weight counter 1 is not 0 (step S86), the process returns to step S82. If the value of the wait counter 1 is 0, the software delay process is terminated.

  By the software delay process as described above, the software delay process is not executed substantially by [(initialization wait number specification value 1) × (initialization wait number specification value 2) × (processing time of steps S83 and S84)]. Compared to the case, the start timing of the game control process can be delayed. In other words, the initialization weight count designation values 1 and 2 are determined so that the start timing of the game control process can be delayed by a desired time. Note that the values of the initialization wait times designation values 1 and 2 are set in the ROM 54. Further, the software delay processing described here is an example, and the software delay processing may be realized by other methods. The game control microcomputer 560 may include means for inputting the values of the weight counter 1 and the weight counter 2 set in steps S81 and S82. The wait counter 1 and the wait counter 2 are parameters that determine the length of the delay time. Therefore, if a means for inputting the values of the weight counter 1 and the weight counter 2 is provided, the versatility regarding the setting of the delay time can be improved.

  When the software delay processing is completed, the CTC (counter / timer), which is a built-in device (built-in peripheral circuit), and PIO (parallel input / output port) are set (initialized) (step S5), and then the RAM 55 is accessible (Step S6).

  The game control microcomputer 560 used in this embodiment also includes an I / O port (PIO) and a timer / counter circuit (CTC). The CTC also includes two external clock / timer trigger inputs CLK / TRG2, 3 and two timer outputs ZC / TO0,1.

  In the game control microcomputer 560 used in this embodiment, the following three modes are prepared as maskable interrupt modes. When a maskable interrupt occurs, the game control microcomputer 560 automatically sets the interrupt disabled state and saves the contents of the program counter in the stack.

  Interrupt mode 0: The built-in device that issued the interrupt request sends an RST instruction (1 byte) or a CALL instruction (3 bytes) onto the internal data bus of the CPU 56. Therefore, the CPU 56 executes the instruction at the address corresponding to the RST instruction or the address specified by the CALL instruction. At reset, the game control microcomputer 560 automatically enters the interrupt mode 0. Therefore, when setting to interrupt mode 1 or interrupt mode 2, it is necessary to perform a process for setting to interrupt mode 1 or interrupt mode 2 in the initial setting process.

  Interrupt mode 1: In this mode, when an interrupt is accepted, the mode always jumps to address 0038 (h).

  Interrupt mode 2: A mode in which the address synthesized from the value (1 byte) of the specific register (I register) of the CPU 56 and the interrupt vector (1 byte: least significant bit 0) output by the built-in device indicates the interrupt address It is. That is, the interrupt address is an address indicated by 2 bytes in which the upper address is the value of the specific register and the lower address is the interrupt vector. Therefore, an interrupt process can be set at an arbitrary address (although it is skipped). Each built-in device has a function of sending an interrupt vector when making an interrupt request.

  Therefore, when the interrupt mode 2 is set, it becomes possible to easily process an interrupt request from each built-in device, and it is possible to install an interrupt process at an arbitrary position in the program. . Furthermore, unlike interrupt mode 1, it is also easy to prepare each interrupt process for each interrupt generation factor. As described above, in this embodiment, the game control microcomputer 560 is set to the interrupt mode 2 in step S2 of the initial setting process.

  Next, the game control microcomputer 560 checks the state of the output signal of the clear switch 921 input via the input port 1 only once (step S7). When ON is detected in the confirmation, the game control microcomputer 560 executes normal initialization processing (steps S10 to S15). When the clear switch 921 is on (when pressed), a low-level clear switch signal is output. Note that in the input port 1, the clear switch signal is in the high level. Further, for example, the game clerk can easily execute the initialization process by starting the power supply to the gaming machine (for example, turning on the power switch 914) while turning the clear switch 921 on. That is, RAM clear or the like can be performed.

  If the clear switch 921 is not in the on state, whether or not data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) has been performed when power supply to the gaming machine is stopped Confirm (step S8). In this embodiment, when power supply is stopped, a process for protecting data in the backup RAM area is performed. When it is confirmed that such protection processing has been performed, the game control microcomputer 560 determines that there is a backup. When it is confirmed that such protection processing is not performed, the game control microcomputer 560 executes initialization processing.

  Whether or not the protection process has been performed depends on the value of the backup monitoring timer stored in the backup RAM area in the power supply stop process described later according to the execution of the data protection process in the backup RAM area (for example, It is confirmed by whether or not 2). Note that such a confirmation method is merely an example. For example, a flag indicating that the data protection process has been executed is set in the backup flag area in the power supply stop process, and the flag is set in step S8. If it is confirmed that there is a backup, it may be determined that there is backup.

  If it is determined that there is a backup, the game control microcomputer 560 performs a data check (parity check in this example) in the backup RAM area (step S9). In this embodiment, clear data (00) is set in the checksum data area, and the checksum calculation start address is set in the pointer. Also, the number of checksum calculations corresponding to the number of data to be checksum is set. Then, the exclusive OR of the contents of the checksum data area and the contents of the RAM area pointed to by the pointer is calculated. The calculation result is stored in the checksum data area, the pointer value is incremented by 1, and the checksum calculation count value is decremented by 1. The above processing is repeated until the value of the checksum calculation count becomes zero. When the value of the checksum calculation count becomes 0, the game control microcomputer 560 inverts the value of each bit of the contents of the checksum data area and uses the inverted data as the checksum.

  In the power supply stop process, a checksum is calculated by the same process as described above, and the checksum is stored in the backup RAM area. In step S9, the calculated checksum is compared with the stored checksum. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, the initialization process (the processes of steps S10 to S15) executed when the power is turned on, not when the power supply is stopped. Execute.

  If the check result is normal, the game control microcomputer 560 returns the game state restoration process for returning the internal state of the game control means and the control state of the electrical component control means such as the effect control means to the state when the power supply is stopped. I do. Specifically, the start address of the backup setting table stored in the ROM 54 is set as a pointer (step S91), and the contents of the backup setting table are sequentially set in the work area (area in the RAM 55) (step S92). ). The work area is backed up by a backup power source. In the backup setting table, initialization data for an area that may be initialized in the work area is set. As a result of the processing in steps S91 and S92, the saved contents of the work area that should not be initialized remain. The parts that should not be initialized include, for example, data indicating the gaming state before the power supply is stopped (special symbol process flag, etc.), the area where the output state of the output port is saved (output port buffer), unpaid prize balls This is the part where data indicating the number is set.

  Further, the game control microcomputer 560 sets the head address of the backup command transmission table stored in the ROM 54 as a pointer (step S93), and indicates that the power supply has been restored to the effect control board 80 according to the contents. Control is performed so that the control command shown is transmitted (step S94). Then, the process proceeds to step S15.

  In the initialization process, the game control microcomputer 560 first performs a RAM clear process (step S10). The entire area of the RAM 55 may not be initialized, and predetermined data (for example, count value data of a counter for generating a big hit determination random number) may be left as it is. For example, if the count value data of the counter for generating the big hit determination random number is left as it is, the big hit determination random number is generated even if the initialization process is executed by unauthorized means. Therefore, it is difficult to aim at the timing at which the count value of the counter matches the jackpot determination value. Further, the start address of the initialization setting table stored in the ROM 54 is set as a pointer (step S11), and the contents of the initialization setting table are sequentially set in the work area (step S12).

  By the processing of steps S11 and S12, for example, a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol left middle right symbol buffer, a total prize ball number storage buffer, a special symbol process flag, an award ball flag, a ball break An initial value is set for a flag for selectively performing processing according to a control state, such as a flag or a payout stop flag. In addition, a bit corresponding to the output port that outputs the power supply confirmation signal in the output port buffer is set (corresponding to the ON state of the power supply confirmation signal).

  In addition, the game control microcomputer 560 sets the start address of the initialization command transmission table stored in the ROM 54 as a pointer (step S13), and issues an initialization command for initializing the sub-board according to the contents. Processing to transmit to the sub-board is executed (step S14). Examples of the initialization command include a command indicating an initial symbol displayed on the variable display device 9.

  In step S15, the game control microcomputer 560 sets a CTC register built in the game control microcomputer 560 so that a timer interrupt is periodically generated every predetermined time (for example, 2 ms). . That is, a value corresponding to, for example, 2 ms is set in a predetermined register (time constant register) as an initial value. In this embodiment, it is assumed that a timer interrupt is periodically taken every 2 ms.

  When the execution of the initialization process (steps S10 to S15) is completed, the game control microcomputer 560 repeatedly executes the display random number update process (step S17) and the initial value random number update process (step S18). When the display random number update process and the initial value random number update process are executed, the game control microcomputer 560 disables the interrupt (step S16), and executes the display random number update process and the initial value random number update process. When is finished, the interrupt is permitted (step S19). The display random number is a random number for determining a symbol displayed on the variable display device 9, and the display random number update process is a process for updating the count value of the counter for generating the display random number. It is. The initial value random number update process is a process for updating the count value of the counter for generating the initial value random number. The initial value random number is a random number for determining an initial value of a count value such as a counter for generating a random number for determining whether or not to make a big hit (a big hit determination random number generation counter). Game control processing described later (game control microcomputer 560 controls itself for game devices such as variable display device 9, variable winning ball device, ball payout device, etc. provided in the gaming machine, or other In the determination random number update process in the process of transmitting a command signal to cause the microcomputer to control the game machine control process), the value of the big hit determination random number generation counter is incremented by one. When the value of the random number generation counter is one round (incremented by the number of values between the minimum value and the maximum value that can be taken by the big hit determination random number generation counter), an initial value is set in the counter.

  Note that when the display random number update process and the initial value random number update process are executed, the interrupt disabled state is set even when the display random number update process and the initial value random number update process are performed by the timer interrupt process described later. This is to avoid conflict with the processing in the timer interrupt processing. That is, if a timer interrupt is generated during the processing of steps S17 and S18 and the count value of the counter for generating the display random number and the initial value random number is updated during the timer interrupt processing, The continuity of values may be impaired. However, such an inconvenience does not occur if the interrupt disabled state is set during the processes of steps S17 and S18.

  Next, the game control process will be described. FIG. 13 is a flowchart showing the timer interrupt process. When a timer interrupt occurs during execution of the main process, specifically, in a period in which the interrupt is permitted during execution of the loop process of steps S16 to S19, the game control microcomputer 560 causes the timer The game control process is executed in the timer interrupt process that is activated in response to the occurrence of the game. In the timer interrupt process, the game control microcomputer 560 first executes a power-off process (power-off detection process) that detects whether or not a power-off signal is output (whether or not it is turned on) ( Step S21). Subsequently, detection signals of switches such as the gate switch 32a, the start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a are input via the switch circuit 58, and the state of these is determined (switch) Process: Step S22). Specifically, if the state of the input port for inputting the detection signal of each switch is ON, the value of the switch timer provided corresponding to each switch is incremented by one.

  Next, a process of updating the count value of each counter for generating each determination random number such as a big hit determination random number used for game control is performed (step S23). The game control microcomputer 560 further performs a process of updating the count value of the counter for generating the display random number and the initial value random number (steps S24 and S25).

  Furthermore, the game control microcomputer 560 performs a special symbol process (step S26). In the special symbol process control, corresponding processing is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to the gaming state. The value of the special symbol process flag is updated during each process according to the gaming state. Further, normal symbol process processing is performed (step S27). In the normal symbol process, the corresponding process is selected and executed according to the normal symbol process flag for controlling the display state of the normal symbol display 10 in a predetermined order. The value of the normal symbol process flag is updated during each process according to the gaming state.

  Next, the game control microcomputer 560 performs a process of setting an effect control command related to the special symbol in a predetermined area of the RAM 55 and sending the effect control command (special symbol command control process: step S28). Further, a process for setting the effect control command for the normal symbol in a predetermined area of the RAM 55 and sending the effect control command is performed (normal symbol command control process: step S29).

  Further, the game control microcomputer 560 performs information output processing for outputting data such as jackpot information, start information, probability variation information supplied to the hall management computer, for example (step S30).

  The game control microcomputer 560 executes prize ball processing for setting the number of prize balls based on detection signals from the prize opening switches 29a, 30a, 33a, 39a and the like (step S31). Specifically, a payout command signal such as a payout number signal indicating the number of prize balls is output to the payout control board 37 in response to winning detection based on the fact that the winning opening switches 29a, 30a, 33a, 39a, etc. are turned on. The payout control microcomputer 370 mounted on the payout control board 37 drives the ball payout device 97 in response to receiving a payout number signal indicating the number of winning balls.

  Then, the game control microcomputer 560 executes a storage process for checking an increase / decrease in the number of start winning memories (step S32). In addition, a test terminal process, which is a process for outputting a test signal for enabling the control state of the gaming machine to be confirmed outside the gaming machine, is executed (step S33). In this embodiment, a RAM area (output port buffer) corresponding to the output state of the output port is provided. However, the game control microcomputer 560 is related to the solenoid in the RAM area of the output port 3. (See FIG. 8) is output to the output port (step S34: solenoid output processing). Thereafter, the interrupt permission state is set (step S35), and the process is terminated.

  With this control, in this embodiment, the game control process is started periodically (for example, every 2 ms). In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set, and the game control process is performed by the main process. May be executed. Further, the processing of steps S22 to S34 (except for steps S30 and S33) corresponds to a game control process for controlling the progress of the game.

  14 and 15 are flowcharts illustrating an example of the power-off process in step S21. In the power-off process, the game control microcomputer 560 first checks whether or not a power-off signal is output (whether or not it is turned on) (step S450). If not on, the value of the backup monitoring timer formed in the RAM 55 is cleared to 0 (step S451). If it is on, the value of the backup monitoring timer formed in the RAM 55 is incremented by 1 (step S452). If the value of the backup monitoring timer matches the determination value (for example, 2) (step S453), the power supply stop processing after step S454, that is, the preparation processing for power supply stop is executed. That is, the state shifts from the state in which the progress of the game is controlled to the state in which the power supply stop process (the power-off control process) for saving the game state is executed. Note that “formed in RAM” means an area in the RAM.

  By using the backup monitoring timer and the determination value, if the power-off signal is kept on for a time corresponding to the determination value, the power supply stop process is started. That is, even when the power-off signal is turned on for a moment due to noise or the like, the power supply stop process is not erroneously started. Note that the value of the backup monitoring timer formed in the RAM 55 is stored by the backup power source for a predetermined period even if the power supply to the gaming machine is stopped. Therefore, in step S8 in the main process, it is possible to confirm that the processing result of the power supply stop process is stored because the value of the backup monitoring timer is the same value as the determination value.

  In the power supply stop process, the game control microcomputer 560 creates parity data (steps S454 to S463). That is, first, the clear data (00) is set in the checksum data area formed in the RAM 55 (step S454), and the checksum corresponding to the start address of the RAM area where the contents should be saved even when the power supply is stopped. The calculation start address is set in the pointer (step S455). Further, the number of checksum calculations corresponding to the final address of the RAM area where the contents are to be stored even when the power supply is stopped is set (step S456).

  Next, the exclusive OR of the contents of the checksum data area, that is, the contents of the checksum data and the RAM area pointed to by the pointer is calculated (step S457). The calculation result is stored in the checksum data area (step S458), the value of the pointer is incremented by 1 (step S459), and the value of the checksum calculation count is decremented by 1 (step S460). Then, the processes in steps S457 to S460 are repeated until the value of the checksum calculation count becomes 0 (step S461).

  When the value of the checksum calculation count becomes 0, the game control microcomputer 560 inverts the value of each bit of the contents of the checksum data area (step S462). Then, the inverted data is stored in the checksum data area (step S463). This data becomes parity data to be checked when the power is turned on. Next, an access prohibition value is set in the RAM access register (step S471). Thereafter, the RAM 55 built in the game control microcomputer 560 cannot be accessed.

  Further, the game control microcomputer 560 sets the head address of the port clear data setting table stored in the ROM 54 as a pointer (step S472). In the port clear data setting table, the number of processes (number of output ports to be cleared) is set at the head address, and then the output port address and output value data (clear data: the value of the off state of each bit of the output port) ) Are sequentially set for the output ports for the number of processes.

  The game control microcomputer 560 loads data at the address pointed to by the pointer (that is, the number of processes) (step S473). Further, the value of the pointer is incremented by 1 (step S474), and the data of the address pointed to by the pointer (that is, the address of the output port) is loaded (step S475). Further, the value of the pointer is incremented by 1 (step S476), and the data of the address pointed to by the pointer (that is, output value data) is loaded (step S477). Then, the output value data is output to the output port (step S478). Thereafter, the number of processes is reduced by 1 (step S479), and if the number of processes is not 0, the process returns to step S474 (step S480). If the number of processes is 0, that is, if all the output ports to be cleared are cleared, the timer interrupt is stopped (step S481) and the loop process is started.

  In the loop processing, it is monitored whether or not the power-off signal is turned off (step S482). When the power-off signal is turned off, the execution address at power-on (address in step S1) is set as the return address and the return command is executed (step S483). That is, the process returns to the main process. Specifically, a state in which a gaming device provided in the gaming machine is controlled (a concept including both controlling by itself and sending a command signal to cause another microcomputer to control). Return.

  When the power supply is stopped by the above process, the power supply stop process of steps S454 to S481 is executed, and data indicating that the power supply stop process is executed (specified value with backup and checksum) Are stored in the backup RAM, the RAM access is disabled, the output port is cleared, and the timer interrupt for executing the game control process is disabled.

  In this embodiment, the entire area of the RAM 55 is backed up by a backup power source (the contents of the RAM 55 are preserved for a predetermined period even when power supply to the gaming machine is stopped). Therefore, the checksum based on the contents of the RAM 55 when the power-off signal is output is stored in the RAM 55 together with the value of the backup monitoring timer by the processing in steps S452 to S480. After the power supply to the gaming machine is stopped, when the power supply is restored within a predetermined period, the game control means performs the data stored in the RAM 55 (immediately before the power supply is stopped) by the processing of steps S91 to S94 described above. In accordance with the data indicating the game state that is the control state by the game control means (for example, including the process flag state, the big hit flag state, the probability change flag state, the output port output state, etc.) It is possible to return to the state immediately before the supply is stopped. If the power supply stop period exceeds the predetermined period, the value of the backup monitoring timer and the checksum should be different from the regular values. In this case, the initialization process of steps S10 to S14 is executed. The

  As described above, the power supply stop process (preparation process for stopping the power supply) ensures that the data for returning the gaming state to the state immediately before the power supply stopped is the fluctuation data storage means (in this example) All areas of the RAM 55). Therefore, even if the power is cut off due to a power failure or the like, if the power is restored within a predetermined period, the gaming state can be returned to the state immediately before the power supply is stopped. The entire area of the RAM 55 may not be backed up by power, but only the area for storing data for returning the gaming state to the state immediately before the power supply is stopped may be backed up.

  When the power-off signal is turned off, the process returns to step S1. In this case, since data indicating that the power supply stop process has been executed is set, the game state recovery process of steps S91 to S94 is executed. Therefore, when the detection signal from the power supply monitoring unit is turned off after executing the power supply stop process, the process returns to the state of controlling the progress of the game. Therefore, even if a power interruption or the like occurs, the game control process does not stop, and the game control process is automatically continued.

  Note that the power supply confirmation signal transmitted to the payout control board 37 is set to the off state by the process of clearing the output port. In the setting of the work area in S12, the contents of the output port buffer corresponding to the power supply confirmation signal are set to values corresponding to the ON state of the power supply confirmation signal. Then, when the prize ball processing in step S31 is executed, the contents of the output port buffer are output to the output port, so that the power supply confirmation signal to the payout control board 37 is turned on. Accordingly, the power supply confirmation signal is output (turned on) when the main board 31 rises, that is, when power supply to the gaming machine is started and the game control means can execute the game control process. It will be.

  Next, the switch process (step S22) in the main process will be described. In this embodiment, when the ON state of the detection signal of each switch related to winning detection or gate passage continues for a predetermined time, it is determined that the switch is surely turned on, and processing corresponding to the switch on is started. FIG. 16 is an explanatory diagram showing each 1-byte buffer formed in the RAM 55 used in the switching process. The previous port buffer is a buffer that stores the previous switch-on / off determination result (for example, 2 ms before). The port buffer is a buffer in which the contents of port 0 inputted this time are stored. The switch-on buffer is a buffer in which the corresponding bit is set to 1 when switch on is detected and the corresponding bit is set to 0 when switch off is detected.

  FIG. 17 is a flowchart showing a processing example of the switch processing in step S22 in the game control processing. In the switch process, the game control microcomputer 560 first inputs data input to the input port 0 (see FIG. 10) (step S101), and sets the input data in the port buffer (step S102). Next, the initial value of the weight counter formed in the RAM 55 is set (step S103), and the value of the weight counter is decremented by 1 until the value of the weight counter becomes 0 (steps S104 and S105).

  When the value of the wait counter becomes 0, the data of the input port 0 is input again (step S106), and a logical product is obtained for each bit between the input data and the data set in the port buffer (step S106). S107). Then, the logical product operation result is set in the port buffer (step S108). Of the two input data input from the input port 0 with a time interval of approximately [initial value of weight counter × (processing time of steps S14 and S105)] by the processing of steps S103 to S108, both “ Only the bits that are “1” will be “1” in the port buffer. In other words, if the ON state of the switch detection signal continues for a predetermined period [initial value of wait counter × (processing time of steps S14 and S105)], the corresponding bit in the port buffer becomes “1”.

  Further, the game control microcomputer 560 performs exclusive OR for each bit between the data previously set in the port buffer and the data set in the port buffer (step S109). In the result of the exclusive OR operation, the bit corresponding to the switch for which the previous switch-on / off determination result (for example, 2 ms before) and the switch-on / off determination result determined to be on this time are different is “ 1 ”. The game control microcomputer 560 further performs a logical product for each bit between the exclusive OR operation result and the data set in the port buffer (step S110). As a result, of the bits corresponding to the switches for which the previous switch on / off determination result and the switch on / off determination result determined to be on this time are different (according to the exclusive OR operation result), the current on Only the bit corresponding to the switch determined as (by the logical product operation) remains as “1”.

  Then, the game control microcomputer 560 sets the logical product calculation result in step S110 in the switch-on buffer (step S111), and sets the contents of the port buffer in which the calculation result in step S108 is set in the previous port buffer. (Step S112).

  With the above processing, among the switches that have been on for a predetermined period of time, the switch on / off determination result of the previous time (for example, 2 ms before) is off, that is, the switch has changed from off to on. The bit corresponding to the switch is “1” in the switch-on buffer.

  Next, payout control signals transmitted and received between the main board 31 and the payout control board 37 will be described. FIG. 18 shows the contents of the payout control signal output from the game control microcomputer 560 to the payout control microcomputer 370 and the payout control signal input from the payout control microcomputer 370 to the game control microcomputer 560. It is explanatory drawing which shows an example. In this embodiment, a plurality of types of control signals are transmitted and received (two-way communication) between the main board 31 and the payout control board 37 in order to perform various controls relating to payout control and the like.

  As shown in FIG. 18, the power supply confirmation signal rises (turns on) when the main board 31 rises (when the game control microcomputer 560 is in a state in which the progress of the game can be controlled after the start of power supply). This is a signal (connection confirmation signal for the main board 31) for notifying the payout control board 37 that the main board 31 has risen. The power supply confirmation signal indicates that the prize ball payout is permitted. That is, the game control microcomputer 560 can prevent the payout control microcomputer 370 from paying out a prize ball by turning off the power supply confirmation signal. If the payout control microcomputer 370 detects that the power supply confirmation signal is turned off during the payout of the prize ball, the payout control microcomputer 370 completes the number of prize balls that are determined to be paid out at that time. At this point, the system shifts to a state in which the prize ball payout process is not executed.

  The payout REQ signal is a signal (that is, a trigger signal for a prize ball payout request) that becomes an output state (= ON state) when a prize ball payout request is made. The payout REQ signal is stopped (off state) when a reception confirmation signal from the payout control microcomputer 370 is turned on.

  The payout number signal is a signal (prize ball number command) that is output to designate the number of game balls (for example, 1 to 15) that make a payout request. The payout number signal is not turned on when the game control microcomputer 560 detects that the reception confirmation signal is turned on in the award ball waiting state or after the payout REQ signal is transmitted. It is also used as an error signal indicating a reception confirmation signal error that is output when it is detected that it has been detected, or when it has been detected that it has not been turned off after transmission of the payout REQ signal is stopped. Specifically, if the payout number signal is 1E (H), it indicates a reception confirmation signal error. The payout number signal is paid out when the game control microcomputer 560 detects that the payout operation in-progress signal is turned on in the award ball waiting state, or after the reception confirmation signal is turned off. It is also used as an error signal indicating a payout operation signal error that is output when it is detected that the operation signal has not been turned on. Specifically, if the payout number signal is 1F (H), it indicates a signal error during payout operation.

  The connection confirmation signal is a signal for the payout control microcomputer 370 to turn on when the payout control board 37 rises and to notify the game control microcomputer 560 that the payout control board 37 has risen. In other words, this is a signal for notifying that the payout control microcomputer 370 can execute the winning ball payout process. Therefore, the payout control microcomputer 370 turns off the connection confirmation signal when an error relating to payout of the game ball occurs. The reception confirmation signal is a signal that is turned on when the payout control microcomputer 370 receives a payout number signal in response to the payout REQ signal being turned on. The payout operation in-progress signal is a signal that is turned on when the payout control microcomputer 370 starts the prize ball payout process and is turned off when the number of prize balls paid out by the payout number signal is completed.

  FIG. 19 is a block diagram showing signal lines and the like used for transmission / reception of the payout control signal shown in FIG. As shown in FIG. 19, among the payout control signals, the power supply confirmation signal, the payout REQ signal, and the payout quantity signal are output via the output circuit 67 by the game control microcomputer 560 and are discharged via the input circuit 373A. The data is input to the control microcomputer 370. Of the payout control signals, the connection confirmation signal, the reception confirmation signal, and the payout operation in-progress signal are output by the payout control microcomputer 370 via the output circuit 373B, and the game control microcomputer 560 via the input circuit 68. Is input. The power supply confirmation signal, the payout REQ signal, the connection confirmation signal, the reception confirmation signal, and the payout operation in-progress signal are each 1-bit data, and are transmitted through one signal line (signal path). The payout number signal is composed of 5-bit data and is transmitted through five signal lines (signal paths).

  FIG. 20 is a timing chart showing an example of how to output the payout control signal. As shown in FIG. 20, based on the fact that the winning detection switch detects the winning of the game ball, the gaming control microcomputer 560 sets the payout REQ signal to the on state and sets the payout number signal output state to the winning prize. In accordance with the number of prize balls to be paid out. In this embodiment, when a game ball is detected by the start port switch 14a, four prize balls are paid out, and when a game ball is detected by any one of the prize port switches 33a, 39a, 29a, 30a. Seven prize balls are paid out. When a game ball is detected by the V count switch 22 or the count switch 23, 15 prize balls are paid out. As described above, since the payout number signal is composed of 5 bits, the lower 5 bits of the award ball number commands of 00 (H) to 0F (H) expressed in 8 bits are paid out. The number signal is transmitted from the main board 31 to the payout control board 37. Therefore, it is possible to designate 0 to 31 prize balls by the number-of-payout signal, but in this embodiment, 1F (H) and 1E (H) are used for error notification. Therefore, in practice, it is possible to specify the number of prize balls from 0 to 29. However, in this embodiment, up to 15 (0F (H)) is used for specifying the number, and therefore, it may be expressed as “the number-of-payout number signal from 00 (H) to 0F (H)” hereinafter. .

  When the payout control microcomputer 370 confirms the receipt of the payout REQ signal, the payout control microcomputer 370 inputs the payout number signal and transmits (turns on) the reception confirmation signal. When the game control microcomputer 560 confirms the reception of the reception confirmation signal, it stops transmission of the payout REQ signal (turns it off). When confirming that the payout REQ signal is turned off, the payout control microcomputer 370 drives the payout motor 289 so that the number of award balls specified by the payout number signal is paid. When starting driving, a payout operation in-progress signal is transmitted (ON state). When the payout control microcomputer 370 confirms that the number of award balls specified by the payout number signal has been paid based on the detection signal of the payout number count switch 301, the payout control microcomputer 370 stops transmitting the payout operation in-progress signal. (Turn off). When the game control microcomputer 560 confirms that the payout operation in-progress signal is turned off, the game control microcomputer 560 sets the payout number signal to the off state (all 0 state).

  Note that the game control microcomputer 560 may turn off the payout number signal when the payout REQ signal is turned off.

  As shown in FIG. 20, when a new winning is detected when the payout REQ signal and the payout number signal are in the on state, the payout REQ signal is turned on and the payout number signal is output based on the win. Specifically, when the game control microcomputer 560 detects a new win when the payout REQ signal is on, the game control microcomputer 560 indicates the total number of prize balls to be paid out based on the win in the RAM 55. Add to the contents of the ball number storage buffer. When the payout REQ signal is turned off, the game control microcomputer 560 indicates that the content of the total prize-ball number storage buffer is up to 15 if the content of the total prize-ball number storage buffer is not 0. In order to instruct the payout of the number of winning balls, the payout REQ signal is turned on and the payout number signal is output.

  As shown in FIG. 21, when the payout REQ signal is not turned on (this state is called waiting for award ball payout), the game control microcomputer is turned on when the reception confirmation signal is turned on. 560 turns off the power supply confirmation signal in order to notify the payout control microcomputer 370 that a communication error has occurred. Further, as shown in FIG. 22, the power confirmation signal may be turned off and 1E (H) may be output as the payout number signal. Note that 1E (H) is an example, and other values may be used as long as they do not overlap with the designated number of prize balls.

  When the power confirmation signal is in the off state, the game control microcomputer 560 does not turn on the payout REQ signal even if the winning detection switch detects the winning of the game ball (see step S243A). Therefore, the number of winning balls to be paid out based on the winning is simply added to the contents of the total winning ball number storage buffer, and no payout number signal is output. When the fact that a communication error has occurred is transmitted from the game control microcomputer 560, the payout control microcomputer 370 turns off the connection confirmation signal (for example, steps S52, S53, and S58 described later). When the connection confirmation signal returns from the off state to the on state (for example, by the process of step S807 of the payout control means described later), the game control microcomputer 560 turns on the power confirmation signal (steps S243A, S244). Route of S245 and S248). At that time, if the content of the total winning ball number storage buffer is not 0, a payout REQ signal is used to instruct the paying out of the winning ball number indicated by the content of the total winning ball number storage buffer up to 15. While turning on, a payout quantity signal is output. By such control, the game control microcomputer 560 can transmit the occurrence of a communication error to the payout control microcomputer 370 and transmits a payout number signal for instructing the payout of the prize ball during the communication error. Is prevented. Note that the reception confirmation signal is turned on in spite of waiting for a prize ball payout, for example, when the payout control microcomputer 370 detects the on state of the payout REQ signal due to noise or the like. This is a case where noise is applied to the signal line of the reception confirmation signal.

  As shown in FIG. 23, when the payout operation in-progress signal is turned on in spite of waiting for a prize ball payout, the game control microcomputer 560 indicates that a communication error has occurred. In order to transmit to the microcomputer 370, the power confirmation signal is turned off. Also, as shown in FIG. 24, the power confirmation signal may be turned off and 1F (H) may be output as the payout number signal. Note that 1F (H) is an example, and other values may be used as long as they do not overlap with the designated number of prize balls. It should be noted that the payout operation in-progress signal is turned on in spite of waiting for a prize ball payout, for example, when noise is placed on the signal line of the payout operation in-progress signal.

  As shown in FIG. 25, the game control microcomputer 560 determines that a communication error has occurred if the reception confirmation signal does not turn off after a predetermined time has elapsed. In order to transmit to the computer 370, the power confirmation signal is turned off and 1E (H) is output as the payout number signal. For example, when the signal line of the reception confirmation signal is short-circuited to the ground level, a state occurs in which the reception confirmation signal is not turned off even if a predetermined time elapses.

  FIG. 26 is a flowchart illustrating an example of the prize ball processing in step S31. In the prize ball process, the game control microcomputer 560 executes a prize ball number addition process (step S201) and a prize ball control process (step S202). Then, the contents of the output port 0 buffer among the output port buffers formed in the RAM 55 are output to port 0 (step S203). The contents of the output port 0 buffer are updated in the prize ball control process.

  In the winning ball number adding process, a winning ball number table shown in FIG. 27 is used. The prize ball number table is set in the ROM 54. The number of processes (in this example, “7”) is set in the head address of the winning ball number table, and then the lower address of the switch-on buffer, and each switch of the winning opening that will pay out the winning ball by winning. The switch input bit determination value and the number of winning balls are sequentially set corresponding to each switch of the winning opening. The switch input bit determination value is a value corresponding to the bit to which the detection signal of each switch at the input port 0 is input (see FIG. 10). The upper address of the switch-on buffer is a fixed value (for example, 7F (H)). In the prize ball number table, the same data is set in each of the lower addresses of the seven switch-on buffers.

  FIG. 28 is a flowchart showing the prize ball number adding process. In the winning ball number adding process, the game control microcomputer 560 sets the start address of the winning ball number table as a pointer (step S211). Then, the data at the address pointed to by the pointer (in this case, the number of processes) is loaded (step S212). Next, the upper address (8 bits) of the switch-on buffer is set in the upper 1 byte of the 2-byte check pointer (step S213).

  Then, the pointer value is incremented by 1 (step S214), and the data of the prize ball number table pointed to by the pointer (in this case, the lower address of the switch-on buffer) is set in the lower 1 byte of the check pointer (step S215). The pointer value is increased by 1 (step S216). Next, the address data pointed to by the check pointer, that is, the contents of the switch-on buffer is loaded into the register (step S217), and the loaded contents and the data of the prize ball number table pointed to by the pointer (in this case, the switch input bit judgment value) ) And the logical product (step S218). As a result, 7 bits other than the bit corresponding to the detection signal of the switch to be inspected become 0 in the register loaded with the contents of the switch-on buffer. Then, the pointer value is incremented by 1 (step S219).

  If the calculation result in step S218 is 0, that is, if the detection signal of the switch to be inspected is on, the prize ball number table data pointed to by the pointer (in this case, the prize ball number) is used as the prize ball addition value. (Steps S220 and S221), and the prize ball addition value is added to the contents of the 16-bit total prize ball number storage buffer formed in the RAM 55 (step S222). The total winning ball number storage buffer is formed in the backup RAM. If a carry occurs as a result of the addition, the content of the total number of winning balls storage buffer is set to 65535 (= FFFF (H)) (steps S223 and 224).

  In step S225, the number of processes is reduced by 1. If the number of processes is 0, the process ends. If the number of processes is not 0, the process returns to step S214 (step S226). In step S220, when it is confirmed that the calculation result in step S218 is 0, that is, the detection signal of the switch to be inspected is in the OFF state, the process proceeds to step S225.

  FIG. 29 is a flowchart showing the prize ball control process in step S201. In the prize ball control process, the game control microcomputer 560 executes any one of steps S231 to S236 according to the value of the prize ball process code.

  FIG. 30 is a flowchart showing the standby process (step S231) executed when the value of the prize ball process code is 0. The game control microcomputer 560 checks the value of the prize ball timer in the standby process (step S241). If the value of the prize ball timer is not 0, the value of the prize ball timer is decremented by 1, and the process is terminated (step S242). The case where the value of the prize ball timer is not 0 means, for example, when the prize ball number signal is turned off after confirming that the payout operation in progress signal has been turned off during communication of the previous payout control signal. This is the case where a predetermined value is set in the prize ball timer in order to insert a waiting time until the payout REQ signal is turned on.

  If the value of the prize ball timer is 0, the game control microcomputer 560 checks whether or not the power supply confirmation signal is turned off (step S243A), and when the power supply confirmation signal is turned off. The process is terminated. Therefore, when the power confirmation signal is turned off, the payout REQ signal is not output. The game control microcomputer 560 can grasp the output state of the power supply confirmation signal from the state of bit 6 of the output port 0 buffer. Further, the game control microcomputer 560 confirms the state of the connection confirmation signal through the input port (step S243B). If the connection confirmation signal is off, the process is terminated. Therefore, when the connection confirmation signal is in the OFF state, the process is not shifted to the payout number signal transmission process (see FIG. 31) (specifically, the output value during payout REQ in step S254 described later is output to the output port 0 buffer). In this case, the payout REQ signal is not output.

  If the connection confirmation signal is on, the state of the reception confirmation signal is confirmed via the input port (step S244). Since the reception confirmation signal should not be turned on in the standby state, when the reception confirmation signal is on, the game control microcomputer 560 determines that a communication error has occurred. Then, the prize ball abnormal state output value (00 (H) or 1E (H)) is set in the output port 0 buffer, and the process is terminated (step S247). When the prize ball abnormal state output value is set in the output port 0 buffer, the contents of the output port 0 buffer are output to port 0 in step S203 (see FIG. 26), whereby a power supply confirmation signal and a payout REQ signal are output. Is turned off (see FIG. 8). By such control, as shown in FIG. 21 or FIG. 22, when the reception confirmation signal is turned on during the prize ball payout standby, the power confirmation signal is turned off. Even if a value other than 0 is stored in the total winning ball number storage buffer, the state does not shift to a state in which a payout command signal is output. That is, it is prohibited to turn on the payout command signal.

  Further, the case where 1E (H) is set as the prize ball abnormal state output value corresponds to the case shown in FIG. 22, and the case where 00 (H) is set as the prize ball abnormal state output value is shown in FIG. Corresponds to the indicated case. When 1E (H) as a prize ball abnormal state output value is set, 1E (H) is output as a payout number signal, and when 00 (H) as a prize ball abnormal state output value is set, the number of payouts 00 (H) is output as a signal. However, at this stage, the payout quantity signal is normally 00 (H) before the prize ball abnormal state output value is set.

  If the reception confirmation signal is not in the on state, the game control microcomputer 560 checks the state of the payout operation in-progress signal via the input port (step S245). Since the payout operation in-progress signal should not be turned on in the standby state, the game control microcomputer 560 determines that a communication error has occurred when the payout operation in-progress signal is on. Then, the prize ball abnormal state output value (00 (H) or 1F (H)) is set in the output port 0 buffer, and the process is terminated (step S246). When 1F (H) is set as the prize ball abnormal state output value, this corresponds to the case shown in FIG. 24, and when 00 (H) is set as the prize ball abnormal state output value, FIG. Corresponds to the indicated case. By such control, as shown in FIG. 23 or FIG. 24, when the payout operation in-progress signal is turned on during the prize ball payout standby, the power supply confirmation signal is turned off. Even if a value other than 0 is stored in the total winning ball number storage buffer, the state does not shift to a state in which a payout command signal is output. That is, it is prohibited to turn on the payout command signal.

  If no communication error has occurred, the prize ball waiting output value (40 (H)) is set in the output port 0 buffer (step S248). When the prize ball waiting output value is set in the output port 0 buffer, the payout REQ signal is turned off by outputting the contents of the output port 0 buffer to port 0 in step S203, and the power supply confirmation signal Is turned on (see FIG. 8). However, if the control related to communication has been normally continued, at this stage, the payout REQ signal is already in the off state and the power supply confirmation signal is in the on state. The processing in step S248 is valid when the communication error state is recovered (specifically, when the connection confirmation signal from the payout control board 37 returns to the on state).

  Next, the game control microcomputer 560 checks the contents of the total prize ball number storage buffer (step S249). If the value is 0, the process ends. If not, the value of the prize ball process code is set to 1 (step S250), and the process ends.

  FIG. 31 is a flowchart showing the payout number signal transmission process (step S232) executed when the value of the prize ball process code is 1. In the payout number signal transmission process, the game control microcomputer 560 checks whether or not the content of the total prize ball number storage buffer is smaller than the prize ball command maximum value (“15” in this example) (step S251). If the content of the total prize ball number storage buffer is equal to or greater than the prize ball command maximum value, the prize ball command maximum value is set in the prize ball number buffer (step S252). If the content of the total prize ball number storage buffer is smaller than the maximum value of the prize ball command, the content of the total prize ball number storage buffer is set in the prize ball number buffer (step S253).

  Thereafter, the output value during payout REQ (60 (H)) is set in the output port 0 buffer (step S254). When the output value during the payout REQ is set in the output port 0 buffer, the content of the output port 0 buffer is output to the port 0 in step S203, whereby the payout REQ signal is turned on, and the power supply confirmation signal The on state is maintained (see FIG. 8). Further, the contents of the winning ball number buffer are set in the lower 5 bits of the output port 0 buffer (step S255). Further, a value (2500 in this example) corresponding to a predetermined time (for example, 5 seconds) for monitoring that the reception confirmation signal is turned on is set in the prize ball timer (step S256). Thereafter, the value of the prize ball process code is set to 2 (step S257), and the process is terminated. Note that 5 seconds is a sufficient time to complete one payout process (for example, payout of up to 25 game balls), and the payout control means is performing the ball lending process. This is a time considering a period during which the payout REQ signal is not confirmed. When it is allowed to continuously execute a plurality of ball lending processes (for example, paying out 25 game balls at a time), a predetermined time for monitoring that the reception confirmation signal is turned on Is determined in consideration of the maximum number of ball lending processes executed continuously.

  In this embodiment, the maximum prize ball command value is “15”. Accordingly, a payout number signal designating a payout number of “15” at the maximum is transmitted to the payout control board 37.

  FIG. 32 is a flowchart showing the reception confirmation signal ON waiting process (step S233) executed when the value of the prize ball process code is 2. In response to the reception confirmation signal being turned on in the reception confirmation signal on wait process (step S261), the game control microcomputer 560 determines the contents of the prize ball number buffer from the contents of the total prize ball number storage buffer. The number of prize balls paid out instructed to the payout control microcomputer 370 is subtracted (step S262). Then, the payout REQ signal output bit (bit 5: see FIG. 8) of the output port 0 buffer is reset (step S263). When the payout REQ signal output bit of the output port 0 buffer is reset, the payout REQ signal is turned off by outputting the contents of the output port 0 buffer to port 0 in step S203 (see FIG. 8). ), The payout command signal is turned off when the payout REQ signal, which is a take-in request signal, is turned off.

  Further, a value corresponding to a predetermined time (100 ms as an example) for monitoring that the reception confirmation signal is turned off is set in the prize ball timer (step S264). Also, the value of the prize ball process code is set to 3 (step S265), and the process is terminated.

  If the reception confirmation signal is not on, the value of the prize ball timer is decremented by 1 (step S266). If the value of the prize ball timer is not 0, the process is terminated. When the value of the prize ball timer becomes 0 (step S267), the game control microcomputer 560 determines that a communication error has occurred. The prize ball abnormal state output value (00 (H) or 1E (H)) is set in the output port 0 buffer (step S268). When the prize ball abnormal state output value is set in the output port 0 buffer, the power check signal and the payout REQ signal are turned off by outputting the contents of the output port 0 buffer to port 0 in step S203 (see FIG. 26). (See FIG. 8). Then, the value of the prize ball process code is set to 0 corresponding to the standby process (step S269), and the process ends.

  FIG. 33 is a flowchart showing the reception confirmation signal OFF waiting process (step S234) executed when the value of the prize ball process code is 3. In the reception confirmation signal off waiting process, the game control microcomputer 560 monitors whether the payout operation in-progress signal is turned on in response to the reception confirmation signal being turned off (step S271). A value corresponding to the time (100 ms as an example) is set in the prize ball timer (step S272). Also, the value of the prize ball process code is set to 4 (step S273), and the process is terminated.

  If the reception confirmation signal is not OFF, the value of the prize ball timer is decremented by 1 (step S275). If the value of the prize ball timer is not 0, the process is terminated. When the value of the prize ball timer becomes 0 (step S276), the game control microcomputer 560 determines that a communication error has occurred. The prize ball abnormal state output value (00 (H) or 1E (H)) is set in the output port 0 buffer (step S277). Then, the value of the prize ball process code is set to 0 corresponding to the standby process (step S278), and the process ends.

  FIG. 34 is a flowchart showing the payout operation signal on waiting process (step S235) executed when the value of the prize ball process code is 4. In the payout operation signal on waiting process, the game control microcomputer 560 monitors whether the payout operation signal is turned off in response to the payout operation signal being turned on (step S281). A value corresponding to a predetermined time (for example, 5 seconds) is set in the prize ball timer (step S282). Also, the value of the prize ball process code is set to 5 (step S283), and the process is terminated.

  When the payout operation in-progress signal is not on, the value of the prize ball timer is decremented by 1 (step S285). If the value of the prize ball timer is not 0, the process is terminated. When the value of the prize ball timer becomes 0 (step S286), the game control microcomputer 560 determines that a communication error has occurred. Then, the prize ball abnormal state output value (00 (H) or 1F (H)) is set in the output port 0 buffer (step S287). When the prize ball abnormal state output value is set in the output port 0 buffer, the power check signal and the payout REQ signal are turned off by outputting the contents of the output port 0 buffer to port 0 in step S203 (see FIG. 26). (See FIG. 8). Then, the value of the prize ball process code is set to 0 corresponding to the standby process (step S288), and the process ends.

  FIG. 35 is a flowchart showing the payout operation signal off waiting process (step S236) executed when the value of the prize ball process code is 5. In the payout operation signal off waiting process, the game control microcomputer 560 awards a delay time value (10 corresponding to 20 ms as an example) in response to the payout operation signal being turned off (step S291). The ball timer is set (step S294), the payout number signal output bit (lower 5 bits) of the output port 0 buffer is set to 0 (step S297), and the value of the prize ball process code is set to 0 (step S298). The process is terminated. In this case, the communication between the game control microcomputer 560 and the payout control microcomputer 370 is normally completed. The delay time value is set to provide a waiting time until the payout REQ signal is turned on next time.

  If the payout operation in-progress signal is not in the OFF state, the value of the prize ball timer is decremented by 1 (step S292). If the value of the prize ball timer is not 0, the process is terminated. When the value of the prize ball timer becomes 0 (step S293), the game control microcomputer 560 determines that a payout error has occurred. Then, the game control microcomputer 560 sets an abnormality notification command transmission request (step S295), and resets the power check signal output bit of the output port 0 buffer (step S296). Further, the payout number signal output bit (lower 5 bits) of the output port 0 buffer is set to 0 (step S297), the value of the winning ball process code is set to 0 (step S298), and the process is terminated. When an abnormality notification command transmission request is set, an abnormality notification command is transmitted to the production control microcomputer 100.

  As described above, the gaming control microcomputer 560 controls to stop paying out the game ball (for example, power supply confirmation) when an abnormality (communication error) in communication with the payout control microcomputer 370 occurs. Signal off). The game control microcomputer 560 stops paying out the game balls until the abnormality in communication with the payout control microcomputer 370 is resolved. That is, even if a new event (game ball winning or the like) occurs, processing corresponding to the new event is not performed, for example, a newly generated event is stored. When the communication abnormality is resolved (for example, when the connection confirmation signal is turned on), the game control microcomputer 560 resumes communication.

  In this embodiment, the game control microcomputer 560 sets the payout number specified by the payout command signal from the prize game medium number data stored in the prize game medium number storage means (in this example, the total prize ball number storage buffer). The predetermined condition for executing the subtraction process for subtracting the corresponding value is when the reception confirmation signal is received from the payout control microcomputer 370, specifically, when the reception confirmation signal is turned on. . When the reception confirmation signal is turned on, the payout control microcomputer 370 has not yet paid out the number of prize balls instructed by the payout command signal. The total number of winning balls after the reception confirmation signal is turned on (for example, when the paying-in operation signal is turned off, that is, when the number of paying balls designated by the payout number signal is completed). If the storage buffer is subtracted, a large number of prize balls will be paid out illegally by fraudulent actions such as restoring the power supply after illegally stopping the power supply of the gaming machine during the prize ball payout. End up. For example, when 15 prize ball payouts are instructed by a payout command signal, when 10 prize ball payouts are made, if the power supply is restored after illegally stopping the power supply of the gaming machine, Since the contents of the total prize ball number storage buffer are not subtracted at all, it is assumed that the 10 prize balls are not paid out even though 10 prize balls are actually paid out. Control will continue.

  However, in this embodiment, when the reception confirmation signal is turned on, that is, when the payout control microcomputer 370 accepts the payout command signal and transmits the reception confirmation signal, the total winning ball number storage buffer Since the subtraction process is executed, the above fraud can be prevented.

  The game control means and the payout control means perform two-way communication with respect to the prize ball payout control, and the game control means stores the prize game medium number storage means in response to receiving a signal corresponding to the reception confirmation signal. A gaming machine that performs a subtraction process for subtracting a value corresponding to the number of payouts specified by a payout command signal from the prize game medium number data that has been made is known (for example, see Japanese Patent Application Laid-Open No. 2004-65676).

  FIG. 36 is a timing chart showing how to output a payout control signal described in Japanese Patent Application Laid-Open No. 2004-65676. As shown in FIG. 36, in the gaming machine described in Japanese Patent Application Laid-Open No. 2004-65676, the game control means has been turned off after the BUSY signal corresponding to the reception confirmation signal is turned on. Accordingly, a subtraction process is performed to subtract a value corresponding to the payout number specified by the payout command signal from the premium game medium number data stored in the premium game medium number storage means.

  However, in the gaming machine described in Japanese Patent Application Laid-Open No. 2004-65676, the game control means performs a payout command signal until the payout control means completes the instructed number of prize balls even after performing the subtraction process. (In particular, the payout REQ signal) is kept on. Then, when the power is restored after the power is cut off in the state where the on-state of the payout command signal is maintained (for example, time T shown in FIG. 36), the game control means The payout command signal is turned on again by the recovery process. In that case, the payout control means restarts the prize ball payout processing from the beginning (for example, the first one when receiving 15 prize ball payout instructions). If it is paid out as a prize ball, double payout will be made. On the other hand, in this embodiment, when the subtraction process is performed, the payout command signal is turned off, that is, the payout command signal is turned off early, so that double payout is performed and excessive payout balls are paid out. The possibility of being done is reduced.

  Next, the operation of the payout control means (the payout control microcomputer 370 and the I / O port) will be described. FIG. 37 is an explanatory diagram showing an example of output port assignment in the payout control means. As shown in FIG. 37, the output port 0 is an output port for outputting a signal of each phase supplied to the firing motor 94 by the stepping motor and a signal of each phase supplied to the payout motor 289 by the stepping motor. It is. Further, the output port 1 outputs a ball-out LED 52, a prize ball LED 51, a reception confirmation signal, a payout operation in-progress signal and a connection confirmation signal, and award ball information, ball lending information, and a prize ball signal output to the outside of the gaming machine. This is an output port.

  The output port 2 is an output port for each segment output of the gaming machine error state signal output to the outside of the gaming machine and the error display LED 374 by the 7 segment LED. The output port 3 is an output port for outputting an EXS signal and a PRDY signal to the card unit 50.

  Note that the logic (for example, 0 is on) opposite to the “logic” (for example, 1 is on) shown in FIG. 37 may be used. In particular, for the connection confirmation signal, the payout control board 37 main board. The “logic” is determined so that the game control microcomputer 560 is always detected to be in the off state when the signal line to the terminal 31 is disconnected or when the cable is disconnected (including no cable connection). . Specifically, generally, when disconnection or disconnection of the cable occurs, a high level is detected on the signal receiving side, so the high level on the signal line between the payout control board 37 and the main board 31 is the payout control means. The “logic” is determined to be in the off state at the output port at. Therefore, if necessary, an output buffer circuit for logically inverting the signal is provided outside the output port on the payout control board 37.

  FIG. 38 is an explanatory diagram showing an example of bit assignment of input ports in the payout control means. As shown in FIG. 38, a 5-bit payout number signal is input to bits 0 to 4 of the input port 0, and a power confirmation signal from the main board 31 and a main board 31 to bits 5 to 7, respectively. The payout REQ signal and the detection signal of the payout motor position sensor 295 are input. In addition, bits 0 to 4 of the input port 1 respectively include a touch sensor signal (launch control signal) from the touch sensor, a detection signal from the payout count switch 301, an operation signal from the error release switch 375, and a full switch 48. Detection signal and the detection signal of the ball break switch 187 are input. The VL signal, the BRDY signal, and the BRQ signal from the card unit 50 are input to bits 5 to 7 of the input port 1, respectively.

  Next, the operation of the payout control means will be described. FIG. 39 is a flowchart showing main processing executed by the payout control microcomputer 370 in response to the start of power supply to the gaming machine and the reset signal to the payout control microcomputer 370 becoming high level. . In the main process, the payout control microcomputer 370 first performs necessary initial settings. That is, the payout control microcomputer 370 first sets the interruption prohibition (step S701). Next, the interrupt mode is set to interrupt mode 2 (step S702), and a stack pointer designation address is set to the stack pointer (step S703). The payout control microcomputer 370 sets (initializes) the built-in device register (step S704), and sets (initializes) the CTC and PIO (step S705), and then can access the RAM. The state is set (step S706).

  In this embodiment, one channel of the built-in CTC is used in the timer mode. Accordingly, in the built-in device register setting process in step S704 and the process in step S705, register setting for setting the channel to be used to timer mode, register setting for permitting interrupt generation, and setting an interrupt vector. Register settings are made. The interrupt by the channel is used as a timer interrupt. For example, when it is desired to generate a timer interrupt every 2 ms, a value corresponding to 2 ms is set as an initial value in a predetermined register (time constant register).

  The interrupt vector set for the channel set to the timer mode (channel 3 in this embodiment) corresponds to the start address of the timer interrupt process. Specifically, the start address of the timer interrupt process is specified by the value set in the I register and the interrupt vector. In the timer interruption process, a payout control process for controlling the payout means (including at least a process of driving the ball payout device 97 in accordance with a command signal relating to award ball payout from the main board, and a ball payout device 97 in response to a ball lending request. A process for driving the above may be included).

  In this embodiment, the interruption mode 2 is also set in the payout control microcomputer 370. Therefore, an interrupt process based on counting up the built-in CTC can be used. Also, an interrupt processing start address can be set according to the interrupt vector sent by the CTC.

  The interrupt based on CTC channel 3 (CH3) count-up is an interrupt generated when the CPU internal clock (system clock) is counted down and the register value becomes “0”, and is used as a timer interrupt. . Specifically, a clock obtained by dividing the operation clock of the payout control CPU 371 is given to the CTC, the register value is subtracted by the input of the clock, and when the register value becomes 0, a timer interrupt occurs. For example, the register value of CH3 is subtracted at 1/256 period of the system clock. Since the subtraction is performed based on the divided clock, the initial value of the register does not increase.

  Next, the payout control microcomputer 370 performs a RAM clear process (step S707). Also, initial values are set in the flags and counters of the RAM area (step S708). The process of step S708 includes a process of setting an initial value (for example, 0) of a winning ball unpaid number counter in the winning ball unpaid number counter, and a process for turning on a connection confirmation signal (specifically, RAM The process of setting bit 4 of the output port 1 buffer formed in the The contents of the output port buffer are reflected in the output of the output port when the output process in step S760 described later is first executed. The main process is started in response to the start of power supply to the gaming machine, and when the output process in the payout control process is executed for the first time, a connection confirmation signal is output to the output port (turns on) Therefore, the connection confirmation signal is turned on when power supply to the gaming machine is started and the payout process can be executed.

  Then, a CTC register provided in the payout control microcomputer 370 is set so that a timer interrupt is periodically generated (step S709). That is, a value corresponding to the timer interrupt generation interval is set as an initial value in a predetermined register (time constant register). Since interruption is prohibited in step S701 of the initial setting process, interruption is permitted before the initialization process is completed (step S710). Thereafter, a loop process for monitoring the occurrence of a timer interrupt is entered.

  As described above, in this embodiment, the built-in CTC of the payout control microcomputer 3701 is set to repeatedly generate a timer interrupt. When a timer interrupt occurs, the payout control microcomputer 370 sets a timer interrupt flag in the timer interrupt process. In the loop process in the main process, when it is detected that the timer interrupt flag is set, the payout control process in step S750 and subsequent steps is executed.

  In step S750 of FIG. 40, the payout control microcomputer 370 performs excitation pattern output processing for the firing motor 94 (output of the patterns of the firing motors φ1 to φ4 to the output port 0). In the firing motor control process in step S752, the excitation pattern is stored in the excitation pattern buffer that is the RAM area. In step S750, the payout control microcomputer 370 stores the contents of the excitation pattern buffer in the lower 4 bits of the output port 0. Process to output to.

  Next, the payout control microcomputer 370 performs an input determination process (step S751). The input determination process includes a process of checking the status of the detection signals of the payout number count switch 301 and the error release switch 375. Specifically, switch timers (payout number count switch timer, error release switch timer) corresponding to each of them are formed in the RAM, and when it is detected in the switch check process that they are on, the corresponding switch timer The value of the switch timer is incremented by one, and when it is detected that the switch is off, the corresponding switch timer value is cleared.

  Next, the payout control microcomputer 370 executes a firing motor control process (step S752). In the firing motor control process, the patterns of the firing motors φ1 to φ4 are stored in the excitation pattern buffer. When the firing motor 94 should be disabled, the patterns of the firing motors φ1 to φ4 that do not rotate the firing motor 94 are stored in the excitation pattern buffer. Also, the payout control microcomputer 370 executes a payout motor control process (step S753). In the payout motor control process, when the payout motor 289 is to be driven, a process for outputting the patterns of the payout motors φ1 to φ4 to the output port 0 is performed.

  Also, the payout control microcomputer 370 executes a prepaid card unit control process for communicating with the card unit 50 (step S754). Next, a main control communication process for communicating with the game control microcomputer 560 is executed (step S755). Furthermore, a control for paying out a ball in accordance with a ball rental request from the card unit 50 and a control for paying out a ball for controlling the payout of the number of prize balls indicated by the number-of-payout signal from the main board are performed. It executes (step S756).

  Then, the payout control microcomputer 370 executes error processing for detecting various errors (step S757). In addition, an information output process for outputting prize ball information and ball rental information output to the outside of the gaming machine is executed (step S758). Further, a predetermined display is performed on the error display LED 374 according to the result of the error processing, and a display control process for lighting the prize ball LED 51 and the ball out LED 52 is executed (step S759). In the display control process, the payout control microcomputer 370 performs control for lighting the prize ball LED 51 when the payout operation in-progress signal is on. Further, when the payout operation in-progress signal is turned off, control for turning off the prize ball LED 51 is performed.

  In this embodiment, a RAM area (output port 0 buffer, output port 1 buffer, output port 2 buffer) corresponding to the output state of the output port is provided. The contents of the output port 0 buffer, output port 1 buffer, and output port 2 buffer are output to the output port (step S760: output processing). However, since the lower 4 bits (fire motors φ1 to φ4) of output port 0 are executed in step S750, the output of the lower 4 bits of output port 0 is not performed in the output process. The output port 0 buffer, output port 1 buffer, and output port 2 buffer include a payout motor control process (step S753), a prepaid card control process (step S754), a main control communication process (step S755), and an information output process (step S758). And updated in the display control process (step S759).

  FIG. 41 is a flowchart showing the payout motor control process in step S753. In the payout motor control process, the payout control microcomputer 370 executes one of steps S521 to S526 according to the value of the payout motor control code.

  In the payout motor normal process (step S521) executed when the value of the payout motor control code is 0, the payout control microcomputer 370 sets the pointer to the head address of the table stored in the ROM. The payout motor normal process setting table stores a payout motor excitation pattern table in which data of excitation patterns (payout motors φ1 to φ4) of each step for rotating the payout motor 289 at the time of ball payout is sequentially set. Yes.

  In the payout motor activation preparation process (step S522) executed when the value of the payout motor control code is 1, the payout control microcomputer 370 outputs bits 4 to 4 of the output port 0 buffer corresponding to the output state of the output port 0. Processing such as setting the initial value of the excitation pattern to 7 is performed.

  In the payout motor slow-up process (step S523) executed when the value of the payout motor control code is 2, the payout control microcomputer 370 performs the constant speed process in order to smoothly start the payout motor 289. The output port 0 buffer corresponding to the output state of the output port 0 is read by reading the contents of the payout motor excitation pattern table at a longer interval and at a time interval that gradually approaches the time interval in the case of constant speed processing. Set to bits 4-7. At the time of reading, the contents of the payout motor excitation pattern table at the address pointed to by the pointer are read and the pointer value is incremented by one.

  In the payout motor constant speed process (step S524) executed when the value of the payout motor control code is 3, the payout control microcomputer 370 periodically reads the contents of the payout motor excitation pattern table and outputs the output port 0. Set to bits 4-7 of the output port 0 buffer corresponding to the output state.

  In the payout motor brake process (step S525) executed when the value of the payout motor control code is 4, the payout control microcomputer 370 stops the payout motor 289 more smoothly than in the case of the constant speed process. Bit 4 of the output port 0 buffer corresponding to the output state of the output port 0 by reading the content of the payout motor excitation pattern table at a long interval and gradually away from the time interval in the case of constant speed processing. Set to ~ 7.

  In the ball biting payout motor brake process (step S526) executed when the value of the payout motor control code is 5, the payout control microcomputer 370 performs the payout motor 289 in the case of rotation for releasing the ball biting. In order to smoothly stop the discharge, the payout motor at a longer interval than the rotation of the payout motor 289 for releasing the ball bite and at a time interval gradually moving away from the time interval in the case of the constant speed process. The contents of the excitation pattern table are read and set in bits 4 to 7 of the output port 0 buffer corresponding to the output state of output port 0.

  FIG. 42 is a flowchart showing the main control communication process in step S755. In the main control communication process, the payout control microcomputer 370 executes one of the processes in steps S531 to S535 according to the value of the main control communication control code if the power confirmation signal is on (step S51). To do.

  If the power supply confirmation signal is off, if the payout quantity signal indicates 1F (H), the payout operation in-progress signal error bit is set in the error flag (steps S52 and S53), and the connection confirmation signal is turned off. Put it in a state. If the payout number signal indicates 1E (H), the reception confirmation signal error bit in the error flag is set (steps S54 and S55), and the connection confirmation signal is turned off (step S58). If the payout quantity signal does not indicate 1F (H) or 1E (H), and if the winning ball payout operation is in progress (step S56), the payout operation in progress signal error bit in the error flag is set (step S57). Then, the connection confirmation signal is turned off (step S58). Whether or not a prize ball payout operation is in progress is determined by whether or not a prize ball in-motion flag formed in the RAM is set. When the connection confirmation signal is turned off in step S58, the connection confirmation signal output bit (bit 4: refer to FIG. 37) of the output port 1 buffer formed in the RAM is reset, and in the output process of step S760, By outputting the contents of the output port 1 buffer to port 1, the connection confirmation signal is actually turned off.

  The processing in steps S52 and S53 corresponds to the processing in step S287 executed by the game control microcomputer 560 (when 1F (H) is used as the prize ball abnormality output value). The processing of steps S54 and S55 corresponds to the processing of steps S268 and S277 executed by the game control microcomputer 560 (when 1E (H) is used as the prize ball abnormality output value). The processing in steps S56 and S57 corresponds to the processing in step S296 executed by the game control microcomputer 560. In this embodiment, the payout operation in progress signal error bit is set in both steps S53 and S57, but the payout control microcomputer 370 is turned on by the game control microcomputer 560. Whether it was determined as a communication error when it was detected that it was not performed (in the case of step S287), or whether it was determined as a communication error when it was detected that the payout operation in-progress signal was not turned off (in the case of step S296) Since they can be distinguished, the error bit to be set may be changed between step S53 and step S57.

  FIG. 43 is an explanatory diagram of a configuration example of the error flag. In the example shown in FIG. 43, in the error flag formed in the RAM, main control unconnected error, reception confirmation signal error, payout operation signal error, payout REQ signal error, payout number signal in order from bit 1 to bit 12. Each error bit of error, payout switch abnormality detection error 1, payout switch abnormality detection error 2, payout case error, full tank error, out of ball error, prepaid card unit unconnected error, and prepaid card unit communication error is assigned. The meaning of each error bit will be described later.

  FIG. 44 is a flowchart showing a standby process (step S531) executed when the value of the main control communication control code is 0. In the standby process, when the error bit is on, the payout control microcomputer 370 ends the process without executing the subsequent processes (step S541). In step S541, if any one of the bits in the error flag is set, it is determined that the error bit is set.

  If the BRDY signal is on, the payout control microcomputer 370 ends the process without executing the subsequent processes (step S542). That the BRDY signal is in an ON state means that a ball lending request is generated from the card unit 50 or that a ball lending process is in progress. That is, when a ball lending request is generated or a ball lending process is in progress, communication with the game control microcomputer 560 of the main board 31 does not proceed.

  If the conditions of steps S541 to S542 are not satisfied and the power supply confirmation signal is on, the payout control microcomputer 370 checks whether the payout REQ signal is on (steps S543 and S544). ). If it is in the on state, the number of prize balls indicated by the number-of-payout signal is set in the prize ball unpaid-out number buffer, which is a RAM area for temporary storage (step S545), and the reception confirmation signal is turned on. The process for performing is performed (step S546). Specifically, the bit corresponding to the reception confirmation signal in the output port 1 buffer corresponding to the output state of the output port 1 is set to the on state. Further, a value corresponding to a predetermined time (100 ms as an example) for monitoring that the payout REQ signal is turned off is set in the main control communication control timer (step S547). Then, the value of the main control communication control code is set to 1 (step S548), and the process ends.

  The payout control microcomputer 370 does not execute the process of step S546 if the payout quantity signal indicates 0 as the number of prize balls in step S545. When the payout REQ signal is turned on, the game control microcomputer 560 does not transmit a payout number signal indicating 0 as the number of prize balls, and the number of payout quantity signals is 0 while waiting for a prize ball. Since the payout REQ signal is in the on state and the payout number signal indicates 0, the payout REQ between the substrates due to noise or the like is set. It is probable that the signal has been turned on. Therefore, in such a situation, it is preferable that the payout control microcomputer 370 does not turn on the reception confirmation signal by not executing the process of step S546.

  FIG. 45 is a flowchart showing a payout REQ signal OFF waiting process (step S532) executed when the value of the main control communication control code is 1. In the payout REQ signal OFF waiting process, if the payout REQ signal is in the OFF state (step S551), the payout control microcomputer 370 is a prize ball that is a RAM area for temporarily storing the number of prize balls indicated by the payout number signal. The contents of the unpaid-out number buffer are set in the prize ball unpaid-out number counter (step S552). Further, a process for turning off the reception confirmation signal is performed (step S553). Specifically, the bit corresponding to the reception confirmation signal in the output port 1 buffer corresponding to the output state of the output port 1 is set to the OFF state. Then, the value of the main control communication control code is set to 2 (step S554), and the process ends. In response to the execution of the process in step S553, a prize ball payout process is started in a payout operation start waiting process (see FIG. 50) described later.

  If the payout REQ signal is not in the OFF state, the payout control microcomputer 370 subtracts 1 from the value of the main control communication control timer (step S555). If the value of the main control communication control timer is not 0, the process is terminated (step S556). When the value of the main control communication control timer becomes 0, the payout REQ signal does not turn off and a communication error occurs even if a predetermined time elapses after the reception confirmation signal is transmitted (turned on) Judge. Then, a process for turning off the reception confirmation signal and the connection confirmation signal is performed (step S557). Specifically, the bit corresponding to the reception confirmation signal and the connection confirmation signal in the output port 1 buffer corresponding to the output state of the output port 1 is set to the OFF state. Also, bit 4 (payout REQ signal error bit) of the error flag is set (step S558). Then, the value of the main control communication control code is set to 0 (step S559), and the process ends.

  FIG. 46 is a flowchart showing the payout operation start waiting process (step S533) executed when the value of the main control communication control code is 2. In the payout operation start waiting process, the payout control microcomputer 370, when the prize ball operating flag indicating that the prize ball payout process is being performed is turned on (1: set state) (step S561). Then, a process for turning on the payout operation in-progress signal is performed (step S562). Specifically, the bit corresponding to the payout operation in-progress signal in the output port 1 buffer corresponding to the output state of the output port 1 is set to the on state. Then, the value of the main control communication control code is set to 3 (step S563), and the process ends.

  FIG. 47 is a flowchart showing the payout operation process (step S534) executed when the value of the main control communication control code is 3. In the payout operation process, the payout control microcomputer 370, when the award ball operating flag is turned off (0: reset state) (step S571), the number of award balls specified by the payout number signal. Assuming that the payout process is completed, a process for turning off the payout operation in-progress signal is performed (step S572). Specifically, the bit corresponding to the payout operation in-progress signal in the output port 1 buffer corresponding to the output state of the output port 1 is set to the OFF state. Further, a value corresponding to a predetermined time (100 ms as an example) for monitoring that the payout number signal is turned off (all 5 bits are 0) is set in the main control communication control timer (step S573). Then, the value of the main control communication control code is set to 4 (step S574), and the process ends.

  FIG. 48 is a flowchart showing the payout number signal OFF waiting process (step S535) executed when the value of the main control communication control code is 4. In the payout number signal off waiting process, the payout control microcomputer 370 sets the value of the main control communication control code to 0 corresponding to the wait state (step S582) when the payout number signal is in the off state (step S581). ), The process is terminated. At this time, the communication between the game control microcomputer 560 and the payout control microcomputer 370 related to one prize ball payout is normally completed.

  If the payout number signal is not in the OFF state, the payout control microcomputer 370 subtracts 1 from the value of the main control communication control timer (step S583). If the value of the main control communication control timer is not 0, the process is terminated (step S584). When the value of the main control communication control timer becomes 0, the payout number signal does not turn off even after a predetermined time has elapsed since the transmission of the payout operation signal is stopped (turned off). It is determined that a communication error has occurred. Then, a process for turning off the connection confirmation signal is performed (step S585). Specifically, the bit corresponding to the connection confirmation signal in the output port 1 buffer corresponding to the output state of the output port 1 is set to the off state. Also, bit 5 (payout number signal error bit) of the error flag is set (step S586). Then, the value of the main control communication control code is set to 0 (step S582), and the process ends.

  FIG. 49 is a flowchart showing the winning ball lending control process in step S756. In the award ball lending control process, the payout control microcomputer 370 confirms that the detection signal of the payout number count switch 301 is turned on (step S601). The counter value is decremented by 1 (steps S602 and S604), and if the ball is not being lent, the value of the prize ball unpaid-out number counter is decremented by 1 (steps S602 and S603). Thereafter, any one of steps S610 to S612 is executed according to the value of the payout control code.

  FIG. 50 is a flowchart showing the payout start waiting process (step S610) executed when the payout control code is 0. In the payout start waiting process, if the error bit is set, the payout control microcomputer 370 does not execute the subsequent processes (step S621). The error bit in the error flag includes a main control unconnected error bit. The main control unconnected error is set when the power supply confirmation signal from the main board 31 is turned off when the winning ball is not paid out. Accordingly, the payout control microcomputer 370 starts substantial control on condition that the power supply confirmation signal is turned on after power supply to the gaming machine is started.

  On the other hand, if the BRDY signal is not in the on state, processing for paying out a prize ball after step S631 is executed. If the BRDY signal is on and the BRQ signal, which is a ball lending request signal, is on, a ball lending operation flag is set (steps S623 and S624). Then, “25” is set in the unpaid ball lending number counter (step S625), and “25” is set in the payout motor rotation number buffer (step S626).

  The payout motor rotation frequency buffer is referred to in the payout motor control process (step S768). That is, in the payout motor control process, control is performed to rotate the payout motor 289 by the number of rotations corresponding to the value set in the payout motor rotation frequency buffer.

  Thereafter, the payout control microcomputer 370 sets a value corresponding to the payout motor start preparation process (step S522) (specifically, “1”) to the payout motor control code for selecting the process executed in the payout motor control process. ) Is set (step S627), the value of the payout control code is set to 1 (step S628), and the process is terminated.

  In step S631, the payout control microcomputer 370 checks whether or not the value of the award ball unpaid-out counter is zero. If the value of the prize ball unpaid number counter is 0, the process is terminated. In the award ball unpaid number counter, in step S552 in the payout REQ signal off waiting process of the main control communication process, that is, when the payout REQ signal from the game control microcomputer 560 of the main board 31 is turned off. , A value other than 0 (the number indicated by the payout number signal) is set. If the value of the award ball unpaid number counter is not 0, the value of the award ball unpaid number counter is set in the payout motor rotation frequency buffer (step S633). Then, a winning ball moving flag is set (step S635), and the process proceeds to step S627.

  FIG. 51 is a flowchart showing a payout motor stop waiting process (step S611) executed when the payout control code is 1. In the payout motor stop waiting process, the payout control microcomputer 370 checks whether or not the payout operation is completed (step S641). For example, the payout control microcomputer 370 sets a flag to that effect when the payout motor brake process (step S525) in the payout motor control process ends, and the payout operation ends by checking the flag in step S641. It can be confirmed whether or not.

  When the payout operation is completed, the payout control microcomputer 370 sets the payout passing monitoring time in the payout control monitoring timer (step S642). The payout passing monitoring time is a time that has a margin in the time from when the last payout ball is paid out by the payout motor 289 until it passes through the payout number count switch 301. Then, the value of the payout control code is set to 2 (step S643), and the process ends.

  52 to 54 are flowcharts showing the payout passing waiting process (step S612) executed when the value of the payout control code is 2. In the payout passing waiting process, when the prize ball is being paid out, it is determined that the payout has been completed normally if the value of the prize ball unpaid number counter is 0. If the value of the award ball unpaid number counter is not 0, if there is no error state, the game balls for the shortage of payout (the number of game balls indicated by the value of the award ball unpaid number counter) are repaid. To the upper limit of 2 times. In the re-payout operation, when it is detected by the payout number count switch 301 that the game ball is actually paid out, it is determined that the payout has been completed normally. In this embodiment, when the payout REQ signal is received, the payout motor 289 is rotated so that the number of game balls set in the award ball non-payout number counter is paid out. When the value of the number counter is not 0, the payout has not been completed normally.

  Further, when the ball lending is being paid out, it is determined that the payout has been completed normally if the value of the ball lending unpaid-out counter is 0. If the value of the unlapped ball rental counter is not 0, if the error is not in an error state, an attempt is made to re-pay the remaining ball lending (corresponding to the value of the unlapped ball counter). In this embodiment, the number of game balls to be paid out in one ball lending and payout operation is 25 (fixed value), and the payout motor 289 is rotated so that 25 game balls are paid out. Therefore, when the value of the unpaid ball lending counter is not 0, the payout has not been completed normally.

  In the payout passing waiting process, the payout control microcomputer 370 first checks the value of the payout control timer, and if the value is 0, the process proceeds to step S653 (step S650). If the value of the payout control timer is not 0, the value of the payout control timer is decremented by 1 (step S651). If the value of the payout control timer is not 0 (step S652), that is, if the payout control timer has not timed out, the process is terminated. Note that the process of step S650 is a process that takes into account when a game ball payout retry operation to be described later is started. When the process of step S807, which will be described later, is executed, a retry operation is started via a route that moves from step S650 to S653.

  If the payout control timer has timed out (step S652), it is confirmed whether or not the ball lending payout process (ball lending operation) has been executed (step S653). Whether or not the ball lending operation has been executed is confirmed by whether or not the ball lending operation in progress flag in the payout control state flag formed in the RAM is set. When the ball lending operation is not executed, that is, when the prize ball payout process (prize ball operation) is executed, the payout control microcomputer 370 confirms the value of the award ball unpaid number counter ( Step S654). If the value of the award ball unpaid-out counter is 0, it is assumed that the award ball payout processing has been completed normally, and 1 bit during re-payout operation, 2 bits during re-payout operation, The operating flag and the ball lending operating bit are reset (step S655), the payout control code is set to 0 (step S656), and the process ends.

  The “payout control state flag” includes a re-payout operation 1 bit indicating whether or not the first re-payout operation is being executed, and a re-payout operation indicating whether or not the second re-payout operation is being executed. A multi-bit configuration including a middle 2 bits, a winning ball operating flag indicating whether or not a winning ball payout operation is being performed, and a ball lending operating bit indicating whether or not a ball lending operation is being performed Flag.

  If the value of the award ball unpaid number counter is not 0, the payout control microcomputer 370 has an error flag for an error not related to communication (here, 1 bit of a payout switch abnormality detection error, an abnormality of the payout switch) On the condition that any one of the detection error 2 bits and the payout case error bit or a plurality of bits) is not set (step S659), the payout operation is executed. If any one or more of the payout switch abnormality detection error 1 bit, the payout switch abnormality detection error 2 bits and the payout case error bit is set, the re-payout operation is not executed.

  In order to execute the re-payout process (control for performing the re-payout operation), the payout control microcomputer 370 first checks whether or not 2 bits are set during the re-payout operation (step S662). If not set, it is confirmed whether or not 1 bit is set during the re-payout operation (step S663). If 1 bit is not set during the re-payout operation, 1 bit during the re-payout operation is set in order to execute the first re-payout operation (step S665), and the award ball unpaid number counter is stored in the payout motor rotation number buffer. Alternatively, the value of the unpaid ball lending counter is set (step S666). The payout motor rotation frequency buffer is referred to in the payout motor control process (step S768). That is, in the payout motor control process, control is performed to rotate the payout motor 289 by the number of rotations corresponding to the value set in the payout motor rotation frequency buffer. In step S666, the value of the unpaid ball lending counter is also handled because step S666 is also used in the re-payout process in the lend-out process. In step S666, the payout control microcomputer 370 sets the value of the award ball unpaid number counter in the re-payout process in the prize ball payout process, and the value of the ball lend-out unpaid number counter in the re-payout process in the ball lending payout process. Set. Thereafter, the payout control code is set to 1 (step S667), and the process is terminated.

  In step S663, when it is confirmed that 1 bit is set during the re-payout operation, the payout control microcomputer 370 resets 1 bit during the re-payout operation in order to execute the second re-payout (step S663). S669), 2 bits are set during the re-payout operation (step S670). Then, control goes to a step S666.

  In step S662, when it is confirmed that 2 bits are set during the re-payout operation, the payout control microcomputer 370 does not pay out the game balls for the shortage of payout even if the re-payout process is executed twice. The payout case error bit in the error flag is set (step S672). At that time, 2 bits are reset during the re-payout operation (step S671). Then, the process ends.

  As described above, if the game ball payout shortage is not resolved even after performing the predetermined payout operation (two times in this example) in the repayout process (corrected payout process), the game ball payout operation is defective. The payout count switch non-passing error bit (payout case error bit) is set.

  Therefore, in this embodiment, the prize game medium payout control means in the payout control means confirms that the payout of the prize game medium has not been completed based on the detection signal from the payout number count switch 301 as the payout detection means. When it is detected, the control is performed so that the payout means pays out the insufficient amount of prize game media up to a predetermined number of times (in this example, twice). In this embodiment, if the prize game medium is not paid out even if the retry operation for paying out the prize game medium is performed twice, the payout case error bit is set and an error is being generated. (Step S672), the payout case error bit may be set when it is detected for the first time that the payout of the premium game medium is not completed. Note that “retry operation (or“ retry ”,“ retry operation processing ”) means that the actual number of payouts is equal to the number of game balls paid out in spite of execution of a normal payout process. This is an operation to be executed when the number is small, and means an operation for re-executing the payout process (that is, a re-payout operation) in order to pay out unpaid game balls separately from the normal payout process.

  In the prize ball lending control process, the error bit is checked to determine whether or not to perform a payout operation (one prize ball payout or one ball lending). The payout start shown in FIG. Only in the waiting process. In the payout motor stop waiting process shown in FIG. 51 and the payout passing wait process shown in FIG. 52 and the like, the error bit is not checked. Note that the error bit is also checked in step S658 and the like in the payout passing waiting process, but this check is for determining whether or not to perform a payout operation again, and is a payout operation (single prize ball payout or 1 This is not to determine whether or not to start ball lending. Therefore, after the process of step S626 or S633 is performed and the game ball payout process is started, the payout process is not interrupted even if an error occurs. In other words, when an error occurs, the game ball payout process is continued until a point at which the game ball can be cut well (at the time when one prize ball payout or one ball lending ends). The error bit in the error flag checked in step S621 includes an error bit indicating that the power supply confirmation signal from the main board 31 has been turned off. Therefore, even when the power supply confirmation signal is turned off, the game ball payout process is stopped at a time when the turn is good. In addition, one-time prize ball payout or one-time ball rental means that a non-zero value is set in the prize ball unpaid number counter or the ball lending unpaid number counter, and the number of unpaid prize balls or the ball lending unpaid It means a game ball payout process until the value of the number counter becomes zero.

  When the power confirmation signal is turned off, similarly to the gaming machine described in Patent Document 1, if the payout is interrupted and the payout is resumed when recovered from the error state, the data (unpaid game) However, according to the present invention, the payout process is stopped at a time when the payout of the predetermined number of premium game media is completed and the cut-off time is good. Therefore, it is not necessary to manage such data, and the control can be simplified.

  When it is confirmed in step S653 that the ball lending / dispensing process (ball lending operation) has been executed, the payout control microcomputer 370 confirms whether or not the value of the lending / unpaid number counter is 0 (step). S657). If it is 0, it is determined that the ball lending / dispensing process is normally completed, and the process proceeds to step S655.

  If the value of the ball lending unpaid number counter is not 0, an error flag (specifically, any one of a payout switch abnormality detection error 1 bit, a payout switch abnormality detection error 2 bit, and a payout case error bit) On the condition that no bit or a plurality of bits) is set (step S658), the re-payout process is executed. If the error flag is set, the re-payout process is not executed.

  In order to execute the re-payout process, the pay-out control microcomputer 370 first checks whether or not 2 bits during re-payout operation are set (step S676). If not set, it is confirmed whether or not 1 bit is set during the re-payout operation (step S677). If 1 bit during re-payout operation is not set, 1 bit during re-payout operation is set to execute the first re-payout operation (step S679), and the process proceeds to step S666.

  In step S677, when it is confirmed that 1 bit is set during the re-payout operation, the payout control microcomputer 370 performs a process for executing the re-payout operation again. Specifically, 1 bit is reset during the re-payout operation (step S681). Then, 2 bits are set during the re-payout operation (step S685), and the process proceeds to step S666.

  In step S676, when it is confirmed that 2 bits during re-payout operation are set, the payout control microcomputer 370 resets 2 bits during re-payout operation (step S686), and sets the payout case error bit in the error flag. Set (step S688). Then, the process ends.

  As described above, in the case where the shortage of game balls is not solved even if two re-payout operations are continuously performed in the re-payout processing (corrected payout processing) related to the ball lending processing, As a failure, a payout count switch non-passing error bit (payout case error bit) is set.

  FIG. 55 is a timing chart for explaining the ball biting detection process executed in the payout motor control process (step S768). In the payout motor constant speed process (step S524) in the payout motor control process, the payout control microcomputer 370 monitors the detection signal of the payout motor position sensor 295. The detection signal of the payout motor position sensor 295 is turned on twice, for example, every time the cam that rotates in conjunction with the payout motor 289 rotates once. In order for the detection signal to be output twice each time the cam rotates once, the cam has two locations in the portion that receives light from the light emitting portion in the payout motor position sensor 295 (positions symmetrical with respect to the axis). Is provided with a reflector. The output of the light receiving unit in the dispensing motor position sensor 295 is used as a detection signal.

  Accordingly, the payout control microcomputer 370 provides a case where the detection signal of the payout motor position sensor 295 is not turned on even though the excitation motor 289 is provided with an excitation pattern having a number of steps of 1/2 rotation or more. Actually, the payout motor 289 does not rotate due to foreign matter such as dust adhering to the cam portion and the like, and the game ball is clogged (ball biting has occurred). It can be determined that it is not rotating.

  In this embodiment, when the payout motor 289 receives an excitation pattern for 16 steps (2.087 ms per step), it makes one rotation and pays out one game ball. For example, as shown in FIG. 55, the payout control microcomputer 370 detects the payout motor position sensor 295 every time the payout motor microcomputer 370 gives an excitation pattern of 8 steps to the payout motor 289. The signal is checked to determine whether or not the payout motor 289 is rotating. Then, if the same state is detected five consecutive times (the detection signal of the dispensing motor position sensor 295 is OFF for five consecutive times or ON for five consecutive times), it is determined that ball engagement has occurred. A ball biting release process is executed.

  As shown in FIG. 56, the payout control microcomputer 370 repeats a process of rotating the payout motor 289 at a high speed and a process of rotating it at a medium speed for a predetermined number of times (for example, 9 times). Each time an excitation pattern for 8 steps is given to the payout motor 289, the detection signal of the payout motor position sensor 295 is checked to determine whether the payout motor 289 is rotating. If it is determined by the detection signal that the rotation of the payout motor 289 has been restored, the ball biting release processing is terminated and the normal ball payout processing is returned to.

  If there is no change in the detection signal of the payout motor position sensor 295 even if the high speed rotation process and the medium speed rotation process are executed a predetermined number of times, the ball biting error bit (payout case error bit) in the error flag ) Is set. When the payout case error bit is set, the payout control microcomputer 370 does not drive the payout motor 289. When the payout case error bit is reset (see step S807 in FIG. 58), the payout control microcomputer 370 returns to a state in which the payout motor 289 can be driven.

  Thus, the payout control means includes a drive state monitoring means for monitoring the operating state of the payout means, and a drive stop means for stopping the driving of the payout means when the drive state monitoring means detects a malfunction of the payout means. Including.

  Next, error processing will be described. FIG. 57 is an explanatory diagram showing the relationship between the type of error and the display of the LED 374 for error display. As shown in FIG. 57, when the power confirmation signal from the main board 31 is turned off, the payout control microcomputer 370 displays “1” on the error display LED 374 as a main control unconnected error. Control. If other conditions are also satisfied when the power confirmation signal is turned off, error bits other than the main control unconnected error are set (see steps S51 to S57 in FIG. 42).

  Specifically, when the power confirmation signal is turned off and the state of the payout number signal is 1E (H), the error bit of the reception confirmation signal error is set. The state of the payout number signal becomes 1E (H) when the game control microcomputer 560 detects that the reception confirmation signal is turned on in the award ball waiting state or when a payout REQ signal is transmitted. This is a case where it is detected that the reception confirmation signal has not been turned on later or that the reception confirmation signal has not been turned off after transmission of the payout REQ signal is stopped. Then, the payout control microcomputer 370 performs control to display “2” on the error display LED 374 as a reception confirmation signal error.

  Further, when the power confirmation signal is turned off and the state of the payout number signal is 1F (H), an error bit of a payout operation signal error is set. The state of the payout number signal becomes 1F (H) when the game control microcomputer 560 detects that the payout operation in-progress signal is turned on in the award ball standby state or when the reception confirmation signal is This is a case where after the turn-off state is detected, it is detected that the payout operation in-progress signal has not been turned on. Also, when the power confirmation signal is turned off during the winning ball payout operation, the error bit of the payout operation signal error is set (step S57 in FIG. 42). The power supply confirmation signal is turned off during the winning ball payout operation when the game control microcomputer 560 detects that the payout operation in-progress signal has not been turned off. When the error bit of the payout operation signal error is set, the payout control microcomputer 370 performs control to display “3” on the error display LED 374 as a payout operation signal error.

  If the game control microcomputer 560 does not change the state of the payout number signal to 1F (H) or 1E (H) when the occurrence of a communication error is detected (see FIGS. 21 and 23), payout control is performed. The microcomputer 370 detects that any of a plurality of types of communication errors has occurred when the power confirmation signal is turned off.

  When it is detected that the payout REQ signal has not been turned off after the reception confirmation signal is turned off, the payout REQ signal error bit is set (see step S558 in FIG. 45). Then, the payout control microcomputer 370 performs control to display “4” on the error display LED 374 as a payout REQ signal error.

  Further, when it is detected that the payout quantity signal has not been turned off after the payout operation in progress signal is turned off, a payout quantity signal error bit is set (see step S586 in FIG. 48). The payout control microcomputer 370 performs control to display “5” on the error display LED 374 as a payout quantity signal error.

  When a breakage of the payout number count switch 301 or a ball clogging occurs in the payout number count switch 301, the payout control microcomputer 370 sets “6” to the error display LED 374 as the payout switch abnormality detection error 1. Control the display. The disconnection of the payout number count switch 301 or the occurrence of ball clogging in the payout number count switch 301 is determined by the detection signal of the payout number count switch 301 not being turned off.

  When the detection signal of the payout number count switch 301 is turned on although the game ball is not paying out, the payout control microcomputer 370 displays an error display LED 374 as a payout switch abnormality detection error 2. Control to display “7” is performed. If the detection signal of the payout count switch 301 does not turn on despite the rotation abnormality of the payout motor 289 or the game ball being paid out, “8” is displayed on the error display LED 374 as a payout case error. Control. The specific method for detecting that the detection signal of the payout number count switch 301 is not turned on is as described above.

  In addition, when the lower pan is full, that is, when the full switch 48 is turned on, control is performed to display “9” on the error display LED 374 as a full error. When the supply ball is insufficient, that is, when the ball break switch 187 is turned on, a control is performed to display “A” on the error display LED 374 as a ball break error.

  Further, when the VL signal from the card unit 50 is turned off, control is performed to display “b” on the error display LED 374 as a prepaid card unit unconnected error. When communication with the card unit 50 is performed at an incorrect timing, control is performed to display “C” on the error display LED 374 as a prepaid card unit communication error. The prepaid card unit communication error is detected in the prepaid card unit control process (step S754).

  Among the above errors, after a communication error (error to set any one of error bits 2 to 5), payout switch abnormality detection error 2 or payout case error occurs, the error release switch 375 is operated and the error release switch When an operation signal is output from 375 (when turned on), the payout control microcomputer 370 returns to the state before the error occurred.

  Even when a main control disconnection error occurs, if the error cancel switch 375 is operated and an operation signal is output from the error cancel switch 375, the payout control microcomputer 370 returns to the state before the error occurred. You may make it do.

  58 and 59 are flowcharts showing the error processing in step S757. In the error processing, the payout control microcomputer 370 checks the error flag, and if any one or more bits in the error flag is 1 (step S800), the set bit (becomes 1). Are bits that can be reset in response to the operation of the error release switch 375 (payout switch abnormality detection error 2, payout case error, reception confirmation signal error, payout operation signal error, payout REQ signal error, payout number signal Error) only (only one or more of the six bits) is checked (step S801). However, in step S801, bit 4 (main control unconnected error bit) is not checked. If only those bits are set, it is confirmed whether or not the operation signal is turned on from the error release switch 375 (step S802). When the operation signal is turned on, the error recovery time is set in the pre-error recovery timer (step S803). The error recovery time is the time from when the error release switch 375 is operated until the actual return from the error state to the normal state.

  If the operation signal from the error release switch 375 is not on, the value of the timer before error recovery is confirmed (step S804). If the value of the timer before error recovery is 0, that is, if the timer before error recovery is not set, the process proceeds to step S808. If the pre-error recovery timer is set, the value of the pre-error recovery timer is decremented by -1 (step S805). If the pre-error recovery timer value becomes 0 (step S806), the payout switch of the error flag is set. To reset (set to 0) bits of abnormality detection error 2, payout case error, reception confirmation signal error, payout operation signal error, payout REQ signal error and payout number signal error, and to turn on the connection check signal Is performed (step S807). Specifically, the bit corresponding to the connection confirmation signal in the output port 1 buffer corresponding to the output state of the output port 1 is set to the on state. Then, control goes to a step S808. As a result of the processing in step S807, the bits set in the error flag are the payout switch abnormality detection error 2, the payout case error, the reception confirmation signal error, the payout operation signal error, the payout REQ signal error, or the payout number signal error. If there is a main control unconnected error bit with one or more of them, the connection confirmation signal returns to the ON state.

  When the processing of step S807 is executed, the bits of the payout switch abnormality detection error 2, the payout case error, the reception confirmation signal error, the payout operation signal error, the payout REQ signal error, and the payout number signal error There may be an error bit that is not in the set state, but there is no problem even if the error bit that is not in the set state is reset. As described above, in this embodiment, it becomes a cause for setting the bits of the payout switch abnormality detection error 2, the payout case error, the reception confirmation signal error, the payout operation signal error, the payout REQ signal error, or the payout number signal error. When an error (see FIG. 57) occurs, the error is released by pressing the error release switch 375.

  When the process of step S807 is executed and the payout case error bit is reset, the payout control code is “2” (corresponding to the execution of the payout passing waiting process shown in FIGS. 52 to 54), and the prize ball When the value of the unpaid-out number counter or the value of the ball-lending unpaid-out number counter is not 0, a retry operation for game ball payout is started. That is, when the award ball lending control process of step S756 is executed next, when the payout passing waiting process of step S612 is executed, the repayment process is performed again. For example, if a prize ball payout process has been performed and the value of the prize ball unpaid number counter is not 0, the process proceeds from step S654 to step S659, and it is confirmed in step S659 that the error bit is in a reset state. Therefore, the process for starting the re-payout process after step S662 is executed again, and the re-payout process is executed. Regarding the payout case error bit reset by pressing the error release switch 375, when the bit is set (when step S672 is executed), the payout control timer has already expired. Therefore, when the process in step S807 is executed and the payout case error bit is reset, the payout control timer = 0 is determined in the determination in step S650 when the payout passage waiting process is executed next. Therefore, if it is confirmed in step S659 that the error bit is in the reset state, step S662 is always executed unless the main control unconnected error bit is set. That is, the re-payout process is always executed.

  As described above, the payout control means determines in advance a retry operation for paying out a game ball when a shortage of the game ball is detected even though the ball payout device 97 pays out the game ball. When it is detected that the shortage of payout has not been resolved after performing the corrected payout control to be executed by the ball payout device 97 up to a predetermined time (for example, 2 times or 1 time) (after step S662 in FIG. 53). The control state related to the payout is shifted to the error state, and the correction payout control restarting process for executing the corrective payout control again on condition that the error release signal is output from the error release switch 375 in the error state is executed. .

  Further, even during re-payout processing in an error state (specifically, during re-payout processing before setting a payout case error and during re-payout processing after the error release switch 375 is pressed), steps S601 to S601 shown in FIG. The process of S604 is being executed. That is, even when an error relating to payout occurs, if the game ball passes the payout number count switch 301, the value of the award ball unpaid number counter or the ball lending unpaid number counter is subtracted. Therefore, the value of the award ball unpaid number counter or the ball lending unpaid number counter when returning from the error state is a value reflecting the number of game balls actually paid out. That is, even if an error related to payout occurs, the number of game balls actually paid out can be accurately managed.

  Also, in the payout passing waiting process shown in FIGS. 52 to 54, even when it is confirmed that the game ball has been paid out as a result of the re-payout process, the payout case error bit is not reset. The bit of the payout case error is reset only when the error release switch 375 is operated (specifically, when an error return time after operation has elapsed) (steps S802 and S807). That is, the state of the payout case error (payout shortage error) is not automatically canceled based on the fact that the game ball has passed the payout number count switch 301, etc. The error is not cleared. Therefore, the game store clerk and the like can surely recognize that a shortage of payout has occurred.

  When the error cancel switch 375 is operated so as to be reset by hardware (reset to the payout control microcomputer 370), the error cancel switch 375 is operated, for example, a prize ball The value of the unpaid number counter is also cleared. However, in this embodiment, since the payout control means is configured to perform the re-payout operation again by operating the error release switch 375, the payout process is executed reliably, which is disadvantageous to the player. Can not be given.

  In step S808, the dispensing control microcomputer 370 confirms the detection signal of the full switch 48. If the detection signal of the full switch 48 is output (if it is in the on state), processing for setting the full error bit in the error flag and turning off the connection confirmation signal is performed (step S809). ). Specifically, the bit corresponding to the connection confirmation signal in the output port 1 buffer corresponding to the output state of the output port 1 is set to the off state. If the detection signal of the full tank switch 48 is OFF, the full error bit is reset, and if all other error bits (except the main control unconnected error bit) are reset, the connection confirmation signal is ON. Is performed (step S810). Specifically, the bit corresponding to the connection confirmation signal in the output port 1 buffer corresponding to the output state of the output port 1 is set to the on state. Note that the main control unconnected error bit is excluded from the check target because, for example, the game control means turns off the power supply confirmation signal when the connection confirmation signal is turned off in step S809 (as a result, step S816). This is because the main control unconnected error bit is set) in order to turn on the connection confirmation signal in response to the release of the full tank error so that the game control means returns the power confirmation signal to the on state. That is, if all error bits including the main control unconnected error bit are checked, the connection confirmation signal cannot be turned on because the main control unconnected error bit is set. The same applies to steps S813, S820, S824, and S827.

  Further, the payout control microcomputer 370 confirms the detection signal of the ball break switch 187 (step S811). If the detection signal of the ball break switch 187 is output (if it is in the on state), processing for setting the ball break error bit in the error flag and turning off the connection confirmation signal is performed (step S812). ). If the detection signal of the ball break switch 187 is OFF, the ball break error bit is reset, and if all other error bits (except the main control unconnected error bit) are reset, the connection confirmation signal is ON. Is performed (step S813). When the ball break error bit is set, the bit corresponding to the ball break LED 52 in the output port 1 buffer is set to a value corresponding to the lighting state in the display control process of step S759.

  Furthermore, the payout control microcomputer 370 confirms the state of the power supply confirmation signal from the main board 31 (step S815). If the power supply confirmation signal is not output (if it is in the off state), the main board unconnected error A process for setting the bit and turning off the connection confirmation signal is performed (step S816). However, if any of the error bits 2 to 5 is already set in the error flag, the process of step S816 is not executed. When the error bits 2 to 5 are set, the power supply confirmation signal may be in an off state, so that the main board unconnected error bit and the error bit related to other communication are not juxtaposed. is there.

  If the power confirmation signal is output (if it is on), the main control unconnected error bit is reset, and if all other error bits are in the reset state, the connection confirmation signal is turned on. Is performed (step S817). It should be noted that the process for turning on the connection confirmation signal in step S817 is executed only for the process in which the game control means turns the power confirmation signal off (for example, turning the power confirmation signal off). In addition, the power confirmation signal is turned on after the processing for notifying the payout operation signal error is performed). In other cases, processing for turning on the connection confirmation signal in other processing such as step S807 is executed.

  The payout control microcomputer 370 confirms the value of the switch timer corresponding to the payout number count switch 301 among the switch timers in which the state of the detection signal of each switch is set, and the value is the switch on maximum time ( For example, if “240” is exceeded (step S818), the bit of the payout switch abnormality detection error 1 is set in the error flag and a process for turning off the connection confirmation signal is performed (step S819). If the value of the switch timer corresponding to the payout count switch 301 is equal to or shorter than the maximum switch-on time, the payout switch abnormality detection error 1 bit is reset and other error bits (excluding the main control unconnected error bit) are reset. ) Are all in the reset state, a process for turning on the connection confirmation signal is performed (step S820). Note that the value of each switch timer is incremented by 1 when the state of the input port to which the detection signal of each switch is input is switched on in the switch check process of step S761, and is cleared by 0 when it is off. Accordingly, the fact that the value of the switch timer corresponding to the payout number count switch 301 exceeds the switch on maximum time means that the payout number count switch 301 is in the on state exceeding the switch on maximum time. Then, it is determined that the game ball is clogged at the disconnection of the payout number count switch 301 or at the portion of the payout number count switch 301.

  In addition, when the value of the switch timer corresponding to the payout number count switch 301 becomes a switch-on determination value (for example, “2”) (step S821), the payout control microcomputer 370 receives the ball lending operation flag and the award. If both the ball operation flags are in the reset state, the game ball passes through the payout number count switch 301 even though the payout operation is not in progress, and the bit of the payout switch abnormality detection error 2 is set in the error flag (step S822). S823). If the ball lending operation flag or the winning ball operation flag is set, the payout switch abnormality detection error 2 bit is reset and all other error bits (except the main control unconnected error bit) are reset. If so, a process for turning on the connection confirmation signal is performed (step S824).

  Furthermore, the payout control microcomputer 370 confirms the input state of the VL signal from the card unit 50 (step S825). If the VL signal is not input (if it is in the OFF state), the prepaid card out of the error flags. A process for setting the unit unconnected error bit and turning off the connection confirmation signal is performed (step S826). If the VL signal is input (if it is in the ON state), the prepaid card unit unconnected error bit is reset and all other error bits (except the main control unconnected error bit) are in the reset state. For example, a process for turning on the connection confirmation signal is performed (step S827).

  In the display control process in step S759, notification by display (numerical value display) corresponding to the error bit in the error flag is performed by the error display LED 374. In this embodiment, the game control microcomputer 560 mounted on the main board 31 and the payout control microcomputer 370 mounted on the payout control board 37 perform bi-directional communication regarding prize ball payout. An error can be notified by the error display LED 374.

  In this embodiment, the main control unconnected error is automatically cleared when the power confirmation signal is turned on (see steps S815 and S817), but additionally, a condition that the error release switch 375 is operated is added. Thus, the error state may be eliminated.

  In this embodiment, a communication error is reported so as to be distinguishable from a communication error with the card unit 50 (a prepaid card unit unconnected error and a prepaid card unit communication error) and other errors (see FIG. 57). ). Therefore, a communication error between the game control microcomputer 560 and the payout control microcomputer 370 is easily identified.

  In this embodiment, the error display LED 374 mounted on the payout control board 37 installed on the back of the gaming machine is notified that an error related to payout (including a communication error) has occurred. However, the notification means may be mounted in another location on the back of the gaming machine (for example, a payout unit in which the ball payout devices 97 and the like are centrally arranged). Furthermore, you may make it alert | report by the indicator (for example, prize ball LED51) installed in the front side of the gaming machine. In the display control process, the payout control microcomputer 370 performs control for turning on the prize ball LED 51 when the prize ball operating flag is on, and when the prize ball operating flag is off, Although control for turning off the prize ball LED 51 is performed, when an error relating to payout occurs, for example, the prize ball LED 51 is blinked to notify that an error relating to payout has occurred. If an error is notified by a display device installed on the front side of the gaming machine, the game shop clerk can more easily recognize the occurrence of the error. Moreover, you may use together the alerting | reporting by error display LED374, and the alerting | reporting by the indicator installed in the front side of the gaming machine.

  FIG. 60A is a timing chart showing a state of occurrence of a payout case error (payout shortage error), and FIG. 60B is a timing chart showing a state when the error release switch 375 is operated.

  As shown in FIG. 60A, the payout motor 289 is rotated to pay out a predetermined number of game balls, and after the rotation stops, the game ball that should have been paid out last passes the payout number count switch 301. Later (after 402.087 ms in this example), it is confirmed whether or not there is an unpaid game ball (corresponding to the determination in step S654), and if there is an unpaid game ball, a re-payout operation is executed. FIG. 60A shows an example in which two re-payout operations are executed. When two re-payout operations are executed, it is determined as a payout case error (corresponding to the determination in step S672), and “8” is displayed on the error display LED 374 by the display control process in step S759 (FIG. 57).

  As shown in FIG. 60B, when the error release switch 375 is operated, the re-payout operation is started again after the error release time has elapsed. As shown in FIG. 60B, when the re-payout operation is started again, the display of “8” on the error display LED 374 is erased. That is, when the corrected payout control is performed after the operation of the error release switch 375, a notification indicating an insufficient payout error is not performed.

  61 and 62 are flowcharts showing the display control process (step S759). In the display control process, the payout control microcomputer 370 adds 1 to the value of the 1-byte blinking timer formed in the RAM (step S771). As will be described later, if the blink timer bit 7 is “1”, the prize ball LED 51 is turned on, and if the blink timer bit 7 is not “1”, the prize ball LED 51 in the output port 1 buffer is turned off. That is, the blinking timer is a timer for determining the blinking cycle of the prize ball LED 51. If the ball break error bit is set in the error flag (step S772), the ball break LED output bit in the output port 1 buffer is set (step S773). If the ball break error bit is not set, the ball break LED output bit in the output port 1 buffer is reset (step S774). Note that the contents of the output port 1 buffer are output to the output port 1 in the output process of step S760.

  If the payout control microcomputer 370 is paying out a prize ball (the prize ball operating flag in the payout control state flag is set) (step S775), the prize ball LED output bit in the output port 1 buffer is set (step S775). Step S776). If no prize ball is being paid out, the prize ball LED output bit in the output port 1 buffer is reset (step S777).

  Furthermore, the payout control microcomputer 370 ends the process if all bits in the error flag are 0 in the error flag (step S778). If any one or more bits in the error flag is 1, a payout switch abnormality detection error 2, a payout case error, a reception confirmation signal error, a payout operation signal error, a payout REQ signal error, and a payout number signal error (error If a bit other than each bit of the error that can be canceled by the cancel switch 375 is set, the process proceeds to step S785. When the bit set in the error flag is one or more of payout switch abnormality detection error 2, payout case error, reception confirmation signal error, payout operation signal error, payout REQ signal error, and payout number signal error If bit 7 of the blinking timer is “1” (step S780), the prize ball LED output bit in the output port 1 buffer is set (step S781). If bit 7 of the blinking timer is not “1”, the prize ball LED output bit in the output port 1 buffer is reset (step S782). When an error that can be canceled by a human operation has occurred by the processing of steps S779 to S781, that effect is notified from the player or the like so as to be visible. In this embodiment, the prize ball LED 51 is notified by blinking. Therefore, the player or the game store clerk can easily recognize that an error has occurred so that the error can be canceled by a manual operation and the gaming machine can be returned to the normal state.

  The payout control microcomputer 370 loads an error flag (step S785), determines an error code (7SEG display code; see FIG. 57) corresponding to the error bit in the error flag (step S786), and determines the determined error. The code is set in the output port 2 output buffer (step S787).

  FIG. 63 shows a process for transmitting an abnormality notification command to the effect control microcomputer 100 in the special symbol command control process (step S28) of the timer interrupt process (see FIG. 13) executed by the game control microcomputer 560. It is a flowchart to show. In the special symbol command control process, when the abnormality notification command transmission request is set (step S720), the game control microcomputer 560 includes the effect control microcomputer 100 mounted on the effect control board 101. An abnormality notification command that is one of the effect control commands is transmitted (step S721). The abnormality notification command transmission request is set when it is detected that the payout operation signal from the payout control microcomputer 370 is not turned off (see FIG. 35). FIG. 63 shows only control related to abnormality notification command transmission, but in the special symbol command control process, an effect control command related to special symbol variable display control is also transmitted.

  When receiving the abnormality notification command, the production control microcomputer 100 performs control to display a predetermined abnormality notification screen on the variable display device 9, for example. Further, instead of displaying the abnormality notification screen on the variable display device 9, or displaying the abnormality notification screen on the variable display device 9, a predetermined lamp / LED is displayed in a blinking pattern for abnormality notification. You may make it blink or output the sound for abnormality notification from the speaker 27. FIG.

  By such control, a game clerk or the like can easily recognize a communication error that the payout operation in-progress signal has not been turned off. Further, in this embodiment, the abnormality notification command is transmitted to the effect control microcomputer 100 only when the payout operation in-progress signal is not turned off, but other types of games detected by the game control microcomputer 560 Even when a communication error occurs (for example, when the reception confirmation signal is not turned on or off, or when the payout operation signal is not turned on), an abnormality notification command is transmitted to the production control microcomputer 100. May be. In that case, the game control microcomputer 560 transmits different abnormality notification commands depending on the type of communication error, and the effect control microcomputer 100 changes the manner of abnormality notification according to the type of abnormality notification command. It may be.

  In the above embodiment, the game control microcomputer 560 stores the number of prize balls to be paid out according to a prize in accordance with the winning of a game ball to a prize area such as a prize opening or the like in the storage contents of the total prize ball number storage buffer. When the stored content of the total prize ball number storage buffer is not 0, the number of prize balls is notified to the payout control microcomputer 370 by a payout number signal with a predetermined maximum value (for example, 15) as a limit, for payout control. When a reception confirmation signal is transmitted from the microcomputer 370 (the reception confirmation signal is turned on), the number specified by the payout number signal is subtracted from the stored contents of the total prize ball number storage buffer. However, the number of winning balls may be notified to the payout control microcomputer 370 by a payout number signal every time a game ball is won in the winning area. For example, a payout number signal indicating the number of four winning balls is transmitted according to the winning of game balls to the winning area where four winning balls are to be paid out according to the winning, and according to the winning A payout number signal indicating the number of 7 prize balls is transmitted in response to winning of game balls to the winning area where 7 prize balls are to be paid out, and 15 prize balls are paid out in accordance with the prize. A payout number signal indicating the number of 15 winning balls may be transmitted in accordance with the winning of a game ball in the winning area.

  FIG. 64 is an explanatory diagram showing an example of a counter used when notifying the payout control microcomputer 370 of the number of winning balls with a payout number signal every time a winning occurs. In the example shown in FIG. 64, four counters to which 1 is added according to the winning of the game ball to the winning area where four winning balls are to be paid out according to the winning, and seven according to the winning 7 counters to which 1 is added according to the winning of the game ball to the winning area, and 15 prize balls are to be paid out according to the winning. There are provided 15 counters to which 1 is added according to the winning of a game ball in the winning area. Each counter is formed in a RAM that is backed up by a backup power source.

  FIG. 65 is a flowchart showing the award ball number addition process in the case of notifying the payout control microcomputer 370 of the number of prize balls with a payout number signal every time a winning occurs. 28 is the number counter corresponding to the number of winning balls corresponding to winning when it is detected that the winning opening switch is turned on (in the case of “N” in step S220). The difference is that (any one of four counters, seven counters, and fifteen counters) is incremented by one (step S221A). The other processes are the same as the processes in the award ball number adding process shown in FIG.

  FIG. 66 is a flowchart showing the standby process in the winning ball control process when the number of winning balls is notified to the payout control microcomputer 370 by the payout number signal every time a winning occurs. The waiting process shown in FIG. 30 is that the value of the prize ball process code is set to 1 when any of the 4 counters, 7 counters, and 15 counters is not 0 (step S249A). Is different. The other processes are the same as the processes in the standby process shown in FIG.

  FIG. 67 is a flowchart showing a payout number signal transmission process in the winning ball control process when the number of prize balls is notified to the payout control microcomputer 370 by a payout number signal every time a winning occurs. In the payout number signal transmission processing shown in FIG. 31, when the value of the 15 counter is not 0, 15 is set in the prize ball number buffer (steps S251A and S253A), and when the value of the 7 counter is not 0. When 7 is set in the award ball number buffer (steps S251B and S253B) and the values of the 15 counter and the 7 counter are both 0 (that is, the value of the 4 counter is not 0), 4 is stored in the award ball number buffer. Is different that is set. Other processes are the same as the processes in the payout number signal transmission process shown in FIG. In this embodiment, four, seven or fifteen prize balls are instructed by a five-bit payout number signal, but four, seven or fifteen prize balls are given. Different payout control signals (for example, each signal is transmitted through one signal line) are defined in accordance with each payout instruction, and the number indication (4, 7, or 15) is given together with the payout REQ signal. The payout control signal according to the individual instructions) may be transmitted.

  FIG. 68 is a flowchart showing the reception confirmation signal ON waiting process in the winning ball control process when the number of winning balls is notified to the payout control microcomputer 370 by the payout number signal every time a winning occurs. The reception confirmation signal ON waiting process shown in FIG. 32 is a number counter (4 counters, 7 counters and 15 counters corresponding to the number specified by the payout number signal when the reception confirmation signal is turned on. The difference is that one of the counters is decremented by 1 (step S262A). Other processes are the same as those in the reception confirmation signal ON waiting process shown in FIG.

  In the above embodiment, the variable display device 9 that variably displays the special symbol is controlled by the effect control microcomputer 100. However, as shown in FIG. 69, the variable display device 9 is a variable display device that variably displays the special symbol. The display state of the special symbol display 8 may be controlled by the game control microcomputer 560 mounted on the main board 13. In that case, for example, a number from 0 to 11 (various numbers such as 0 to 99 may be variably displayed to make it difficult for the player to grasp a specific stop symbol) on the game board 6. A special symbol display 8 that is a simple and small display capable of displaying is provided. In addition, the variable display device 9 performs variable display of a decorative symbol as a symbol for decoration (for production) during the variable symbol display period of the special symbol by the special symbol indicator 8. The variable display device 9 that performs variable display of decorative symbols is controlled by the effect control microcomputer 100 mounted on the effect control board 80.

  In each of the above embodiments, the following gaming machines are disclosed.

(1) A game control means including a game control microcomputer 560 for executing a game control process for controlling the progress of the game, a ball payout device 97 as a payout means for paying out premium game media, and a ball payout device 97 Payout control means including a payout control microcomputer 370 for executing payout control processing to be controlled, and the game control means can retain the stored contents for a predetermined period even when the power supply to the gaming machine is stopped. The total number of prize balls as prize game medium number storage means for storing the number of prize game medium data that can specify the number of prize game media to be paid out based on the establishment of a condition (for example, winning a game ball in the prize area) Based on the number of prize game media data stored in the storage buffer (or 4, 7, and 15 counters) and the total prize ball number storage buffer. A payout command signal output means (steps S254 and S255) for turning on a payout command signal for designating the number of prize game medium payouts to the payout control means when a predetermined command condition is satisfied. The game control microcomputer 560 to be executed and the I / O port unit 57), and when a predetermined condition is satisfied after the payout command signal output means turns on the payout command signal, the prize game medium number storage means The prize game medium number data subtracting means for performing a subtraction process for subtracting a value corresponding to the number of payouts designated by the payout command signal from the prize game medium number data stored in the game (for game control for executing the processes of steps S261 and S262). Communication abnormality to detect abnormality relating to communication between the game control means and the payout control means) Exit means (implemented by a game control microcomputer 560 that executes the processes of steps S261, S266, S267, steps S271, S275, S276, steps S281, S285, S286, steps S291, S292, and S293). In response to receipt of the payout command signal, the payout control means turns on a reception confirmation signal indicating that the payout command signal has been received (reception confirmation signal output means (payout for executing the processing of steps S544 and S546). The control microcomputer 370 and the output port), and a prize game medium payout control for executing a payout process for controlling the payout means to pay out the premium game media of the payout number specified by the payout command signal. Means (execute processing such as steps S631, S633, S637, etc. And when the prize game medium payout control means is executing a payout process, it is transmitted on a signal line different from the signal line for transmitting the reception confirmation signal. The payout operation signal output means for turning on the payout operation in progress signal indicating that the payout process is being executed (implemented by the payout control microcomputer 370 that executes the processes of steps S561, S562, etc.) The prize game medium number data subtracting means performs a subtraction process with a predetermined condition that the reception confirmation signal is turned on (steps S261 and S262), and the payout command signal output means Command condition determining means for determining whether or not a payout operation in-progress signal from the payout control means as a command condition is in an off state (the process of step S245 is executed) The communication abnormality detecting means is configured such that the reception confirmation signal or the payout operation in-progress signal is on when the payout command signal output means does not turn on the payout command signal. When it is detected that the communication state is detected, it is determined that an abnormality relating to communication has occurred (steps S244 and S245), and the game control means determines that an abnormality relating to communication has occurred and the prize game medium The payout command signal output prohibiting means for prohibiting the payout command signal output means from turning on the payout command signal even when the number storage means data is stored in the number storage means (becomes “Y” in step S244 or S245). The game control microcomputer 560 for controlling the prize ball process code not to be updated in the case of When the communication abnormality detecting means determines that an abnormality relating to communication has occurred, an error notification signal transmitting means for transmitting a communication abnormality signal indicating that an abnormality relating to communication has been detected by a signal line for transmitting a payout command signal ( The game control microcomputer 560 for executing the process of step S246 or S247), and the payout control means outputs the prize game medium payout control means in response to receiving the communication abnormality signal. Premium game medium payout prohibition means for shifting to a state in which processing is not executed (implemented by a payout control microcomputer 370 that does not execute step S542 and subsequent steps in step S541 based on the error bit being set in step S53 or S55) Gaming machine).

(2) The payout control means performs error notification means for notifying a predetermined error in response to the reception of the communication abnormality signal (the payout control microcomputer 370 for executing the processes of steps S785 to S787 and the error display LED 374). A game machine that has been realized).

(3) A game control means including a game control microcomputer 560 for executing a game control process for controlling the progress of the game, a ball payout device 97 as a payout means for paying out premium game media, and a ball payout device 97 Payout control means including a payout control microcomputer 370 for executing payout control processing to be controlled, and the game control means can retain the stored contents for a predetermined period even when the power supply to the gaming machine is stopped. The total number of prize balls as prize game medium number storage means for storing the number of prize game medium data that can specify the number of prize game media to be paid out based on the establishment of a condition (for example, winning a game ball in the prize area) Based on the number of prize game media data stored in the storage buffer (or 4, 7, and 15 counters) and the total prize ball number storage buffer. A payout command signal output means (steps S254 and S255) for turning on a payout command signal for designating the number of prize game medium payouts to the payout control means when a predetermined command condition is satisfied. The game control microcomputer 560 to be executed and the I / O port unit 57), and when a predetermined condition is satisfied after the payout command signal output means turns on the payout command signal, the prize game medium number storage means The prize game medium number data subtracting means for performing a subtraction process for subtracting a value corresponding to the number of payouts designated by the payout command signal from the prize game medium number data stored in the game (for game control for executing the processes of steps S261 and S262). Communication abnormality to detect abnormality relating to communication between the game control means and the payout control means) Exit means (implemented by a game control microcomputer 560 that executes the processes of steps S261, S266, S267, steps S271, S275, S276, steps S281, S285, S286, steps S291, S292, and S293). In response to receipt of the payout command signal, the payout control means turns on a reception confirmation signal indicating that the payout command signal has been received (reception confirmation signal output means (payout for executing the processing of steps S544 and S546). The control microcomputer 370 and the output port), and a prize game medium payout control for executing a payout process for controlling the payout means to pay out the premium game media of the payout number specified by the payout command signal. Means (execute processing such as steps S631, S633, S637, etc. And when the prize game medium payout control means is executing a payout process, it is transmitted on a signal line different from the signal line for transmitting the reception confirmation signal. The payout operation signal output means for turning on the payout operation in progress signal indicating that the payout process is being executed (implemented by the payout control microcomputer 370 that executes the processes of steps S561, S562, etc.) The prize game medium number data subtracting means performs a subtraction process with a predetermined condition that the reception confirmation signal is turned on (steps S261 and S262), and the payout command signal output means Command condition determining means for determining whether or not a payout operation in-progress signal from the payout control means as a command condition is in an off state (the process of step S245 is executed) The communication abnormality detecting means is configured so that the reception confirmation signal does not turn off even if a predetermined time elapses after the reception confirmation signal is turned on. If detected, it is determined that an abnormality relating to communication has occurred (steps S271, S275, S276), and the game control means determines that an abnormality relating to communication has occurred when the communication abnormality detecting means determines that an abnormality relating to communication has occurred. Error notification control means for performing a process for notifying the game (the game control microcomputer 560 for executing the process of step S721 and the effect control microcomputer 100 for performing the abnormality notification based on the reception of the abnormality notification command). Gaming machines including).

(4) The error notification control means transmits an error notification command for instructing the effect control means to notify that an abnormality relating to communication has occurred by using the electric parts for effect (step S721).

(5) The game control means includes payout command signal output stop means (implemented by the game control microcomputer 560 that executes the processing of step S263) to turn off the payout command signal, and stops payout command signal output. The means turns off the payout command signal when the prize game medium number data subtraction means performs the subtraction process (steps S262, S263).

(6) The payout command signal for turning on the payout command signal output means includes a payout number signal indicating the payout number of the prize game medium, and a take-in request signal (payout REQ signal) for instructing to take in the payout number signal. In addition, the payout command signal output stopping means turns off the payout command signal by turning off the take-in request signal (step S263).

(7) The game control means is a payout number signal output stop means for turning off the payout number signal when the payout operation in-progress signal is turned off (game control microcomputer 560 for executing the processes of steps S291 and S297). The payout control means includes a payout operation signal output stop means for turning off the payout operation signal in response to completion of execution of the payout process by the payout game medium payout control means (step (It is realized by the payout control microcomputer 370 that executes the processing of S571 and S572) and the payout quantity signal even if a predetermined time has elapsed after the payout operation signal output stop means turns off the payout operation signal. Payout number signal error notifying means (steps S586 and S785) for notifying the predetermined error when it is detected that the battery is not turned off. Gaming machine comprising by that) and is implemented by the payout control microcomputer 370 to execute the processing of 787.

(8) When the payout control means detects that the payout command signal does not turn off even if a predetermined time elapses after the reception confirmation signal output means turns on the reception confirmation signal, it performs a predetermined error notification. A gaming machine including payout command signal error notification means (implemented by a payout control microcomputer 370 that executes the processes of steps S558 and S785 to S787).

(9) A gaming machine in which the prize game medium payout control means starts payout processing when the payout command signal is turned off (steps S552, S631, S633, and S627).

(10) Power supply confirmation signal output for turning on a power supply confirmation signal to be transmitted to the payout control means when the game control means is in a state where power supply to the gaming machine is started and the game control process can be executed Means (implemented by the game control microcomputer 560 that executes the processing of steps S12 and S203), and when the power supply confirmation signal is turned off, the prize game medium payout prohibiting means A gaming machine that shifts the control means to a state where the payout process is not executed (steps S51, S53, S55, S57).

(11) When the game control means detects that the reception confirmation signal is turned on when the payout command signal is not turned on, the power confirmation signal output stop means (in step S247) turns the power confirmation signal off. A game machine including a game control microcomputer 560 that executes processing.

(12) A payout abnormality detection that detects an abnormality related to payout when the game control means detects that the payout operation in-progress signal does not turn off even after a predetermined time has elapsed after the payout operation in progress signal is turned on. Means (implemented by a game control microcomputer 560 that executes the processes of steps S291 to S293) and a control for performing a predetermined error notification when the payout abnormality detecting means detects an abnormality relating to payout. A gaming machine including payout error notification means (implemented by a game control microcomputer 560 that executes the process of step S295).

(13) A connection confirmation signal output means for turning on a connection confirmation signal to be transmitted to the game control means when the payout control means is in a state where power supply to the gaming machine is started and the payout process can be executed. (Implemented by the payout control microcomputer 370 that executes the processes of steps S708 and S760), the command condition determination means in the payout command signal output means turns on the connection confirmation signal as a predetermined command condition. It is determined whether or not (step S243B) gaming machine.

(14) When the communication abnormality detecting means detects that the payout operation in-progress signal does not turn on even after a predetermined time has elapsed after the reception confirmation signal is turned off, a communication abnormality is detected (step step). (S281, S285, S286), the game control means performs a control for performing a predetermined error notification when the communication abnormality detection means detects an abnormality related to communication, the payout operation signal error notification means (the processing of step S287) A game machine including a game control microcomputer 560 to be executed).

  In the above embodiment, the payout control means determines that the prize ball payout has ended when it detects that the payout motor 289 has rotated by the planned payout number. However, the number of times detected by the payout motor position sensor is the expected payout number. If it reaches, it may be determined that the prize ball payout has ended. That is, the payout control means is configured to determine whether or not the payout has been completed by detecting the operation amount of the payout means (in this example, the rotation amount of the payout motor 289 or the number of detections by the payout motor position sensor). May be.

  Further, in the above embodiment, the payout control means confirms that the game ball has been paid out based on the detection signal of the payout count switch 301, but the game ball is based on the output signal of the payout motor position sensor. You may make it confirm that was paid out.

  Also, the payout control means detects the operation amount of the drive means (for example, payout motor 289, cam, etc.) of the payout means, and determines whether or not an abnormality related to payout (payout unit error) has occurred based on the detected amount. It may be configured to. With such a configuration, it is possible to reliably detect an abnormality relating to payout.

  In the above embodiment, the ball payout device 97 is configured to execute both ball lending and prize ball payout. However, even if the mechanism for lending the ball and the mechanism for paying the prize ball are independent, The invention can be applied.

  In the above-described embodiment, the payout is stopped when the ball is out of play or the lower pan is full. However, when other payouts are not preferable or when payout cannot be performed, The payout stop state may be set. For example, the payout stop state may be set also when the glass door frame 2 is in an open state and a detection signal is output from a door opening switch for detecting this.

  In each of the above-described embodiments, the recording medium used in the recording medium processing apparatus (card unit 50) is a magnetic card (prepaid card). However, the recording medium is not limited to a magnetic card, and is a non-contact type or a contact type. An IC card may be used. In addition, when the recording medium processing device is configured to be able to identify the recording information based on the identification code, the recording medium can be read at least by the recording medium processing device such as an identification code that can identify the recording information It may be something that can be recorded on. Further, the recording medium may be a medium on which a predetermined information recording symbol such as a barcode is printed so as to be readable. The shape of the recording medium is not limited to a card shape, and may be any shape such as a disk shape, a spherical shape, or a chip shape.

  The pachinko gaming machine of each of the above embodiments mainly gives a player a predetermined game value when the stop symbol of the special symbol variably displayed on the variable display unit 9 based on the start winning is a combination of the predetermined symbols. Although it was a pachinko gaming machine that became possible, if there is a prize in a predetermined area of the electric game that is released based on the start prize, a predetermined game value can be given to the player, or a start prize Even if it is a pachinko gaming machine in which a predetermined right is generated or continued when there is a prize for a predetermined electric combination that is released when the stop symbol of the symbol that is variably displayed becomes a combination of the predetermined symbol Applicable.

  The present invention can be applied to games such as pachinko machines, and in particular, in a gaming machine in which game control means and payout control means are provided separately, the number of prize balls from the game control means to the payout control means is determined. This is useful to prevent delays in the transmission of control signals, to reliably manage the number of premium game media unpaid, and to recognize errors related to communication between game control means and payout control means. is there.

It is the front view which looked at the pachinko machine from the front. It is the rear view which looked at the gaming machine from the back. It is the front view and sectional drawing which show a ball dispensing apparatus. It is a block diagram which shows the circuit structural example of a game control board (main board). It is a block diagram which shows the circuit structural example of a payout control board. It is a block diagram showing a configuration example of an effect control board, a lamp driver board and a sound control board. It is a block diagram which shows the structural example of a power supply board. It is explanatory drawing which shows the example of bit allocation of the output port in a game control means. It is explanatory drawing which shows the example of bit allocation of the output port in a game control means. It is explanatory drawing which shows the bit allocation example of the input port in a game control means. It is a flowchart which shows the main process which the microcomputer for game control in a main board | substrate performs. It is a flowchart which shows the main process which the microcomputer for game control in a main board | substrate performs. It is a flowchart which shows a timer interruption process. It is a flowchart which shows a power-off process. It is a flowchart which shows a power-off process. It is explanatory drawing which shows the buffer used by switch processing. It is a flowchart which shows an example of a switch process. It is explanatory drawing which shows an example of the content of the payout control signal. It is a block diagram which shows the signal line etc. which are used for transmission / reception of a payout control signal. It is a timing diagram which shows an example of how to output a payout control signal. It is explanatory drawing which shows an example of a communication error. It is explanatory drawing which shows an example of a communication error and a communication abnormal signal. It is explanatory drawing which shows an example of a communication error. It is explanatory drawing which shows an example of a communication error and a communication abnormal signal. It is explanatory drawing which shows an example of a communication error. It is a flowchart which shows a prize ball process. It is explanatory drawing which shows the structural example of a prize ball number table. It is a flowchart which shows a prize ball number addition process. It is a flowchart which shows a prize ball control process. It is a flowchart which shows a standby process. It is a flowchart which shows payout number signal transmission processing. It is a flowchart which shows a reception confirmation signal ON waiting process. It is a flowchart which shows a reception confirmation signal OFF waiting process. It is a flowchart which shows a payout operation signal on waiting process. It is a flowchart which shows the signal off waiting process during payout operation. It is a timing diagram which shows an example of how to output a payout control signal. It is explanatory drawing which shows the bit allocation example of the output port in a payout control means. It is explanatory drawing which shows the example of bit allocation of the input port in a payout control means. It is a flowchart which shows the main process which the microcomputer for payout control performs. It is a flowchart which shows the timer interruption process which the microcomputer for payout control performs. It is a flowchart which shows a payout motor control process. It is a flowchart which shows a main control communication process. It is explanatory drawing which shows an error flag. It is a flowchart which shows a standby process. It is a flowchart which shows payout REQ signal OFF waiting processing. It is a flowchart which shows payout operation start waiting processing. It is a flowchart which shows the process during payout operation. It is a flowchart which shows payout number signal OFF waiting processing. It is a flowchart which shows a prize ball lending control process. It is a flowchart which shows the payout start waiting process. It is a flowchart which shows a payout motor stop waiting process. It is a flowchart which shows payout passage waiting processing. It is a flowchart which shows payout passage waiting processing. It is a flowchart which shows payout passage waiting processing. It is a timing diagram for explaining a ball biting detection process. It is a timing diagram for demonstrating a ball biting cancellation | release process. It is explanatory drawing which shows the relationship between the kind of error, and the display of LED for an error display. It is a flowchart which shows an error process. It is a flowchart which shows an error process. It is a timing diagram which shows the mode of occurrence of the payout case error. It is a flowchart which shows a display control process. It is a flowchart which shows a display control process. It is a flowchart which shows a special symbol command control process. It is explanatory drawing which shows a number counter. It is a flowchart which shows the other example of a prize ball number addition process. It is a flowchart which shows the other example of a standby process. It is a flowchart which shows the other example of a payout number signal transmission process. It is a flowchart which shows the other example of a reception confirmation signal ON waiting process. 6 is a block diagram illustrating another example of a circuit configuration in the main board 31. FIG.

Explanation of symbols

1 Pachinko machine 31 Game control board (main board)
37 Dispensing control board 53 Basic circuit 54 ROM
55 RAM
56 CPU
57 I / O port 66 Interface board (relay board)
80 effect control board 97 ball payout device 301 payout number count switch 371 payout control CPU
374 LED for error display
375 Error release switch 370 Payout control microcomputer 560 Game control microcomputer 917 Capacitor (backup power supply)
920 Power supply monitoring circuit

Claims (11)

A gaming machine in which a player can play a predetermined game using a game medium and pays out a prize game medium as a prize based on the fact that a payout condition is established by the game,
A game control microcomputer for executing a game control process for controlling the progress of the game;
A payout means for paying out the prize game medium;
A payout control microcomputer for executing payout control processing for controlling the payout means,
The game control microcomputer is:
Even if the power supply to the gaming machine is stopped, the stored contents can be retained for a predetermined period, and the prize game medium number data that can specify the number of prize game media to be paid out based on the establishment of the payout condition is stored. Game medium number storage means;
Based on the fact that the prize game medium number data is stored in the prize game medium number storage means, a payout command signal for designating the number of prize game medium payouts to the payout control microcomputer is set to a predetermined command condition. A payout command signal output means to be turned on when
When a predetermined subtraction condition is satisfied after the payout command signal output means turns on the payout command signal, the number of payouts specified by the payout command signal from the prize game medium number data stored in the prize game medium number storage means A prize game medium number data subtraction means for performing a subtraction process for subtracting a value corresponding to
Communication abnormality detecting means for detecting an abnormality relating to communication between the game control microcomputer and the payout control microcomputer;
The payout control microcomputer includes:
During the period when power is supplied to the gaming machine, the payout control side storage means for holding the stored contents;
A reception confirmation signal output means for turning on a reception confirmation signal indicating that the payment command signal has been received in response to receiving the payment command signal;
A prize game medium payout control means for controlling the payout means to execute a payout process for paying out a prize game medium of a payout number specified by the payout command signal;
A payout operation in progress signal indicating that the payout process is being executed when the prize game medium payout control means is executing a payout process on a signal path different from the signal path for transmitting the reception confirmation signal. A payout operation signal output means for turning
The prize game medium number data subtracting means performs a subtraction process with the reception confirmation signal being turned on as the predetermined subtraction condition is satisfied,
The payout command signal output means turns the payout command signal on as the predetermined command condition is satisfied that the payout operation in-progress signal is in an off state,
When the communication abnormality detection means detects that the reception confirmation signal is turned on when the payout command signal output means does not turn on the payout command signal, it determines that an abnormality related to the communication has occurred. And
The game control microcomputer is:
When the communication abnormality detecting means determines that an abnormality relating to the communication has occurred, the payout command signal output means outputs the payout command signal even if the prize game medium number data is stored in the prize game medium number storage means. A gaming machine characterized by including payout command signal transmission prohibiting means for prohibiting turning on. The game control microcomputer includes payout command signal stop means for turning off the payout command signal,
The gaming machine according to claim 1, wherein when a predetermined subtraction condition is satisfied, a subtraction process is performed by the prize game medium number data subtraction means and the payout command signal is turned off by the payout command signal stop means. The payout command signal output means, as means for turning on the payout command signal, gives a payout number signal output means for turning on a payout number signal indicating the number of payouts of the prize game medium, and instructs to take in the payout number signal. An acquisition request signal output means for turning on the acquisition request signal to be turned on,
The payout command signal stop means includes a take-in request signal stop means for turning off the take-in request signal, and when the take-in request signal is turned off by the take-in request signal stop means, a payout command signal The gaming machine according to claim 2. The game control microcomputer
A payout number signal stop means for turning off the payout number signal when the payout operation in progress signal is turned off;
The payout control microcomputer
A payout operation signal stop means for turning off a payout operation signal in response to the completion of execution of the payout process by the prize game medium payout control means;
A payout number signal error that performs a predetermined error notification when it is detected that the payout number signal does not turn off even after a predetermined time has elapsed after the payout operation signal stop means turns off the payout operation signal. The gaming machine according to claim 3, further comprising a notification unit. The payout control microcomputer is a payout command that issues a predetermined error notification when it detects that the payout command signal does not turn off even if a predetermined time has elapsed after the reception confirmation signal output means turns on the reception confirmation signal. The gaming machine according to claim 2, further comprising a signal error notification unit. The gaming machine according to any one of claims 2 to 5, wherein the prize game medium payout control means includes payout process starting means for starting payout processing when the payout command signal is turned off. The game control microcomputer outputs a power confirmation signal for turning on a power confirmation signal transmitted to the payout control microcomputer when power supply to the gaming machine is started and the game control process can be executed. Including means,
The payout control microcomputer includes a prize game medium payout prohibiting means for prohibiting a payout process by the prize game medium payout control means when the power supply confirmation signal is turned off. The gaming machine described in Crab. The game control microcomputer includes power supply confirmation signal output stop means for turning off the power supply confirmation signal when detecting that the reception confirmation signal is turned on when the payout command signal is not turned on. Game machines. The game control microcomputer
A payout abnormality detecting means for detecting an abnormality relating to payout when it is detected that the payout operation in-progress signal is not turned off even if a predetermined time has elapsed after the payout operation in progress signal is turned on;
The game according to any one of claims 1 to 8, further comprising: a payout error notifying unit that executes control for performing a predetermined error notification when the payout abnormality detecting unit detects an abnormality related to the payout. Machine. The payout control microcomputer is a connection confirmation signal output means for turning on a connection confirmation signal transmitted to the game control microcomputer when power supply to the gaming machine is started and the payout process can be executed. Including
The game control microcomputer includes payout command signal on state restricting means for restricting the payout command signal from being turned on when the connection confirmation signal is in an off state. The gaming machine described in Crab. The communication abnormality detection means detects an abnormality related to communication when detecting that the payout operation signal does not turn on even if a predetermined time elapses after the reception confirmation signal is turned off. Including
The game control microcomputer includes a payout operation signal error notifying unit that executes control for notifying a predetermined error when the on-state communication abnormality detecting unit detects an abnormality related to the communication. The gaming machine according to any one of 10.

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