JP4313407B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP4313407B2 JP4313407B2 JP2007219819A JP2007219819A JP4313407B2 JP 4313407 B2 JP4313407 B2 JP 4313407B2 JP 2007219819 A JP2007219819 A JP 2007219819A JP 2007219819 A JP2007219819 A JP 2007219819A JP 4313407 B2 JP4313407 B2 JP 4313407B2
- Authority
- JP
- Japan
- Prior art keywords
- resin
- substrate
- semiconductor device
- manufacturing
- molding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
Claims (10)
- 半導体装置の製造方法であって、
配線基板又は配線フィルムである複数の基体部材を一のフレームに固定する工程と、
複数の半導体チップと前記基体部材とを各々電気的に接続する工程と、
前記複数の半導体チップが各々設置された複数のキャビティを有する金型を用いて前記半導体チップを樹脂封止する工程とを有し、
前記樹脂封止する工程では、前記フレームを用いて前記金型内で位置決めを行い、前記複数の半導体チップを樹脂封止し、
前記金型は、上型と下型を有し、前記下型のキャビティには、前記基体部材の電極に対向する位置に突起物が設けられていることを特徴とする半導体装置の製造方法。 - 請求項1記載の半導体装置の製造方法であって、
前記下型は、前記突起物の設けられた面にエアベントを有することを特徴とする半導体装置の製造方法。 - 請求項2記載の半導体装置の製造方法であって、
前記エアベントは、前記突起物を有する領域の略中央に設けられていることを特徴とする半導体装置の製造方法。 - 請求項2又は3記載の半導体装置の製造方法であって、
前記下型は、複数の部品から構成されるものであり、前記エアベントは前記部品と部品との隙間として形成されていることを特徴とする半導体装置の製造方法。 - 請求項4記載の半導体装置の製造方法であって、
一部の前記部品は、前記複数のキャビティ内へ突き出し可能に構成されていることを特徴とする半導体装置の製造方法。 - 請求項1乃至5のいずれか1項に記載の半導体装置の製造方法であって、
前記下型は、前記突起物の頭頂部を被覆した弾性を備えた柔軟物を有することを特徴とする半導体装置の製造方法。 - 請求項6記載の半導体装置の製造方法であって、
前記柔軟物は、ゴム系樹脂であることを特徴とする半導体装置の製造方法。 - 請求項6記載の半導体装置の製造方法であって、
前記柔軟物は、シリコンゴム系の樹脂であることを特徴とする半導体装置の製造方法。 - 請求項6記載の半導体装置の製造方法であって、
前記柔軟物は、ポリ4フッ化エチレン系の樹脂であることを特徴とする半導体装置の製造方法。 - 請求項1乃至9のいずれか1項に記載の半導体装置の製造方法であって、
前記突起物の設けられている面は、前記キャビティの底面であることを特徴とする半導体装置の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007219819A JP4313407B2 (ja) | 1994-02-10 | 2007-08-27 | 半導体装置の製造方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1610594 | 1994-02-10 | ||
JP2007219819A JP4313407B2 (ja) | 1994-02-10 | 2007-08-27 | 半導体装置の製造方法 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006156286A Division JP4065889B2 (ja) | 1994-02-10 | 2006-06-05 | Bgaパッケージ構造を有する半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007306037A JP2007306037A (ja) | 2007-11-22 |
JP4313407B2 true JP4313407B2 (ja) | 2009-08-12 |
Family
ID=38839642
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007219819A Expired - Fee Related JP4313407B2 (ja) | 1994-02-10 | 2007-08-27 | 半導体装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4313407B2 (ja) |
-
2007
- 2007-08-27 JP JP2007219819A patent/JP4313407B2/ja not_active Expired - Fee Related
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Publication number | Publication date |
---|---|
JP2007306037A (ja) | 2007-11-22 |
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