JP4299393B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device characterized by a heat treatment method for improving the interface state between a semiconductor substrate and a SiN film and the film quality of the SiN film.
[0002]
[Prior art]
With the progress of high integration and miniaturization of semiconductor integrated circuit devices in recent years, miniaturization is also required for MISFETs (metal-insulator-semiconductor FETs) constituting the semiconductor integrated circuit device, and the voltage is lowered with miniaturization. However, when the SiO ₂ film is used as the gate insulating film like the conventional MISFET, the thickness of the SiO ₂ film is reduced to about 4 nm. In addition to the difficulty of maintaining the uniformity of thickness, an increase in leakage current and a phenomenon in which impurities doped into the gate electrode penetrate into the channel region have become apparent, which has seriously affected the characteristics of the MISFET.
[0003]
To solve such problems, as a gate insulating film, SiO ₂ film instead SiO ₂ large silicon nitride film having a relative dielectric constant than layer (SiN _x film, Si ₃ N ₄ film on the stoichiometric ratio basis of In other words, application of a SiN film has been studied.
That is, since the relative dielectric constant of the SiN film is large, equivalent gate characteristics can be obtained even if an SiN film having a thickness larger than that of the SiO ₂ film is used.
[0004]
As a conventional method for forming a SiN film, a direct nitridation method by thermal nitridation or a thermal CVD method is widely used. However, since these processes are high-temperature processes at 800 ° C. or higher, such a high temperature is used. When a SiN film serving as a gate insulating film is formed by the process, impurities doped in the channel region for adjusting the threshold voltage _Vth are redistributed in the SiN film deposition process, and the short channel effect is deteriorated. That is, punch-through between the source and drain regions is induced.
In addition, such a high-temperature process has a problem that, in response to the recent increase in wafer diameter, the wafer is warped and the processing accuracy is lowered.
[0005]
In view of the problems of such a high temperature process, application of a plasma CVD (PCVD) method and a JVD (Jet Vapor Deposition) method, which are low temperature processes, has been attempted. For example, see Yale University, Jet Process Corp. Alternatively, in Motorola, it has been studied to form a SiN film of 2 to 5 nm by JVD method in terms of EOT (Equivalent Oxide Thickness), and in particular, in Motorola, 0 Application studies on .35 μm devices have been conducted and have shown good results.
The EOT (equivalent oxide film thickness) is the film thickness of the insulating film calculated from the CV characteristics on the assumption that the relative dielectric constant is 3.9, which is the same as that of the SiO ₂ film.
[0006]
However, the SiN film formed by such a PCVD method or JVD method does not have a very good film quality only by being deposited, and J (current density) -E (electric field) corresponding to I (current) -V (voltage) characteristics. ) In the characteristics, there is a problem that the current density J increases as the electric field E increases, that is, there is a problem that the leakage current increases (for example, refer to the J-E characteristics in FIG. 3 described later).
[0007]
Therefore, in order to improve the film quality of such a low-temperature SiN film, it is necessary to perform annealing in an N ₂ atmosphere at a high temperature of about 800 ° C., resulting in a high-temperature process as a whole.
[0008]
Furthermore, in order to improve the film quality of the low-temperature SiN film, introduction of nitrogen into the SiN film using a plasma process is also being studied. However, damage to the SiN film due to plasma or damage to the silicon substrate may be caused. There are concerns.
[0009]
On the other hand, as a method of forming an insulating film without causing such a high temperature process or plasma damage, an insulating film is formed by a low temperature process and then annealed at a temperature of 400 to 700 ° C. in a gas atmosphere activated by a catalyst. Has been proposed (see, for example, JP-A-8-78695).
[0010]
In this proposal, a mesh-like catalyst is arranged in a reaction chamber in which heat treatment is performed or in a reaction chamber independent of the heat treatment, and activated by allowing the raw material gas to permeate the mesh-like catalyst. The silicon-hydrogen bond (Si-H) at the crystalline Si film / silicon oxide film interface is replaced with a silicon-nitrogen bond (Si≡N) by radicals to improve the film quality of the oxide film. The whole can be performed by a low temperature process of 700 ° C. or less.
[0011]
For example, in the above proposal, a platinum network serving as a catalyst is formed by depositing a silicon oxide film having a thickness of 20 to 150 nm, for example, 100 nm, which becomes a gate insulating film on the surface of the crystalline Si film constituting the TFT by sputtering. By performing heat treatment at 500 to 650 ° C. for 1 hour using N ₂ O activated by the above, hydrogen in the silicon oxide film and at the interface between the silicon oxide film and the crystalline Si film is reduced by oxidation or nitridation. It is disclosed to improve the film quality and interface characteristics of a silicon oxide film.
[0012]
Further, in the above proposal, a 120-nm-thick silicon oxide film serving as a gate insulating film is deposited on the surface of the crystalline Si film constituting the TFT by an ECR-CVD method, and then a granular material in which Ti serving as a catalyst is adsorbed. Alternatively, NH ₃ diluted to 1 to 5% with Ar is activated with powdered silica gel, and the silicon oxide film is nitrided by annealing for 1 hour, and then N ₂ O activated with a catalyst is used. It is disclosed that the characteristics of the interface between the nitrided silicon oxide film and the crystalline Si film are improved by performing a heat treatment at 500 to 650 ° C. for 1 hour.
[0013]
[Problems to be solved by the invention]
However, as described above, when the PCVD method or the JVD method is used, in order to improve the film quality of the low temperature SiN film, it is necessary to perform annealing in an N ₂ atmosphere at a high temperature of about 800 ° C. As a whole, there is a problem that it becomes a high temperature process.
[0014]
In addition, in the case of the low temperature annealing method using the gas activated by the above-mentioned catalyst, the target is an extremely thick silicon oxide film of about 100 nm, and the EOT targeted in the present invention is about 2 to 5 nm. It is unclear whether it can be applied to the modification of a very thin SiN film, and no specific requirements for this are disclosed.
[0015]
Furthermore, in this case, the silicon oxide film deposited by the PCVD method or the ECR-CVD method is heat-treated at a temperature of 400 to 700 ° C. in another reaction chamber equipped with a catalyst, and the structure of the manufacturing apparatus system is In addition to being complicated, there is a problem that a temperature of 400 ° C. or higher is required even in a low temperature process.
[0016]
Accordingly, an object of the present invention is to modify a SiN film formed at a low temperature by low-temperature annealing and to simplify the configuration of a manufacturing apparatus system.
[0017]
[Means for Solving the Problems]
FIG. 1 is an explanatory diagram of the principle configuration of the present invention. Means for solving the problems in the present invention will be described with reference to FIG.
Refer to FIG. 1. (1) In the method of manufacturing a semiconductor device according to the present invention, after depositing a SiN film 5 on a substrate 1, NH ₃ is sprayed onto a catalyst body 3 made of a resistance heating element , and the catalyst body 3 and the NH ₃ It is characterized in that at least a part of NH ₃ is decomposed by contact reaction with the SiN film 5 and the SiN film 5 is exposed to the atmosphere of the active species 4 generated by the decomposition.
[0018]
In this way, by annealing using the active species 4 activated by the catalyst, the interface of the substrate 1-SiN film 5 can be modified only by a low temperature process, and the film quality of the SiN film 5 is improved. In particular, it is effective in the case of the SiN film 5 having an EOT of about 2 to 5 nm, and can improve the characteristics of the MISFET using the ultra-thin gate insulating film.
In this case, the substrate 1 means a silicon substrate, a silicon deposited layer formed on the substrate, or a metal, and that at least a part of the source gas is decomposed means that the source gas This means that part of the raw material gas may be decomposed into N radicals, N ₂ radicals, or the like, or the entire raw material gas may be decomposed into N radicals, N ₂ radicals, or the like.
[0020]
In this way, when annealing the SiN film 5, NH ₃ is used as the source gas 2 to reduce hydrogen in the SiN film 5 or hydrogen at the interface of the substrate 1 -SiN film 5 and improve the film quality of the SiN film 5. And the interface state density can be reduced.
[0022]
In particular, by using a resistance heating element as the catalyst body 3, the temperature of the catalyst body 3 can be increased to about 1800 ° C., and by bringing the catalyst body 3 in the high temperature state into contact with NH ₃ , the activity of N The relative ratio of the species, that is, the radicals of nitrogen atoms and the active species of N ₂ , that is, the radicals of nitrogen molecules, can be increased, and as a result, the effect of improving the quality of the SiN film 5 and the substrate The effect of reducing the interface state density at the interface of the 1-SiN film 5 is obtained.
[0023]
(2) Further, according to the present invention, in the semiconductor device manufacturing method, after depositing the SiN film 5 on the substrate 1, NH ₃ is sprayed onto the catalyst body 3 made of tungsten , and the contact between the catalyst body 3 and the NH _3. It is characterized in that at least a part of NH ₃ is decomposed by reaction, and the SiN film 5 is exposed to an atmosphere of active species 4 generated by the decomposition.
[0024]
As the catalyst body 3 used for such catalyst annealing, tungsten (W) that can withstand high temperatures, is not mixed into the SiN film 5 due to decomposition of the catalyst body material, and does not easily change its surface due to reaction with the source gas 2. Is preferred.
[0025]
( 3 ) Further, according to the present invention, in the above (1) or (2) , the SiN film 5 is the SiN film 5 deposited by the catalytic chemical vapor deposition method. Subsequently, in the same reaction vessel, NH ₃ The SiN film 5 is exposed to the atmosphere of the active species 4 generated by the decomposition of the above.
[0026]
As described above, when the SiN film 5 is formed by the catalytic chemical vapor deposition method (catalytic chemical vapor deposition method: catalytic CVD method), the deposition process of the SiN film 5 and the catalyst annealing are performed in the same reaction vessel. By performing as a series of steps (that is, in-situ), the configuration of the manufacturing apparatus system can be simplified.
[0027]
DETAILED DESCRIPTION OF THE INVENTION
Here, an embodiment of the present invention will be described. Before describing the manufacturing process of the embodiment, referring to FIG. 2 and FIG. 3, a catalytic CVD apparatus and a catalyst used in the embodiment of the present invention will be described. The JE characteristic of the SiN film formed by the CVD method will be described.
FIG. 2 is a conceptual diagram of a catalytic CVD apparatus used in the embodiment of the present invention. An exhaust pipe 12 is connected to a vacuum vessel 11 serving as a reaction chamber. Then, the reaction product or the unreacted source gas 19 is exhausted by the diffusion pump 13.
[0028]
A substrate holder 14 is provided at the upper center of the vacuum vessel 11, and a sample 15 held by a susceptor or the like is fixed to the substrate holder 14, and a sample is held in a recess of the substrate holder 14. A heater 16 is provided to heat the sample 15, and the temperature of the sample 15 is monitored by a thermocouple 17.
[0029]
Further, a gas supply pipe 18 having a nozzle for blowing out the source gas 19 and a tungsten catalyst body 20 are arranged so as to face the sample 15, and a shutter 23 is provided between them, AC power of about 700 W, for example, 680 W, is supplied from the AC power supply 21, and the catalyst body temperature of the tungsten catalyst body 20 becomes a high temperature of about 1800 to 1900 ° C.
Note that the temperature of the catalyst body wire of the tungsten catalyst body 20 is first estimated from the temperature dependence of the electrical resistance of the coiled tungsten catalyst body 20, but electrons are transmitted through a quartz window (not shown) provided in the vacuum vessel 11. Estimated by the infrared radiation thermometer 22 of the formula.
[0030]
The source gas 19 is blown onto the high-temperature tungsten catalyst body 20, and the source gas 19 and the tungsten catalyst body 20 come into contact with each other, whereby the source gas 19 is decomposed to form active species such as radicals, and the shutter 23 When the sample 15 is exposed to an atmosphere containing this active species, film formation or annealing is performed.
In this case, the substrate temperature may be increased due to heat radiation from the tungsten catalyst body 20, but when the distance between the sample 15 and the tungsten catalyst body 20 is about 5 cm, the temperature increase due to heat radiation is Since it is within several tens of degrees Celsius, there is no problem from the viewpoint of lowering the temperature (see Applied Physics, Vol. 66, No. 10, pp. 1094-1097, 1997 if necessary).
[0031]
Next, characteristics of the SiN film when the SiN film is formed using this catalytic CVD apparatus will be described.
First, in a state where the substrate temperature of a p-type silicon substrate having a specific resistance of 0.1 Ω · cm having a hydrogen-terminated (100) surface as the sample 15 is about 200 ° C., SiH ₄ is used as the source gas 19. A 4.8 nm SiN film is formed using NH ₃ , and an Al film is provided on the SiN film to form an electrode.
In this case, the substrate temperature means a temperature detected by the thermocouple 17.
[0032]
FIG. 3 is a diagram showing the J (current density) -E (electric field) characteristics of the SiN film formed as described above. For comparison, a SiN film (if necessary) formed by the JVD method is shown. , Mukes Khare, Symp. On VLSI Tech. Dig. Pp. 51-52, June, 1997) and SiN films (HC Cheng, IEEE) formed by low pressure chemical vapor deposition (LPCVD). ELECTRON DEVICE LETTERS, Vol. 16, No. 11, pp. 509-511, November, 1995).
In measuring the J-E characteristics, the heat treatment after the Al film was provided, that is, the PMA (Post Metal Anneal) treatment was not performed.
[0033]
As is apparent from the figure, the SiN film formed by the catalytic CVD method has less current density, that is, leakage current, than the SiN film formed by other low-temperature film forming methods in the electric field strength region of 3 MV / cm or more. It was confirmed that a high-quality SiN film having a dielectric breakdown voltage of 9 MV / cm or more was obtained, and application to a fine Si integrated circuit process is expected.
The catalytic CVD method itself has been published by Matsumura et al., One of the inventors of the present invention (for example, JP-A-8-250438, JP-A-10-83988, or the above-mentioned Applied Physics, Vol. 66, No. 10, pp. 1094-1097, 1997), and a method for nitriding a substrate surface using a catalytic CVD apparatus has been published by Izumi, one of the inventors of the present invention (Applied Physics Letters, Vol. 71, No. 10, pp.1371-1372, September, 1997).
[0034]
On the premise of such matters, an embodiment of the present invention relating to low-temperature annealing will be described with reference to FIGS. 4 to 7 in order to improve the film quality of a SiN film formed at a low temperature.
Reference to FIG. 4A First, the manufacturing process of the embodiment of the present invention will be described with reference to FIG. 4. The surface of the n-type silicon substrate 31 having the (100) plane as the main surface is cleaned by RCA cleaning. Then, in the catalytic CVD apparatus shown in FIG. 2, SiH ₄ 33 is flowed at 1.1 sccm and NH ₃ 32 is flowed at 50-60 sccm as the source gas 19 with the temperature of the n-type silicon substrate 31 being 300 ° C. Then, AC power of 680 W is supplied from the AC power source 21 to the tungsten catalyst body 20 arranged so that the gas pressure in the vacuum vessel 11 is 0.01 Torr and the distance from the n-type silicon substrate 31 is 3.7 cm. It was heated to to 1900 ° C., to decompose the NH ₃ 32 and SiH ₄ 33 by contacting the NH ₃ 32 and SiH ₄ 33 to the heated tungsten catalyst body 20 active Generating a seed 34 and 35, the SiN film 36 is deposited by reacting the activated species 34, 35 at the surface of n-type silicon substrate 31.
[0035]
Subsequently, referring to FIG. 4B, in the same vacuum vessel 11 (in-situ), the supply of SiH ₄ 33 is stopped, only NH ₃ 37 is supplied at 50 to 60 sccm, and the gas pressure is set to 0.013 Torr. Generates an active species 38 under the same conditions as in the film forming process, and forms a modified SiN film 39 by, for example, heat-treating the SiN film 36 in an atmosphere containing the active species 38 for one hour.
In this case, the active species 38 is composed of various radicals formed by decomposition of NH ₃ 37, and among them, the N radicals are the most, followed by the N ₂ radicals.
[0036]
Reference to FIG. 5A FIG. 5A is a diagram showing the CV characteristics of the SiN film 36 before the catalyst annealing treatment with NH ₃ is not performed. From the CV characteristics, the EOT of the SiN film 36 is shown. was estimated to 4.06Nm, also interface state density D _u was ^{8.63 × 10 11 cm -2 eV -1} .
Incidentally, the relative dielectric constant of the SiN film 36 in this case is obtained when the relative dielectric constant is obtained so that the film thickness obtained by ellipsometry (the ellipsometry) and the film thickness obtained by the CV characteristic coincide. , About 4.4.
[0037]
Reference to FIG. 5B FIG. 5B is a diagram showing the CV characteristics of the SiN film 39 after the catalytic annealing treatment with NH _{3. From} this CV characteristics, the EOT of the SiN film 39 is shown. Is estimated to be 3.80 nm, the hysteresis characteristics are improved, and the interface state density D _u is reduced to 3.53 × 10 ¹¹ cm ⁻² eV ^−1, which is 1/2 or less of that before the treatment. It was.
Incidentally, the relative dielectric constant of the SiN film 39 in this case is about 6.5 when the relative dielectric constant is obtained so that the film thickness obtained by ellipsometry and the film thickness obtained by the CV characteristic coincide with each other. It was confirmed that the relative dielectric constant before the treatment increased by about 50%.
When measuring these CV characteristics, only an Al electrode is formed, and no PMA treatment is performed.
[0038]
Reference to FIG. 6A FIG. 6A is a diagram showing the JE characteristics of the SiN film according to the embodiment of the present invention. In FIG. 6A, the low temperature annealing process in the active species generated by decomposition of NH ₃ is performed. Compared to the current density of the SiN film 36 having a previous EOT of 2.97 nm, that is, a leakage current, the current density of the SiN film 39 having an EOT of 2.78 nm after the low-temperature annealing is smaller than two digits. Also, the withstand voltage is improved.
[0039]
FIG. 6B is a comparison of the JE characteristics of the SiN film according to the embodiment of the present invention with an insulating film having substantially the same equivalent film thickness by another film formation method. Compared with the thermal SiO ₂ film having a thickness of 2.80 nm, the current density, and hence the leakage current, is improved by two orders of magnitude or more.
[0040]
Also, after deposition by the JVD method at room temperature, an annealing process was performed at a temperature of about 800 ° C. in an N ₂ atmosphere, and further, an EOT subjected to PMA treatment after electrode formation was compared with a 2.9 nm SiN film. In this case, since the SiN film by the JVD method has been subjected to a high-temperature annealing process of about 800 ° C., the SiN film of the present invention has a leakage current almost increased by about an order of magnitude, but still a thermal SiO ₂ film having an equivalent equivalent film thickness. As a result, a considerable improvement is seen, and it can be said that J-E characteristics are sufficient.
[0041]
Reference to FIG. 7A FIG. 7A is a graph showing the interface state density shown in the description of the CV characteristics shown in FIG. 5 again. By the catalyst annealing treatment of the present invention, FIG. It can be seen that the interface state density is reduced to about 40%.
[0042]
Reference to FIG. 7B FIG. 7B shows the SiN film 36 before and after the low-temperature annealing (NH ₃ treatment) in which the low-temperature annealing treatment is not performed in the active species generated by decomposition of NH ₃ (as-deposited). ) SiN film 39 of the X-ray photoelectron spectroscopy (XPS: X-ray Photoelectron Spectroscopy) spectrum of the N _1s (electrons of the 1s orbital of the nitrogen atoms) is a diagram showing the intensity of the hydrogen by the low-temperature annealing treatment of the present invention The binding energy considered to be due to the intensity is significantly reduced in the vicinity of 400 eV, and it is considered that H in the SiN film 36 or at the interface with the n-type silicon substrate 31 is replaced by N.
[0043]
To summarize the above, the relative permittivity of the SiN film is increased by replacing H in the SiN film with N by the low-temperature annealing treatment in the active species generated by decomposing NH ₃ with the catalyst, As a result, the equivalent oxide thickness EOT can be further reduced, and when the SiN film of the present invention is used as the gate insulating film having the same equivalent oxide thickness, the absolute thickness is compared with that of the conventional SiO ₂ film. Since the thickness can be increased, the thickness of the gate insulating film can be made uniform, whereby variation in the characteristics of the MISFET can be suppressed.
[0044]
In addition, the low-temperature annealing process of the present invention can replace H at the interface of the SiN film 39-n-type silicon substrate 31 with N and terminate dangling bonds with N, thereby greatly reducing the interface state density. As a result, the leakage current is reduced and the withstand voltage is also improved, so that a MISFET having excellent characteristics can be manufactured.
[0045]
Further, in the case of the present invention, such a catalyst annealing process can be performed at a low temperature, particularly at a low temperature of 300 ° C. or lower, so that the redistribution of impurities implanted into the channel region for threshold voltage control is performed. And the deterioration of the short channel effect can be prevented.
[0046]
The reason why the SiN film quality can be improved and the interface state can be modified by annealing at 300 ° C. or lower is not necessarily clear, but it is not a simple mesh-like catalyst as in the conventional example. , The use of the resistance heating element tungsten catalyst body 20 having a high temperature of 1800 to 1900 ° C. may cause NH _{3 to} be efficiently decomposed and N radicals to increase as a relative ratio of generated radicals. This is considered to be one reason.
[0047]
Further, in a specific embodiment of the present invention, the SiN film to be subjected to the catalyst annealing process is formed by the catalytic CVD method, and the catalyst annealing process is subsequently performed in the same apparatus (in-situ). Therefore, the film forming apparatus and the annealing apparatus can be made common, thereby simplifying the configuration of the manufacturing apparatus system.
[0048]
Although the embodiments of the present invention have been described above, the present invention is not limited to the configurations and conditions described in the embodiments, and various modifications can be made.
For example, in the description of the embodiment, the description is made using an n-type silicon substrate. However, as is apparent from the description related to FIG. 3, it is obvious that the present invention can be applied to a p-type silicon substrate. It is obvious that the present invention is applicable not only to a bulk silicon substrate but also to a case where a SiN film is deposited on a silicon film epitaxially grown on a substrate such as a silicon substrate.
[0049]
In addition, since the present invention is merely an essential requirement for modification of the SiN film, the silicon film on which the SiN film is deposited is not limited to a pure single crystal silicon film, but a polycrystalline silicon film or an amorphous silicon film can be used as a laser. It is obvious that the present invention can be applied to a crystalline silicon film crystallized by annealing, and therefore applied to a process for forming a gate insulating film of a TFT.
Further, as described above, since the present invention is merely an essential requirement for modification of the SiN film, it is clear that the object on which the SiN film is deposited may be a metal.
[0050]
In addition, since the catalyst annealing treatment of the present invention can be performed at a temperature of 300 ° C. or lower, it contributes to low-temperature processing, but is not necessarily limited to 300 ° C. or lower, and there are conditions regarding redistribution of impurities and the like. When mitigated, the catalyst annealing treatment may be performed at a temperature of 300 ° C. or higher.
[0051]
In the embodiment of the present invention, an ultra-thin gate insulating film having an equivalent oxide thickness (EOT) of 5 nm or less is targeted. However, the invention is not necessarily limited to such an ultra-thin film, and the gate It is not limited to insulating films, but can be applied to modification of sidewall insulating films or interlayer insulating films, etc., in the summary of OHP (overhead projector) manuscripts subject to exception provisions for loss of novelty It is self-evident from the description “Suggestion of applicability to future ULSI”.
[0052]
In the catalytic CVD apparatus shown in FIG. 2, the tungsten catalyst body 20 has a coil shape, but is not limited to the coil shape because the inductance characteristic is not used. It is obvious in principle that the power is not limited to AC power but may be DC power.
[0053]
【The invention's effect】
According to the present invention, since the SiN film formed at a low temperature is subjected to a low temperature annealing treatment in an atmosphere of active species generated by decomposing NH ₃ with a catalyst, the film quality and interface state are improved. It is possible to suppress redistribution, thereby making it possible to manufacture MISFETs having excellent characteristics without variation, and greatly contribute to miniaturization and high performance of highly integrated semiconductor integrated circuit devices.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram of a basic configuration of the present invention.
FIG. 2 is a conceptual configuration diagram of a catalytic CVD apparatus used in an embodiment of the present invention.
FIG. 3 is an explanatory diagram of JE characteristics of a SiN film formed by a catalytic CVD method.
FIG. 4 is an explanatory diagram of a manufacturing process according to the embodiment of the present invention.
FIG. 5 is an explanatory diagram of CV characteristics of a SiN film according to an embodiment of the present invention.
FIG. 6 is an explanatory diagram of JE characteristics of a SiN film according to an embodiment of the present invention.
FIG. 7 is an explanatory diagram of an interface state density and an XPS spectrum of a SiN film according to an embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Substrate 2 Source gas 3 Catalyst 4 Active species 5 SiN film 11 Vacuum vessel 12 Exhaust pipe 13 Diffusion pump 14 Substrate holder 15 Sample 16 Heater 17 Thermocouple 18 Gas supply pipe 19 Source gas 20 Tungsten catalyst body 21 AC power source 22 Infrared Radiation thermometer 23 Shutter 31 N-type silicon substrate 32 NH ₃
33 SiH ₄
34 active species 35 active species 36 SiN film 37 NH ₃
38 active species 39 SiN film

Claims (3)

After depositing a SiN film on the substrate, NH ₃ was sprayed onto the catalyst body made of a resistance heating element , and at least a part of NH ₃ was decomposed by a contact reaction between the catalyst body and NH _3, and generated by the decomposition. A method of manufacturing a semiconductor device, wherein the SiN film is exposed to an atmosphere of active species. After depositing the SiN film on the substrate, NH is added to the catalyst body made of tungsten. ₃ The catalyst body and NH ₃ By contact reaction with ₃ A method of manufacturing a semiconductor device, comprising: decomposing at least a part of the substrate and exposing the SiN film to an atmosphere of active species generated by the decomposition. The SiN film is a SiN film deposited by catalytic chemical vapor deposition, and subsequently, the SiN film is exposed to an atmosphere of active species generated by the decomposition of NH ₃ in the same reaction vessel. A method for manufacturing a semiconductor device according to claim 1 or 2 .

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