JP3874815B2 - Method for manufacturing semiconductor device - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to a semiconductor device having an insulating gate structure using an insulating substrate such as glass or a silicon film provided on an insulating film formed on various substrates, such as a thin film transistor (TFT) or a thin film diode (TFD). ), Or a thin film integrated circuit to which these are applied, particularly a thin film integrated circuit for an active liquid crystal display device (liquid crystal display), and a manufacturing method thereof. The present invention relates to a gate insulating film processing method and a gate insulating film processing apparatus for forming a device.
[0002]
[Prior art]
In recent years, semiconductor devices having TFTs on an insulating substrate such as glass, for example, active liquid crystal display devices and image sensors that use TFTs for driving pixels have been developed. As these substrates, glass substrates having a strain point of 750 ° C. or lower, typically 550 to 680 ° C. are generally used from the viewpoint of mass productivity and cost. Therefore, when such a glass substrate is used, the maximum process temperature is required to be 700 ° C. or lower, preferably 650 ° C. or lower.
[0003]
A thin film silicon semiconductor is generally used for TFTs used in these devices. Thin film silicon semiconductors are roughly classified into two types: those made of amorphous silicon semiconductor (a-Si) and those made of crystalline silicon semiconductor. Amorphous silicon semiconductors are most commonly used because they have a low production temperature, can be produced relatively easily by a vapor phase method, and are mass-productive. However, field effect mobility, conductivity, etc. Since the physical properties are inferior to those of crystalline silicon semiconductors, in order to obtain higher speed characteristics in the future, it is strongly required to establish a method for manufacturing TFTs made of crystalline silicon semiconductors.
[0004]
In the case of a TFT using amorphous silicon having a low mobility, the characteristics of the gate insulating film have not been a problem. For example, in a TFT using amorphous silicon, a silicon nitride film having inferior electrical characteristics than silicon oxide is used as a gate insulating film. However, in a TFT using a crystalline silicon film with high mobility, the characteristics of the gate insulating film are as large as the characteristics of the silicon film itself.
[0005]
In particular, as the technology for obtaining a crystalline silicon film has improved, the demand for a high-quality gate insulating film has increased greatly. In particular, even if the channel formation region is substantially composed of one single crystal or a plurality of crystals, the TFT is made of a crystalline silicon film in which all the crystal orientations are the same (this crystal state is called a monodomain). However, unlike a TFT using normal polycrystalline silicon, the contribution to the deterioration of the grain boundary characteristics is very small, and the electrical characteristics are almost determined by the characteristics of the gate insulating film.
[0006]
That is, in a normal polycrystalline structure, the crystal orientations of two crystals constituting a grain boundary are different from each other, resulting in a high grain boundary barrier (barrier). However, in the monodomain structure, even if it is composed of a plurality of crystals, the crystal orientation of two crystals sandwiching the boundary corresponding to the grain boundary in a normal polycrystal is the same. The barrier is very low and almost no different from single crystals. Therefore, in the monodomain structure, the contribution of the grain boundary to the characteristics of the TFT is small and is almost determined by the gate insulating film.
[0007]
A thermal oxide film is known as an excellent gate insulating film suitable for such a purpose. For example, a gate insulating film could be obtained using a thermal oxidation method on a substrate that can withstand high temperatures such as a quartz substrate. (For example, Japanese Patent Publication No. 3-71793)
However, in order to obtain a silicon oxide film that can be used as a gate insulating film by the thermal oxidation method, a high temperature of 950 ° C. or higher is necessary, and there is no substrate material other than quartz that can withstand such high-temperature processing. It was. In order to use a glass substrate having a low strain point as described above, the maximum process temperature must be 700 ° C. or lower, preferably 650 ° C. or lower. However, the thermal oxidation method cannot satisfy this requirement. .
[0008]
[Problems to be solved by the invention]
Even at 700 ° C. or lower, a thermal oxide film could be formed under special conditions such as high-pressure steam oxidation. For example, a thermal oxide film of 100 to 1000 mm can be formed by thermal oxidation at 500 to 700 ° C. However, the thermal oxide film thus obtained has a higher hydrogen concentration than the thermal oxide film obtained at a high temperature, and the characteristics of the TFT using this as a gate insulating film were extremely poor.
Because of these problems, the gate insulating film must be formed using a physical vapor deposition (PVD) method such as a sputtering method, or a chemical vapor deposition (CVD) method such as a plasma CVD method or a thermal CVD method. I didn't get it. In these methods, the maximum process temperature could be 650 ° C. or less.
[0009]
However, the insulating film produced by the PVD method or the CVD method has a high concentration of dangling bonds and hydrogen, and the interface characteristics are not good. Therefore, it is weak against injection of hot electrons or the like, and charge trapping (recombination) centers are easily formed due to dangling bonds and hydrogen. Moreover, the pressure resistance was also low. In particular, many recombination centers were formed at the interface with crystalline silicon. For this reason, when used as a gate insulating film of a TFT, there is a problem that the electric field mobility and the subthreshold characteristic value (S value) are not good, or there is a large leakage current of the gate electrode, and the on-current decreases (deteriorates)・ There was a problem that the change over time) was large.
[0010]
For example, when a sputtering method that is a PVD method is used, if a synthetic quartz made of high-purity oxygen and silicon is used as a target, only a film of a compound of oxygen and silicon can be formed in principle. However, it has been extremely difficult to obtain a silicon oxide film in which the ratio of oxygen and silicon in the obtained film is close to the stoichiometric ratio and has few dangling bonds. For example, when oxygen is used as the sputtering gas, a silicon oxide film close to the stoichiometric ratio can be obtained. However, oxygen has a small atomic weight and a low sputtering rate (deposition rate), and is not suitable as a sputtering gas when mass production is considered.
[0011]
Further, in an atmosphere of argon or the like, although a sufficient film forming speed was obtained, the ratio of oxygen and silicon was different from the stoichiometric ratio, and it was extremely inappropriate as a gate insulating film.
Further, it is difficult to reduce the dangling bonds of silicon in any sputtering atmosphere. By performing hydrogen annealing after film formation, the dangling bonds of silicon, Si. Or SiO., Are changed to Si-H, Si. It was necessary to stabilize as -OH. However, the Si—H and Si—OH bonds are unstable, and are easily broken by accelerated electrons such as hot electrons, and changed to the unpaired bonds of the original silicon. The presence of such weakly bonded Si—H and Si—OH is a cause of deterioration due to the hot electron injection described above.
[0012]
Similarly, a silicon oxide film manufactured using a plasma CVD method contains a large amount of hydrogen in the form of Si—H and Si—OH, which has been a source of the above problems. In addition, when tetra ethoxy silane (TEOS) is used as a relatively easy silicon source, there is a problem that carbon is contained in the silicon oxide film. The present invention provides means for improving the characteristics of a silicon oxide film deposited by such a PVD method or CVD method.
[0013]
[Means for Solving the Problems]
In the present invention, a thermal oxide film formed by oxidizing a silicon film at a temperature of 500 to 700 ° C., mainly composed of silicon oxide deposited over island-like crystalline silicon by a PVD method or a CVD method. The gate insulating film is excited by using a catalyst heated to an appropriate temperature, or is thermally annealed at 400 to 700 ° C. in a highly reactive gas atmosphere having decomposed nitrogen, whereby a silicon oxide film To reform. As the gas used in the present invention, dinitrogen monoxide (N₂O), nitric oxide (NO), nitrogen dioxide (NO ₂ ) And other nitrogen oxides (general formula NH_x: 0.5 ≦ x ≦ 2.5) or ammonia (NH_Three), Hydrazine (N₂H_Four ) And other hydrogen nitrides (general formula NH_x : 1.5 ≦ x ≦ 3) is preferable.
[0014]
Hereinafter, a gas having nitrogen oxide (or hydrogen nitride) excited or decomposed by a catalyst is referred to as reactive nitrogen oxide (reactive hydrogen nitride). In the present invention, the reactive nitrogen oxide (or reactive hydrogen nitride) may be composed only of nitrogen oxide (hydrogen nitride), but it is particularly preferable that argon or other inert gas is mixed therein. . The thermal annealing using such reactive nitrogen oxides or reactive hydrogen nitride improves the characteristics of the silicon oxide film, particularly at the interface with the silicon film. However, water (H₂O) and carbon dioxide (CO, CO₂Etc.) is not preferable. Water and carbon dioxide should be 1 ppm or less, preferably 10 ppb or less.
[0015]
Before and after the thermal annealing process using reactive nitrogen oxide or hydrogen nitride as described above, normal (excited state molecules or active species are low in concentration) hydrogen nitride or nitrogen oxide, or hydrogen, oxygen, Thermal annealing may be performed in an atmosphere such as ozone. Further, for example, a thermal annealing treatment with reactive hydrogen nitride may be performed after a thermal annealing treatment with reactive nitrogen oxide, and conversely, a reaction after a thermal annealing treatment with reactive hydrogen nitride may be performed. A thermal annealing treatment with a reactive nitrogen oxide may be performed. Of course, a thermal annealing process using only reactive nitrogen oxides or only reactive hydrogen nitride may be used.
[0016]
An example of an apparatus for carrying out the present invention is shown in FIG. In order to carry out the present invention, a catalyst for exciting or decomposing hydrogen nitride or nitrogen oxide is first required. In the example of FIG. 1A, a net-like catalyst 5 is provided inside the thermal annealing furnace 1. The catalyst is preferably a 3d transition metal such as platinum, palladium, reduced nickel, cobalt, titanium, vanadium, or tantalum, or a mixture of these with alumina and silica gel.
A susceptor 3 is provided inside the thermal annealing furnace 1, and a large number of substrates 4 are mounted on the susceptor so that a large number of substrates can be processed at a time. The thermal annealing furnace 1 is heated by a heater 2. If there is a temperature distribution in the thermal annealing furnace of the present invention, a large number of substrates cannot be processed uniformly at the same time, so special attention must be paid to the temperature distribution in the thermal annealing furnace. It is also effective to lower the atmospheric pressure below atmospheric pressure.
[0017]
In the present invention, the lower limit of the temperature of the thermal annealing furnace 1 is determined by the reaction rate, and the upper limit is determined by the material to be heat-treated such as a substrate. In view of these, the temperature of the thermal annealing furnace is 400 to 700 ° C., preferably 450 ˜650 ° C. is appropriate. The higher the temperature of the thermal annealing furnace, the more easily the reaction proceeds. However, for example, when a glass substrate is used, it may cause thermal shrinkage. Particularly at 650 to 700 ° C., many glass substrates cause thermal shrinkage, which is a problem in forming a fine pattern. When using a glass substrate, it is desirable to set the temperature below the strain point.
[0018]
In the above case, the catalyst is used after being heated to the temperature of the thermal annealing furnace. That is, if the temperature of the thermal annealing furnace 1 is 700 ° C., the temperature of the catalyst is also 700 ° C. In the 3d transition metal catalyst as described above, a temperature of 200 to 600 ° C. is preferable, and such a temperature may cause deterioration of the catalyst. Therefore, in order to suppress the deterioration of the catalyst by operating the catalyst at a lower temperature, the reaction chamber 16 for exciting and decomposing hydrogen nitride or nitrogen oxide gas by the catalyst is used as a thermal annealing furnace as shown in FIG. It is good to employ | adopt the structure which leaves | separates from 11 and connects between with the piping 18 between them. In this case, the thermal annealing furnace 11 is heated by the heater 12, and the catalyst reaction chamber 16 is heated by the heater 17. For this reason, it is possible to make the temperature of a catalytic reaction chamber as low as 200-400 degreeC. In this example as well, the catalyst 15 was reticulated.
[0019]
In such a structure, it was particularly preferable to use a solution obtained by diluting hydrogen nitride or nitrogen oxide with an inert gas such as argon because the reactivity can be maintained over a long distance for a long time. That is, the reactivity can be maintained for 0.1 to 10 seconds under appropriate conditions. For this reason, the distance between the catalytic reaction chamber 18 and the thermal annealing furnace 11 can be set to 0.1 to 1 m.
Note that when the temperature of the pipe 18 between the thermal annealing furnace and the catalytic reaction chamber is extremely low, the gas molecules excited in the catalytic reaction chamber return to the ground state and the reactivity decreases. Therefore, in order to maintain the reactivity, it is desirable to provide the heater 19 also in the pipe 18 so as to be kept at an appropriate temperature. The temperature of the pipe 18 is preferably an intermediate temperature between the thermal annealing furnace and the catalytic reaction chamber.
[0020]
Further, it is desirable that the inner wall of the pipe 18 is made of a material mainly composed of quartz so that reactive gas molecules do not react. Preferably, high-purity quartz made of 90 mol% or more silicon oxide is used.
When the inner wall is made of a metal material, atomic or excited molecules are stabilized by returning to the ground state or recombining, and are not reactive. However, when the inner wall is made of quartz, such an effect is small. For example, even if the inner wall is 50 to 100 cm away from the first reaction chamber, many atoms and molecules are in an activated state.
In the thermal annealing furnace 11, as in FIG. 1A, a large number of substrates 14 may be mounted on the susceptor 13 so that a large number of substrates can be processed at a time.
[0021]
In the above example, all the catalysts are net-like, but may be powdery or granular as long as they are held in a suitable container.
As a method for manufacturing the gate insulating film in the present invention, for example, a sputtering method may be used as the PVD method, and a plasma CVD method, a low pressure CVD method, or an atmospheric pressure CVD method may be used as the CVD method. Other film forming methods can also be used. As the plasma CVD method and the low pressure CVD method, a method using TEOS as a raw material may be used. In order to deposit a silicon oxide film using TEOS and oxygen as raw materials by the plasma CVD method, the substrate temperature is preferably 200 to 500 ° C. In the low pressure CVD method, the reaction using TEOS and ozone proceeds at a relatively low temperature (for example, 375 ° C. ± 20 ° C.), and a silicon oxide film can be obtained.
Similarly, monosilane (SiH_Four) And oxygen (O₂Or a silicon oxide film that is not damaged by plasma can be obtained by using monosilane and nitrogen oxides such as dinitrogen monoxide as raw materials.
[0022]
A combination of monosilane and nitrogen oxide may be used for the plasma CVD method. Further, among the plasma CVD methods, the ECR-CVD method using discharge under ECR (electron cyclotron resonance) conditions can reduce the damage caused by the plasma, so that a better gate insulating film can be formed.
According to the knowledge of the present inventor, an insulating film mainly composed of silicon oxide which is hard to some extent is suitable as a gate insulating film of TFT. As a specific index, the etching rate by buffer hydrofluoric acid at 23 ° C. mixed at a ratio of hydrofluoric acid 1, ammonium fluoride 50, and acetic acid 50 is 1000 kg / min or less, typically 300 to 800 kg / min. It was found that a silicon oxide film is preferable. 1 × 10 on average¹⁷~ 1x10^{twenty one}Atom / cm^ThreeIn most cases, silicon oxide films containing such nitrogen satisfy the etching rate conditions.
[0023]
In order to form crystalline silicon to be an active layer in the present invention, an amorphous silicon film obtained by a CVD method such as a plasma CVD method or a low pressure CVD method is used as a starting material. There is a street way. The first is a method of crystallizing by forming an amorphous silicon film and then performing thermal annealing at a temperature of 500 to 650 ° C. for an appropriate time. During the crystallization, an element that promotes crystallization of amorphous silicon, such as nickel, iron, platinum, palladium, or cobalt, may be added. When these elements are added, the crystallization temperature can be lowered and the crystallization time can be shortened.
[0024]
If these elements are contained in high concentrations, the semiconductor properties of silicon are impaired, so it is desirable that the concentrations be low enough that they are sufficient for crystallization and have little influence on the semiconductor properties. That is, the minimum value in the silicon film measured by secondary ion mass spectrometry (SIMS) is 1 × 10¹⁵~ 3x10¹⁹Atom / cm^ThreeIt is preferable that it is the density | concentration of. Since the concentration distribution of the element that promotes crystallization varies depending on the processing method of the silicon film, the minimum value may be obtained at the interface or in the vicinity of the center of the film.
As a second method, there is a so-called laser annealing method in which an amorphous silicon film is crystallized by irradiating strong light such as laser. Which one of the first and second methods is selected may be determined in consideration of the characteristics of TFTs required by those implementing the present invention, available devices, capital investment, and the like. .
[0025]
Further, the first method and the second method may be combined. For example, after crystallizing by thermal annealing, a method of further increasing crystallinity by laser annealing may be used. In particular, when thermal annealing was performed with the addition of a crystallization-promoting element such as nickel, it was observed that amorphous portions remained at the grain boundaries and the like. A laser annealing method is effective for achieving this.
Conversely, by thermally annealing a silicon film crystallized by a laser annealing method, the stress strain of the film caused by laser annealing can be relaxed.
[0026]
[Action]
Thermally oxidized films obtained by oxidation at a low temperature of 500 to 700 ° C. and silicon oxide films formed by CVD or PVD methods have many dangling bonds of silicon, Si—H bonds, or Si—OH bonds. It is included. When such a silicon oxide film is treated in a dinitrogen monoxide atmosphere at a high temperature of 800 ° C. or higher, the Si—H bond in the silicon oxide is nitrided or oxidized, and Si≡N or Si₂= N—O bond, Si—N═O bond and the like. The Si—OH bond changes as well. In particular, this reaction easily proceeds at the interface between silicon oxide and silicon, and as a result, nitrogen is concentrated at the silicon oxide-silicon interface. The amount of nitrogen added concentrated in the vicinity of the interface by such means is 10 times or more the average concentration of the silicon oxide film. Further, it is preferable for the gate insulating film to contain 0.1 to 10 atomic%, typically 1 to 5 atomic% of nitrogen in silicon oxide.
[0027]
However, such a reaction did not proceed at a low temperature of 750 ° C. or lower. This is because dinitrogen monoxide is not decomposed at such a low temperature, so that active atoms / molecules that penetrate into the silicon oxide film could not be obtained. That is, in the above reaction, the decomposition reaction of dinitrogen monoxide was rate limiting. Even if other nitrogen oxides such as nitrogen monoxide and nitrogen dioxide have different optimum temperatures, the temperature is the same, and the silicon oxide film is 400 to 700 ° C., preferably 450 to 650 ° C. as the object of the present invention. Further, the modification of the interface between the silicon oxide film and the active layer was impossible.
[0028]
However, when such a nitrogen oxide is made reactive by a catalyst heated to an appropriate temperature as in the present invention, active atoms / molecules are contained therein, so that the temperature is 700 ° C. or lower. Even at a temperature, it enters the silicon oxide film and causes the above reaction. Even if it becomes reactive by such means, its life is very short. For example, even if a catalyst is provided in the same furnace as shown in FIG. Has a sufficient lifetime, so that it effectively acts on a substrate located at a position away from the catalyst.
[0029]
In particular, by paying attention to this, it is possible to separate a reaction chamber for causing a reaction by a catalyst and a reaction chamber for processing a gate insulating film. The reactivity was maintained for a very long time, particularly in an atmosphere diluted with argon or other inert gas. Also in the present invention, a temperature of 400 to 700 ° C. is necessary for thermal annealing, but this temperature is not a temperature for decomposing nitrogen oxides, but active atoms / molecules enter the inside of the silicon oxide film. The temperature required for
[0030]
A similar phenomenon occurs in an atmosphere of hydrogen nitride such as ammonia or hydrazine. For example, when annealing a silicon oxide film deposited by CVD or PVD at a high temperature of 850 ° C. or higher in an ammonia atmosphere, silicon dangling bonds, Si—H bonds and Si—OH bonds are nitrided, and Si ≡N etc. This reaction also does not proceed at 650 ° C. or lower because ammonia decomposes and a high temperature of 850 ° C. or higher is required to obtain active nitrogen atoms.
[0031]
Therefore, if ammonia is made reactive in advance, the nitriding reaction proceeds even at a low temperature of 400 to 700 ° C.
Note that in the treatment with hydrogen nitride, Si—H bonds and Si═O bonds are nitrided, and Si—N═H.₂Sometimes it becomes. This is the same even when it is not reactive. Such bonds are then converted into extremely stable Si≡N bonds or Si—N═O bonds by annealing in a dinitrogen monoxide atmosphere.
[0032]
In the present invention, the reaction to the gate insulating film is different between when hydrogen nitride is used and when nitrogen oxide is used. ThatFIG.Will be described. FIG. 6A shows the nitrogen concentration of a crystalline silicon active layer deposited by sputtering and analyzed by secondary ion mass spectrometry (SIMS). The quantitative value is effective only in the silicon oxide (gate insulating film) portion, and 1 × 10¹⁸Atom / cm^Three Of nitrogen. A peak is observed in the nitrogen concentration near the interface between the active layer and the gate insulating film. This is due to the effect of the material discontinuity (matrix effect), and the nitrogen concentration does not actually increase at the interface. Absent.
[0033]
Using the device of FIG.Dinitrogen monoxideAnd anneal for 1 hour in an ammonia atmosphere. At this time, the substrate temperature is 600 ° C. When the silicon oxide film subjected to such treatment is similarly analyzed by SIMS, it is as shown in FIGS. In b treated with dinitrogen monoxide, a peak of nitrogen concentration is observed at the interface as in a, but the maximum value is two orders of magnitude larger than a. This means that the matrix effect is of course present, but more than that, it actually means that nitrogen is accumulated near the interface.
[0034]
On the other hand, in the case of c treated with ammonia, the nitrogen concentration is increased in the whole gate insulating film, and it is not particularly observed concentrated on the interface. In this way, by performing the ammonia treatment, the silicon oxide becomes silicon oxynitride.
The effect is particularly remarkable when the present invention is applied to a silicon oxide film (particularly, a silicon oxide film in which the oxygen concentration in the film is less than the stoichiometric ratio) formed by sputtering. That is, if such a film is annealed in a reactive nitrogen oxide atmosphere, deficient oxygen can be compensated and the composition of the silicon oxide film can be brought close to the stoichiometric ratio. Similarly, in annealing in a reactive hydrogen nitride atmosphere, nitrogen enters a position where oxygen should enter, whereby an electrically stable silicon oxynitride film is obtained.
[0035]
The above shows that the formation of a silicon oxide film by sputtering is not disadvantageous. That is, conventionally, the formation of a silicon oxide film by a sputtering method can be performed only in an atmosphere under limited conditions because the composition is close to the stoichiometric ratio. For example, considering a system of a mixed atmosphere of oxygen and argon as the atmosphere, it is necessary to satisfy the condition of oxygen / argon> 1, and it is desirable to perform in a pure oxygen atmosphere. For this reason, the film formation rate is low and it is not suitable for mass production. In addition, oxygen is a reactive gas, and oxidation of vacuum devices, chambers and the like has been a problem.
[0036]
However, according to the present invention, even a silicon oxide film having a composition separated from the stoichiometric composition can be converted into a silicon oxide film suitable for use as a gate insulating film according to the present invention. However, it can be carried out under more advantageous conditions with respect to the film formation rate, such as oxygen / argon ≦ 1. For example, the deposition rate is extremely high as in a pure argon atmosphere, and deposition can be performed under stable conditions.
[0037]
When the present invention is applied to a silicon oxide film formed by a CVD method such as a plasma CVD method or a low pressure CVD method using a silicon source containing carbon such as TEOS, a special effect is obtained. These silicon oxide films contain a large amount of carbon. In particular, carbon existing in the vicinity of the interface with the silicon film is a cause of deteriorating the characteristics of the TFT. In the present invention, in particular, when oxidation is advanced by annealing in a reactive nitrogen oxide atmosphere, carbon is also oxidized and released as carbon dioxide gas to the outside, thereby reducing the carbon concentration in the film. it can.
[0038]
This process will be described with reference to FIG. In this example, dinitrogen monoxide is used as the nitrogen oxide. Reactive dinitrogen monoxide is rich in atomic nitrogen and oxygen. These can easily enter the silicon oxide film. Then, carbon existing in silicon oxide (mostly in the form of Si—C bonds) and atomic oxygen combine to form a chemically extremely stable carbon dioxide gas, which is discharged outside. On the other hand, silicon bonded to carbon has unpaired bonds, but this is nitrided and converted into Si—N bonds or the like.
[0039]
When the present invention is applied to an active layer made of a crystalline silicon film crystallized by adding an element that promotes crystallization of an amorphous silicon film such as nickel, cobalt, iron, platinum, palladium, etc. It has the effect of. The crystallinity of the silicon film crystallized by adding such crystallization-promoting elements is particularly good, and the field effect mobility is very high. A good one was desired. The gate insulating film according to the present invention is suitable for it. Further, the annealing process of the present invention can also crystallize the amorphous region remaining in the crystal grain boundary and the like, and further improve the crystallinity.
[0040]
When the present invention is applied to an active layer using a silicon film subjected to laser annealing, it is generated by laser annealing in addition to the effect of improving the characteristics of the gate insulating film during the annealing process of the present invention. There is also an effect that strain on the silicon film can be alleviated at the same time in the annealing step.
In addition, when used for a silicon film having extremely good crystallinity such as a monodomain structure, the gate insulating film must have the same characteristics as a thermal oxide film. However, the thermal oxide film or CVD processed by the present invention is required. The oxide film and the PVD oxide film are suitable for the purpose.
[0041]
【Example】
[Example 1]
This embodiment is shown in FIG. In this example, a silicon oxide film formed by a sputtering method is used as a gate insulating film, and thermal annealing according to the present invention is performed to form an N-channel TFT.
First, on the substrate 21 (Corning 7059, 100 mm × 100 mm), a silicon oxide film was formed as a base oxide film 22 by sputtering to 1000 to 3000 mm, for example, 2000 mm. This underlying silicon oxide film 22 is for preventing contamination from the substrate. The silicon oxide film was thermally annealed at 640 ° C. for 4 hours in an oxygen atmosphere or a dinitrogen monoxide atmosphere to stabilize the surface state.
[0042]
Next, an amorphous silicon film having a thickness of 100 to 1,500, for example, 500, was formed by plasma CVD. Thereafter, a slight amount of an element that promotes crystallization, such as nickel, iron, platinum, palladium, cobalt, etc., was added to the amorphous silicon film and annealed to obtain a crystalline silicon film 23. In this example, a nickel acetate solution was dropped on the amorphous silicon film and spin-dried to form a very thin film of nickel acetate on the amorphous silicon film. Thereafter, nickel was introduced into the amorphous silicon film by crystallization at 550 ° C. for 4 hours in a nitrogen atmosphere to cause crystallization. After the above steps, laser annealing may be further performed to improve the crystallinity of the obtained crystalline silicon film. (Fig. 2 (A))
[0043]
Next, the crystalline silicon film 23 was etched to form an island-like silicon film 24. This island-like silicon film 24 is an active layer of the TFT. Then, a silicon oxide film having a thickness of 200 to 1500 mm, for example, 1000 mm, was formed as the gate insulating film 25 so as to cover the island-shaped silicon film 24 by sputtering. In this embodiment, a silicon oxide film is formed by sputtering in an oxygen atmosphere using a synthetic quartz target. Argon may be used as the sputtering gas. In this embodiment, the sputtering gas pressure was 1 Pa, the input power was 350 W, and the substrate temperature was 200 ° C.
[0044]
After forming the gate insulating film 25, the annealing process of the present invention was performed to improve the characteristics of the gate insulating film, particularly the interface between the gate insulating film and the active layer. In this example, the apparatus shown in FIG. As the reticulated catalyst 5, an 80-250 mesh platinum net was used. In this example, the distance between the catalyst 5 and the substrate 4 was 20 to 80 cm. Further, 100% dinitrogen monoxide was used as a gas used for annealing. In this embodiment, the temperature of the thermal annealing furnace 1 was preferably 500 to 650 ° C. In this embodiment, the temperature was 550 ° C. Although the pressure of the thermal annealing furnace 1 was preferably 0.5 to 1.1 atm, it could be a reduced pressure atmosphere. In this example, the pressure was 1 atm. The flow rate of dinitrogen monoxide was 5 liters / minute in this example. Furthermore, the thermal annealing time was set to 0.5 to 6 hours, for example, 1 hour in this example. As a result, hydrogen in the silicon oxide film and at the interface with the silicon film decreased due to nitridation or oxidation, and conversely, the nitrogen concentration at the interface increased. (Fig. 2 (B))
[0045]
Thereafter, an aluminum (including 1 wt% Si or 0.1 to 0.3 wt% Sc) film having a thickness of 3000 to 2 μm, for example 5000 mm, is formed by sputtering, and patterned to form the gate electrode 26. Formed. Then, the substrate was immersed in an ethylene glycol solution of tartaric acid adjusted to pH≈7 with ammonia, and anodization was performed using platinum as a cathode and the aluminum gate electrode 26 as an anode. The anodic oxidation was terminated by first increasing the voltage to 140 V at a constant current, and maintaining that state for 1 hour. In this way, an anodic oxide having a thickness of about 2000 mm was formed. (Fig. 2 (C))
[0046]
Thereafter, phosphorus was implanted as an impurity into the island-like silicon film 24 in a self-aligning manner by ion doping using the gate electrode 26 as a mask. At this time, the dose is 1 × 10¹⁴~ 8x10¹⁵Atom / cm²The acceleration voltage was preferably 50 to 90 kV. In this embodiment, the dose amount is 1 × 10.¹⁵Atom / cm²The acceleration voltage was 80 kV. As a result, an N-type impurity region (source / drain region) 27 was formed. (Fig. 2 (D))
Furthermore, the doped impurity region was activated by laser light irradiation. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) is used, and the energy density is 200 to 400 mJ / cm.²For example, 250 mJ / cm²It was.
[0047]
Thereafter, a silicon oxide film having a thickness of 3000 Å was formed as an interlayer insulating film 28 by plasma CVD on the entire surface, and the interlayer insulating film 28 and the gate insulating film 25 were etched to form contact holes in the source / drain regions 27. Further, an aluminum film having a thickness of 5000 mm was formed by sputtering, and this was etched to form source / drain electrodes 29 and 30. Through the above process, an N-channel TFT was manufactured. (Figure 2 (E))
[0048]
Since the TFT formed in this manner has excellent resistance to the gate insulating film, a TFT with little deterioration and excellent characteristics was obtained. For example, the drain voltage was fixed at + 14V, the gate voltage was varied from -17 to + 17V, and the deterioration of the TFT characteristics was evaluated. Field-effect mobility μ obtained by first measurement₀And the field-effect mobility μ obtained after measurement after the voltage application_Ten1- (μ_Ten/ Μ₀) Is defined as the deterioration rate, the deterioration rate of the TFT obtained in this example was 1.3%.
For comparison, when the gate insulating film thermal annealing step of the present invention is performed in a nitrogen atmosphere instead of a dinitrogen monoxide atmosphere and is annealed at 550 ° C./3 hours, the other manufacturing conditions are the same. The deterioration rate was 52.3%. This is presumed to be because nitrogen gas is hardly reactive by the catalyst.
[0049]
[Example 2]
This embodiment is shown in FIG. In this embodiment, a silicon oxide film deposited by plasma CVD using TEOS and oxygen as source gases is used as a gate insulating film, and thermal annealing according to the present invention is performed to form a CMOS type TFT.
First, a silicon oxide film having a thickness of 2000 mm was formed as a base oxide film 32 on a substrate 31 (NH Techno Glass NA35, 100 mm × 100 mm) by sputtering.
[0050]
Next, 500 nm of an amorphous silicon film was formed by plasma CVD. Thereafter, as in Example 1, a nickel acetate solution was spin-dried to form a nickel acetate film on the amorphous silicon film. Thereafter, nickel was introduced into the amorphous silicon film and crystallized by performing thermal annealing at 550 ° C. for 4 hours in a nitrogen atmosphere. Thereafter, in order to further improve the crystallinity, laser annealing was performed using a KrF excimer laser (wavelength 248 nm). Laser energy density is 250-350mJ / cm²Was appropriate. In this example, 300 mJ / cm²It was. As described above, the crystalline silicon film 33 was obtained. The crystalline silicon film thus obtained has a monodomain structure that is relatively large (-10 μm square) crystal grains and exhibits the same crystal orientation in the range of several to ten-fold times. Was. (Fig. 3 (A))
[0051]
Next, the crystalline silicon film 33 was etched to form island silicon films 34 and 35. These island-like silicon films 34 and 35 become active layers of the TFT. In this example, active layers were randomly formed, but many of them were observed in which the channel formation region of the TFT had a monodomain structure.
Thereafter, a silicon oxide film having a thickness of 200 to 1500 mm, for example, 1000 mm, was formed as the gate insulating film 36 so as to cover the island-shaped silicon films 34 and 35. In this embodiment, a silicon oxide film is formed by plasma CVD using TEOS and oxygen as source gases. At this time, as the film forming conditions, the gas pressure was 4 Pa, the input power was 150 W, and the substrate temperature was 350 ° C.
[0052]
After forming the gate insulating film, the annealing treatment of the present invention was performed to improve the characteristics of the gate insulating film, particularly the interface between the gate insulating film and the active layer. In this example, first, the substrate was placed in the thermal annealing apparatus shown in FIG. 1B, and hydrogen was first supplied to the thermal annealing furnace 11 to perform thermal annealing at 350 ° C. for 2 hours. As a result, unpaired bonds existing in the silicon oxide film could be filled with hydrogen.
Next, a mixed gas of dinitrogen monoxide and argon (dinitrogen monoxide: argon = 1: 10 to 1:30) was allowed to flow. The temperature of the catalyst reaction chamber 16 was preferably 200 to 600 ° C., the temperature of the pipe 18 was 200 to 600 ° C., and the temperature of the thermal annealing furnace 11 was preferably 400 to 700 ° C. In this embodiment, the temperatures were set to 400 ° C., 400 ° C., and 600 ° C., respectively. The pressure in the reaction chamber was 1 atm, the flow rate of the reaction gas was 3 liters / minute, and the thermal annealing time was 1 hour. In this embodiment, the catalyst reaction chamber 16 is provided with reticulated nickel as a catalyst 15. In this example, since the temperature of the catalyst could be kept lower than that of Example 1, the decomposition of dinitrogen monoxide could be promoted for a long time without degrading the catalyst.
[0053]
Through the above steps, hydrogen in the silicon oxide film and at the interface with the silicon film is reduced by being nitrided or oxidized. At this time, since TEOS was used as the source gas, the silicon oxide film before the thermal annealing contained carbon, but this carbon was also oxidized and released as carbon dioxide gas and decreased. Thus, a silicon oxide film preferable as a gate insulating film could be obtained. (Fig. 3 (B))
Thereafter, a polycrystalline silicon film having a thickness of 6000 mm was formed by a low pressure CVD method, and this was patterned to form gate electrodes 37 and 38. A small amount of phosphorus was added to the polycrystalline silicon film in order to improve conductivity. (Figure 3 (C))
[0054]
Thereafter, by ion doping, impurities were implanted into the island-like silicon films 34 and 35 in a self-aligning manner using the gate electrodes 37 and 38 as masks. First, a region for forming a P-channel TFT was covered with a photoresist mask 39 and phosphorus was implanted to form an N-type impurity region 40 (source / drain region). At this time, the dose is 1 × 10¹⁴~ 8x10¹⁵Atom / cm²The acceleration voltage was preferably 50 to 90 kV. In this embodiment, the dose amount is 5 × 10.¹⁴Atom / cm²The acceleration voltage was 80 kV. (Fig. 3 (D))
[0055]
Thereafter, a region where an N-channel TFT is to be formed is covered with a photoresist mask 41, and boron is implanted to form a P-type impurity region 42 (source / drain region). At this time, the dose is 1 × 10¹⁴~ 8x10¹⁵Atom / cm²The acceleration voltage was preferably 40-80 kV. In this embodiment, the dose amount is 1 × 10.¹⁵Atom / cm²The acceleration voltage was 65 kV. (Figure 3 (E))
[0056]
Further, the doped impurity regions 40 and 42 were activated by laser light irradiation. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) is used, and the energy density is 200 to 400 mJ / cm.²For example, 250 mJ / cm²It was.
Thereafter, a silicon oxide film having a thickness of 5000 Å was formed as an interlayer insulating film 43 by plasma CVD on the entire surface, and the interlayer insulating film 43 and the gate insulating film 36 were etched to form contact holes in the source / drain regions 40 and 42. Further, an aluminum film was formed in a thickness of 5000 mm by sputtering, and etching was performed to form source / drain electrodes 44, 45, and 46, and a CMOS type TFT was manufactured. (Fig. 3 (F))
[0057]
Example 3
This embodiment is shown in FIG. In this example, a silicon oxide film formed by ECR-CVD is used, and thermal annealing according to the present invention is performed to form a P-channel TFT as a switching transistor (pixel TFT) of an active matrix circuit. It is.
First, as a base oxide film 52 on a substrate 51 (100 mm × 100 mm), a 3000-nm silicon oxide film was formed by a low pressure CVD method.
[0058]
Next, 500 nm of an amorphous silicon film was formed by plasma CVD. Thereafter, as in Example 1, a nickel acetate solution is spin-dried to form a nickel acetate film on the amorphous silicon film, and further, thermal annealing is performed at 550 ° C. for 4 hours in a nitrogen atmosphere. To crystallize to obtain a crystalline silicon film 53. Thereafter, laser annealing may be performed to improve crystallinity. (Fig. 3 (A))
[0059]
Next, the crystalline silicon film 53 was patterned to form an island-like silicon film 54. This island-like silicon film 54 becomes an active layer of the TFT. A silicon oxide film 55 having a thickness of 1200 mm was formed as a gate insulating film so as to cover the island-like silicon film. In this example, monosilane (SiH_Four) As a source gas and dinitrogen monoxide as an oxidizing agent, a silicon oxide film was formed by an ECR-CVD method. At this time, in addition to dinitrogen monoxide as an oxidizing agent, oxygen (O₂), Nitric oxide (NO), nitrogen dioxide (NO₂) Etc. may be used. Further, as the film forming conditions at this time, the substrate was not heated, and the input power of the microwave (frequency: 2.45 MHz) was 400 W.
[0060]
Note that a silicon oxide film having equivalent characteristics can also be obtained by low pressure CVD using the same source gas and oxidizing agent. At that time, the pressure may be 0.1 to 10 torr and the temperature 300 to 500 ° C.
After forming the gate insulating film, the annealing process of the present invention was performed to improve the characteristics of the gate insulating film. In this example, the apparatus shown in FIG. 7 was used. In this apparatus, the catalytic reaction chamber 76 is packed with granular or powdery silica gel 75 in which titanium is adsorbed in a bent pipe as shown in FIG. The catalytic reaction chamber 76 was heated to 200 to 400 ° C., for example, 300 ° C. by a heater 77.
The thermal annealing furnace 71 was provided with a plurality of susceptors 73, and a substrate 74 was installed in each. The reaction chamber 71 is maintained at a constant temperature by a heater 72. In this example, the temperature of the thermal annealing furnace was 550 ° C.
[0061]
In the present embodiment, as the thermal annealing atmosphere, ammonia diluted to 1 to 5% with argon was used. The diluted ammonia was passed through the thermal annealing furnace 71 at a flow rate of 5 liters / minute. Under the above conditions, thermal annealing was performed for 1 hour. As a result, the silicon oxide film could be nitrided. Thereafter, the reaction gas was switched to a dinitrogen monoxide atmosphere, and thermal annealing could be further performed under the same conditions as in Examples 1 and 2. (Fig. 4 (B))
[0062]
Thereafter, an aluminum film having a thickness of 6000 mm was formed by sputtering, and this was patterned to form the gate electrode 56. A small amount (0.1 to 0.5% by weight) of scandium was added to the aluminum film to prevent hillocks. (Fig. 4 (C))
Thereafter, boron was implanted as an impurity into the island-like silicon film 54 in a self-aligning manner by ion doping using the gate electrode 56 as a mask. At this time, the dose is 1 × 10¹⁴~ 8x10¹⁵Atom / cm²The acceleration voltage is 40-80 kV, for example, the dose is 1 × 10¹⁵Atom / cm²The acceleration voltage was 65 kV. As a result, a P-type impurity region 57 (source / drain region) was formed. (Fig. 4 (D))
[0063]
Further, the doped impurity region 57 was activated by laser light irradiation. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) is used, and the energy density is 200 to 400 mJ / cm.²For example, 250 mJ / cm²It was.
Thereafter, a 3000-nm thick silicon oxide film was formed as an interlayer insulating film 58 on the entire surface by plasma CVD, and the interlayer insulating film 58 and the gate insulating film 55 were etched to form a contact hole in the source region. Further, an aluminum film was formed in a thickness of 5000 mm by sputtering, and etching was performed to form the source electrode 59. (Fig. 4 (E))
[0064]
Thereafter, 2000 nm of silicon nitride film was formed as a passivation film 60 by plasma CVD. Then, the passivation film 60, the interlayer insulating film 58, and the gate insulating film 55 were etched to form a contact hole in the drain region. Further, an ITO film was formed by sputtering, and this was etched to form the pixel electrode 61. A pixel TFT was fabricated by the above process. (Fig. 4 (F))
[0065]
【The invention's effect】
As described above, the TFT characteristics are greatly improved by the present invention. That is, the recombination center can be reduced at the interface between the gate insulating film and the active layer. As a result, the S value and the field effect mobility are improved. In addition, the breakdown voltage of the gate insulating film itself can be improved, and TDDB (time dependency dielectric breakdown) can also be improved. As a result of improving the characteristics of the interface with the gate insulating film as described above, since there are few defects in which electrons are trapped in the gate insulating film particularly when hot electrons are injected, deterioration due to hot electrons (Hot) Reduced Carrier Degradation and improved reliability.
[0066]
In the present invention, the maximum process temperature for the device can be set to 700 ° C. or less, preferably 650 ° C. or less, and the industrial profit due to this is exceptional.
In the embodiment, the TFT on the glass substrate has been mainly described, but it is clear that an excellent effect can be obtained even if the present invention is applied to a multilayer integrated circuit (also referred to as a three-dimensional integrated circuit or a three-dimensional integrated circuit). is there. Thus, the present invention is an industrially useful invention.
[Brief description of the drawings]
FIG. 1 shows a conceptual diagram of an apparatus for carrying out the present invention.
2 shows a process of Example 1. FIG.
FIG. 3 shows a process of Example 2.
4 shows a process of Example 3. FIG.
FIG. 5 explains the effect of the present invention.
FIG. 6 shows the nitrogen concentration in a silicon oxide film treated according to the present invention.
FIG. 7 shows a conceptual diagram of an apparatus for carrying out the present invention.
[Explanation of symbols]
1 ... Thermal annealing furnace
2 ... Heat annealing furnace heater
3 ... Susceptor
4 ... Board
5 .... Reticulated catalyst
11 ... Thermal annealing furnace
12. Heater for thermal annealing furnace
13 ... Susceptor
14 ... Board
15... Reticulated catalyst
16 .... Catalytic reaction chamber
17 ... Catalytic reaction chamber heater
18. Piping (quartz)
19 .... Pipe heater

Claims (8)

A method for manufacturing a semiconductor device formed on a glass substrate,
By thermally oxidizing the crystalline silicon film at a temperature lower than a strain point of the glass substrate, forming a gate site insulating film covering the crystalline silicon film,
Platinum, palladium, reduced nickel, cobalt, and heated at a temperature of 200 ° C. to 400 ° C. The catalyst containing titanium, vanadium or tantalum, said catalyst is contacted with nitrogen oxides, Ru excite or decompose the nitrogen oxides Promote the reaction,
A semiconductor device characterized in that , in an atmosphere containing the excited or decomposed nitrogen oxide , the gate insulating film is nitrided by heating at a temperature below the strain point of the glass substrate and at a temperature of 400 ° C. to 650 ° C. Manufacturing method. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the atmosphere containing the excited or decomposed nitrogen oxide contains argon. 3. The method for manufacturing a semiconductor device according to claim 1 , wherein the nitrogen oxide is nitrogen monoxide, dinitrogen monoxide, or nitrogen dioxide. A method for manufacturing a semiconductor device formed on a glass substrate,
By thermally oxidizing the crystalline silicon film at a temperature lower than a strain point of the glass substrate, forming a gate site insulating film covering the crystalline silicon film,
Platinum, palladium, reduced nickel, cobalt, titanium, a catalyst containing vanadium or tantalum heated at a temperature of 200 ° C. to 400 ° C., said catalyst is contacted with hydrogen nitriding, the reaction that Ru is excited or decomposing the hydrogen nitride Promote,
Fabrication of a semiconductor device, wherein the gate insulating film is nitrided by heating at a temperature below the strain point of the glass substrate and at a temperature of 400 ° C. to 650 ° C. in an atmosphere containing the excited or decomposed hydrogen nitride. Method. 5. The method for manufacturing a semiconductor device according to claim 4, wherein argon is contained in the atmosphere containing the excited or decomposed hydrogen nitride. According to claim 4 or claim 5, the method for manufacturing a semiconductor device wherein the nitride Hydrogen is ammonia or hydrazine. 7. The method for manufacturing a semiconductor device according to claim 1, wherein the gate insulating film contains silicon oxide as a main component. 8. The method for manufacturing a semiconductor device according to claim 1, wherein the catalyst is mixed with alumina or silica gel.

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