JP3445573B2 - Semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having an insulating gate structure using a non-single-crystal silicon film provided on an insulating substrate such as glass or an insulating coating formed on various substrates, for example, The present invention relates to a thin film transistor (TFT), a thin film diode (TFD), or a thin film integrated circuit to which they are applied, particularly a thin film integrated circuit for an active liquid crystal display device (liquid crystal display), and a manufacturing method thereof.

[0002]

2. Description of the Related Art In recent years, semiconductor devices having TFTs on an insulating substrate such as glass, for example, active type liquid crystal display devices using TFTs for driving pixels and image sensors have been developed.

A thin film non-single crystal silicon semiconductor is generally used for a TFT used in these devices.
As a thin film silicon semiconductor, an amorphous silicon semiconductor (a-
It is roughly classified into two, that is, one made of Si) and one made of polycrystalline or substantially polycrystalline silicon semiconductor having crystallinity. Amorphous silicon semiconductors are the most commonly used because they have a low manufacturing temperature, can be relatively easily manufactured by a vapor phase method, and have high mass productivity. Since the physical properties are inferior to those of crystalline silicon semiconductors, in order to obtain higher speed characteristics in the future, there is a strong demand for establishment of a method for manufacturing a TFT made of a polycrystalline silicon semiconductor.

TFT using amorphous silicon having low mobility
In this case, the characteristics of the gate insulating film did not pose a problem. For example, in a TFT using amorphous silicon, a silicon nitride film having electric characteristics inferior to that of silicon oxide is used as a gate insulating film. However, in a TFT using a crystalline silicon film having high mobility, the characteristics of the gate insulating film are as great a problem as the characteristics of the silicon film itself. A thermal oxide film is known as a preferable gate insulating film. For example, a gate insulating film could be obtained by using a thermal oxidation method on a substrate such as a quartz substrate that can withstand high temperatures. (For example, Japanese Patent Publication No. 3-71793)

In order to obtain a silicon oxide film that can be used as a gate insulating film by the thermal oxidation method, a high temperature of 950 ° C. or higher is required. However, there is a substrate material other than quartz that can withstand such a high-temperature treatment, and the quartz substrate is expensive and has a problem that it is difficult to increase the area because it has a high melting point. Further, in a device having a multi-layered semiconductor device such as a TFT such as a so-called three-dimensional integrated circuit or a three-dimensional integrated circuit, it is necessary to use a 9
At a high temperature of 00 ° C. or higher, there is also a problem that N-type or P-type impurities existing in the lower layer diffuse more than intended. Further, there is a difficulty in the apparatus in order to obtain a temperature as high as 950 ° C. or more, and it is particularly difficult to satisfy mass productivity.

[0006]

[Problems to be Solved by the Invention]
It has been required to set the maximum process temperature to 850 ° C or lower. However, thermal oxidation does not substantially proceed at a temperature of 850 ° C. or lower, and therefore the gate insulating film is formed by physical vapor deposition (PVD) such as sputtering, plasma CVD, thermal CVD, or the like. Chemical vapor deposition (CVD)
It had to be produced using the method.

However, the insulating film produced by the PVD method or the CVD method has a high concentration of dangling bonds and hydrogen, and the interface characteristics are not good. Therefore, it is weak against injection of hot carriers and the like, and is likely to form charge trap centers due to dangling bonds and hydrogen. For this reason,
When used as a gate insulating film of a TFT, the electric field mobility and the subthreshold characteristic value (S value) are not good, or the leak current of the gate electrode is large and the on-current decreases (deterioration / aging). There was a problem that it was terrible.

[0008] For example, in the case of using the sputtering method which is the PVD method, if synthetic quartz composed of high-purity oxygen and silicon is used as a target, in principle only a film of a compound of oxygen and silicon is formed. However, it was extremely difficult to obtain a silicon oxide film in which the ratio of oxygen to silicon in the obtained coating is close to the stoichiometric ratio and the number of dangling bonds is small. For example,
Oxygen was the preferred sputter gas. However, oxygen has a small atomic weight and therefore has a low sputtering rate (deposition rate), which is inappropriate when mass production is taken into consideration.

Further, in an atmosphere such as argon,
Although a sufficient film formation rate was obtained, the ratio of oxygen and silicon was different from the stoichiometric ratio, and it was extremely unsuitable as a gate insulating film. Further, it is difficult to reduce the dangling bonds of silicon regardless of the sputtering atmosphere, and by performing hydrogen annealing after film formation, the dangling bonds of silicon Si. -OH
As a result, it was necessary to stabilize. However, the Si-H and Si-OH bonds are unstable, and are easily broken by the accelerated electrons and converted into the original dangling bonds of silicon. Such weak bond Si-H, S
The presence of i-OH is a factor that causes the deterioration due to the above hot carrier injection.

Similarly, a silicon oxide film produced by the plasma CVD method also contains a large amount of hydrogen in the form of Si--H and Si--OH, which has been a source of the above problems.
In addition, when tetra-ethoxy-silane (TEOS) is used as a silicon source that is relatively easy to handle, there is a problem that carbon is contained in the silicon oxide film. The present invention is
The present invention provides means for solving the above problems.

[0011]

In the present invention, firstly, PV is used.
After forming the silicon oxide film by covering the island-shaped crystalline silicon by the D method or the CVD method, in an atmosphere containing hydrogen nitride (for example, ammonia (NH ₃ ), hydrazine (N ₂ H ₄ ), etc.), 600-850 ° C, preferably 65
By annealing at 0 to 800 ° C., the characteristics of the silicon oxide film, especially the characteristics of the interface with silicon are modified.

In the present invention, for example, the PVD method is a sputtering method, and the CVD method is a plasma CVD method.
Method, low pressure CVD method, or atmospheric pressure CVD method may be used. Other film forming methods can also be used. Plasma C
As the VD method and the low pressure CVD method, a method using TEOS as a raw material may be used. TEO by plasma CVD method
When a silicon oxide film is deposited using S and oxygen as raw materials,
The substrate temperature is preferably 200 to 500 ° C. Low pressure CVD
In the method, the reaction using TEOS and ozone proceeds at a relatively low temperature (for example, 375 ° C. ± 20 ° C.), and a silicon oxide film free from plasma damage can be obtained. Similarly, a silicon oxide film which is not damaged by plasma can be obtained even when monosilane (SiH ₄ ) and oxygen (O ₂ ) are reacted as main raw materials by the low pressure CVD method. . Further, among the plasma CVD methods, the ECR-CVD method using discharge under ECR (electron cyclotron resonance) conditions is less damaged by plasma, so that a better gate insulating film can be formed.

In the present invention, an amorphous silicon film obtained by a plasma CVD method or the like is used as a starting material for forming crystalline silicon to be an active layer. The crystal forming method is roughly divided into two methods. There is. The first is a method of crystallizing the amorphous silicon film by performing thermal annealing at a temperature of 500 to 650 ° C. for an appropriate time after forming the amorphous silicon film. At the time of crystallization, an element that promotes crystallization of amorphous silicon such as nickel, iron, platinum, palladium, or cobalt may be added. When these elements are added, the crystallization temperature can be lowered and the crystallization time can be shortened.

If these elements are contained in high concentration
Since it impairs the semiconductor characteristics of silicon, it is sufficient for crystallization.
1 x 10 which has almost no effect on semiconductor characteristics¹⁷~ 1
× 10 ¹⁹Atom / cm³Is preferred to be contained at a concentration of
Yes. The second method is to use a laser or the like on the amorphous silicon film.
The so-called laser is used to crystallize by irradiating strong light.
There is a laser annealing method. The above first and second methods
Which method is selected depends on the implementation of the present invention.
Required TFT characteristics, available equipment, capital investment
It may be decided in consideration of the amount.

Further, the first method and the second method may be combined. For example, after crystallizing by thermal annealing, a method of further enhancing crystallinity by laser annealing may be used. In particular, when thermal anneal was performed by adding a crystallization-promoting element such as nickel, it was observed that an amorphous portion was left in the crystal grain boundaries. The laser annealing method is effective for converting the material. On the contrary, by thermally annealing the silicon film crystallized by the laser annealing method, the stress strain of the film generated by the laser annealing can be relaxed.

[0016]

[Function] A silicon oxide film formed by the CVD method or the PVD method is applied to ammonia (NH ₃ ) at 600 to 850 ° C.,
When treated in an atmosphere of hydrogen nitride such as hydrazine (N ₂ H ₄ ), nitrogen burys dangling bonds, and Si—H bonds in silicon oxide are nitrided, resulting in Si≡N or Si
₂ = Change to N-O bond. The Si-OH bond changes as well. In particular, this reaction easily proceeds at the interface between silicon oxide and silicon, and as a result, nitrogen is concentrated at the silicon oxide-silicon interface. The amount of nitrogen concentratedly added near the interface by such means is 10 times or more the average concentration of the silicon oxide film. 0.1 to 10 atomic% in silicon oxide, typically 1
It is preferable for the gate insulating film to contain nitrogen of about 5 atomic%.

A similar phenomenon cannot be expected in a silicon oxide film obtained by thermal oxidation. That is, since the thermal oxide film is extremely dense, it must be at a high temperature of 950 ° C. or higher for the nitriding action of hydrogen nitride to proceed. Since the silicon oxide film formed by the CVD method or the PVD method is incomplete as compared with the thermal oxide film, the reaction proceeds at the temperature of 850 ° C. or lower as described above. As a result of this reaction, even if it is formed by the CVD method or the PVD method, it becomes a dense silicon oxide film which is not inferior to the thermal oxide film, and the interface states often generated at the interface between silicon oxide and silicon. (Most of them originate from dangling bonds and Si—H bonds) can be reduced.

A silicon oxide film formed by a sputtering method according to the present invention (in particular, a silicon oxide film having an oxygen concentration lower than a stoichiometric ratio by using argon or the like as a sputtering atmosphere).
The effect is particularly remarkable when applied to. That is,
Such a film is 600 to 850 ° C., preferably 650 to 8 in an atmosphere of hydrogen nitride such as NH ₃ and N ₂ H _4.
By heat treatment at 00 ° C., the dangling bonds are nitrided, nitrogen is bonded instead of oxygen, which is insufficient for the stoichiometric ratio, and the dangling bonds are reduced, and the interatomic bond is reduced. It is possible to form an oxynitride film having a strong bond.

The above shows that the formation of the silicon oxide film by the sputtering method is not disadvantageous. That is,
Conventionally, to form a silicon oxide film by a sputtering method,
In order to bring the composition close to the stoichiometric ratio, it was possible to perform it only in an atmosphere of limited conditions. For example, considering a system of a mixed atmosphere of oxygen and argon as the atmosphere, it is necessary to satisfy the condition of oxygen / argon> 1, and it is preferable to carry out in a pure oxygen atmosphere. Therefore, the film forming rate was low and it was not suitable for mass production. Further, oxygen is a reactive gas, and there is a problem that the vacuum device, the chamber and the like are oxidized.

However, according to the present invention, even a silicon oxide film having a composition deviating from the stoichiometric composition can be converted into a silicon oxynitride film suitable for use as a gate insulating film. Also in the above, it can be carried out under more advantageous conditions with respect to the film forming rate, such as oxygen / argon ≦ 1. For example, it is possible to form a film under stable conditions with a very high film forming rate as in a pure argon atmosphere.

When the present invention is applied to an active layer made of a crystalline silicon film which is crystallized by adding an element such as nickel, cobalt, iron, platinum or palladium which promotes crystallization of the amorphous silicon film. Has a special effect on. The crystallinity of the silicon film crystallized by adding such a crystallization-promoting element was extremely good, and the field effect mobility was very high. Good things were desired. The gate insulating film according to the present invention is suitable for this. Further, according to the present invention, by annealing in an atmosphere of hydrogen nitride, it is possible to crystallize the amorphous regions remaining in the crystal grain boundaries and further improve the crystallinity.

When the present invention is applied to the active layer formed of a laser-annealed silicon film, the characteristics of the gate insulating film are improved by the annealing in the hydrogen nitride atmosphere of the present invention. In addition to the above effect, there is also an effect that the strain on the silicon film generated by the laser annealing can be simultaneously relaxed in the annealing step.

[0023]

EXAMPLE 1 Example 1 is shown in FIG. This embodiment is an example in which a silicon oxide film formed by a sputtering method is used as a gate insulating film and the thermal annealing according to the present invention is performed to form an N-channel TFT. First, the substrate 101 (Corning 1733, 100 mm × 100 m)
As the underlying oxide film 102, a silicon oxide film having a thickness of 1000 to 3000 Å, for example 2000 Å, was formed on the m) by a sputtering method. This underlying silicon oxide film 102 is for preventing contamination from the substrate.

Next, an amorphous silicon film having a thickness of 100 to 1500 Å, for example, 500 Å, was formed by the plasma CVD method.
Then, a small amount of an element such as nickel, iron, platinum, palladium, or cobalt that promotes crystallization is added to the amorphous silicon film and thermal annealing is performed to obtain a crystalline silicon film 103. In this example, a nickel acetate solution was dropped on the amorphous silicon film and spin-dried to form a nickel acetate film on the amorphous silicon film. After that, nickel was introduced into the amorphous silicon film and crystallized by performing thermal annealing at 550 ° C. for 4 hours in a nitrogen atmosphere.
After the above steps, laser annealing may be further performed to improve the crystallinity of the obtained crystalline silicon film. (Fig. 1 (A))

Next, the crystalline silicon film 103 was etched to form an island-shaped silicon film 104. The island-shaped silicon film 104 will later form an active layer of the TFT. Then, a silicon oxide film having a thickness of 200 to 1500 Å, for example, 1000 Å, was formed as the gate insulating film 105 so as to cover the island-shaped silicon film 104. In this example, a silicon oxide film was formed by a sputtering method using a synthetic quartz target in an oxygen atmosphere. In this example, film formation was performed under the conditions of gas pressure of 1 Pa, input power of 350 W, and substrate temperature of 200 ° C. Argon may be used as the sputtering gas.

After forming the gate insulating film 105, the annealing treatment of the present invention was performed to improve the characteristics of the gate insulating film, particularly the interface between the gate insulating film and the active layer. In this example, in an ammonia (NH ₃ ) atmosphere, 600 to 850 ° C., 0.5 to 6 hours, for example, 630.
Thermal annealing was performed at 3 ° C. for 3 hours. As a result, the concentration of nitrogen increased in the silicon oxide film and at the interface with the silicon film. This is because the dangling bonds and silicon-hydrogen bonds in the silicon oxide film and the interface with the silicon film were nitrided. (Fig. 1 (B))

Then, an aluminum (containing 1 wt% Si or 0.1 to 0.3 wt% Sc) film having a thickness of 3000 Å to 2 μm, for example 5000 Å, is formed by the sputtering method, and is patterned to form a gate. Electrode 1
06 was formed. Next, the substrate was immersed in an ethylene glycol solution of tartaric acid having a pH of about 7 to 1 to 3%, and anodization was performed using platinum as a cathode and this aluminum gate electrode 106 as an anode. The anodic oxidation is initially 150 at a constant current.
The voltage was increased to V, and the state was maintained for 1 hour to finish. Thus, an anodic oxide having a thickness of 1500 to 3500Å, for example 2000Å, was formed. (Fig. 1 (C))

After that, phosphorus was implanted into the island-shaped silicon film 104 in a self-aligning manner by ion doping using the gate electrode 106 as a mask. At this time, the dose amount is 1 × 10 ¹⁴ to 8 × 10 ¹⁵ atoms / cm ² , and the acceleration voltage is 5
0 to 90 kV, for example, a dose of 1 × 10 ¹⁵ atoms / cm
^{2. The} acceleration voltage was 80 kV. As a result, N-type impurity regions (source / drain regions) 107 were formed.
(Fig. 1 (D))

Further, the doped impurity regions were activated by irradiation with laser light. The laser light is a KrF excimer laser (wavelength 248n
m, pulse width 20 nsec) and energy density is 200 to 400 mJ / cm ² , for example 250 mJ / c.
It was set to m ² .

After that, a silicon oxide film as an interlayer insulating film 108 was formed on the entire surface by plasma CVD to a thickness of 3000 .ANG., And the interlayer insulating film 108 and the gate insulating film 105 were etched to form contact holes in the source / drain regions 107. Further, an aluminum film is formed by a sputtering method at a thickness of 5000Å and etching is performed.
The source / drain electrodes 109 were formed, and an N-channel TFT was manufactured. (Fig. 1 (D))

The TFT thus formed has excellent resistance to the gate insulating film, and is thus resistant to deterioration and excellent in characteristics. For example, drain voltage +1
The gate voltage was fixed at 4 V, and the gate voltage was changed from −17 to +17 V to evaluate the deterioration of the TFT characteristics. In the field-effect mobility μ ₀ initially obtained and the field-effect mobility μ ₁₀ obtained after the above voltage application,
Defining (μ ₁₀ / μ ₀ ) as the deterioration rate, the deterioration rate of the TFT obtained in this example was 1.5%. For comparison, in the case where the thermal annealing process of the gate insulating film of the present invention is performed in the nitrogen atmosphere instead of the ammonia atmosphere at 800 ° C. for 1 hour, the deterioration rate is the same even if the other manufacturing conditions are exactly the same. Was 52.3%.

[Embodiment 2] This embodiment is shown in FIG. In this embodiment, a silicon oxide film formed by a plasma CVD method using TEOS as a raw material gas is used as a gate insulating film, and thermal annealing according to the present invention is applied to the CMOS TF.
It is an example of forming T. First, the substrate 201 (quartz, 10
0 mm × 100 mm) as an underlying oxide film 202,
A 2000 Å silicon oxide film was formed by sputtering.

Next, an amorphous silicon film having a thickness of 500 Å was formed by the plasma CVD method. Then, as in Example 1,
A nickel acetate solution is spin-dried to form a nickel acetate film on the amorphous silicon film, and then thermal annealing is performed in a nitrogen atmosphere at 550 ° C. for 4 hours to form the amorphous silicon film. Nickel was introduced into and crystallized. After that, in order to further improve the crystallinity, a KrF excimer laser (wavelength 248 nm)
Was used for laser annealing. The appropriate energy density of the laser is 250 to 350 mJ / cm ² . In this embodiment, it is set to 300 mJ / cm ² . (Fig. 2
(A))

Next, the crystalline silicon film 203 was etched to form island-shaped silicon films 204 and 205. The island-shaped silicon films 204 and 205 serve as active layers of the TFT. Then, a gate insulating film 206 having a thickness of 200 to 150 is formed so as to cover the island-shaped silicon films 204 and 205.
A silicon oxide film of 0Å, for example 1000Å, was formed. In this example, a silicon oxide film was formed by a plasma CVD method using TEOS and oxygen as source gases.
At this time, as film forming conditions, the gas pressure was 4 Pa, the input power was 150 W, and the substrate temperature was 350 ° C.

After forming the gate insulating film, the annealing treatment of the present invention was performed to improve the interface characteristics between the gate insulating film, particularly the gate insulating film and the active layer. In this example, in a hydrazine (N ₂ H ₄ ) atmosphere,
Thermal annealing was performed at 0 ° C. for 1 hour. As a result, the dangling bonds and hydrogen in the silicon oxide film and the interface with the silicon film were nitrided, and the concentration of nitrogen was increased. As a result, a preferable silicon oxide film could be formed as the gate insulating film. (Fig. 2 (B))

After that, an aluminum film having a thickness of 6000 Å was formed by a sputtering method and patterned to form gate electrodes 207 and 208. Next, pH ≒
The substrate is immersed in an ethylene glycol solution of 7 to 1-3% tartaric acid, and platinum is used as a cathode and the aluminum gate electrode 2
Anodization was performed using 07 and 208 as anodes. The anodization was completed by first increasing the voltage to 150 V with a constant current and maintaining the state for 1 hour. In this way
A 2000 Å thick anodic oxide was formed. (Fig. 2
(C))

After that, impurities were implanted into the island-shaped silicon films 204 and 205 by ion doping in a self-aligned manner using the gate electrodes 207 and 208 as masks. First, P
A region where a channel type TFT is to be formed is covered with a photoresist mask 209 and phosphorus is implanted to form an N type impurity region 21.
0 (source / drain region) was formed. At this time, the dose amount is 1 × 10 ¹⁴ to 8 × 10 ¹⁵ atoms / cm ² , the acceleration voltage is 50 to 90 kV, for example, the dose amount is 5 × 10 ¹⁴ atoms / cm ² .
cm ² , and the acceleration voltage was 80 kV. (Fig. 2 (D))

After that, a region for forming an N-channel type TFT is covered with a photoresist mask 211 and boron is implanted to p-type impurity regions 212 (source / drain regions).
Was formed. At this time, the dose amount is 1 × 10 ¹⁴ to 8 × 10
¹⁵ atoms / cm ² , acceleration voltage is 40 to 80 kV, for example, dose amount is 1 × 10 ¹⁵ atoms / cm ² , acceleration voltage is 65 kV.
And (FIG. 2E) Further, the doped impurity regions 210 and 212 were activated by irradiation with laser light. The laser light is a KrF excimer laser (wavelength 248n
m, pulse width 20 nsec) and energy density is 200 to 400 mJ / cm ² , for example 250 mJ / c.
It was set to m ² .

Thereafter, a silicon oxide film is formed as an interlayer insulating film 213 on the entire surface by plasma CVD to form 3000 Å, and the interlayer insulating film 213 and the gate insulating film 206 are etched to form contact holes in the source / drain regions 210 and 212. did. Further, an aluminum film is formed by a sputtering method at a thickness of 5000Å, and etching is performed to form a source / drain electrode 214, and a CM is formed.
An OS type TFT was manufactured. (Fig. 2 (F))

[Embodiment 3] This embodiment is shown in FIG. This embodiment is an example in which a silicon oxide film formed by the ECR-CVD method is used and the thermal annealing according to the present invention is performed to form a P-channel type pixel TFT. First, the underlying oxide film 3 is formed on the quartz substrate 301 (100 mm × 100 mm).
As No. 02, a silicon oxide film of 3000 Å was formed by the sputtering method.

Next, an amorphous silicon film having a thickness of 500 Å was formed by the plasma CVD method. Then, as in Example 1,
A nickel acetate solution is spin-dried to form a nickel acetate film on the amorphous silicon film, and thereafter, thermal annealing is performed at 550 ° C. for 4 hours in a nitrogen atmosphere to introduce nickel, Crystallized. After that, laser annealing may be performed to improve the crystallinity. (Fig. 3 (A))

Next, the crystalline silicon film 303 was patterned to form an island-shaped silicon film 304. This island-shaped silicon film 304 will later form an active layer of the TFT. Then, a silicon oxide film having a thickness of 1000 Å was formed as a gate insulating film so as to cover the island-shaped silicon film. In this example, a silicon oxide film was formed by the ECR-CVD method using SiH ₄ as a source gas and N ₂ O as an oxidizing agent. At this time, oxygen (O ₂ ), nitric oxide (NO), nitrogen dioxide (NO ₂ ) or the like may be used as the oxidant other than nitrous oxide. In addition, as film forming conditions at this time, the substrate was not heated, and the input power of microwave (frequency: 2.45 MHz) was 400 W.

After forming the gate insulating film, the annealing treatment of the present invention was performed to improve the interface characteristics between the gate insulating film, particularly the gate insulating film and the active layer. In this example, thermal annealing was performed at 800 ° C. for 1 hour in an ammonia atmosphere. As a result, dangling bonds and hydrogen were nitrided in the silicon oxide film and at the interface with the silicon film, and the concentration of nitrogen increased in the silicon oxide film and at the interface with the silicon film. In this way, a silicon oxide film having more excellent characteristics could be produced as the gate insulating film. (Fig. 3 (B))

Thereafter, a polycrystalline silicon film having a thickness of 6000Å was formed by the low pressure CVD method, and this was patterned to form a gate electrode 306. A small amount of phosphorus was added to the polycrystalline silicon film in order to improve the conductivity.
(FIG. 3C) After that, the island-shaped silicon film 30 is formed by an ion doping method.
4 was implanted with boron as an impurity in a self-aligned manner using the gate electrode 306 as a mask. At this time, the dose amount is 1 to 8 ×
10 ¹⁵ atoms / cm ² , acceleration voltage is 40 to 80 kV, for example, dose amount is 5 × 10 ¹⁵ atoms / cm ² , acceleration voltage is 65.
It was set to kV. As a result, P-type impurity regions 307 (source / drain regions) were formed. (Fig. 3 (D))

Further, the doped impurity region 307 was activated by irradiation with laser light. The laser light is a KrF excimer laser (wavelength 24
8 nm, pulse width 20 nsec), and energy density is 200 to 400 mJ / cm ² , for example 250 mJ.
/ Cm ² . After that, a silicon oxide film as an interlayer insulating film 308 was formed on the entire surface by a plasma CVD method to a thickness of 3000 .ANG., And the interlayer insulating film 308 and the gate insulating film 305 were etched to form a contact hole in the source region. Further, an aluminum film is formed by sputtering to 50
00Å Film formation and etching, source electrode 3
09 was formed. (Fig. 3 (E))

After that, a silicon nitride film was formed as a passivation film 310 by a plasma CVD method to a thickness of 2000 .ANG., The interlayer insulating film 308 and the gate insulating film 305 were etched to form a contact hole. Furthermore, I
A TO film was formed by a sputtering method and etching was performed to form a pixel electrode 311 to produce a pixel TFT. (Fig. 3 (F))

[Embodiment 4] This embodiment is shown in FIG. The present embodiment is an example in which a silicon oxide film formed by the low pressure CVD method is used and the thermal annealing according to the present invention is performed to form a P-channel type pixel TFT. First, the quartz substrate 30
1 (100 mm x 100 mm) on the underlying oxide film 302
As a film, a 3000 Å silicon oxide film was formed by sputtering.

Next, an amorphous silicon film having a thickness of 500 Å was formed by the plasma CVD method. Then, it was crystallized by performing thermal annealing at 600 ° C. for 12 hours in a nitrogen atmosphere. After that, laser annealing was further performed to improve the crystallinity. The appropriate energy density of the laser is 250 to 350 mJ / cm ² . In this embodiment, it is set to 300 mJ / cm ² . (Fig. 3
(A))

Next, the crystalline silicon film 303 was patterned to form an island-shaped silicon film 304. This island-shaped silicon film 304 will later form an active layer of the TFT. Then, a silicon oxide film having a thickness of 1000 Å was formed as a gate insulating film so as to cover the island-shaped silicon film. In this example, a silicon oxide film was formed by a low pressure CVD method using monosilane (SiH ₄ ) as a source gas and oxygen gas as an oxidizing agent. At this time, other than oxygen gas, nitrous oxide (N ₂ O), nitric oxide (NO), nitrogen dioxide (NO ₂ ) or the like may be used as the oxidizing agent. In this embodiment, the pressure is 0.1 to 10 torr.
r, temperature 300 to 500 ° C., for example, pressure 1.5 torr
The film was formed at r and a temperature of 400 ° C.

After forming the gate insulating film, the annealing treatment of the present invention was performed to improve the characteristics of the gate insulating film, particularly the interface between the gate insulating film and the active layer. In this example, thermal annealing was performed at 800 ° C. for 2 hours in an ammonia atmosphere. As a result, the dangling bonds, Si—H bonds, Si—OH bonds, etc. existing in the silicon oxide film could be nitrided. In this way, a silicon oxide film having more excellent characteristics could be produced as the gate insulating film. (Fig. 3 (B))

After that, a polycrystalline silicon film having a thickness of 6000Å was formed by a low pressure CVD method, and this was patterned to form a gate electrode 306. A small amount of phosphorus was added to the polycrystalline silicon film in order to improve the conductivity.
(FIG. 3C) After that, the island-shaped silicon film 30 is formed by an ion doping method.
4 was implanted with boron as an impurity in a self-aligned manner using the gate electrode 306 as a mask. At this time, the dose amount is 1 to 8 ×
10 ¹⁵ atoms / cm ² , acceleration voltage is 40 to 80 kV, for example, dose amount is 5 × 10 ¹⁵ atoms / cm ² , acceleration voltage is 65.
It was set to kV. As a result, P-type impurity regions 307 (source / drain regions) were formed. (Fig. 3 (D))

Further, thermal annealing was carried out at 500 to 650 ° C. for 3 to 24 hours, for example, 600 ° C. for 12 hours to activate the impurity ions. After that, a silicon oxide film is formed as an interlayer insulating film 308 on the entire surface by plasma CVD.
Then, the interlayer insulating film 308 and the gate insulating film 305 were etched to form a contact hole in the source region. Further, an aluminum film was formed into a film with a thickness of 5000 by a sputtering method, and etching was performed to form a source electrode 309. (Fig. 3 (E))

After that, a silicon nitride film was formed as the passivation film 310 by a plasma CVD method to a thickness of 2000 .ANG., And the interlayer insulating film 308 and the gate insulating film 305 were etched to form a contact hole. Furthermore, I
A TO film was formed by a sputtering method and etching was performed to form a pixel electrode 311 to produce a pixel TFT. (Fig. 3 (F))

[0054]

As described above, according to the present invention, the TFT
The characteristics of were greatly improved. In particular, the gate insulating film showed resistance to hot carrier injection, deterioration was reduced, and reliability was improved. In the embodiments, the explanation has been given mainly on the TFT on the glass substrate, but the excellent effect can be obtained even when the present invention is applied to a multilayer integrated circuit or the like (that is, a three-dimensional integrated circuit, a three-dimensional integrated circuit). Is clear. Thus, the present invention is an industrially useful invention.

[Brief description of drawings]

1 shows the steps of Example 1. FIG.

2 shows the steps of Example 2. FIG.

FIG. 3 shows steps of Examples 3 and 4.

[Explanation of symbols]

101 ... Substrate 102 ... Underlying oxide film 103 ... Crystalline silicon film 104 ... Island-shaped silicon film 105 ... Gate insulating film 106 ... Gate electrode 107 .. Impurity region (source / drain region) 108 .. Interlayer insulating film 109 ... Source / drain electrodes

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasuhiko Takemura 398 Hase, Atsugi City, Kanagawa Prefecture Semiconductor Energy Laboratory Co., Ltd. (56) References JP-A-4-28228 (JP, A) JP-A-6-163588 ( JP, A) JP 5-74763 (JP, A) JP 3-35768 (JP, A) JP 60-241269 (JP, A) European Patent Application Publication 609867 (EP, A 1) C.I. Hayzelden, J. et al. L. B atstone, Silicone formation and silicide-digested crystallization of nickel el-implanted amorphous siliconthin, 8th, 1993, April Applied physic, in the United States. 8289 (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/336 H01L 21/20 H01L 21/316 H01L 27/08 331 H01L 29/786

Claims (7)

(57) [Claims] And 1. A crystalline silicon film, the crystalline silicon film a silicon oxide film formed by a PVD method on, Te atmosphere odor containing hydrogen nitride 6 00-85
A gate insulating film having a silicon-nitrogen bond formed by thermal annealing at 0 ° C. , wherein the gate insulating film contains 0.1 to 10 atom% of nitrogen. Semiconductor device. 2. A crystalline silicon film, the crystalline silicon film a silicon oxide film formed by CVD on, Te atmosphere odor containing hydrogen nitride 6 00-85
A gate insulating film having a silicon-nitrogen bond formed by thermal annealing at 0 ° C. , wherein the gate insulating film contains 0.1 to 10 atom% of nitrogen. Semiconductor device. 3. The semiconductor device according to claim 1, wherein the PVD method is a sputtering method. 4. The semiconductor device according to claim 1 or 2, wherein the hydrogen nitride is ammonia or hydrazine. 5. The semiconductor device according to claim 1 or 2, wherein the crystalline silicon film contains an element that promotes crystallization. 6. The semiconductor device according to claim 5, wherein the concentration of the element promoting crystallization is 1 × 10 ¹⁷ to 1 × 10 ¹⁹ atoms / cm ³ . 7. The semiconductor device according to claim 1 or 2, wherein the crystalline silicon film is laser-annealed.