JP3359794B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an insulating substrate made of glass or the like,
Alternatively, a semiconductor device having an insulating gate structure using a silicon film provided on an insulating film formed on various substrates, for example, a thin film transistor (TFT) or a thin film diode (TFD), or a thin film integrated circuit using them More particularly, the present invention relates to a thin film integrated circuit for an active type liquid crystal display device (liquid crystal display) and a method of manufacturing the same, and more particularly, to the manufacture of a semiconductor device for forming the semiconductor device by a low temperature process having a maximum process temperature of 700 ° C. or less About the method.

[0002]

2. Description of the Related Art In recent years, semiconductor devices having TFTs on an insulating substrate such as glass, for example, active type liquid crystal display devices and image sensors using TFTs for driving pixels have been developed. These substrates have a strain point of 750 ° C. or less, typically 550 to 680 in terms of mass productivity and cost.
C. glass substrates are generally used. Therefore,
When such a glass substrate is used, the maximum process temperature is required to be 700 ° C. or lower, preferably 650 ° C. or lower.

[0003] Thin film silicon semiconductors are generally used for TFTs used in these devices. Thin-film silicon semiconductors are roughly classified into two types: those made of an amorphous silicon semiconductor (a-Si) and those made of a crystalline silicon semiconductor. Amorphous silicon semiconductor is most commonly used because it has a low manufacturing temperature, can be relatively easily manufactured by a gas phase method, and has high mass productivity. Physical properties are inferior to crystalline silicon semiconductors, so in order to obtain higher speed characteristics in the future,
There is a strong demand for a method of manufacturing a TFT made of a silicon semiconductor having crystallinity.

A TFT using amorphous silicon having low mobility
In this case, the characteristics of the gate insulating film did not matter much. For example, in a TFT using amorphous silicon, a silicon nitride film having lower electric characteristics than silicon oxide is used as a gate insulating film. However, in the case of a TFT using a crystalline silicon film having high mobility, the characteristics of the gate insulating film are as important as the characteristics of the silicon film itself.

[0005] In particular, as the technology for obtaining a crystalline silicon film has improved, the demand for a high-quality gate insulating film has greatly increased. Above all, even if the channel forming region is substantially composed of one single crystal or a plurality of crystals, a TFT formed of a crystalline silicon film having all the same crystal orientation (such a crystalline state is called a monodomain) In this case, unlike a TFT using ordinary polycrystalline silicon, the contribution to the deterioration of the characteristics of the grain boundaries is very small, and the electric characteristics are determined by the characteristics of the gate insulating film.

That is, in a normal polycrystalline structure, the crystal orientations of two crystals forming a grain boundary are different from each other, and as a result, a high grain boundary barrier is generated. However, in a monodomain structure, even if it is composed of a plurality of crystals, the crystal orientations of two crystals sandwiching a boundary corresponding to a grain boundary in a normal polycrystal are the same, so that in such a boundary, The barrier is very low and hardly different from a single crystal. Therefore, in the mono-domain structure, the contribution of the grain boundary to the characteristics of the TFT is small and is substantially determined by the gate insulating film.

As an excellent gate insulating film suitable for such a purpose, a thermal oxide film is known. For example, on a substrate that can withstand high temperatures, such as a quartz substrate, a gate insulating film could be obtained using a thermal oxidation method. However, in order to obtain a silicon oxide film sufficient for use as a gate insulating film by a thermal oxidation method, a high temperature of 950 ° C. or more is required, and such a high temperature treatment can be tolerated. There was no substrate material other than quartz. In order to use a glass substrate having a low strain point as described above, it was necessary to set the maximum process temperature to 700 ° C. or lower, preferably 650 ° C. or lower, but the method using thermal oxidation could not satisfy this requirement. .

[0008]

A thermal oxide film could be formed under special conditions such as high pressure steam oxidation even at 700 ° C. or lower. For example, a thermal oxide film could be formed at a temperature of 100 to 1000 ° by thermal oxidation at 500 to 700 ° C. However, the thermal oxide film obtained in this manner has a higher hydrogen concentration than the thermal oxide film obtained at a high temperature, and the characteristics of a TFT using this as a gate insulating film were extremely poor. Due to such problems, the gate insulating film is formed by physical vapor deposition (PVD) such as sputtering, plasma CVD, or thermal CVD.
It has to be manufactured using a chemical vapor deposition (CVD) method such as a VD method. In these methods, the maximum process temperature could be 650 ° C. or less.

However, the insulating film formed by the PVD method or the CVD method has a high dangling bond or a high hydrogen concentration, and has poor interface characteristics. Therefore, it is weak against injection of hot electrons or the like, and a charge trapping (recombination) center is easily formed due to dangling bonds or hydrogen. Also, the pressure resistance was low. In particular, many recombination centers were formed at the interface with crystalline silicon. For this reason, when it is used as a gate insulating film of a TFT, there is a problem that electric field mobility and a sub-threshold characteristic value (S value) are not good, or a leak current of a gate electrode is large, and a decrease in on current (deterioration) (Change over time) was large.

For example, in the case of using a sputtering method as a PVD method, if a synthetic quartz composed of high-purity oxygen and silicon is used as a target, only a film of a compound of oxygen and silicon is formed in principle. However, it has been extremely difficult to obtain a silicon oxide film in which the ratio of oxygen and silicon in the obtained film is close to the stoichiometric ratio and the number of dangling bonds is small. For example, when oxygen is used as a sputtering gas, a silicon oxide film having a stoichiometric ratio can be obtained. However, oxygen has a small atomic weight, a low sputtering rate (deposition rate), and is unsuitable as a sputtering gas in consideration of mass production.

Further, in an atmosphere such as argon, a sufficient film-forming rate was obtained, but the ratio of oxygen to silicon was different from the stoichiometric ratio, and was extremely unsuitable as a gate insulating film. Furthermore, it is difficult to reduce dangling bonds of silicon in any sputtering atmosphere. By performing hydrogen annealing after film formation, dangling bonds of silicon can be converted to Si—H or Si. -OH
It was necessary to stabilize. However, the Si-H and Si-OH bonds are unstable, and are easily broken by accelerated electrons such as hot electrons.
It has changed to the original dangling bond of silicon. The presence of such weak bonds Si-H and Si-OH caused the deterioration due to the hot electron injection described above.

Similarly, a silicon oxide film produced by a plasma CVD method also contains a large amount of hydrogen in the form of Si-H or Si-OH, which has been a source of the above problem.
In addition, when tetraethoxysilane (TEOS) is used as a relatively easy silicon source, there is a problem that carbon is included in the silicon oxide film. The present invention
It is intended to provide a means for improving the characteristics of the silicon oxide film deposited by the PVD method or the CVD method.

[0013]

According to the present invention, 500 to 7
A thermal oxide film formed by oxidizing a silicon film at a temperature of 00 ° C. or an insulating film containing silicon oxide as a main component deposited over island-shaped crystalline silicon by PVD or CVD. On the other hand, by performing thermal annealing at 400 to 700 ° C. in a highly reactive gas atmosphere containing nitrogen oxides excited or photo-decomposed by ultraviolet light, the silicon oxide film is modified, It is characterized in that it is used as a gate insulating film. Examples of the nitrogen oxide used in the present invention include nitrogen oxides such as nitrous oxide (N ₂ O), nitric oxide (NO), and nitrogen dioxide (N ₂ O) (NO _x : 0.5 in the general formula). ≦ x ≦ 2.5)
Is preferred.

However, it is not preferable that water (H ₂ O) or carbon dioxide (CO, CO _2, etc.) is mixed in this atmosphere. Water or carbon dioxide gas is 1ppm or less, preferably 10p
pb or less. Also, if necessary, after the above-described annealing step with nitrogen oxides, ammonia (NH ₃ ) also excited or decomposed by ultraviolet light,
Hydrogen nitride such as hydrazine (N ₂ H ₄ )
H _x : represented by 1.5 ≦ x ≦ 3), and 400 to
Thermal annealing at 700 ° C. may be performed. Also in this case, water (H ₂ O) or carbon dioxide (CO, CO ₂
Etc.) should be below 1 ppm, preferably below 10 ppb.

Hereinafter, in the present invention, a gas having nitrogen oxide (or hydrogen nitride) excited or decomposed by ultraviolet light is referred to as reactive nitrogen oxide (reactive hydrogen nitride). In the present invention, the reactive nitrogen oxide (or reactive hydrogen nitride) is nitrogen oxide (hydrogen nitride).
Or may be mixed with argon or another inert gas. By the thermal annealing using the reactive nitrogen oxide or the reactive hydrogen nitride, the characteristics of the silicon oxide film, particularly, the characteristics at the interface with the silicon film are improved.

Before or after the thermal annealing step using reactive nitrogen oxides or hydrogen nitride as described above, ordinary hydrogen nitride or nitrogen oxide (with low concentration of excited state molecules or active species) or nitrogen oxide or hydrogen is used. The thermal annealing may be performed in an atmosphere of oxygen, ozone, or the like. FIG. 1 shows an example of an apparatus for carrying out the present invention. In order to carry out the present invention, a first reaction chamber 1 for exciting nitrogen oxide or hydrogen nitride by ultraviolet light and a reactive nitrogen oxide or hydrogen nitride obtained by the first reaction chamber are introduced. , A second reaction chamber for thermally annealing the gate insulating film at a temperature of 400 to 700 ° C. is required. In FIG. 1A, reference numeral 1 denotes a first reaction chamber, and 2 denotes a second reaction chamber. It is desirable that these reaction chambers and the piping between them are maintained at an appropriate temperature. Although FIG. 1A shows only the heater 3 for heating the second reaction chamber 2, a heater for heating the first reaction chamber 1 and the piping may be provided.

The first reaction chamber preferably has a structure in which ultraviolet light is irradiated as much as possible to make the gas reactive. FIG. 1B shows a conceptual diagram of the first reaction chamber.
The structure may be such that a pipe 6 (preferably synthetic quartz) that transmits ultraviolet light for introducing a gas is bent, and an ultraviolet light source (for example, a low-pressure mercury lamp) is disposed therebetween. FIG. 1C shows a cross section taken along a dotted line in FIG. 1B, and a low-pressure mercury lamp 7 is arranged between the pipes 6. The temperature of the first reaction chamber may be room temperature,
It is more preferable that the temperature be kept at 00 to 700 ° C. Further, in order to avoid temperature distribution and fluctuation in the second reaction chamber, it is ideal that the temperature of the first reaction chamber is kept the same as the temperature of the second reaction chamber.

In the present invention, the lower limit of the temperature of the second reaction chamber is determined by the reaction rate, and the upper limit is determined by the material to be heat-treated, such as a substrate. To 700 ° C, preferably 450 to 650
° C is appropriate. The higher the temperature of the second reaction chamber, the easier the reaction proceeds. For example, when a glass substrate is used, heat shrinkage may occur. Especially 650-
At 700 ° C., many glass substrates cause thermal shrinkage, which is a problem in forming a fine pattern. When a glass substrate is used, it is desired that the temperature be lower than the strain point.

When the temperature of the pipe between the first reaction chamber and the second reaction chamber is extremely low, the gas molecules excited in the first reaction chamber return to the ground state, and the reactivity decreases. Therefore, in order to maintain the reactivity, it is desirable that the piping be maintained at an appropriate temperature. Further, the inner wall of the pipe is desirably made of a material containing quartz as a main component so that reactive gas molecules do not react. Preferably, high-purity quartz composed of 90 mol% or more of silicon oxide is used.

If the inner wall is made of a metal material, the atomic or excited molecules are stabilized by returning to the ground state or recombining, and are not reactive. However, when the inner wall was made of quartz, such an effect was small. For example, many atoms and molecules were in an activated state even at a distance of 50 to 100 cm from the first reaction chamber. A large number of substrates 5 may be placed on the susceptor 4 in the second reaction chamber 2 so that a large number of substrates can be processed at one time. It is also effective to make the pressure of the atmosphere in the second reaction chamber lower than the atmospheric pressure.

In the present invention, the gate insulating film can be formed by, for example, a sputtering method or a CVD method as the PVD method.
As a method, a plasma CVD method, a low pressure CVD method, or an atmospheric pressure CVD method may be used. Other film formation methods can be used. As the plasma CVD method or the low pressure CVD method, a method using TEOS as a raw material may be used. In order to deposit a silicon oxide film using TEOS and oxygen as raw materials by a plasma CVD method, the substrate temperature is desirably 200 to 500 ° C. Also, in the low pressure CVD method, TE
The reaction using OS and ozone is performed at a relatively low temperature (for example, 37
(5 ° C. ± 20 ° C.), and a silicon oxide film free from plasma damage can be obtained. Similarly, a silicon oxide film free from plasma damage can be obtained by low-pressure CVD using monosilane (SiH ₄ ) and oxygen (O ₂ ) or monosilane and nitrogen oxide such as dinitrogen monoxide as raw materials.

A combination of monosilane and a nitrogen oxide such as dinitrogen monoxide may be used in a plasma CVD method. Further, among plasma CVD methods, an ECR-CVD method using discharge under ECR (Electron Cyclotron Resonance) conditions has less damage due to plasma, so that a better gate insulating film can be formed. According to the findings of the present inventors, an insulating film containing silicon oxide as a main component is suitable as a gate insulating film of a TFT. As a specific index, an etching rate by buffered hydrofluoric acid at 23 ° C. mixed at a ratio of hydrofluoric acid 1, ammonium fluoride 50, and acetic acid 50 is 1000 ° / min or less, typically 300 to 800 °.
/ Min has been found to be preferable. On average, many silicon oxide films containing 1 × 10 ¹⁷ to 1 × 10 ²¹ atoms / cm ³ of nitrogen satisfy such an etching rate condition.

In the present invention, crystalline silicon to be used as an active layer is formed by a plasma CVD method, a low pressure CVD method or the like.
Although an amorphous silicon film obtained by the VD method is used as a starting material, there are roughly two types of crystallization methods. First, after forming an amorphous silicon film, 500 to
This is a method of crystallizing by performing thermal annealing at a temperature of 650 ° C. for an appropriate time. During the crystallization, an element which promotes crystallization of amorphous silicon, such as nickel, iron, platinum, palladium, and cobalt, may be added. By adding these elements, the crystallization temperature can be lowered and the crystallization time can be shortened.

If these elements are contained in a high concentration, they impair the semiconductor characteristics of silicon. Therefore, it is desired that the concentration of these elements is low enough to be sufficient for crystallization and hardly affect the semiconductor characteristics. That is, secondary ion mass spectrometry (SIM
The minimum value in the silicon film measured by S) is 1 × 10
Preferably, the concentration is ^{15 to} 3 × 10 ¹⁹ atoms / cm ³ . Since the concentration distribution of the element promoting such crystallization varies depending on the method of processing the silicon film, the minimum value may be obtained at the interface or in the vicinity of the center of the film. As a second method, the amorphous silicon film is crystallized by irradiating it with strong light such as a laser,
There is a so-called laser annealing method. Above, first, second
Which of the above methods is to be selected may be determined in consideration of the characteristics of the TFT, the available equipment, the amount of capital investment, and the like required by the one implementing the present invention.

Further, the first method and the second method may be combined. For example, after crystallization by thermal annealing, a method of further increasing crystallinity by laser annealing may be used. In particular, when thermal annealing was performed by adding a crystallization promoting element such as nickel, it was observed that an amorphous portion was left at a crystal grain boundary or the like. The laser annealing method is effective for the conversion. Conversely, by subjecting a silicon film crystallized by the laser annealing method to thermal annealing, stress distortion of the film caused by laser annealing can be reduced.

Further, it is effective to perform a treatment by irradiation with UV light in an atmosphere containing nitrogen oxide, oxygen or nitrogen before forming the gate insulating film. By performing this process, the charge trapping center and the charge density at the interface between the active layer and the gate insulating film can be reduced. It is useful to simultaneously perform the heating at 400 ° C. to 700 ° C. for the irradiation of the UV light.

It can be understood that the treatment before the formation of the gate insulating film is a step of cleaning the surface of the active layer (island-shaped semiconductor region). In the case where nitrogen oxide or oxygen is used, it can be said that this is a step of forming a thin oxide film on the surface at the same time as cleaning.

In order to maximize the effect of cleaning the surface of the active layer by performing treatment by irradiation with UV light in an atmosphere containing nitrogen oxides, oxygen or nitrogen,
It is important to maintain a clean atmosphere until the next step of forming a gate electrode.

By performing this treatment, the surface of the active layer can be cleaned, and generation of recombination centers and unnecessary charges due to organic substances existing on the surface of the active layer can be suppressed. In addition, by the action of active nitrogen or oxygen (particularly oxygen), dangling bonds on the surface of the active layer can be neutralized, and the presence of unnecessary levels can be suppressed.

In the above structure, nitrogen oxide, oxygen, or nitrogen may contain ammonia or hydrazine.

Further, two or more kinds of gases selected from nitrogen oxides, oxygen and nitrogen may be used as the atmosphere.

It is very effective to perform the processing disclosed in this specification after the formation of the gate insulating film in combination with the processing performed before the formation of the gate insulating film.

[0033]

A thermal oxide film obtained by oxidizing at a low temperature of 500 to 700 ° C. or a silicon oxide film formed by a CVD method or a PVD method has many dangling bonds of silicon or S
It contains an i-H bond and a Si-OH bond. When such a silicon oxide film is treated at a high temperature of 800 ° C. or more in a dinitrogen monoxide atmosphere, the Si—H bond in the silicon oxide is nitrided or oxidized, and Si≡N or Si ₂ ＮN—O bond, Si -N = O bond or the like. The Si-OH bond changes as well. In particular, this reaction easily proceeds at the interface between silicon oxide and silicon, and as a result, nitrogen is concentrated at the silicon oxide-silicon interface. The amount of nitrogen that is concentrated and added near the interface by such means becomes 10 times or more the average concentration of the silicon oxide film. 0.1 to 10 atomic% in silicon oxide;
Typically, the inclusion of 1 to 5 atomic% of nitrogen is preferable as a gate insulating film.

However, at a low temperature of 750 ° C. or less,
Such a reaction did not proceed. This is because dinitrogen monoxide does not decompose at such a low temperature, and active atoms and molecules that enter the interior of the silicon oxide film cannot be obtained. That is, in the above reaction,
The decomposition reaction of nitrous oxide was rate-limiting. The optimum temperature is the same for other nitrogen oxides such as nitric oxide and nitrogen dioxide.
At 0 to 700 ° C., preferably 450 to 650 ° C., it was impossible to modify the silicon oxide film and the interface between the silicon oxide film and the active layer.

However, if the nitrogen oxide is reactive, it contains active atoms and molecules, so that it enters the silicon oxide film even at a temperature of 700 ° C. or less, Causes the above reaction. The present invention focuses on the fact that the nitrogen oxide which has become reactive can maintain its reactivity for a long time and can be moved spatially under appropriate conditions. That is, the nitrogen oxide which has been rendered reactive by irradiation with ultraviolet light can be guided to a reaction chamber at 400 to 700 ° C. and reacted with the gate insulating film. Also in the present invention, 400-70 for thermal annealing.
Although a temperature of 0 ° C. is necessary, this temperature is not a temperature for decomposing nitrogen oxides but a temperature required for active atoms and molecules to enter the inside of the silicon oxide film.

A similar phenomenon occurs in an atmosphere of hydrogen nitride such as ammonia and hydrazine. For example, when annealing a silicon oxide film deposited by a CVD method or a PVD method at a high temperature of 850 ° C. or more in an ammonia atmosphere,
The dangling bonds, Si—H bonds, and Si—OH bonds of silicon are nitrided and changed to Si に N or the like. This reaction also does not proceed below 650 ° C., but this is due to the decomposition of ammonia,
This is because a high temperature of 850 ° C. or more is required to obtain an active nitrogen atom.

Therefore, if ammonia is previously made reactive, the nitridation reaction proceeds even at a low temperature of 400 to 700 ° C. In the treatment with hydrogen nitride, the Si—H bond and the Si ＝ O bond may be nitrided to form Si—N ＝ H ₂ . This is the case even when it is not reactive. Such a bond is subsequently formed by annealing in a dinitrogen monoxide atmosphere to form an extremely stable Si≡N bond or Si—N ＝ O
Converted to a join.

The reaction to the gate insulating film differs between the case where hydrogen nitride is used and the case where nitrogen oxide is used.
This will be described with reference to FIG. FIG. 7A shows the nitrogen concentration of a silicon oxide film deposited on a crystalline silicon active layer by sputtering, which was analyzed by secondary ion mass spectrometry (SIMS). The quantitative value is effective only in the silicon oxide (gate insulating film) portion and contains 1 × 10 ¹⁸ atoms / cm ³ of nitrogen. A peak is observed in the nitrogen concentration near the interface between the active layer and the gate insulating film. This is due to the effect of the discontinuity of the material (matrix effect), and the nitrogen concentration does not actually increase at the interface. Absent.

This is first annealed for one hour in a nitrogen monoxide atmosphere using the apparatus shown in FIG. At this time, the temperature of both the first and second reaction chambers is set to 600 ° C. When the silicon oxide film subjected to such a process is similarly analyzed by SIMS, the result is as shown in FIG. 7B. As a result of the treatment with nitrous oxide, a peak of nitrogen concentration is observed at the interface as in the case of a, but the maximum value is two orders of magnitude larger than a. This implies that nitrogen is actually accumulated near the interface, although there is of course a contribution from the matrix effect.

As described above, when nitrogen accumulates at the interface to form a silicon oxynitride film, the bonding between atoms becomes stronger,
Even if hot electrons or the like are injected, the possibility of causing defects is reduced. Thus, the properties of the gate insulating film can be improved. Although a sufficient effect can be obtained by this alone, a larger effect can be obtained by performing annealing using hydrogen nitride excited or decomposed by ultraviolet light such as ammonia.

After the above-mentioned annealing of nitrous oxide, again using the apparatus of FIG. Anneal for 1 hour in an ammonia atmosphere. The temperature of the first and second reaction chambers is 600
° C. The silicon oxide film that has been subjected to such processing is formed by SIM
When analyzed by S, the result is as shown in FIG. That is, the nitrogen concentration is increased in the entire gate insulating film, and the concentration is not particularly observed at the interface. As described above, by performing the ammonia treatment, the silicon oxide becomes silicon oxynitride. As a result, the breakdown voltage of the entire film is improved.

The effect is particularly remarkable when the present invention is applied to a silicon oxide film formed by a sputtering method (particularly, a silicon oxide film in which the oxygen concentration in the film is lower than the stoichiometric ratio). That is, if such a film is annealed in a reactive nitrogen oxide atmosphere, insufficient oxygen can be compensated for,
This is because the composition of the silicon oxide film can be made closer to the stoichiometric ratio. Similarly, in annealing in a reactive hydrogen nitride atmosphere, nitrogen enters a position where oxygen should enter, whereby an electrically stable silicon oxynitride film is obtained.

The above shows that the formation of the silicon oxide film by the sputtering method is not disadvantageous. That is,
Conventionally, to form a silicon oxide film by a sputtering method,
In order to make the composition close to the stoichiometric ratio, it could be performed only in an atmosphere with limited conditions. For example, considering a system of a mixed atmosphere of oxygen and argon as an atmosphere, it is necessary to satisfy the condition of oxygen / argon> 1, and it is desirable to perform the treatment in a pure oxygen atmosphere. Therefore, the film formation rate was low and it was not suitable for mass production. Oxygen is a reactive gas, and there is also a problem that a vacuum device, a chamber, and the like are oxidized.

However, according to the present invention, even a silicon oxide film having a composition far from the stoichiometric composition can be converted into a silicon oxide film suitable for use as a gate insulating film by the present invention. Even in an atmosphere system, it can be carried out under more advantageous conditions with respect to the film formation rate, such as oxygen / argon ≦ 1. For example, the film formation rate is extremely high as in a pure argon atmosphere, and a film can be formed under stable conditions.

According to the present invention, a CVD method such as a plasma CVD method and a low pressure CVD method is performed using a silicon source containing carbon such as TEOS.
When applied to a silicon oxide film formed by a method, a special effect can be obtained. These silicon oxide films contain a large amount of carbon. In particular, carbon present near the interface with the silicon film has caused a deterioration in TFT characteristics. When oxidation is advanced by annealing in a reactive nitrogen oxide atmosphere of the present invention, carbon is also oxidized at that time, and is released to the outside as carbon dioxide gas, so that the carbon concentration in the film can be reduced.

This process will be described with reference to FIG. In this example, dinitrogen monoxide is used as the nitrogen oxide. Reactive nitrous oxide contains a large amount of atomic nitrogen and oxygen. These can easily enter the inside of the silicon oxide film. Then, carbon (generally in the form of Si—C bond) existing inside silicon oxide and atomic oxygen combine to form a chemically extremely stable carbon dioxide gas, which is discharged to the outside. On the other hand, silicon which has been bonded to carbon has an unpaired bond, which is nitrided and converted into a Si—N bond or the like.

When the present invention is applied to an active layer made of a crystalline silicon film crystallized by adding an element which promotes crystallization of an amorphous silicon film such as nickel, cobalt, iron, platinum and palladium. Has a special effect. The crystallinity of the silicon film crystallized by adding such a crystallization promoting element was extremely good, and a very high field-effect mobility was obtained. A good thing was desired. The gate insulating film according to the present invention is suitable. Further, by the annealing step of the present invention, an amorphous region remaining at a crystal grain boundary or the like can be crystallized, and the crystallinity can be further improved.

When the present invention is applied to an active layer using a silicon film which has been subjected to laser annealing, the characteristics of the gate insulating film can be improved during the annealing step of the present invention. There is also an effect that the strain on the silicon film generated by the annealing can be reduced at the same time in the annealing step. When a silicon film having extremely high crystallinity such as a mono-domain structure is used, a gate insulating film is required to have the same characteristics as a thermal oxide film. Oxide film, PV
The D oxide film is suitable for that purpose.

[0049]

【Example】

[Embodiment 1] This embodiment is shown in FIG. In this embodiment, an N-channel TFT is formed by using a silicon oxide film formed by a sputtering method as a gate insulating film and performing thermal annealing according to the present invention. First, as a base oxide film 12 on a substrate 11 (Corning 7059, 100 mm × 100 mm), a silicon oxide film
Å3000 °, for example 2000 °. The underlying silicon oxide film 12 is for preventing contamination from the substrate. The silicon oxide film was subjected to thermal annealing at 640 ° C. for 4 hours in an oxygen atmosphere or a dinitrogen monoxide atmosphere to stabilize the surface state.

Next, an amorphous silicon film was formed by plasma CVD at 100 to 1500 °, for example, 500 °.
Thereafter, a small amount of an element promoting crystallization, such as nickel, iron, platinum, palladium, or cobalt, was added to the amorphous silicon film and annealed to obtain a crystalline silicon film 13. In this example, a nickel acetate solution was dropped on the amorphous silicon film and spin-dried to form an extremely thin film of nickel acetate on the amorphous silicon film. Thereafter, nickel was introduced into the amorphous silicon film by performing thermal annealing at 550 ° C. for 4 hours in a nitrogen atmosphere, and was crystallized. After the above steps, laser annealing may be further performed to improve the crystallinity of the obtained crystalline silicon film. (Fig. 2 (A))

Next, the crystalline silicon film 13 was etched to form an island-like silicon film 14. This island-shaped silicon film 1
Reference numeral 4 denotes an active layer of the TFT. The gate insulating film 15 is formed to a thickness of 200 to cover the island-shaped silicon film 14.
A silicon oxide film having a thickness of about 1500 °, for example, 1000 ° was formed by a sputtering method. In this example, a silicon oxide film was formed by sputtering in an oxygen atmosphere using a target made of synthetic quartz. Argon may be used as the sputtering gas. In this embodiment, the pressure of the sputtering gas is 1 Pa and the input power is 35
0 W and the substrate temperature was 200 ° C.

After the formation of the gate insulating film 15, the annealing treatment of the present invention was performed to improve the characteristics of the gate insulating film, particularly the interface between the gate insulating film and the active layer. In this example, the apparatus shown in FIG. 1 was used. Dinitrogen monoxide was used as a gas used for annealing. In this embodiment, the temperature of the first reaction chamber 1 is 500 to 650.
C., and the temperature of the second reaction chamber 5 was preferably 500 ° C. to 650 ° C. In this example, both were set to 550 ° C. The temperature of the piping during that time was also set to 550 ° C.

The pressure in each reaction chamber was preferably 0.5 to 1.1 atm, but a reduced pressure atmosphere was also acceptable. In this embodiment, the pressure is 1 atm. The flow rate of nitrous oxide was set to 5 liter / minute in this embodiment. Further, in this embodiment, the thermal annealing time is set to 0.5 to 6 hours, for example, 1 hour. As the ultraviolet light source in the first reaction chamber 1, a low-pressure mercury lamp having a center wavelength of 246 nm was used. As a result of this treatment, hydrogen in the silicon oxide film and at the interface with the silicon film was nitrided or oxidized to decrease, and conversely, the nitrogen concentration at the interface increased. (FIG. 2 (B))

Thereafter, an aluminum (containing 1 wt% Si or 0.1 to 0.3 wt% Sc) film having a thickness of 3000 to 2 μm, for example, 5000 ° is formed by a sputtering method, and is patterned to form a gate. Electrode 1
6 was formed. Then, the substrate was immersed in an ethylene glycol solution of 1 to 3% tartaric acid adjusted to pH ≒ 7 with ammonia, and anodic oxidation was performed using platinum as a cathode and the aluminum gate electrode 16 as an anode. The anodization was completed by first increasing the voltage to 140 V with a constant current and maintaining the state for 1 hour. Thus, an anodic oxide having a thickness of about 2000 ° was formed. (Fig. 2 (C))

After that, phosphorus was implanted into the island-like silicon film 14 as an impurity in a self-aligned manner using the gate electrode 16 as a mask by an ion doping method. At this time, the dose is 1
× 10 ¹⁴ to 8 × 10 ¹⁵ atoms / cm ² , acceleration voltage is 50 to
90 kV was preferred. In this embodiment, the dose is 1
× 10 ¹⁵ atoms / cm ² , and the acceleration voltage was 80 kV. As a result, the N-type impurity region (source / drain region) 1
7 was formed. (FIG. 2D) Further, the doped impurity region was activated by laser light irradiation. As laser light,
KrF excimer laser (wavelength 248 nm, pulse width 2
0 nsec), and the energy density is 200-40.
0 mJ / cm ² , for example, 250 mJ / cm ² .

Thereafter, a silicon oxide film is formed on the entire surface as an interlayer insulating film 18 by plasma CVD at 3000.degree.
The interlayer insulating film 18 and the gate insulating film 15 were etched to form contact holes in the source / drain regions 17. Further, an aluminum film is formed by sputtering.
The source / drain electrodes 19 and 20 were formed. By the above steps, N
A channel type TFT was manufactured. (FIG. 2 (E))

Since the TFT thus formed has excellent resistance to the gate insulating film, a TFT with little deterioration and excellent characteristics was obtained. For example, if the drain voltage is +
Fixed to 14V, and the gate voltage from -17 to + 17V,
It was varied to evaluate the deterioration of TFT characteristics. In the field-effect mobility μ ₀ obtained by first measuring and the field-effect mobility μ ₁₀ obtained by measuring after the above-described voltage application, 1
If-(μ ₁₀ / μ ₀ ) is defined as the deterioration rate, the deterioration rate of the TFT obtained in this example was 1.3%. For comparison, the thermal annealing process of the gate insulating film of the present invention was performed at 550 ° C./3
In the case where annealing was performed for a long time, the deterioration rate was 52.3% even when the other manufacturing conditions were completely the same.

Embodiment 2 FIG. 3 shows this embodiment. In this embodiment, a silicon oxide film deposited by a plasma CVD method using TEOS and oxygen as a source gas is used as a gate insulating film, and thermal annealing is performed according to the present invention to form a CMOS.
This is an example in which a TFT of the type is formed. First, the substrate 21 (NH
A silicon oxide film was formed as a base oxide film 22 on a technoglass NA35 (100 mm × 100 mm) by a sputtering method to a thickness of 2000 °.

Next, an amorphous silicon film was formed to a thickness of 500 ° by a plasma CVD method. Then, as in the first embodiment,
A nickel acetate film was formed on the amorphous silicon film by spin-drying the nickel acetate solution. Thereafter, in a nitrogen atmosphere, thermal annealing was performed at 550 ° C. for 4 hours to introduce nickel into the amorphous silicon film and crystallize it. Thereafter, in order to further improve the crystallinity, a KrF excimer laser (wavelength 248 n
m) was subjected to laser annealing. The energy density of the laser was suitably from 250 to 350 mJ / cm ² . In this embodiment, it is set to 300 mJ / cm ² . As described above, the crystalline silicon film 23 was obtained.
The crystalline silicon film thus obtained is relatively large (〜１０10 μm □) crystal grains, and several times to 10〜１０
It had a monodomain structure showing the same crystal orientation in several times the range. (FIG. 3 (A))

Next, the crystalline silicon film 23 was etched to form island-like silicon films 24 and 25. These island-shaped silicon films 24 and 25 are to be active layers of the TFT. In the present embodiment, the active layer was formed at random.
In many cases, the T channel formation region had a monodomain structure. Thereafter, a gate insulating film 26 having a thickness of 200 to 15 is formed so as to cover the island-shaped silicon films 24 and 25.
A silicon oxide film of 00 °, for example, 1000 ° was formed. In this example, a silicon oxide film was formed by a plasma CVD method using TEOS and oxygen as source gases.
At this time, as the film forming conditions, the gas pressure was 4 Pa, the input power was 150 W, and the substrate temperature was 350 ° C.

After the formation of the gate insulating film, the annealing treatment of the present invention was performed to improve the characteristics of the gate insulating film, particularly the interface between the gate insulating film and the active layer. In this example, first, the substrate was placed in the thermal annealing apparatus shown in FIG. 1, and first, hydrogen was flowed into the reaction chamber 2 and thermal annealing was performed at 350 ° C. for 2 hours. As a result, unpaired bonds existing in the silicon oxide film could be filled with hydrogen. Next, a mixed gas of nitrous oxide and argon (nitrogen monoxide: argon = 1: 1)
1) was washed away. The temperature of the second reaction chamber was set at 600 ° C.
The pressure in the reaction chamber was 1 atm, and the flow rate of the reaction gas was 8 liter /
And the thermal annealing time was 1 hour.

Through the above steps, hydrogen in the silicon oxide film and at the interface with the silicon film is reduced by nitridation or oxidation. At this time, since TEOS was used as a source gas, the silicon oxide film before thermal annealing contains carbon,
This carbon was also oxidized and released as carbon dioxide and decreased. Thus, a silicon oxide film which was preferable as a gate insulating film could be obtained. (FIG. 3 (B)) Thereafter, the polycrystalline silicon film having a thickness of 6000.degree.
Gate electrodes 27 and 28 were formed by patterning method D and patterning. A small amount of phosphorus was added to the polycrystalline silicon film in order to improve conductivity. (FIG. 3
(C))

Thereafter, impurities were implanted into the island-like silicon films 24 and 25 in a self-aligned manner by using the gate electrodes 27 and 28 as masks by ion doping. First, a region for forming a P-channel type TFT is formed by a photoresist mask 2.
9, phosphorus is implanted, and the N-type impurity region 30 (source /
(Drain region). At this time, the dose amount is 1 × 1
0 ¹⁴ -8 × 10 ¹⁵ atoms / cm ² , acceleration voltage 50-90
kV was preferred. In this embodiment, the dose amount is 5 × 1
0 ¹⁴ atoms / cm ^2, the acceleration voltage was 80 kV. (FIG. 3
(D))

Thereafter, the region for forming the N-channel TFT was covered with a photoresist mask 31 and boron was implanted to form a P-type impurity region 32 (source / drain region). At this time, the dose was preferably 1 × 10 ¹⁴ to 8 × 10 ¹⁵ atoms / cm ² , and the acceleration voltage was preferably 40 to 80 kV. In this embodiment, the dose is 1 × 10 ¹⁵ atoms / c.
m ² and the acceleration voltage were 65 kV. (FIG. 3 (E))

Further, the doped impurity regions 30 and 32 were activated by laser light irradiation. As a laser beam, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) is used, and the energy density is 200 to 400 mJ / cm ² , for example, 25
0 mJ / cm ² . Thereafter, an interlayer insulating film 33 is formed on the entire surface.
5,000 silicon oxide film by plasma CVD
Then, the interlayer insulating film 33 and the gate insulating film 26 were etched to form contact holes in the source / drain regions 30 and 32. Further, an aluminum film was formed to a thickness of 5000 ° by a sputtering method, etching was performed, and source / drain electrodes 34, 35, and 36 were formed, thereby manufacturing a CMOS type TFT. (FIG. 3 (F))

[Embodiment 3] This embodiment is shown in FIG. In this embodiment, a P-channel TFT is formed as a switching transistor (pixel TFT) of an active matrix circuit by using a silicon oxide film formed by an ECR-CVD method and performing thermal annealing according to the present invention. It is. First, a silicon oxide film was formed on a substrate 41 (100 mm × 100 mm) as a base oxide film 42 by a reduced pressure CVD method at 3000 °.

Next, an amorphous silicon film was formed to a thickness of 500 ° by a plasma CVD method. Then, as in the first embodiment,
A film of nickel acetate is formed on the amorphous silicon film by spin-drying the nickel acetate solution, and further crystallized by performing thermal annealing at 550 ° C. for 4 hours in a nitrogen atmosphere. A crystalline silicon film 43 was obtained. Thereafter, laser annealing may be performed to improve the crystallinity. (FIG. 3 (A))

Next, the crystalline silicon film 43 was patterned to form an island-like silicon film 44. This island-shaped silicon film 44 is to be an active layer of the TFT. A gate insulating film having a thickness of 12 is formed so as to cover the island-shaped silicon film.
A silicon oxide film 45 of 00 ° was formed. In this embodiment, a silicon oxide film was formed by ECR-CVD using monosilane (SiH ₄ ) as a source gas and dinitrogen monoxide as an oxidant. At this time, in addition to nitrous oxide, oxygen (O ₂ ), nitric oxide (NO), nitrogen dioxide (NO ₂ ), and the like may be used as the oxidizing agent. As the film forming conditions at this time, the substrate was not heated, and the microwave (frequency: 2.45 MHz) input power was 400 W.

It should be noted that a silicon oxide film having the same characteristics can be obtained by the reduced pressure CVD method using the same source gas and oxidizing agent. In that case, the pressure may be 0.1 to 10 torr and the temperature may be 300 to 500 ° C. After forming the gate insulating film, the annealing treatment of the present invention was performed to improve the characteristics of the gate insulating film. In this embodiment, FIG.
Although the reactor having the structure (A) was used, in the present embodiment, the first reactor was used.
The structure of the reaction chamber 1 shown in FIG. 6A (cross-sectional view) and FIG. 6B (top view) was used. In this apparatus, fine piping as shown in FIG.
An ultraviolet light source 9 was disposed in a reaction gas chamber 8.

In this embodiment, as the thermal annealing atmosphere, dinitrogen monoxide was used first, and then the atmosphere was changed to ammonia. The temperature of the second reactor was 550 ° C. in any atmosphere. First, nitrous oxide passed through the first reaction chamber was flowed at a flow rate of 2 liter / min for 1 hour. After that, the atmosphere was switched to ammonia and
It flowed at a flow rate of liter / min for 1 hour. As a result, the silicon oxide film could be nitrided. (FIG. 4B) Thereafter, an aluminum film having a thickness of 6000 ° was formed by a sputtering method, and this was patterned to form a gate electrode 46. A small amount (0.1 to 0.5% by weight) of scandium was added to the aluminum film to prevent hillocks. (FIG. 4 (C))

After that, boron was implanted as an impurity into the island-like silicon film 44 in a self-aligned manner by using the gate electrode 46 as a mask by an ion doping method. At this time, the dose is 1 × 10 ¹⁴ to 8 × 10 ¹⁵ atoms / cm ² , and the acceleration voltage is 40.
８０80 kV, for example, a dose of 1 × 10 ¹⁵ atoms / cm
^{2. The} acceleration voltage was 65 kV. As a result, a P-type impurity region 47 (source / drain region) was formed. (FIG. 4D) Further, the doped impurity region 47 was activated by laser light irradiation. As a laser beam, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) is used, and the energy density is 200 to
400mJ / cm ^2, for example, it was set to 250mJ / cm ^2.

Thereafter, a silicon oxide film is formed on the entire surface as an interlayer insulating film 48 by plasma CVD at 3000.degree.
The interlayer insulating film 48 and the gate insulating film 45 were etched to form a contact hole in the source region. further,
An aluminum film was formed at a thickness of 5000 ° by a sputtering method, and etching was performed to form a source electrode 49. (FIG. 4E)

After that, a silicon nitride film was formed as a passivation film 50 by plasma CVD at 2000. Then, the passivation film 50 and the interlayer insulating film 4
8. The gate insulating film 45 was etched to form a contact hole in the drain region. Further, an ITO film was formed by a sputtering method, and this was etched to form a pixel electrode 51. Through the above steps, a pixel TFT was manufactured. (FIG. 4 (F))

[Embodiment 4] FIG. 8 shows a manufacturing process of this embodiment. The same reference numerals as those shown in FIG.
The manufacturing method and manufacturing conditions are the same as those described in [Example 1].

This embodiment is characterized in that, after forming the active layer 14, in an atmosphere of dinitrogen monoxide (N ₂₀ ),
Irradiating the surface of the active layer with a low-pressure mercury lamp to remove organic substances present on the surface of the active layer.

First, an underlying silicon oxide film 12 was formed on a glass substrate 11, and a crystalline silicon film 13 was further formed.
(FIG. 8A)

Then, the crystalline silicon film 13 was patterned to form an active layer 14 of the thin film transistor. Then, the surface of the active layer was irradiated with ultraviolet light from a low-pressure mercury lamp in a dinitrogen monoxide atmosphere using the apparatus shown in FIG. The heating temperature at this time was 550 ° C. (FIG. 8 (B))

Next, a gate insulating film 15 was formed, and a gate electrode 16 and an anodic oxide around the gate electrode 16 were formed.

The gate insulating film is formed by first forming an oxide film by a thermal oxidation method at a temperature of 650 ° C. or less (preferably a temperature below the strain point of a glass substrate), and then oxidizing by a CVD method or a sputtering method. More preferably, the formation is performed by forming a silicon film. In the subsequent steps, the thin film transistor shown in (E) was completed in the same manner as in [Example 1].

[Embodiment 5] FIG. 9 shows the state shown in FIG.
3 shows the result of measuring the MOS characteristics in the state shown in FIG. With the MOS characteristics, the influence of the gate insulating film 15 on the characteristics of the thin film transistor can be evaluated.

In the graph shown in FIG. 9, V _fb is
Is defined as a voltage value at which a standardized C (capacitance) value is 0.8. This Vfb corresponds to a generally called flat band voltage.
The flat band voltage is defined as a voltage required to cancel the effects of the work function difference between the active layer (channel forming region) and the gate insulating film, and the fixed charge in the active layer (channel forming region) and the gate insulating film. Is done.

It can be said that the above-mentioned V _fb also indicates the effects of fixed charges, movable charges, and interface states at the interface between the active layer and the gate insulating film.

This V _fb is obtained by measuring the CV characteristic
Preferably, no hysteresis occurs. That is, FIG.
It is desirable that ΔV _fb shown in (1) is as close to 0 as possible.
It is desirable that V _fb be a value close to 0V.

When no processing is performed as shown in No. 5 in FIG. 9, the absolute value of Vfb is large. This indicates that the state of the interface between the active layer and the gate insulating film is poor. That is, it indicates that unnecessary charges are present at the interface between the active layer and the gate insulating film.

Further, it can be understood that the state of the interface is still poor by simply performing the treatment in a heated dinitrogen monoxide atmosphere as shown in No. 1. On the other hand, No
It can be seen that simultaneous irradiation with ultraviolet light in a heated nitrous oxide atmosphere as shown in FIG. 2 can dramatically improve the state of the interface. As is clear from the case of the conditions of No. 3 and No. 4, it can be seen that the same effect can be obtained even when dinitrogen monoxide is changed to nitrogen or oxygen.

From the above, in one kind of heated atmosphere selected from nitrous oxide, nitrogen and oxygen,
It is concluded that the interface characteristics between the active layer and the gate insulating film can be significantly improved by performing the treatment while irradiating the ultraviolet light on the surface of the active layer.

If this conclusion is further extended, the following can be said. That is, in one or more kinds of heated atmospheres selected from nitrous oxide, nitrogen, and oxygen, by performing a process on the surface of the active layer while irradiating ultraviolet light,
It is possible to suppress the presence of fixed charges and mobile charges existing on or possibly existing on the surface of the active layer, and the presence of trap levels.

This effect can be obtained as an effect of improving the interface characteristics at the interface between the surface of the active layer and the gate insulating film when the gate insulating film is formed on the surface of the active layer.

[0089]

As described above, according to the present invention, the TFT
The characteristics have been greatly improved. That is, the recombination center could be reduced at the interface between the gate insulating film and the active layer, and as a result, the S value and the field effect mobility were improved. In addition, the withstand voltage of the gate insulating film itself can be improved, and TDDB (Time Dependence Dieledtric breakdo
wn) could also be improved. As described above, as a result of improving the characteristics of the interface with the gate insulating film, in particular, since there are few defects in which electrons are trapped in the gate insulating film due to injection of hot electrons, deterioration caused by hot electrons (Hot Carrier Degradation) is reduced, and the reliability is improved.

According to the present invention, the maximum processing temperature for the device can be set to 700 ° C. or less, preferably 650 ° C. or less, and the industrial benefit thereby is remarkable.
Although the embodiments have been described mainly on TFTs on a glass substrate, it is apparent that excellent effects can be obtained by applying the present invention to a multilayer integrated circuit (also referred to as a three-dimensional integrated circuit or a three-dimensional integrated circuit). is there. Thus, the present invention is an industrially useful invention.

[Brief description of the drawings]

FIG. 1 shows a conceptual diagram of an apparatus for carrying out the present invention.

FIG. 2 illustrates a manufacturing process of a thin film transistor.

FIG. 3 illustrates a manufacturing process of a thin film transistor.

FIG. 4 illustrates a manufacturing process of a thin film transistor.

FIG. 5 illustrates a manufacturing process of a thin film transistor.

FIG. 6 shows a conceptual diagram of an apparatus for carrying out the present invention.

FIG. 7 shows a nitrogen concentration in a silicon oxide film subjected to a treatment according to the present invention.

FIG. 8 illustrates a manufacturing process of a thin film transistor.

FIG. 9 shows MOS characteristics.

FIG. 10 shows CV characteristics.

[Explanation of symbols]

 1 First reaction chamber 2 Second reaction chamber 3 Heater of second reaction chamber 4 Susceptor 5 Substrate 6 Piping 7. UV light source (low-pressure mercury lamp)

────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-6-124889 (JP, A) JP-A-6-124890 (JP, A) JP-A-7-94756 (JP, A) JP-A-6-124756 181178 (JP, A) JP-A-5-343336 (JP, A) JP-A-3-93273 (JP, A) JP-A-6-140392 (JP, A) JP-A-5-218405 (JP, A) European Patent Application Publication 612102 (EP, A1) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 29/786 H01L 21/336 H01L 21/316

Claims (15)

(57) [Claims] A gate insulation is provided on an active layer made of crystalline silicon.
A silicon oxide film is formed as a film, and the silicon oxide film is not excited by ultraviolet light.
Or 400 atmosphere in an atmosphere containing decomposed hydrogen nitride.
Annealing at ~ 700 ° C, and after the annealing,
A method for manufacturing a semiconductor device, comprising performing an annealing treatment at 400 to 700 ° C. in an atmosphere containing nitrogen oxides excited or decomposed by ultraviolet light. 2. An active layer made of crystalline silicon is provided with nitrogen.
UV in atmospheres containing oxides or oxygen or nitrogen
Irradiating light, after irradiating the ultraviolet light, a gate insulating film on the active layer
To form a silicon oxide film, and the silicon oxide film remains excited by ultraviolet light.
Or 400 atmosphere in an atmosphere containing decomposed hydrogen nitride.
Annealing at ~ 700 ° C, and after the annealing,
Nitrogen oxides excited or decomposed by ultraviolet light
In an atmosphere containing 400 to 700 ° C.
A method for manufacturing a semiconductor device. 3. The method according to claim 2, wherein the temperature is 400 to 700 ° C.
Irradiating the active layer with ultraviolet light while heating the semiconductor device. 4. A any one of claims 1 to 3, a pre-Symbol active layer by thermal oxidation, a method for manufacturing a semiconductor device according to claim <br/> Rukoto to form the silicon oxide film. 5. The method for manufacturing a semiconductor device according to claim 4 , wherein the temperature of the thermal oxidation is 500 to 700 ° C. 6. A any one of claims 1 to 3, the silicon oxide film by C VD method or PVD method
A method for manufacturing a semiconductor device, which is formed . Te 7. any one smell of claims 1 to 3 <br/>, in a mixed atmosphere of oxygen and argon, a semiconductor device which is characterized that you form the silicon oxide film by sputtering Production method. Te 8. any one smell of claims 1 to 3 <br/>, using Te tiger ethoxy-silane (TEOS) as a raw material, characterized that you form the silicon oxide film by CVD Of manufacturing a semiconductor device. Te 9. any one smell of claims 1 to 3 <br/>, the motor aminosilane material gas, the oxygen or nitrogen oxides C VD method using the oxidizing agent, the silicon oxide film form
The method for manufacturing a semiconductor device according to claim Rukoto forming. 10. The method according to claim 1, wherein:
Te, an amorphous silicon film is formed by adding nickel to the amorphous silicon film, an amorphous silicon film in which the nickel is added and crystallized,
A method for manufacturing a semiconductor device, comprising forming crystalline silicon to be the active layer . 11. The method for manufacturing a semiconductor device according to claim 10 , wherein the active layer is made of crystalline silicon having substantially one crystal orientation. 12. The method according to claim 1, wherein
And the hydrogen nitride is ammonia (NH ₃ ) or hydride.
A method for manufacturing a semiconductor device, which is azine (N ₂ H ₄ ) . 13. The method according to claim 1, wherein
And the hydrogen nitride has the general formula NH _x (1.5 ≦ x ≦ 3)
A method for manufacturing a semiconductor device, which is a compound represented by the formula: 14. The method according to claim 1, wherein
And the nitrogen oxides are dinitrogen monoxide (N ₂ O),
A method for manufacturing a semiconductor device, characterized by being nitrogen oxide (NO) or nitrogen dioxide (NO ₂ ) . 15. The method according to claim 1, wherein
The nitrogen oxide has a general formula NO _x (0.5 ≦ x ≦
A method for manufacturing a semiconductor device, which is a compound represented by (2.5) .