JP2652267B2 - Insulated gate type semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an absolute gate type semiconductor device used for a driving element of an active matrix type liquid crystal display device or the like.

[Conventional technology]

Conventionally, a silicon oxide film formed by a sputtering method using Ar atoms as a sputtering gas has been used as a gate insulating film of an insulating gate type semiconductor device used as a thin film transistor.

[Problems of the prior art]

In the conventional method, a large number of atoms (such as Ar) contained in the used material and present during the reaction are taken into the gate insulating film and cause generation of fixed charges in the film. Was. Furthermore, ionic species of atoms present during the reaction collide with the active layer surface of the thin film transistor and cause damage, resulting in the formation of a mixed layer of the active layer and the gate insulating film near the interface between the gate insulating film and the active layer. As a result, an interface state was formed, and good characteristics of the thin film transistor could not be obtained in any case.

"Object of the present invention" It is an object of the present invention to invent a configuration that solves the problem of the interface characteristics which is a problem of the conventional insulating film.

“Constitution of the Invention” The present invention relates to an insulated gate semiconductor device on an insulating substrate, which is in contact with a non-single-crystal semiconductor layer forming a source, a drain, and a channel region and the channel region via a gate insulating film. A gate electrode, and an impurity blocking film provided between the insulating substrate and the non-single-crystal semiconductor layer, wherein the impurity blocking film contains a halogen element. is there.

An insulated gate semiconductor device on an insulating substrate, comprising: a non-single-crystal semiconductor layer forming source, drain, and channel regions; a gate electrode in contact with the channel region via a gate insulating film; An insulated gate semiconductor device having an impurity blocking film provided between a substrate and the non-single-crystal semiconductor layer, wherein the gate insulating film and the impurity blocking film contain a halogen element. .

A glass substrate is typically used as the insulating substrate.

Conventionally, there is an example in which a semiconductor layer is directly formed on a glass substrate which is an insulating substrate. However, there are problems such as diffusion of impurities (especially sodium) from the glass substrate and poor interface characteristics between the glass substrate and the semiconductor layer. When a silicon oxide film is provided over a glass substrate to prevent the occurrence of a semiconductor device, a device having high reliability can be obtained.

By mixing a halogen element into at least one of the silicon oxide film on the insulating substrate and the gate insulating film of the insulated gate field effect transistor provided on the silicon oxide film, the distance between the semiconductor layer and the silicon oxide film is reduced. It is possible to obtain a configuration in which almost no localized levels exist at the interface.

Sputtering, photo-CVD
Method, PCVD method, thermal CVD method and the like can be used.

Example 1 In this example, a semiconductor film is formed by a sputtering method on a substrate in an atmosphere of hydrogen or an inert gas containing hydrogen, and fluoride is formed before and after the formation of the semiconductor film obtained by the sputtering method. A silicon oxide film is formed by a sputtering method in an atmosphere of an inert gas containing a gas and an oxide gas or a fluoride gas and an oxide gas, and a part of the semiconductor film is formed as a channel formation region of an insulating gate semiconductor device. Part of the silicon oxide film is a gate insulating film.

As an example of a technique for forming a part of the semiconductor film as a channel formation region, an amorphous semiconductor (amorphous or extremely close to that state) obtained by sputtering in hydrogen or an inert gas atmosphere containing hydrogen. The film (hereinafter referred to as a-Si) is heated at 450 ° C to 700 ° C, typically 600 ° C.
By applying the above temperature to the semiconductor film to crystallize at least the channel formation region, the insulated gate semiconductor device of the present invention can be obtained.

The semiconductor film after this crystallization has an average crystal grain size of 5 to 40.
It is about 0 ° and the hydrogen content in the semiconductor film is 5 atomic% or less. In addition, the semiconductor film having this crystallinity has lattice distortion, and the interfaces of the crystal grains are in close contact with each other microscopically, and have an effect of eliminating a barrier for carriers at the crystal grain boundaries. Therefore, impurity atoms such as oxygen segregate at a polycrystalline grain boundary having no lattice distortion to form a barrier and hinder the movement of carriers.
Since barriers are not formed or have negligible existence when they have lattice distortion as in the present invention, their electron mobility also has very good characteristics of 5 to 300 cm ² / VS. Had.

In addition, the semiconductor film obtained by the plasma CVD method has a large proportion of an amorphous component, and the amorphous component is naturally oxidized to form an oxide film to the inside. On the other hand, the sputtered film is dense, and the natural oxidation is a semiconductor film. Does not proceed to the inside of the surface, and is oxidized only in the vicinity of the surface,
Due to the denseness, crystal grains having lattice distortion are strongly pressed against each other, and there is a feature that an energy barrier for carriers is not formed near the crystal grain interface.

FIG. 1 shows a manufacturing process of the thin film transistor manufactured in this embodiment.

First, an SiO ₂ film (12) was formed on a glass substrate (11) to a thickness of 200 nm by magnetron RF sputtering under the following conditions.

Reactive gas O ₂ 95% by volume NF ₃ 5% by volume Deposition temperature 150 ° C RF (13.56MHz) output 400W Pressure 0.5Pa Silicon is used as a target, and a-Si which becomes a channel formation area on it by magnetron RF sputtering equipment The film (13) was formed to a thickness of 100 nm to obtain the shape shown in FIG.

The deposition conditions were as follows: H ₂ / (H ₂ + Ar) = 80% (partial pressure ratio) under an atmosphere of argon and hydrogen, which are inert gases, deposition temperature 150 ° C RF (13.56 MHz) output 400W total pressure 0.5Pa, The target used was a single crystal silicon target.

After this, a temperature range of 450 ° C to 700 ° C, especially at a temperature of 600 ° C,
A-Si film (13) in a hydrogen or inert gas atmosphere for 0 hour, in this embodiment in a 100% nitrogen atmosphere
Was thermally crystallized to produce a silicon semiconductor layer having high crystallinity. When the a-Si film serving as the channel formation region (13) is formed by a sputtering method, a non-single-crystal silicon target is used. A crystalline state is obtained.

The amount of oxygen impurities present in the semiconductor film formed by such a method is 2 × 10 ²⁰ cm ⁻³ and carbon is 5 × 10 ¹⁸ cm ⁻³ by SIMS analysis, and the content of hydrogen is 5% or less. Met. Since the value of the impurity concentration using the SIMS changes in the depth direction in the semiconductor film, the concentration in the depth direction was examined and described with the minimum value. This is because a natural oxide film exists near the surface of the semiconductor film. Further, the value of the impurity concentration did not change even after the crystallization treatment.

Obviously, the lower the impurity concentration, the more advantageous it is when used as a semiconductor device, but the semiconductor film of the present invention has both crystallinity and lattice distortion. Therefore, no barrier was formed at the crystal grain boundary, and even if an oxygen impurity concentration of about 2 × 10 ²⁰ cm ⁻³ was present, the degree of hindering the movement of carriers was low, and no practical problem occurred.

As can be seen from the laser Raman analysis data shown in FIG. 9, the peak position indicating the presence of crystals in this semiconductor film is lower on the lower wavenumber side than the position of the peak (520 cm ⁻¹ ) of normal single crystal silicon. It had shifted, confirming the existence of lattice distortion.

Further, in the present embodiment, the present invention is described using a silicon semiconductor. However, it is also possible to use a germanium semiconductor or a semiconductor in which silicon and germanium are mixed. In this case, the temperature to be added could be reduced by about 100 ° C.

In the case of sputtering in the hydrogen atmosphere or an atmosphere of hydrogen and an inert gas to form a more dense semiconductor film or a silicon oxide film, the substrate or a target particle in flight of 1000 nm or less during sputtering. Intense light or laser irradiation may be applied continuously or in pulses.

The thermally crystallized silicon semiconductor film was subjected to device isolation patterning to obtain the shape shown in FIG. 1A, and a part of the semiconductor film was formed as a channel formation region of an insulated gate semiconductor device.

Next, a silicon oxide film (SiO ₂ ) (15) was formed to a thickness of 100 nm by magnetron RF sputtering under the following conditions.

Oxygen 95% by volume NF ₃ 5% by volume Pressure 0.5pa Film formation temperature 100 ° C RF (13.56MHz) output 400W A silicon target or a synthetic quartz target was used as a target.

Also in this case, when the input power for the amorphous silicon target is reduced, a silicon oxide film in which dense fixed charges are unlikely to be present can be obtained.

In the case where a silicon oxide film such as a gate insulating film is formed by a sputtering method in the structure of the present invention, a gas containing a halogen element, an oxide gas, and an inert gas are not more than 50%.
Preferably, the film is formed under a condition in which an inert gas is not used.

In addition, the gas containing a halogen element is 2 to 2 with respect to the oxide gas.
By simultaneously mixing 20% by volume, it is possible to neutralize alkali ions and silicon dangling bonds that are unintentionally simultaneously introduced into silicide.

As a sputtering method used to obtain the configuration of the present invention, any method such as RF sputtering and DC sputtering can be used, but when the sputtering target is an oxide having poor conductivity, for example, SiO ₂ or the like, a stable discharge is maintained. Therefore, it is preferable to use the RF magnetron sputtering method.

As the oxide gas, oxygen, ozone, nitrous oxide, and the like can be given. In particular, when ozone or oxygen is used, there is no unnecessary atom to be incorporated into the silicon oxide film; An insulating film, for example, a gate insulating film was obtained.

As the gas containing a halogen element, fluoride gas (NF ₃ , N ₂ F ₄ ), hydrogen fluoride (HF), fluorine (F ₂ ), or Freon gas can be used as the fluoride gas. NF ₃ which is easily decomposed chemically and easy to handle is easy to use. As the chloride gas, carbon tetrachloride (CCl ₄ ), chlorine (Cl ₂ ), hydrogen chloride (HCl), or the like can be used. The amount of these nitrogen fluorides is, for example, 2 to 20% by volume based on the oxide gas such as oxygen. Neutralization of these halogen element is an alkali ion such as sodium in the silicon oxide by heat treatment, if it is effective in neutralizing the unpaired bonds of silicon is too large amount at the same time, SiF ₄
It is not good because the possibility of using silicon as the main component is a gas. Generally, 0.1 to 5% by volume of a halogen element with respect to silicon was mixed into the film.

The use of ozone as a gas for sputtering has a tendency that ozone is easily decomposed into O radicals, generates a large amount of O radicals per unit area, and contributes to an improvement in film formation rate.

In the production of a gate insulating film by a conventional sputtering method, Ar, which is an inert gas, is larger than oxygen gas, and oxygen is usually produced at about 0 to 10% by volume. That is, in the conventional sputtering method, it is naturally considered that Ar hits the target material and the resulting particles of the target are deposited on the surface on which the target is formed. This is the probability that an inert gas such as Ar will strike the target material (sputtering field)
Was high. The present inventors have conducted intensive studies on the characteristics of the gate insulating film produced by the sputtering method, and found that the interface state between the active layer and the gate insulating film, which indicates the performance of the gate insulating film, and the fixed charge in the gate insulating film. It has been found that the deviation of the flat band voltage from the ideal value, which reflects the number, greatly depends on the ratio of Ar gas during sputtering.

The flat band voltage is a voltage required to cancel the effect of fixed charges in the insulating film, and the lower the flat band voltage, the better the characteristics as an insulating film.

In FIG. 2, a silicon oxide film (15) is formed on the polycrystalline silicon semiconductor (13) manufactured in this embodiment by the method shown in this embodiment (the state of FIG. 1 (a)). Electron Beam Deposition of 1mmφ Aluminum Electrode on Flat Band Voltage and Volume% of (Ar Gas / Oxidizing Gas)
The relationship is shown below.

Compared to Ar gas 100%, the amount of Ar gas is
It can be seen that the deviation of the flat band voltage is reduced when the amount is less than 50% or less than the amount of oxygen in the figure.

The deviation of the flat band voltage from the ideal voltage largely depends on the ratio of the Ar gas, and when the ratio of the Ar gas is 20% or less, the value is almost close to the ideal voltage.

From these facts, activated Ar atoms present in the reaction atmosphere at the time of film formation by sputtering affect the film quality of the gate insulating film, and it is possible to perform sputtering film formation by reducing the presence of Ar atoms as much as possible. It turned out to be desirable.

It is considered that the reason is that Ar ions or activated Ar atoms collide with the interface and form damage or defects at the interface, causing fixed charge generation.

FIG. 3 shows a silicon oxide film (15) in which a halogen element is mixed on the polycrystalline silicon semiconductor (13) manufactured in this embodiment.
(State of Fig. 1 (a)) On the aluminum electrode (1mm
The characteristics for the sample annealed at 300 ° C after forming φ) are shown.

FIG. 3 shows that a BT (bias-temperature) treatment is performed and a negative bias voltage is applied to the gate electrode side at 2 × 10 ⁶ V / cm at 150 ° C.
A positive bias voltage is further applied under the same conditions for 30 minutes. In this state, the difference between them, that is, the measured value of the deviation of the flat band voltage (ΔF _FB ) and the silicon oxide film (15 ) Volume% of (oxygen / NF ₃ ) in the atmosphere when producing by sputtering method
6 is a graph showing a relationship with the graph.

As is clear from FIG. _3, when the silicon oxide film was formed by a magnetron type RF sputtering method in an atmosphere where NF ₃ was 0% by volume, (ΔF _FB ) was as high as 9V.

However, even if a small amount of fluorine as a halogen element was added during the film formation, the value sharply decreased.

This is because, when a positive ion such as sodium is mixed during the film formation, the addition of fluorine results in Na ⁺ + F ⁻ → NaF Si ⁻ + F ⁻ → Si−F, which is electrically neutralized. Presumed.

Since the positive ions of sodium also diffuse from the glass substrate, it is effective to provide a silicon oxide film containing fluorine atoms on the glass substrate.

Regarding the neutralization of fluorine, a method of adding hydrogen is also known. However, the hydrogen and the neutralized Si—H bond are re-separated by a strong electric field (BT treatment), and become a dangling bond of Si again, causing an interface state to be established. preferable.

In addition, Si-H bonds are always present in the silicon oxide film, and when the Si-H bonds are separated again, fluorine atoms are positively neutralized to separate the hydrogen to prevent the formation of interface states. There is also an effect. Further, the presence of fluorine causes H bonded to Si to form a hydrogen bond with fluorine, preventing Si from becoming a fixed charge.

FIG. 4 shows the breakdown voltage when the fluoride gas is further increased. The withstand voltage was a voltage when the leak current exceeded 1 μÅ using an Al electrode of 1 mmφ.

Since there is variation among samples, the values are shown as X and σ (dispersion sigma value) in the figure. This withstand voltage becomes lower when it exceeds 20%, and the σ value also becomes larger. For this reason, the addition of the halogen element is set to 20% by volume or less, and generally, it is better to set it to 0.2 to 10%. By the way, when the amount of fluorine was examined by SIMS (Secondary Ion Mass Spectrometer), it was found to be 1-2 × 10 ²⁰ cm ⁻³ when 1% by volume was added to oxygen at the time of film formation. That is, it was found that the element is extremely easy to be taken into the film when added simultaneously during the film formation by sputtering. However, when the content is too large (20% by volume or more), the silicon oxide film tends to be distorted, and as a result, the withstand voltage is poor and the variation is increased.

Further, it is preferable that all materials used for sputtering have high purity. For example, the sputtering target is 4N
The above-described synthetic quartz or silicon having a purity high enough to be used for an LSI substrate is most preferable. Similarly, the glass used for sputtering should be of high purity (5N or more).
The contamination of impurities into the silicon oxide film was minimized.

Note that a silicon oxide film, which is a gate insulating film formed by a sputtering method in an oxygen atmosphere containing a fluoride gas as in this example, was irradiated with excimer laser light, flash-annealed, and incorporated into the film. It is effective to activate a halogen element such as fluorine to neutralize it with an incomplete bond of silicon and remove the cause of generation of fixed charges in the film.

At this time, the activation of the halogen element and the activation of the semiconductor layer under the gate insulating film can be simultaneously performed by appropriately selecting the power and the number of shots of the excimer laser.

In this embodiment, a semiconductor layer mixed with phosphorus as an impurity for imparting one conductivity type is formed on the silicon oxide film (15) by a CVD method, and a predetermined mask pattern is used.
A photolithography process was performed, and the doped semiconductor film was formed as a gate electrode (20) to obtain the shape shown in FIG. 1 (c).

As a method for forming the semiconductor layer into which the impurity imparting one conductivity type is mixed, a film formation method such as a sputtering method or a CVD method can be used.

The gate electrode is not limited to the doped semiconductor layer, and other materials can be used. Next, impurity regions (14) and (14 ') are formed in a self-aligned manner by ion implantation using the gate electrode (20) or a mask used for etching the gate electrode (20) as a mask. .

Thus, the semiconductor layer (17) below the gate electrode (20) was formed as a channel region of the insulated gate type semiconductor device.

Next, after forming an interlayer insulating film (18) covering all of these upper surfaces, holes for contacting source and drain electrodes are made, metal aluminum is formed on the upper surfaces by sputtering, and predetermined patterning is performed. The source and drain electrodes (16) and (16 ') were formed to complete an insulated gate semiconductor device.

In the case of this embodiment, the semiconductor layer (17) forming the channel region and the semiconductor layer forming the source (14) and the drain (14 ') are made of the same material, so that the process can be simplified. In addition, since the same semiconductor layer is used, the source and drain semiconductor layers also have crystallinity and have high carrier mobility, so that an insulated gate semiconductor device having higher electric characteristics can be realized.

Finally, hydrogen thermal annealing was performed at a temperature of 375 ° C. for 30 minutes in an atmosphere of 100% hydrogen to complete the present example.

This hydrogen thermal annealing is for reducing the grain boundary potential in the polycrystalline silicon semiconductor and improving the device characteristics.

In addition, the thin film transistor 1 manufactured in this embodiment
The size of the channel part (17) in FIG.
Is the size of

The above is the method for manufacturing a thin film transistor using the polycrystalline silicon semiconductor layer manufactured in this embodiment. The a-Si semiconductor layer (in FIG. 1A) in an atmosphere to which hydrogen is added in this embodiment is described. 13)) formation and its thermal recrystallization are described.

Hereinafter, the channel formation region, a-
Five examples of the reference example in which the concentration of hydrogen, which is the condition for forming the Si layer (13) by the magnetron type RF sputtering method, is shown below.

Reference Example 2 In this reference example, the partial pressure ratio of the atmosphere at the time of sputtering at the time of producing (13) in FIG. 1A to be a channel formation region in the production method of Example 1 was H ₂ / (H ₂ + Ar) = 0% (partial pressure ratio), and the other method was the same as in Example 1.

(Reference Example 3) This Example is the partial pressure ratio of the atmosphere during sputtering of making the first view a channel formation region in the fabrication method in the Embodiment 1 of _{(a) (13) H 2} / (H 2 + Ar) = 5% (partial pressure ratio), and the others were produced in the same manner as in Example 1.

(Reference Example 4) This example a partial pressure ratio of the atmosphere during sputtering of making the (13) of the first view a channel formation region in the fabrication method in the Embodiment _{1 (a) H 2 / (} H 2 + Ar) = 20% (partial pressure ratio), and the other method was the same as in Example 1.

(Reference Example 5) This reference example a partial pressure ratio of the atmosphere during sputtering of making the first view a channel formation region in the fabrication method in the Embodiment 1 of _{(a) (13) H 2} / (H 2 + Ar) = 30% (partial pressure ratio), and the others were produced in the same manner as in Example 1.

(Reference Example 6) In this embodiment, the partial pressure ratio of the atmosphere at the time of sputtering at the time of producing (13) in FIG. 1A to be a channel formation region in the production method of Example 1 is H ₂ / (H ₂ + Ar) = 50% (partial pressure ratio), and the others were produced in the same manner as in Example 1.

 The results of comparison of the electrical characteristics of the above examples are shown below.

FIG. 5 shows the completed channel section of the first to sixth examples (FIG.
The carrier mobility μ (FIELD MO) in (17) of FIG.
BILITY) and the hydrogen partial pressure ratio ratio during sputtering (P _H / P _TOTA
= Is a graph of the relationship between the _{H 2 / (H 2 + Ar} )).

The correspondence between the plot points in FIG. 5 and each of the above examples is shown in Table 1 below.

According to FIG. 5, it can be seen that a remarkably high mobility μ (FIELD MOBILITY) is obtained at a hydrogen partial pressure of 20% or more.

FIG. 6 is a graph showing the relationship between the threshold voltage and the hydrogen partial pressure ratio during sputtering (P _H / P _TOTAL = H ₂ / (H ₂ + Ar)) as a curve A.

Curve B is a graph curve corresponding to curve A of a comparative example in which a gate oxide film in which fluorine atoms are not mixed in the present embodiment is used for comparison with the configuration of the present invention.

The correspondence between the hydrogen partial pressure ratio (P _H / P _TOTAL = H ₂ / (H ₂ + Ar)) and the respective example numbers is the same as in Table 1.

As shown in FIG. 6, when a gate oxide film in which fluorine atoms are mixed according to the present invention is employed, a lower threshold voltage (threshold voltage) is obtained compared to an insulated gate field effect transistor employing a conventional gate oxide film. It turns out that it can obtain.

Considering that the lower the threshold voltage, the lower the operating voltage for operating the thin film transistor, that is, the lower the gate voltage, the better characteristics as a device can be obtained. The result of FIG. 6 shows that the partial pressure ratio of hydrogen is higher. By the sputtering method under the conditions, a normally-off state with a threshold voltage of 2 V or less can be obtained.

That is, an a-Si film shown in (13) of FIG. 1A to be a channel forming region is obtained, and a semiconductor layer having crystallinity obtained by thermally crystallizing the a-Si film is used. It can be seen that the device exhibited good electrical characteristics.

FIG. 3 shows that the higher the hydrogen partial pressure ratio, the lower the threshold voltage. From this, it can be seen that, when the a-Si film serving as the channel formation region in each of the above examples is manufactured by the sputtering method, the electrical characteristics of the device tend to increase as the hydrogen partial pressure ratio increases.

FIGS. 7 to 11 show that the hydrogen partial pressure ratio = H ₂ / (H ₂ + Ar) when the a-Si film of (13) in FIG. %, 5%, 20
5 is a graph showing a change in a value of a drain current when a drain voltage and a gate voltage are used as parameters in the cases of%, 30%, and 50%.

Table 2 shows the relationship between the numbers in the drawings, the hydrogen partial pressure, and the numbers in the above examples.

(71), (72), and (73) in FIG. 7 show the relationship between the drain current (ID) and the drain voltage (VD) when the gate voltage is 20, 25, and 30 volts, respectively. It is a curve.

The following Table 3 shows the relationship between the notation of the curve in FIG. 7 and the gate voltage.

The correspondence between the display symbols of the curves showing the relationship between the gate voltage, the drain current and the drain voltage in FIGS. 8 to 11 can be obtained by converting the second digit of the display symbol in the above Table 3 into the number of the drawing. Can be obtained.

For example, the curve (83) in FIG. 8 corresponds to the display symbol (73) in Table 3 above. In this case, FIG.
It can be seen from the table that this corresponds to Reference Example 3.

The remarkable effect in this embodiment becomes clear by comparing FIG. 8 and FIG.

That is, a curve (83) showing the relationship between the drain voltage and the drain current at a gate voltage of 30 volts in FIG.
9 is compared with a curve (93) showing the relationship between the drain voltage and the drain current at a gate voltage of 30 volts in FIG. 9, that is, FIG. 9, that is, Reference Example 4 (see Table 2) shows that FIG.
It can be seen that the drain current is 10 times or more that in the case of the reference example 3 (see Table 2).

Considering the difference between Reference Example 3 and Reference Example 4, this indicates that the partial pressure ratio of hydrogen added during sputtering in forming an a-Si film ((13) in FIG. From 5% to 20%, it can be seen that the electrical characteristics of the completed thin film transistor are significantly improved.

This can be confirmed by the following measurement results.

FIG. 12 is a partial pressure ratio of hydrogen during sputtering when producing an a-Si film ((13) in FIG. 1 (a)) to be a channel forming region in Examples 2, 3, 4, and 5 of the present invention. 0%, 5
5 shows the Raman spectrum of a crystalline silicon semiconductor layer obtained by thermally crystallizing this a-Si film when%, 20%, and 50% are set. Table 4 shows the relationship between the symbols shown in FIG. 12, the example numbers, and the hydrogen partial pressure ratio during sputtering.

In FIG. 12, the curve (123) is compared with the curve (122),
That is, the channel formation region ((17) in FIG. 1 (d))
When the partial pressure ratio of hydrogen at the time of sputtering at the time of producing the a-Si semiconductor layer is 5% and 20%, the partial pressure ratio of hydrogen at the time of sputtering when thermal crystallization is 20% It can be seen that the Raman spectrum in this case remarkably shows the crystallinity of the semiconductor silicon.

The average crystal grain size is 5 to 400 °, typically 50 to 300 °, from the half width. And the position of the peak of the Raman spectrum is the position of the peak of single crystal silicon 520c.
It was shifted to a lower wave number side than m ⁻¹ and clearly had lattice distortion.

This clearly shows the features of the present invention. In other words, the effect of producing an a-Si film by a sputtering method to which hydrogen is added appears only when the a-Si film is thermally crystallized.

As described above, when the crystal strain is present, each of the fine crystal grains is in a state of being forcibly shrunk to each other. And there is no energy barrier for the impurities, and segregation of impurities such as oxygen hardly occurs. As a result, it is possible to realize high carrier mobility.

As a result, even if the impurity concentration existing in the semiconductor film is about 2 × 10 ²⁰ cm ⁻³ , it does not form a barrier for carriers and is used as a channel region of an insulating gate type semiconductor device. You can do it. However, this impurity concentration has never been lower.

Referring to Table 2 and comparing FIGS. 9, 10, and 11, the drain current increases as the ratio of the partial pressure of hydrogen during sputtering when the a-Si film is formed increases. You can see that it is getting bigger. This is clear from the comparison of the curves in FIG. 9 (93), FIG. 10 (103), and FIG. 11 (113).

In general, when the drain voltage VD is low in a thin film transistor that is a field effect transistor, the relationship between the drain current ID and the drain voltage VD is represented by the following equation.

ID = (W / L) μC (VG-VT) VD (a) (Solid. State electronics. Vol.24.No.11.pp.1059.198
1. Printed in Britain) In the above formula (A), W is the channel width, L is the channel length, μ is the carrier mobility, C is the capacitance of the gate oxide film, VG is the gate voltage, and VT is the threshold value. Voltage. The vicinity of the origin of the curves shown in FIGS. 7 to 11 is expressed by the equation (A). FIGS. 7 to 11 correspond to Examples 2 to 6 as apparent from Table 2. In Examples 2 to 6, a-
This is obtained by changing the partial pressure ratio of hydrogen when producing a Si film by a sputtering method.

If the hydrogen partial pressure ratio is determined, the carrier mobility μ and the threshold voltage VT are determined, and W, L, and C are constants determined by the structure of the thin film transistor.
ID, VG, VD. Since the variable VG is fixed near the origin of the curves shown in FIGS. 7 to 11, (16-1)
It can be seen that it is represented by the equation. Note that equation (a) can only represent the vicinity of the origin of the curves shown in FIGS. This is because this equation is only an approximate equation that holds when the drain voltage VD is low.

According to the equation (A), the lower the threshold voltage VT and the greater the mobility μ, the larger the slope of the graph curve, that is, the curve shown in FIGS. 7 to 11 near the origin.

This is apparent from the comparison of the curves shown in FIGS. 7 to 11 based on the differences in the values of μ and VT for each example in FIGS. 4 and 5.

According to equation (a), it can be seen that the electrical characteristics of the thin film transistor depend on μ and VT.

Therefore, the characteristics of the device cannot be determined independently from each of FIGS. 5 and 6. Therefore, the seventh
Comparing the slopes of the origins of the curves shown in Figs.
The hydrogen partial pressure ratio at the time of sputtering when forming an a-Si film which clearly becomes a channel formation region is at least 20%
As described above, it can be concluded that 100% is preferable.

This can be understood from the following considerations.

Comparing FIGS. 7 to 11, a larger drain current is obtained as the a-Si of FIG. 1A (13), which becomes a channel forming region, is made closer to 100% of hydrogen when the a-Si is formed by sputtering. You can see that it is done. This means that the curve (7
3), (83), (93), (103), and (113) are clear when compared.

Table 5 below shows data showing the effects of the present invention.

In Table 5, the hydrogen partial pressure ratio refers to the channel forming region (a-Si film ((13) in FIG. 1 (a)) which becomes (17) in FIG. 1 (d)) in this embodiment. RF
This is the condition of the atmosphere when producing by sputtering.

The S value is the minimum of the value of [d (ID) / d (VG)] ^-1 at the rising portion of the curve in the graph showing the relationship between the gate voltage (VG) and the drain voltage (ID) showing the characteristics of the device. The smaller the value, the steeper the slope of the curve showing the (VG-ID) characteristic, and the higher the electrical characteristics of the device.

 VT indicates a threshold voltage.

μ indicates the carrier mobility, and the unit is (cm ² / V · s).

The on / off characteristic is a logarithmic value of an ID value and a minimum ID value at VG = 30 volts in a curve showing the (VG-ID) characteristic.

From Table 5, it can be seen that in order to obtain a higher performance semiconductor device comprehensively by the method of this embodiment, the hydrogen partial pressure ratio must be 80%.
It turns out that it is appropriate to adopt the above conditions.

Embodiment 2 In this embodiment, an insulated gate semiconductor device having a structure shown in FIG. 13 is shown.

Example 1 of coating a silicon oxide film on an insulating substrate
However, in this embodiment, a manufacturing method in which the formation of the gate insulating film is completed before the formation of the semiconductor layer forming the channel region is described. Molybdenum metal was formed to a thickness of 3000 mm on the insulating film (12) by a sputtering method and subjected to predetermined patterning to form a gate electrode (20).

Next, a gate oxide film (SiO ₂ ) (15) was formed to a thickness of 100 nm by magnetron RF sputtering under the following conditions.

Oxygen 95% NF ₃ 5% Pressure 0.5pa, Film formation temperature 100 ° C RF (13.56MHz) output 400W A silicon target or a synthetic quartz target was used.

An a-Si film (13) serving as a channel formation region is formed on the silicon oxide film by a magnetron type RF sputtering apparatus.
Film is formed to a thickness of 0 nm.

The deposition conditions were as follows: H ₂ / (H ₂ + Ar) = 80% (partial pressure ratio) under an atmosphere of argon and hydrogen, which are inert gases. Deposition temperature 150 ° C RF (13.56MHz) Output 400W Total pressure 0.5pa, The target used was a polycrystalline or non-single-crystal Si target.

After this, a temperature range of 450 ° C to 700 ° C, especially at a temperature of 600 ° C,
A-Si film (13) in a hydrogen or inert gas atmosphere for 0 hour, in this embodiment in a 100% nitrogen atmosphere
Was thermally crystallized to produce a silicon semiconductor layer having high crystallinity. According to SIMS analysis, the amount of oxygen impurities present in the semiconductor film formed by such a method is 1 × 10 ²⁰ cm ⁻³ , carbon is 4 × 10 ¹⁸ cm ⁻³ , and the hydrogen content is 5% or less. Met. As a result, a channel region (17) could be formed on the gate electrode (20).

Next, an n ⁺ a-Si film (14) was formed to a thickness of 50 nm by a magnetron type RF sputtering method under the following conditions.

The film formation conditions are a hydrogen partial pressure ratio of 10 to 99% or more (in this embodiment,
80%), argon partial pressure ratio 10-99% (19% in this embodiment)
In this atmosphere, the film formation temperature was 150 ° C, RF (13.56 MHz), the output was 400 W, the total pressure was 0.5 pa, and single crystal silicon doped with phosphorus was used as the target.

Next, an aluminum film for source and drain electrodes is formed on the semiconductor layer (14) and patterned, and the source and drain impurity regions (14) and (14 ') and the source and drain electrodes ( 16) and (16 ') were formed to complete the semiconductor device.

In this embodiment, the gate insulation is formed before the formation of the semiconductor layer in the channel formation region. Therefore, during the thermal crystallization process, the vicinity of the interface between the gate insulation film and the channel region is appropriately thermally annealed, The feature is that the level density can be reduced.

Although an a-Si film is used as a semiconductor layer to be thermally crystallized in the present example and the like, it goes without saying that the present invention is also effective when thermally crystallizing another non-single-crystal semiconductor. .

Although Ar was used as the inert gas at the time of the sputtering, other halogen gases such as He, or SiH ₄ ,
A plasma of a reactive gas such as Si ₂ H ₆ may be used. Further, in forming the a-Si film by the magnetron type RF sputtering method of the present embodiment, the hydrogen concentration is 5 to 100.
%, Deposition temperature is in the range of 50 to 500 ° C, RF output is 500Hz to 100G
In the range of Hz, it can be arbitrarily selected in the range of 1 W to 10 MW, and may be combined with a pulse energy source.

By using more powerful light irradiation (wavelength of 1000 nm or less) energy or electron cyclotron resonance (ECR) conditions, sputtering may be performed by increasing the plasma of hydrogen.

This is because the microstructure in the film formed by sputtering by generating light ions called hydrogen more efficiently and generating the positive ions necessary for sputtering efficiently, and in the case of this embodiment, the microstructure in the a-Si film. This is to prevent the occurrence of a structure.

Further, the other reactive gas may be applied to the above means.

In this embodiment, the amorphous semiconductor film is simply described as an a-Si film. This usually indicates a silicon semiconductor, but may be germanium or a mixture of silicon and germanium Si _x Ge ₁ -x (0 <x <1).

Further, it goes without saying that the configuration of the present invention can be applied to a staggered type, a coplanar type, an inverted staggered type, and an inverted coplanar type insulated gate field effect transistor.

According to the present invention, a gate insulating film, a base film formed between an insulating substrate and a non-single-crystal semiconductor layer, or a silicon oxide film provided over a glass substrate contains a halogen element. The halogen element is neutralized with alkali ions in a gate insulating film, or a base film formed between an insulating substrate and a non-single-crystal semiconductor layer, or a silicon oxide film provided over a glass substrate, An insulated gate semiconductor device having electrical characteristics with high carrier mobility in the non-single-crystal semiconductor layer was realized.

According to the present invention, a gate insulating film, a base film formed between an insulating substrate and a non-single-crystal semiconductor layer, or a silicon oxide film provided over a glass substrate is formed at the same time that a halogen element is added. Insulated gate type with excellent interface characteristics between a silicon oxide film and a semiconductor film, a semiconductor film and a gate insulating film, a gate insulating film and a gate electrode, or an interface between a semiconductor film and a base insulating layer provided on a glass substrate. A semiconductor device was realized.

[Brief description of the drawings]

FIG. 1 shows a manufacturing process of the first embodiment. FIG. 2 shows the relationship between the flat band voltage and (Ar gas / oxidizing gas)% in the silicon oxide film of this embodiment. FIG. 3 is a graph showing the relationship between ΔF _FB in the silicon oxide film of this embodiment and the volume% of NF _{3 in} an oxygen atmosphere. FIG. 4 is a graph showing the relationship between the breakdown voltage of the silicon oxide film of this embodiment and the volume percentage of NF _{3 in} an oxygen atmosphere. FIG. 5 shows the relationship between the hydrogen partial pressure ratio and the carrier mobility. FIG. 6 shows the relationship between the partial pressure ratio of hydrogen and the threshold value. FIG. 7, FIG. 8, FIG. 9, FIG. 10, and FIG. 11 show the relationship between the drain voltage and the drain current when the value of the gate voltage is fixed. FIG. 12 shows a Raman spectrum of the semiconductor film having crystallinity of the present invention. FIG. 13 shows another embodiment of the present invention. (11) glass substrate (12) SiO ₂ film (13) a-Si active layer (14) semiconductor layer in source region (14 ') semiconductor layer in drain region (15) … Gate oxide film (SiO ₂ ) (16) Source electrode (16 ′) Drain electrode (17) Channel formation region (18) Interlayer insulator (20) Gate electrode

Claims (8)

(57) [Claims] A silicon oxide film provided on a glass substrate,
A non-single-crystal semiconductor layer including at least a source region, a drain region, and a channel formation region; and a gate electrode formed over the channel formation region with a gate insulating film interposed therebetween, and provided on the glass substrate. The insulated gate semiconductor device, wherein the obtained silicon oxide film contains a halogen element. 2. The method according to claim 1, wherein the silicon oxide film provided on the glass substrate comprises:
A non-single-crystal semiconductor layer including at least a source region, a drain region, and a channel formation region; and a gate electrode formed over the channel formation region with a gate insulating film interposed therebetween, and provided on the glass substrate. The insulated gate semiconductor device, wherein the obtained silicon oxide film and the gate insulating film contain a halogen element. 3. A non-single-crystal semiconductor layer including at least a source region, a drain region, and a channel forming region on an insulating substrate; and a gate electrode formed on the channel forming region via a gate insulating film. An insulating gate type semiconductor device, comprising: a base film provided between the insulating substrate and the non-single-crystal semiconductor layer; wherein the base film contains a halogen element. 4. A non-single-crystal semiconductor layer including at least a source region, a drain region, and a channel formation region on an insulating substrate; and a gate electrode formed on the channel formation region via a gate insulating film. An insulating gate type semiconductor device, comprising: a base film provided between the insulating substrate and the non-single-crystal semiconductor layer; wherein the gate insulating film and the base film contain a halogen element. . 5. The method according to claim 1, wherein the concentration of the halogen element in the silicon oxide film, the gate insulating film, or the base film is 0.1% by volume to 5% by volume. An insulated gate semiconductor device according to claim 4. 6. The insulated gate semiconductor device according to claim 1, wherein said non-single-crystal semiconductor layer is a semiconductor having crystallinity. 7. The semiconductor device according to claim 1, wherein said non-single-crystal semiconductor layer includes a polycrystalline silicon semiconductor.
The insulated gate semiconductor device according to claim 3. 8. The insulated gate semiconductor device according to claim 6, wherein the crystal has a particle diameter of 5 ° to 400 ° calculated from a half width of a Raman spectrum.