JP3614333B2 - Insulated gate type field effect transistor fabrication method - Google Patents

Description

【００６０】
図４によれば水素分圧が０％の時は酸素濃度が２×１０^２０ｃｍ^−３もあるため、３×１０^−１ｃｍ^２Ｖ／ｓｅｃときわめて小さく、また他方、本発明の如く２０％以上また酸素濃度７×１０^１９ｃｍ^−３以下において顕著に高い移動度２ｃｍ^２／Ｖｓｅｃ以上μ（ＦＩＥＬＤ ＭＯＢＩＬＩＴＹ）が得られていることがわかる。
【００６１】
これは水素を添加すると、スパッタ内のチャンバ中での酸素を水とし、それをクライオポンプで積極的に除去できたためと推定される。
【００６２】
図４はしきい値電圧とスパッタ時における水素分圧比（Ｐ_Ｈ／Ｐ_{ＴＯＴＡＬ}＝Ｈ_２／（
Ｈ_２＋Ａｒ））の関係をグラフ化したものである。
水素分圧比（Ｐ_Ｈ／Ｐ_{ＴＯＴＡＬ}＝Ｈ_２／（Ｈ_２＋Ａｒ））と前記各例番号の対応関係は表１の
場合と同じである。
【００６３】
しきい値電圧が低いほど薄膜トランジスタを動作させる動作電圧すなわちゲート電圧が低くてよいことになり、デバイスとしての良好な特性が得られることを考えると図５の結果は、水素の分圧比の高い条件のスパッタ法によって、スレッシュホールド電圧８Ｖ以下のノーマリオフの状態をえることができる。すなわち、チャンネル形成領域となる図１（Ａ）の（１３）に示されるＳｉ膜を得て、このＳｉ膜を熱結晶化させることによって得られる結晶性を持つ半導体層を用いたデバイスは良好な電気的特性を示すことがわかる。
【００６４】
また図５によると水素分圧比が高い方がしきい値電圧が低くなっていることがわかる。このことより前記各例におけるチャンネル形成領域となるａ−Ｓｉ膜のスパッタ法による作製時において、水素の分圧比を高くするとデバイスの電気的特性が高くなっていく傾向があることがわかる。
【００６５】
本願発明に用いられるセミアモルファスまたはセミクリスタル半導体について、そのメカニズムを略記する。
【００６６】
すなわちスパッタ法において単結晶のシリコン半導体をターゲットとし、水素とアルゴンとの混合気体でスパッタをすると、アルゴンの重い原子のスパッタ（衝撃）によりターゲットからは原子状のシリコンも離れ、被形成面を有する基板上に飛しょうするが、同時に数十〜数十万個の原子が固まった塊がクラスタとしてターゲットから離れ、被形成面に飛しょうする。
【００６７】
この飛しょう中は、水素がこのクラスタの外周辺の珪素の不対結合手と結合し、被形成面上に秩序性の比較的高い領域として作られる。
【００６８】
すなわち、被膜形成面上には秩序性の高い、かつ周辺にＳｉ−Ｈ結合を有するクラスタと純粋のアモルファス珪素との混合物とする。これを４５０℃〜７００℃の非酸
化性気体中での熱処理により、クラスタの外周辺のＳｉ−Ｈ結合は他のＳｉ−Ｈ結合と反応し、Ｓｉ−Ｓｉ結合を作る。
【００６９】
しかし、この結合はお互い引っぱりあうと同時に、秩序性の高いクラスタはより高い秩序性の高い状態、すなわち結晶化に相を移そうとする。しかし隣合ったクラスタ間は、互いに結合したＳｉ−Ｓｉがそれぞれのクラスタ間を引っぱりあう。その結果は、結晶は格子歪を持ちレーザラマンでの結晶ピークは単結晶の５２０ｃｍ^−１より低波数側にずれて測定される。
【００７０】
また、このクラスタ間のＳｉ−Ｓｉ結合は互いのクラスタをアンカリング（連結）するため、各クラスタでのエネルギバンドはこのアンカリングの個所を経て互いに電気的に連結しあえる。そのため結晶粒界がキャリアのバリアとして働く多結晶シリコンとは根本的に異なり、キャリア移動度も１０〜２００ｃｍ^２／Ｖ Ｓｅｃを得ることができる。
【００７１】
つまり本発明の如く、かるる定義に基づくセミアモルファスまたはセミクリスタルは見掛け上結晶性を持ちながらも、電気的には結晶粒界が実質的にない状態を予想できる。
【００７２】
もちろん、アニール温度がシリコン半導体の場合の４５０℃〜７００℃という中温
アニールではなく、１０００℃またはそれ以上の結晶成長をともなう結晶化をさせる時はこの結晶成長により、膜中の酸素等が粒界に折出し、バリアを作ってしまう。これは、単結晶と同じ結晶と粒界のある材料である。
【００７３】
またこの半導体におけるクラスタ間のアンカリングの程度を大きくすると、よりキャリア移動度は大きくなる。このためにはこの膜中にある酸素量を７×１０^１９ｃｍ^−３好ましくは１×１０^１９ｃｍ^−３以下にすると、さらに６００℃よりも低い温度で結晶化ができるに加えて、高いキャリア移動度を得ることができる。
【００７４】
図５は本発明の前記参考例１、２、３、４のチャンネル形成領域となるＳｉ膜（１３）を作製する際のスパッタ時における水素の分圧比を０％、２０％、５０％とした場合において、このａ−Ｓｉ膜を熱結晶化させた結晶性を持つ珪素半導体層のラマンスペクトルを示したものである。
【００７５】
図６に表された表示記号と例番号およびスパッタ時の水素分圧比との関係を表２に示す。
【００７６】
【表２】

【００７７】
図５を見ると曲線（６１）に比較して曲線（６２）、すなわちチャンネル形成領域となるＳｉ半導体層を作製する際のスパッタ時における水素の分圧比が０％の場合と２０％の場合を比較すると、熱結晶化させた場合スパッタ時における水素の分圧比が２０％の場合のラマンスペクトルは顕著にその半導体シリコンの結晶性が表れていることがわかる。
【００７８】
またその平均の結晶粒径は半値幅より５〜４００Å代表的には５０〜３００Åである
。そしてラマンスペクトルのピークの位置は単結晶シリコンのピークの位置である ５２０ｃｍ^−１よりも低波数側にずれており、明らかに格子歪を有していた。
【００７９】
このことは本発明の特徴を顕著に示している。すなわち水素を添加したスパッタ法によるＳｉ膜の作製の効果は、そのＳｉ膜を熱結晶化させて初めて現れるものであるということである。
【００８０】
このように、格子歪みを有していると微結晶粒の各々がお互いに無理に縮んだ状態となっているので、お互いの結晶粒界での密接が強くなり、結晶粒界部分でのキャリアに対するエネルギーバリアも存在せず、かつ酸素等の不純物の偏析も発生しにくくなり、結果として、高いキャリアの移動度を実現することが可能となる。
【００８１】
本発明でいう粒径とは作製された半導体膜をラマン分光分析を行なった際に得られるラマンスペクトルによって算出される数値であり、実際の膜中に粒界が存在するかどうかは不明であり、むしろ前述のように粒界が存在しないと考えられる。
【００８２】
この半導体膜の結晶の粒径を可変する方法としては、スパッタ成膜時に、加えるＲＦパワーを可変する方法が考えらる。
【００８３】
その他の方法としてターゲット近傍に設置されている磁界供給手段の磁界の強さを変化させてもよい。例えば、磁界供給手段が電磁石の場合、コイルに流す電流を多くして磁界を強くすると、基板上に形成される半導体膜の粒径を大きくすることができる。又、その逆も可能である。
【００８４】
また本発明の効果を示すデータとして以下に表３を示す。
【００８５】
【表３】

【００８６】
表３において、水素分圧比というのは本実施例におけるチャンネル形成領域となるＳｉ膜（図１（Ａ） の（１３））をマグネトロン型ＲＦスパッタ法によって作製する際における条件である。
【００８７】
Ｓ値というのは、デバイスの特性を示すゲート電圧（ＶＧ）とドレイン電流（ＩＤ）の関係を示すグラフにおける曲線の立ち上がり部分の［ｄ（ＩＤ）／ｄ（ＶＧ）］^−１の値の最小値であり、この値が小さい程（ＶＧ−ＩＤ）特性を示す曲線の傾きの鋭さが大きく、デバイスの電気的特性が高いことを示す。
ＶＴはしきい値電圧を示す。
μはキャリアの移動度を示し単位は（ｃｍ^２／Ｖ・ｓ）である。
ｏｎ／ｏｆｆ特性というのは、前記（ＶＧ−ＩＤ）特性を示す曲線におけるＶＧ＝３０ボルトに
おけるＩＤの値とＩＤの最小値との比の対数値である。
【００８８】
本実施例においては下地の酸化珪素膜と半導体膜とを専用の反応室にて、連続的に形成したが特にこの場合に限定されることはなく、作製する半導体装置の構造にもよるが半導体膜とゲイト絶縁膜あるいはゲイト絶縁膜とゲイト電極等を専用の反応室で連続的に形成することも本発明の技術思想の範囲内であることは明らかである。
【００８９】
〔実施例２〕
本実施例においては、図３に示された構造の絶縁ゲイト型半導体装置を示す。
【００９０】
絶縁基板上に酸化珪素膜をコートすることは実施例１と同じであるが、本実施例においては、チャネル領域を構成する半導体層の作製の前にゲイト絶縁膜の形成を終える作製方法を示している。 絶縁膜（１２）の上にスパッタ法により金属モリブデンを厚さ３０００Åに形成し、所定のパターンニングをして、ゲイト電極（２０）を形成した。
【００９１】
次に実施例１にて使用したマルチチャンバー型スパッタ装置の構成にさらにもう１つのＮ型半導体膜専用の反応室が追加されたスパッタ装置を用いて、ゲート酸化膜（ＳｉＯ_２）（１５）を１００ｎｍの厚さにマグネトロン型ＲＦスパッタ法により以下の条件で成膜した。
酸化雰囲気 １００％
圧力 ０．５ｐａ
成膜温度 １００℃
ＲＦ（１３．５６ＭＨｚ）出力４００Ｗ
シリコンターゲットまたは合成石英のターゲットを使用した。
【００９２】
この酸化膜の作成に際して不活性気体に対して酸素の割合を多くもっとも好ましくは１００％酸素でスパッタを行なうとゲイト絶縁膜の界面準位密度を下げることができ、非常に特性のよいトランジスタを実現できる。
【００９３】
次に基板を半導体膜専用の反応室に移動させてこの酸化珪素膜の上にチャンネル形成領域となるａ−Ｓｉ膜（１３）を１００ｎｍの厚さに成膜する。
【００９４】
成膜条件は、不活性気体であるアルゴンと水素雰囲気下において、
Ｈ_２／（Ｈ_２＋Ａｒ）＝８０％ （分圧比）
成膜温度 １５０ ℃
ＲＦ（１３．５６ＭＨｚ） 出力 ４００Ｗ
全圧力 ０．５Ｐａ
とし、ターゲットはＳｉターゲットを用いた。
【００９５】
この後、半導体膜の成膜を終えた基板を反応室より取り出し、基板を装置の外に出さず基板通過室にて４５０℃〜７００℃の温度範囲特に６００℃の温度で１０時間の
時間をかけ水素または不活性気体中、本実施例においては窒素１００％雰囲気中においてａ−Ｓｉ膜（１３）の熱結晶化を行い、結晶性の高い珪素半導体層を作製した。この時同時に新たに基板を予備室より酸化珪素膜専用の反応室に移動させて、前述の条件でゲイト絶縁膜を作製した。
【００９６】
このような方法により形成された半導体膜中に存在する酸素不純物の量はＳＩＭＳ分析により１×１０^１９ｃｍ^−３、炭素は４×１０^１８ｃｍ^−３であり、水素の含有量は１％以下であった。これによりゲイト電極（２０）の上にチャネル領域（２２）を構成させることができた。この熱処理の間に後からゲイト絶縁膜作製の為に酸化珪素用の反応室に導入された基板を基板通過室をへて、半導体膜用反応室に移動させ、同じ条件で半導体膜の形成を行った。
【００９７】
次に熱処理の終わった基板を通過室からＮ型半導体膜形成用反応室に移動した後、ｎ^＋ａ−Ｓｉ膜（１４）を以下に示す条件でマグネトロン型ＲＦスパッタ法により５０ｎｍ
の厚さに成膜した。また同時に半導体膜の形成が終了した基板を基板通過室にて熱処理し同時に新たな基板をゲイト絶縁膜用反応室に導入し以後は同様にして複数の処理を同時に行なった。
【００９８】
成膜条件は、水素分圧比１０〜９９％以上（本実施例では８０％）、アルゴン分圧比１０〜９９％（本実施例では１９％）の雰囲気中において、
成膜温度 １５０ ℃
ＲＦ（１３．５６ＭＨｚ） 出力 ４００Ｗ
全圧力 ０．５Ｐａ
でありターゲットとしてリンをドープした単結晶シリコンを使用した。
【００９９】
次にこの半導体層（１４）の上にソース、ドレイン用の電極のためのアルミニウム膜を形成し、パターニングを施し、ソース，ドレインの不純物領域（１４）（１４’） およびソース、ドレインの電極（１６），（１６’）を形成して、半導体装置を完成した。
【０１００】
本実施例においては、チャネル形成領域の半導体膜形成前にゲイト絶縁膜が形成されているので、熱結晶化の処理の際に、ゲイト絶縁膜とチャネル領域の界面付近が適度に熱アニールされ、界面準位密度をさげることができるという特徴を持つ。
【０１０１】
また、各々の膜の形成時には背圧を１×１０^−６Ｐａ以下としかつ排気系をターボ分子ポンプとクライオポンプとを組み合わせているので、オイルフリーな不純物の少ない状態で膜形成を行える。本実施例における活性層（１３）中の酸素不純物量は１×１０^１９ｃｍ^−３であり、その移動度μは４１．４であった。
【０１０２】
なお、本実施例等においては熱結晶化させる半導体層としてａ−Ｓｉ膜を用いたが、本発明は他の非単結晶半導体を熱結晶化させる場合においても有効であることはいうまでもない。
【０１０３】
また上記スパッタ時における不活性気体としてはＡｒを用いたが、その他の気体としてＨｅなどのハロゲン気体、またはＳｉＨ_４、Ｓｉ_２Ｈ_６などの反応性気体をプラズマ化させたものを用いても良い。また、本実施例のマグネトロン型ＲＦスパッタ法によるａ−Ｓｉ膜の成膜において、水素濃度は５〜１００％、成膜温度は５０〜５００℃の範
囲、ＲＦ出力は５００Ｈｚ〜１００ＧＨｚの範囲において、１Ｗ〜１０ＭＷの範囲で任意に選ぶことができ、またパルスエネルギー発信源と組み合わせてもよい。
【０１０４】
さらに強力な光照射（波長１０００ｎｍ以下） エネルギーや、電子サイクロトロン共鳴（ＥＣＲ）条件を使用することによって、より水素を高プラズマ化させてスパッタリングを行ってもよい。
【０１０５】
これは、水素という軽い原子をよりプラズマ化させスパッタリングに必要な正イオンを効率よく生成させてスパッタによって成膜される膜中のマイクロ構造、本実施例の場合においてはａ−Ｓｉ膜中のマイクロ構造の発生を防止するためである。また前記他の反応性気体を上記の手段に応用してもよい。
【０１０６】
本実施例は非晶質性の半導体膜を単にａ−Ｓｉ膜として記載した。これは通常はシリコン半導体を示しているが、その他にゲルマニウムまたはシリコンとゲルマニウムの混合Ｓｉ_ｘＧｅ_１−Ｘ（０＜Ｘ＜１） であってもよい。
【０１０７】
また、本発明の構成はスタガード型、コプレナー型、逆スタガード型、逆コプレナー型の絶縁ゲイト型電界効果トランジスタに適用できることはいうまでもない。
【０１０８】
【発明の効果】
本発明の構成をとることによって、工業的に有用なスパッタ法により得られた非単結晶半導体を熱結晶化させることによって結晶性を持つ半導体を得る工程において問題となる熱結晶化困難の問題を解決することができ、しかもこの結晶性を持つ半導体層を用いて高性能な薄膜トランジスタを作製することができた。
【０１０９】
また、本発明法によると、絶縁ゲイト型半導体装置に最小限度必要な部分をすべてスパッタ法で作製することができる。このため図１（Ｄ）に示されるような絶縁ゲイト型半導体装置において、活性層の下側（１８）すなわち下地絶縁膜との接触部分が一部酸化され、半絶縁性を持つ状態となり、この部分での電気的な特性が若干悪くなる。これによりこの部分に、バックチャネルが発生することができず、逆方向リーク電流を少なくすることができるという特徴を持つ。このことは、この半導体装置をＣＭＯＳとして利用するときに非常に有効でありオフ電流の減少におおきな効果を示す。
【０１１０】
また、半導体膜中に存在する酸素不純物の濃度を少なくでき、結晶粒界付近でのキャリアに対する障壁（バリア）が形成されにくく、非常に高い移動度を持つ絶縁ゲイト型半導体装置を実現することができた。
【０１１１】
さらに同一装置内で複数の異なる処理を行える為外部の影響を受けることなく連続的な処理を行うことができる。加えて、複数の処理を同時に行なえるので生産性を高めることができる。
【図面の簡単な説明】
【図１】本実施例１の作製工程図
【図２】本発明用のマルチチャンバースパッタ装置の概略図
【図３】水素の分圧比とキャリアの移動度との関係を示したものである。
【図４】水素の分圧比としきい値との関係を示したものである。
【図５】本発明の結晶性を持つ半導体膜のラマンスペクトルを示したもので
ある。
【図６】本発明の他の実施例の断面図
【符号の説明】
（１） ・・・予備室
（２） ・・・基板通過室
（３）（４）・・スパッタ室
（５）（６）（７）（８）・・・ゲイト弁[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device using a semiconductor layer manufactured by a manufacturing method with high mass productivity.
[0002]
[Prior art]
Conventionally, a polycrystalline semiconductor device is formed in a temperature range of 550 ° C. to 900 ° C. by low pressure CVD.
Thus, a polycrystalline semiconductor film was obtained and produced using this polycrystalline semiconductor film.
[0003]
Recently, large-area liquid crystal displays and the like have been developed, and it has become necessary to form a polycrystalline semiconductor device on a large-area substrate.
[0004]
Forming a polycrystalline semiconductor layer directly on a large-area substrate by a low pressure CVD method has many difficulties from the problem of reaction temperature, and usually a crystallization treatment is performed after forming a non-single crystal semiconductor film, A polycrystalline semiconductor layer was formed on a large-area substrate.
[0005]
When a non-single-crystal semiconductor film is obtained by a low pressure CVD method, there is a problem that it is difficult to form a uniform film over a large-area substrate.
[0006]
Further, when a non-single-crystal semiconductor film is obtained by plasma CVD, the film forming process takes time, and there is a problem that it is difficult to obtain a uniform film thickness on a large-area substrate.
[0007]
As a means for solving such a problem, there is a method using a sputtering method.
Especially magnetron type sputtering method
B) Electrons are confined in the vicinity of the target by a magnetic field, and damage to the substrate surface by high-energy electrons is suppressed.
B) High-speed film formation over a large area at a low temperature.
C) Since dangerous gas is not used, it is highly safe and industrial.
There are advantages such as.
[0008]
However, it is known that the semiconductor film obtained by the sputtering method has a microstructure, that is, the presence of silicon atoms, and thermal crystallization treatment is difficult.
[0009]
[Problems to be solved by the invention]
The present invention solves such problems and provides a method for more effectively manufacturing a semiconductor device using a semiconductor film that can be thermally crystallized at a lower temperature.
[0010]
[Means for Solving the Problems]
The present invention contains oxygen or oxygen before or after forming a semiconductor film by sputtering on a substrate in an inert gas atmosphere containing hydrogen or hydrogen and forming the semiconductor film obtained by the sputtering. A silicon oxide film is formed by a sputtering method in an inert gas atmosphere, and each film is formed in a dedicated reaction chamber, and it is arbitrarily arranged in the same apparatus without specifying the order of forming these films. It can be formed continuously at
[0011]
By forming each of these films in a dedicated reaction chamber, the amount of oxygen in the semiconductor film is reduced to 7 × 10. ¹⁹ cm ^-3 Or less, most preferably 1 × 10 ¹⁹ cm ^-3 It is characterized as follows.
[0012]
In addition, as an example of a method for forming a part of the semiconductor film as a channel formation region, an amorphous (amorphous or extremely close state) semiconductor obtained by sputtering in an inert gas atmosphere containing hydrogen or hydrogen A film (hereinafter referred to as Si film) is applied at a temperature of 450 ° C. to 700 ° C., typically 600 ° C.
An active layer for an insulated gate semiconductor device of the present invention can be obtained by crystallizing the formation region.
[0013]
Conventionally, an example in which a thin film transistor is manufactured using an a-Si (amorphous silicon) film obtained by a sputtering method to which hydrogen is added is known, but its electrical characteristics are known to be low. Therefore, in general, an a-Si film is obtained by sputtering without adding hydrogen.
[0014]
However, the present inventor can prevent the formation of a microstructure in the formed a-Si film by adding hydrogen in the sputtering method, and this a-Si film is preferably 450 ° C to 700 ° C. Was found to be capable of thermal crystallization at a low temperature of 600 ° C. or lower.
[0015]
The semiconductor film after this crystallization has an average crystal grain size of about 5 to 400%, and the hydrogen content present in the semiconductor film is 5 atomic% or less. Further, the semiconductor film having crystallinity has lattice distortion, and the interface of each crystal grain is microscopically close to each other and has an effect of eliminating a barrier against carriers at the crystal grain boundary.
[0016]
For this reason, impurity atoms such as oxygen are segregated at a polycrystalline grain boundary having no lattice distortion, thereby forming a barrier (barrier) and hindering the movement of carriers. When formed in the reaction chamber, the amount of oxygen present in the film is 7 × 10 ¹⁹ cm ^-3 Preferably 1 × 10 ¹⁹ cm ^-3 Since the semiconductor film formed can have a lattice distortion, the barrier is not formed or its existence is negligible, so the mobility of the electrons is also low. 50-300cm ² / Vsec and very good characteristics.
[0017]
Moreover, the semiconductor film obtained by the plasma CVD method has a large proportion of the amorphous component, and the amorphous component part is naturally oxidized to form an oxide film to the inside. On the other hand, the sputtered film is dense and the natural oxidation is a semiconductor film. The crystal grains with lattice distortions strongly press each other because of the denseness, and the energy barrier against carriers is not formed near the crystal grain interface. It has the characteristics.
[0018]
The present invention provides a method for manufacturing an insulating gate type semiconductor device by actively utilizing the excellent characteristics of a semiconductor film formed by such a sputtering method. It is made in the reaction chamber.
[0019]
The silicon oxide film formed by this sputtering method can be used as an insulating film or a gate insulating film on the substrate, and the semiconductor film can be used as an active layer, an impurity layer, or a gate electrode.
[0020]
As described above, according to the method of the present invention, it is possible to fabricate all the portions necessary for the insulated gate semiconductor device by the sputtering method. For this reason, in the insulated gate type semiconductor device as shown in FIG. 1D, the lower side (18) of the active layer, that is, the contact portion with the base insulating film is partially oxidized to be in a SiOx state. Electrical characteristics are slightly deteriorated. As a result, a back channel cannot be generated in this portion, and the reverse leakage current can be reduced. This is very effective when this semiconductor device is used as a CMOS, and shows a significant effect in reducing the off-current.
[0021]
Furthermore, since it is a semiconductor film formed by sputtering, its particle size is 5 to 400 mm, typically 50 to 200 mm, after thermal crystallization.
So the reverse leakage in this part is N ⁺ -I (P ⁺ -I) Can be reduced by bonding
.
Hereinafter, the present invention will be described in detail with reference to examples.
[0022]
【Example】
[Example 1]
In this example, a silicon semiconductor layer having crystallinity is obtained by thermally crystallizing a Si film produced by a multi-chamber magnetron type RF sputtering apparatus as schematically shown in FIG. 2, and this silicon semiconductor layer is used. This is an example of manufacturing a thin film transistor.
[0023]
As shown in FIG. 2, this multi-chamber type sputtering apparatus includes a preliminary chamber (1), a substrate passage chamber (2), a silicon oxide reaction chamber (3), and a semiconductor film reaction chamber (4) as a gate valve (6). (7)
(8) The system is partitioned and connected to each other, and each chamber is a system that can completely exhaust and introduce gas and the like.
[0024]
This exhaust system has two systems: a reaction system in which a rotary pump and a turbo molecular pump are connected in series, an exhaust system for low vacuum, and a high vacuum exhaust system in which a cryopump is further connected. ^-7 It can exhaust to Pa.
[0025]
In addition, when loading a substrate into each room, it is after opening and closing the gate valve that partitions between them, but at this opening and closing, the pressure difference between both chambers is reduced and the atmosphere gas in both chambers is reduced. Performed after aligning. Thereby, mixing of unnecessary impurities etc. can be reduced as much as possible.
[0026]
Further, the strength of the magnetic field supply means provided in the vicinity of the sputtering target can be varied by external control (for example, the amount of applied power or the distance to the target can be varied).
[0027]
The substrate passage chamber (2) of this sputtering apparatus is provided with a heating means and an atmospheric gas supply means so that the semiconductor film can be heat-treated, so that the semiconductor film can be thermally crystallized without taking the substrate out of the apparatus. It is. Furthermore, before the film is formed on the substrate, the substrate is heat-treated in the substrate passage chamber, and once the substrate is thermally contracted, the film can be formed on the substrate. The stress remaining in the film is relieved, and the adhesion between the substrate and the film is improved.
[0028]
FIG. 1 shows a thin film transistor manufacturing process manufactured in this example.
[0029]
First, 10 glass substrates (11) / cassette are set in the reserve chamber (1) from the gate valve (5), and one of them passes through the substrate passage chamber (2) to form a reaction chamber for forming a silicon oxide film. Loading into (3). SiO on glass substrate (11) ₂ A film (12) was formed to a thickness of 200 nm by magnetron type RF sputtering under the following conditions.
O ₂ 100% atmosphere
Deposition temperature 150 ° C
RF 813.56NHz) Output 400W
Pressure 0.5Pa
Using single crystal silicon as a target
[0030]
After the formation, the reaction chamber is evacuated to a high vacuum, the gate valve is opened and closed, the substrate is taken out to the passage chamber, the substrate is transferred to the semiconductor film reaction chamber (4) in the same manner, and then the Si film that becomes the channel formation region (13) is deposited to a thickness of 100 nm.
[0031]
At this time, the back pressure is 1 × 10 ^-7 The pressure was set to Pa or lower, and a turbo molecular pump and a cryopump were used for exhaust. The amount of gas to be supplied had a purity of 5N (99.999%) or more, and the additive gas contained argon 4N or more used as necessary. Target single crystal silicon is also 5 × 10 ¹⁸ cm ^-3 The following oxygen concentration, for example 1 × 10 ¹⁸ cm ^-3 The oxygen concentration was as low as possible, and oxygen as an impurity in the formed film was extremely reduced.
[0032]
The film forming conditions are as follows: Inert gas argon and hydrogen atmosphere
H ₂ / (H ₂ + Ar) = 80% (Partial pressure ratio)
Deposition temperature 150 ° C
RF (13.56MHz) Output 400W
Total pressure 0.5Pa
The target was a single crystal Si target.
[0033]
Thereafter, the substrate (11) is returned to the substrate passage chamber, where the temperature range is 450 ° C. to 700 ° C.
The Si film (13) is thermally crystallized in hydrogen or an inert gas, in this embodiment in a 100% nitrogen atmosphere over a period of 10 hours at a temperature of 600 ° C., and a highly crystalline silicon semiconductor layer ( Semi-amorphous or semi-crystal).
[0034]
The impurity purity in the amorphous silicon film formed by such a method and the film crystallized by heat treatment was examined by SIMS (secondary ion equivalence analysis) method. Then, out of the impurity concentration during film formation, oxygen 8 × 10 ¹⁸ cm ^-3 , Carbon 3 × 10 ¹⁶ cm ^-3 Met. Hydrogen is 4 × 10 ²⁰ cm ^-3 And the density of silicon is 4 × 10 ²² cm ^-3 Then, the amount was equivalent to 1 atomic%. These are the target single crystal silicon oxygen concentration 1 × 10 ¹⁸ cm ^-3 Was examined as a reference. In addition, this SIMS analysis examined the distribution (depth profile) in the depth direction of the film after film formation, and used the minimum value as a reference. This is because the surface has naturally oxidized silicon oxide with the atmosphere. These values do not change significantly even after crystallization treatment, and the oxygen impurity concentration is 8 × 10. ¹⁸ cm ^-3 Met.
[0035]
In this example, oxygen is increased just in case, eg N ₂ O 2 was added at 0.1 cc / sec and 1 cc / sec. Then, the oxygen concentration after crystallization is 1 × 10 ²⁰ cm ^-3 4 × 10 ²⁰ cm ^-3 And increased. However, when such a coating was used, crystallization could be achieved for the first time by simultaneously increasing the temperature required for crystallization to 700 ° C. or higher, or increasing the crystallization time by at least 5 times.
[0036]
That is, considering the softening temperature of the glass of the substrate industrially, treatment at 700 ° C. or less, preferably 600 ° C. or less is important, and it is also important to reduce the time required for crystallization. However, no matter how much impurities such as oxygen concentration are reduced, crystallization of the a-Si semiconductor by thermal annealing was impossible experimentally below 450 ° C.
[0037]
Further, in the present invention, if such a high-quality sputtering apparatus is used, the oxygen concentration during film formation is 1 × 10 5 due to leakage from the apparatus. ²⁰ cm ^-3 Or, if it exceeds that, the characteristics of the present invention cannot be expected.
[0038]
7x10 like this ¹⁹ cm ^-3 It was determined that the oxygen concentration was as follows and the heat treatment temperature was 450 to 700 ° C.
[0039]
As can be seen from the laser Raman analysis data shown in FIG. 6, this semiconductor film has a peak position indicating the presence of crystals shifted to a lower wave number side than the peak position of normal single crystal silicon. I was reluctant to be distorted.
[0040]
In this embodiment, the present invention is described using a silicon semiconductor. However, it is possible to use a germanium semiconductor or a semiconductor mixed with silicon and germanium. It was possible to reduce the temperature applied at that time by about 100 ° C.
[0041]
Next, the substrate is taken out from the apparatus, and device isolation patterning is performed on the thermally crystallized silicon semiconductor film to obtain the shape of FIG. 1A. A part of the semiconductor film is channeled in the insulated gate type semiconductor device. It was configured as a formation region.
[0042]
Next, the substrate is returned to the sputtering apparatus again, and a gate oxide film (SiO 2) is formed in a reaction chamber (3) dedicated to silicon oxide. ₂ ) (15) was deposited to a thickness of 100 nm by magnetron type RF sputtering under the following conditions. Before the gate insulating film was formed, a bias was applied to the substrate side in a 100% hydrogen atmosphere, and the surface of the semiconductor (13) was plasma hydrogen cleaned.
[0043]
The conditions for creating the gate insulating film are
Oxygen 95% by volume NF ₃ 5% by volume
Pressure 0.5pa
Deposition temperature 100 ° C
RF (13.56MHz) output 400W
[0044]
When the gate oxide film is formed, the ratio of oxygen to the inert gas is increased and most preferably 100% oxygen is used to reduce the interface state density of the gate insulating film, thereby realizing a very good transistor. it can.
[0045]
In this example, NF was used during the reaction. ₃ As a part of the reaction gas, fluorine is added in the gate insulating film. As a result, it was possible to neutralize the dangling bonds of silicon in the film and eliminate the cause of the generation of fixed charges in the film.
[0046]
Next, this substrate is taken out from the multi-chamber sputtering apparatus, and a semiconductor layer mixed with phosphorus is formed thereon by low pressure CVD. Thereafter, photolithography was performed using a predetermined mask pattern, and a semiconductor film mixed with phosphorus was formed as a gate electrode (20). FIG. 1 (B)
[0047]
By producing this electrode by the low pressure CVD method, good characteristics can be obtained without damaging the underlying gate insulating film.
[0048]
The gate electrode is not limited to a doped semiconductor layer, and other materials can be used. Next, using the gate electrode (20) or the resist pattern used when etching the gate electrode (20) as a mask, impurity regions (14) and (14 ') are formed in the self-line using an ion implantation technique. did. Thereafter, thermal annealing was performed at 400 ° C. for 15 minutes in a hydrogen atmosphere to activate.
[0049]
As a result, the semiconductor layer under the gate electrode (20) was configured as a channel region of the insulated gate type semiconductor device.
[0050]
Next, an interlayer insulating film (17) was formed so as to cover all of these upper surfaces, and the state shown in FIG. 1 (C) was obtained. Thereafter, contact holes for the source and drain electrodes are formed, and metal aluminum is formed on the upper surface by sputtering, and predetermined patterning is performed to form source and drain electrodes (16) and (16 '). Type semiconductor device was completed. FIG. 1 (D)
[0051]
In this embodiment, the semiconductor layer forming the channel region and the source and drain semiconductor layers are made of the same material, which simplifies the process. In addition, since the same semiconductor layer is used, the source and drain semiconductor layers also have crystallinity and high carrier mobility, so that an insulated gate semiconductor device having better electrical characteristics can be realized.
[0052]
The above is the manufacturing method of the thin film transistor using the thermocrystalline silicon semiconductor layer manufactured in this embodiment. For comparison, the Si layer (13) in FIG. 1A which is a channel formation region is magnetron type RF sputtering method. Four reference examples in which the hydrogen concentration and the oxygen concentration, which are conditions for forming a film, are changed are shown below.
[0053]
(Reference Example 1)
In this reference example, the partial pressure ratio of the atmosphere at the time of sputtering when manufacturing (13) of FIG.
H ₂ / (H ₂ + Ar) = 0% (partial pressure ratio)
Others were produced by the same method as in Example 1. At this time, the oxygen concentration is 2 × 10. ²⁰ cm ^-3 Met.
[0054]
(Reference Example 2)
In this reference example, the partial pressure ratio of the atmosphere at the time of sputtering when manufacturing (13) of FIG.
H ₂ / (H ₂ + Ar) = 20% (Partial pressure ratio)
Others were produced by the same method as in Example 1. At this time, the oxygen concentration is 7 × 10. ¹⁹ cm ^-3 Met.
[0055]
(Reference Example 3)
In this example, the partial pressure ratio of the atmosphere at the time of sputtering when manufacturing (13) of FIG.
H ₂ / (H ₂ + Ar) = 50% (Partial pressure ratio)
Others were produced by the same method as in Example 1. At this time, the oxygen concentration is 3 × 10. ¹⁹ cm ^-3 Met.
[0056]
(Reference Example 4)
In this reference example, the partial pressure ratio of the atmosphere at the time of sputtering when manufacturing (13) of FIG.
H ₂ / (H ₂ + Ar) = 70% (Partial pressure ratio)
Others were produced by the same method as in Example 1. At this time, the oxygen concentration is 1 × 10 ¹⁹ cm ^-3 Met.
[0057]
The results of comparing the electrical characteristics of the above described examples are shown below.
FIG. 3 shows the carrier mobility μ (FIELD MOBILITY) in the channel portion of the completed Example 1 and Reference Examples 1 to 4 and the hydrogen partial pressure ratio (P _H / P _TOTAL = H ₂ / (H ₂ + Ar)) is graphed.
[0058]
The correspondence between the plot points in FIG. 4 and the above examples is shown in Table 1 below.
[0059]
[Table 1]

[0060]
According to FIG. 4, when the hydrogen partial pressure is 0%, the oxygen concentration is 2 × 10. ²⁰ cm ^-3 3 × 10 ^-1 cm ² V / sec is extremely small, and on the other hand, 20% or more as in the present invention and an oxygen concentration of 7 × 10 ¹⁹ cm ^-3 Remarkably high mobility 2 cm below ² It can be seen that μ (FIELD MOBILITY) is obtained over / Vsec.
[0061]
This is presumably because, when hydrogen was added, oxygen in the chamber in the sputter was water, and it was positively removed by the cryopump.
[0062]
FIG. 4 shows the threshold voltage and the hydrogen partial pressure ratio (P _H / P _TOTAL = H ₂ / (
H ₂ + Ar)) is graphed.
Hydrogen partial pressure ratio (P _H / P _TOTAL = H ₂ / (H ₂ + Ar)) and the corresponding example numbers are shown in Table 1.
Same as the case.
[0063]
The lower the threshold voltage, the lower the operating voltage for operating the thin film transistor, that is, the lower the gate voltage, and considering that good device characteristics can be obtained, the results in FIG. By the sputtering method, a normally-off state with a threshold voltage of 8 V or less can be obtained. That is, a device using a semiconductor layer having crystallinity obtained by obtaining the Si film shown in (13) of FIG. 1A to be a channel formation region and thermally crystallizing the Si film is good. It can be seen that it exhibits electrical characteristics.
[0064]
Further, according to FIG. 5, it can be seen that the threshold voltage is lower when the hydrogen partial pressure ratio is higher. From this, it can be understood that when the a-Si film serving as the channel formation region in each of the above examples is fabricated by sputtering, the electrical characteristics of the device tend to increase as the hydrogen partial pressure ratio is increased.
[0065]
The mechanism of the semi-amorphous or semi-crystal semiconductor used in the present invention is abbreviated.
[0066]
That is, when sputtering is performed with a single-crystal silicon semiconductor as a target in a sputtering method and a mixed gas of hydrogen and argon is sputtered, the atomic silicon is also separated from the target by sputtering (impact) of heavy atoms of argon and has a surface to be formed. Let's fly on the substrate. At the same time, a lump of tens to hundreds of thousands of atoms is separated from the target as a cluster and flies to the formation surface.
[0067]
During the flight, hydrogen is combined with the dangling bonds of silicon around the outer periphery of the cluster, and is formed as a relatively highly ordered region on the formation surface.
[0068]
That is, a mixture of highly ordered clusters having pure Si-H bonds and pure amorphous silicon is formed on the film forming surface. This is a non-acid at 450 ° C. to 700 ° C.
By the heat treatment in the chemical gas, the Si—H bonds in the outer periphery of the cluster react with other Si—H bonds to form Si—Si bonds.
[0069]
However, as this bond pulls together, the highly ordered clusters attempt to shift phase to a more highly ordered state, ie crystallization. However, between adjacent clusters, Si—Si bonded to each other pulls between the clusters. As a result, the crystal has a lattice strain and the crystal peak in laser Raman is 520 cm of that of a single crystal. ^-1 It is measured by shifting to a lower wave number side.
[0070]
Further, since the Si—Si bonds between the clusters anchor each other, the energy bands in each cluster can be electrically coupled to each other via the anchoring portion. Therefore, it is fundamentally different from polycrystalline silicon in which the grain boundary acts as a carrier barrier, and the carrier mobility is 10 to 200 cm. ² / V Sec can be obtained.
[0071]
That is, as in the present invention, a semi-amorphous or semi-crystal based on such a definition can be expected to have substantially no crystal grain boundary while having apparent crystallinity.
[0072]
Of course, the intermediate temperature of 450 ° C to 700 ° C when the annealing temperature is a silicon semiconductor.
When crystallization with crystal growth of 1000 ° C. or higher is performed instead of annealing, oxygen or the like in the film breaks off at the grain boundary due to this crystal growth, thereby creating a barrier. This is a material having the same crystal and grain boundary as a single crystal.
[0073]
Further, when the degree of anchoring between clusters in this semiconductor is increased, the carrier mobility is further increased. For this purpose, the oxygen content in the film is reduced to 7 × 10. ¹⁹ cm ^-3 Preferably 1 × 10 ¹⁹ cm ^-3 In the case of the following, in addition to crystallization at a temperature lower than 600 ° C., high carrier mobility can be obtained.
[0074]
FIG. 5 shows hydrogen partial pressure ratios of 0%, 20%, and 50% at the time of sputtering when forming the Si film (13) serving as the channel formation region of the reference examples 1, 2, 3, and 4 of the present invention. In this case, the Raman spectrum of the crystalline silicon semiconductor layer obtained by thermally crystallizing the a-Si film is shown.
[0075]
Table 2 shows the relationship between the symbols shown in FIG. 6, the example numbers, and the hydrogen partial pressure ratio during sputtering.
[0076]
[Table 2]

[0077]
Referring to FIG. 5, the curve (62) is compared with the curve (61), that is, the case where the hydrogen partial pressure ratio at the time of sputtering in producing the Si semiconductor layer to be the channel formation region is 0% and 20%. By comparison, it can be seen that when thermal crystallization is performed, the crystallinity of the semiconductor silicon appears remarkably in the Raman spectrum when the hydrogen partial pressure ratio during sputtering is 20%.
[0078]
The average crystal grain size is 5 to 400 mm, typically 50 to 300 mm, from the half width.
. And the peak position of the Raman spectrum is the position of the peak of single crystal silicon 520 cm ^-1 It was shifted to the lower wave number side and clearly had lattice distortion.
[0079]
This is a remarkable feature of the present invention. That is, the effect of producing the Si film by the sputtering method to which hydrogen is added is manifested only when the Si film is thermally crystallized.
[0080]
In this way, since each of the microcrystalline grains is in a state where they are forcibly contracted with each other when they have lattice distortion, the closeness at each grain boundary becomes stronger, and the carrier at the grain boundary part becomes stronger. As a result, it is difficult to cause segregation of impurities such as oxygen, and as a result, high carrier mobility can be realized.
[0081]
The particle size referred to in the present invention is a numerical value calculated by the Raman spectrum obtained when the produced semiconductor film is subjected to Raman spectroscopic analysis, and it is not clear whether there is a grain boundary in the actual film. Rather, as described above, it is considered that there is no grain boundary.
[0082]
As a method of changing the crystal grain size of the semiconductor film, a method of changing the RF power applied during sputtering film formation can be considered.
[0083]
As another method, the magnetic field strength of the magnetic field supply means installed in the vicinity of the target may be changed. For example, when the magnetic field supply means is an electromagnet, the grain size of the semiconductor film formed on the substrate can be increased by increasing the current flowing through the coil to increase the magnetic field. The reverse is also possible.
[0084]
Table 3 below shows data indicating the effects of the present invention.
[0085]
[Table 3]

[0086]
In Table 3, the hydrogen partial pressure ratio is a condition for producing a Si film ((13) in FIG. 1A) serving as a channel formation region in this embodiment by magnetron type RF sputtering.
[0087]
The S value is [d (ID) / d (VG)] at the rising portion of the curve in the graph showing the relationship between the gate voltage (VG) indicating the device characteristics and the drain current (ID). ^-1 The smaller this value is, the smaller the value (VG-ID), the sharper the slope of the curve indicating the characteristics, and the higher the electrical characteristics of the device.
VT represents a threshold voltage.
μ indicates the mobility of the carrier and the unit is (cm ² / V · s).
The on / off characteristic means that VG = 30 volts in the curve indicating the (VG-ID) characteristic.
It is a logarithmic value of the ratio between the ID value and the minimum ID value.
[0088]
In this embodiment, the underlying silicon oxide film and the semiconductor film are continuously formed in a dedicated reaction chamber. However, the present invention is not particularly limited to this, and the semiconductor depends on the structure of the semiconductor device to be manufactured. It is obvious that it is within the scope of the technical idea of the present invention to continuously form a film and a gate insulating film or a gate insulating film and a gate electrode in a dedicated reaction chamber.
[0089]
[Example 2]
In this embodiment, an insulated gate semiconductor device having the structure shown in FIG. 3 is shown.
[0090]
Coating the silicon oxide film on the insulating substrate is the same as in Example 1, but this example shows a manufacturing method in which the formation of the gate insulating film is finished before the semiconductor layer constituting the channel region is manufactured. ing. On the insulating film (12), metal molybdenum was formed to a thickness of 3000 mm by sputtering and predetermined patterning was performed to form the gate electrode (20).
[0091]
Next, a gate oxide film (SiO 2) is formed using a sputtering apparatus in which another reaction chamber dedicated to an N-type semiconductor film is added to the configuration of the multi-chamber type sputtering apparatus used in Example 1. ₂ ) (15) was deposited to a thickness of 100 nm by magnetron type RF sputtering under the following conditions.
Oxidizing atmosphere 100%
Pressure 0.5pa
Deposition temperature 100 ° C
RF (13.56MHz) output 400W
A silicon target or a synthetic quartz target was used.
[0092]
When this oxide film is formed, sputtering is performed with a large proportion of oxygen with respect to the inert gas, most preferably with 100% oxygen, so that the interface state density of the gate insulating film can be lowered and a transistor with very good characteristics can be realized. it can.
[0093]
Next, the substrate is moved to a reaction chamber dedicated to the semiconductor film, and an a-Si film (13) serving as a channel formation region is formed on the silicon oxide film to a thickness of 100 nm.
[0094]
The film forming conditions are as follows: Inert gas argon and hydrogen atmosphere
H ₂ / (H ₂ + Ar) = 80% (Partial pressure ratio)
Deposition temperature 150 ° C
RF (13.56MHz) Output 400W
Total pressure 0.5Pa
The Si target was used as the target.
[0095]
Thereafter, the substrate on which the semiconductor film has been formed is taken out of the reaction chamber, and the substrate is not taken out of the apparatus, and the substrate is passed through the temperature range of 450 ° C. to 700 ° C., particularly 600 ° C. for 10 hours.
Over time, the a-Si film (13) was thermally crystallized in hydrogen or an inert gas in a 100% nitrogen atmosphere in this example, and a silicon semiconductor layer having high crystallinity was produced. At the same time, a new substrate was moved from the preliminary chamber to the reaction chamber dedicated to the silicon oxide film, and a gate insulating film was produced under the conditions described above.
[0096]
The amount of oxygen impurities present in the semiconductor film formed by such a method is 1 × 10 by SIMS analysis. ¹⁹ cm ^-3 Carbon is 4 × 10 ¹⁸ cm ^-3 The hydrogen content was 1% or less. As a result, the channel region (22) could be formed on the gate electrode (20). During this heat treatment, the substrate introduced into the reaction chamber for silicon oxide for the production of the gate insulating film later is moved to the reaction chamber for the semiconductor film through the substrate passage chamber, and the semiconductor film is formed under the same conditions. went.
[0097]
Next, after the heat-treated substrate is moved from the passage chamber to the N-type semiconductor film forming reaction chamber, ⁺ The a-Si film (14) is 50 nm by magnetron type RF sputtering under the following conditions.
The film was formed to a thickness of. At the same time, the substrate on which the formation of the semiconductor film was completed was heat-treated in the substrate passage chamber, and at the same time, a new substrate was introduced into the gate insulating film reaction chamber.
[0098]
The film forming conditions are as follows: in an atmosphere with a hydrogen partial pressure ratio of 10 to 99% or more (80% in this embodiment) and an argon partial pressure ratio of 10 to 99% (19% in this embodiment).
Deposition temperature 150 ° C
RF (13.56MHz) Output 400W
Total pressure 0.5Pa
And single crystal silicon doped with phosphorus was used as a target.
[0099]
Next, an aluminum film for the source and drain electrodes is formed on the semiconductor layer (14) and patterned, and the source and drain impurity regions (14) and (14 ') and the source and drain electrodes ( 16) and (16 ′) were formed to complete the semiconductor device.
[0100]
In this embodiment, since the gate insulating film is formed before the semiconductor film is formed in the channel forming region, the vicinity of the interface between the gate insulating film and the channel region is appropriately thermally annealed during the thermal crystallization process. It has the feature that the interface state density can be reduced.
[0101]
In addition, the back pressure is set to 1 × 10 at the time of forming each film. ^-6 Since it is set to Pa or less and the exhaust system is a combination of a turbo molecular pump and a cryopump, a film can be formed with less oil-free impurities. The amount of oxygen impurities in the active layer (13) in this example is 1 × 10. ¹⁹ cm ^-3 The mobility μ was 41.4.
[0102]
In this embodiment and the like, an a-Si film is used as a semiconductor layer to be thermally crystallized. However, it goes without saying that the present invention is also effective in thermally crystallizing other non-single crystal semiconductors. .
[0103]
In addition, Ar was used as the inert gas at the time of sputtering, but other gases such as a halogen gas such as He, or SiH ₄ , Si ₂ H ₆ Alternatively, a reactive gas such as plasma may be used. In the film formation of the a-Si film by the magnetron type RF sputtering method of this embodiment, the hydrogen concentration is in the range of 5 to 100% and the film formation temperature is in the range of 50 to 500 ° C.
The RF output can be arbitrarily selected in the range of 1 W to 10 MW in the range of 500 Hz to 100 GHz, or may be combined with a pulse energy transmission source.
[0104]
Sputtering may be performed by making hydrogen into a higher plasma by using more intense light irradiation (wavelength 1000 nm or less) energy or electron cyclotron resonance (ECR) conditions.
[0105]
This is because a micro structure in a film formed by sputtering by making light atoms such as hydrogen into plasma and efficiently generating positive ions necessary for sputtering, in the case of this embodiment, a micro structure in an a-Si film. This is to prevent the occurrence of structure. Moreover, you may apply said other reactive gas to said means.
[0106]
In this embodiment, an amorphous semiconductor film is simply described as an a-Si film. This usually indicates a silicon semiconductor, but other than germanium or mixed silicon and germanium Si _x Ge _1-X (0 <X <1).
[0107]
Needless to say, the configuration of the present invention can be applied to staggered, coplanar, reverse staggered, and reverse coplanar insulated gate field effect transistors.
[0108]
【The invention's effect】
By adopting the configuration of the present invention, it is possible to solve the problem of difficulty in thermal crystallization, which is a problem in the process of obtaining a semiconductor having crystallinity by thermally crystallizing a non-single crystal semiconductor obtained by an industrially useful sputtering method. In addition, it was possible to produce a high-performance thin film transistor by using this crystalline semiconductor layer.
[0109]
Further, according to the method of the present invention, all the minimum necessary portions of the insulated gate semiconductor device can be produced by the sputtering method. For this reason, in the insulated gate type semiconductor device as shown in FIG. 1D, the lower side (18) of the active layer, that is, the contact portion with the base insulating film is partially oxidized to have a semi-insulating state. The electrical characteristics at the part are slightly deteriorated. As a result, a back channel cannot be generated in this portion, and the reverse leakage current can be reduced. This is very effective when this semiconductor device is used as a CMOS, and shows a significant effect in reducing the off-current.
[0110]
In addition, it is possible to reduce the concentration of oxygen impurities present in the semiconductor film, and to realize an insulated gate semiconductor device having a very high mobility, which is difficult to form a barrier against carriers near the crystal grain boundary. did it.
[0111]
Furthermore, since a plurality of different processes can be performed in the same apparatus, continuous processes can be performed without being affected by the outside. In addition, productivity can be improved because a plurality of processes can be performed simultaneously.
[Brief description of the drawings]
1 is a manufacturing process diagram of Example 1. FIG.
FIG. 2 is a schematic view of a multi-chamber sputtering apparatus for the present invention.
FIG. 3 shows a relationship between a hydrogen partial pressure ratio and carrier mobility.
FIG. 4 shows a relationship between a hydrogen partial pressure ratio and a threshold value.
FIG. 5 shows a Raman spectrum of the crystalline semiconductor film of the present invention.
is there.
FIG. 6 is a sectional view of another embodiment of the present invention.
[Explanation of symbols]
(1) ... Reserve room
(2) ... Substrate passage chamber
(3) (4) ・ ・ Sputtering chamber
(5) (6) (7) (8) ... Gate valve

Claims (1)

Forming a gate electrode made of a refractory metal on the insulating surface of the substrate;
Covering the gate electrode, a silicon oxide film to be a gate insulating film is formed using a quartz or single crystal silicon target by magnetron type RF sputtering in an oxygen atmosphere,
After forming the silicon oxide film, an oxygen concentration of 5 × 10 ¹⁸ cm ⁻³ or less is obtained in a mixed gas atmosphere of hydrogen and argon having a hydrogen partial pressure of 20% or more without exposing the substrate to the atmosphere. Using a crystalline silicon target, an amorphous silicon film having an oxygen concentration of 7 × 10 ¹⁹ cm ⁻³ or less for forming a channel region is formed on and in contact with the silicon oxide film by magnetron RF sputtering.
Wherein after forming the amorphous silicon film, without exposing said substrate to the atmosphere, by crystallization by heating at a temperature of the amorphous silicon film 450-700 ° C., 520 cm ^-1 by laser Raman analysis A method for manufacturing an insulated gate field effect transistor for forming a crystalline silicon film in which a peak indicating that the crystallinity is shifted to a lower wave number side is measured ,
The formation of the silicon oxide film, the formation of the amorphous silicon film, and the heating of the amorphous silicon film are performed in different chambers of the same apparatus, respectively, and the reaction chamber for forming the silicon oxide film and the amorphous film are formed. The reaction chamber for forming the porous silicon film is a dedicated reaction chamber by magnetron type RF sputtering, and is partitioned by an independent gate valve for each reaction chamber and connected to the substrate passage chamber. In the substrate passage chamber, A method for manufacturing an insulated gate field effect transistor, wherein the amorphous silicon film is heated at 450 to 700 ° C. for crystallization .

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