JP4141549B2 - 半導体発光装置の製造方法 - Google Patents

半導体発光装置の製造方法 Download PDF

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Publication number
JP4141549B2
JP4141549B2 JP31575998A JP31575998A JP4141549B2 JP 4141549 B2 JP4141549 B2 JP 4141549B2 JP 31575998 A JP31575998 A JP 31575998A JP 31575998 A JP31575998 A JP 31575998A JP 4141549 B2 JP4141549 B2 JP 4141549B2
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JP
Japan
Prior art keywords
solder
submount
semiconductor laser
present
light emitting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP31575998A
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English (en)
Japanese (ja)
Other versions
JPH11220218A (ja
JPH11220218A5 (enExample
Inventor
茂稔 伊藤
由紀子 森下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP31575998A priority Critical patent/JP4141549B2/ja
Publication of JPH11220218A publication Critical patent/JPH11220218A/ja
Publication of JPH11220218A5 publication Critical patent/JPH11220218A5/ja
Application granted granted Critical
Publication of JP4141549B2 publication Critical patent/JP4141549B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond

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  • Led Device Packages (AREA)
  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)
JP31575998A 1997-11-07 1998-11-06 半導体発光装置の製造方法 Expired - Fee Related JP4141549B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31575998A JP4141549B2 (ja) 1997-11-07 1998-11-06 半導体発光装置の製造方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP9-305485 1997-11-07
JP30548597 1997-11-07
JP31575998A JP4141549B2 (ja) 1997-11-07 1998-11-06 半導体発光装置の製造方法

Publications (3)

Publication Number Publication Date
JPH11220218A JPH11220218A (ja) 1999-08-10
JPH11220218A5 JPH11220218A5 (enExample) 2005-07-28
JP4141549B2 true JP4141549B2 (ja) 2008-08-27

Family

ID=26564317

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31575998A Expired - Fee Related JP4141549B2 (ja) 1997-11-07 1998-11-06 半導体発光装置の製造方法

Country Status (1)

Country Link
JP (1) JP4141549B2 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017010818A1 (ko) * 2015-07-15 2017-01-19 서울바이오시스 주식회사 발광 다이오드 패키지 제조 방법
US10593850B2 (en) 2015-07-15 2020-03-17 Seoul Viosys Co., Ltd. Method for manufacturing light emitting diode package

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3486900B2 (ja) * 2000-02-15 2004-01-13 ソニー株式会社 発光装置およびそれを用いた光装置
JP2002314184A (ja) 2001-04-11 2002-10-25 Nec Corp 光半導体モジュール
JP2002374029A (ja) * 2001-06-15 2002-12-26 Sony Corp マルチビーム半導体レーザ素子
DE10221857A1 (de) 2002-05-16 2003-11-27 Osram Opto Semiconductors Gmbh Verfahren zum Befestigen eines Halbleiterchips in einem Kunststoffgehäusekörper, optoelektronisches Halbleiterbauelement und Verfahren zu dessen Herstellung
JP4221649B2 (ja) * 2002-09-02 2009-02-12 スタンレー電気株式会社 波長変換素子並びにその製造方法
JP4522333B2 (ja) * 2005-07-01 2010-08-11 三洋電機株式会社 半導体レーザ素子の製造方法
JP4595929B2 (ja) * 2006-11-28 2010-12-08 ソニー株式会社 発光装置の製造方法
JP2008153502A (ja) * 2006-12-19 2008-07-03 Sony Corp 発光装置、発光装置の製造方法および画像出力装置
JP4872770B2 (ja) * 2007-04-12 2012-02-08 ソニー株式会社 実装基板および半導体レーザ装置
US8368100B2 (en) * 2007-11-14 2013-02-05 Cree, Inc. Semiconductor light emitting diodes having reflective structures and methods of fabricating same
KR101118032B1 (ko) * 2010-05-27 2012-02-24 (주)엠에스아이코리아 Led 칩의 냉각구조
JP5799727B2 (ja) * 2011-10-06 2015-10-28 三菱電機株式会社 多波長半導体レーザ装置及び多波長半導体レーザ装置の製造方法
JP2013105973A (ja) * 2011-11-16 2013-05-30 Seiko Epson Corp 発光装置およびその製造方法、並びに、プロジェクター
USD826871S1 (en) 2014-12-11 2018-08-28 Cree, Inc. Light emitting diode device
JP6491784B1 (ja) * 2018-08-03 2019-03-27 株式会社日立パワーソリューションズ 単結晶炭化ケイ素基板、単結晶炭化ケイ素基板の製造方法、および半導体レーザ
JP7564014B2 (ja) * 2021-02-24 2024-10-08 浜松ホトニクス株式会社 外部共振型レーザモジュール
CN114784612B (zh) * 2022-06-20 2022-11-11 深圳市埃尔法光电科技有限公司 一种拓扑结构激光芯片的晶圆排布方法
CN114784613B (zh) * 2022-06-20 2022-11-11 深圳市埃尔法光电科技有限公司 一种单元化双拓扑结构的激光芯片

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017010818A1 (ko) * 2015-07-15 2017-01-19 서울바이오시스 주식회사 발광 다이오드 패키지 제조 방법
US10593850B2 (en) 2015-07-15 2020-03-17 Seoul Viosys Co., Ltd. Method for manufacturing light emitting diode package

Also Published As

Publication number Publication date
JPH11220218A (ja) 1999-08-10

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