JP4131077B2 - Silicon wafer manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a manufacturing method that provides an intrinsic gettering (hereinafter referred to as IG) effect on a silicon wafer that is free from aggregates of point defects formed by the Czochralski method (hereinafter referred to as CZ method). More specifically, the present invention relates to a silicon wafer manufacturing method that sufficiently expresses oxygen precipitation nuclei and exhibits an IG effect by heat treatment in a device manufacturing process, and a silicon wafer manufactured by the method.
[0002]
[Prior art]
In recent years, in the process of manufacturing a semiconductor integrated circuit, as a cause of lowering yield, micro defects of oxygen precipitates that are the core of oxidation-induced stacking faults (hereinafter referred to as OSF) and particles caused by crystals (Crystal Originated Particles, hereinafter referred to as COP) or the presence of interstitial-type large dislocation (hereinafter referred to as LD). OSF is introduced with a micro defect that becomes a nucleus during crystal growth, and becomes apparent in a thermal oxidation process or the like when manufacturing a semiconductor device, and causes a defect such as an increase in leakage current of the manufactured device. COPs are pits caused by crystals that appear on the wafer surface when the mirror-polished silicon wafer is washed with a mixture of ammonia and hydrogen peroxide. When this wafer is measured with a particle counter, this pit is also detected as a light scattering defect together with the original particles. This COP causes deterioration of electrical characteristics, for example, dielectric breakdown characteristics (Time Dependent dielectric Breakdown, TDDB) of oxide films, oxide breakdown voltage characteristics (Time Zero Dielectric Breakdown, TZDB), and the like. Further, if COP exists on the wafer surface, a step is generated in the device wiring process, which may cause disconnection. In addition, the element isolation portion also causes leakage and the like, thereby reducing the product yield. Furthermore, LD is also called a dislocation cluster, or a pit is formed when a silicon wafer having such a defect is immersed in a selective etching solution containing hydrofluoric acid as a main component. This LD also causes deterioration of electrical characteristics such as leakage characteristics and isolation characteristics.
[0003]
From the above, it is necessary to reduce OSF, COP and LD from a silicon wafer used for manufacturing a semiconductor integrated circuit.
A defect-free silicon wafer having no OSF, COP, and LD is disclosed in Japanese Patent Laid-Open No. 11-1393. This defect-free silicon wafer has a perfect region [P] where a perfect region where agglomerates of vacancy-type point defects and agglomerates of interstitial silicon-type point defects do not exist in a silicon single crystal ingot, respectively. P] is a silicon wafer cut out from an ingot. The perfect region [P] is between a region [I] where interstitial silicon type point defects exist predominantly and a region [V] where hole type point defects exist predominantly within the silicon single crystal ingot. Intervene. In the silicon wafer composed of the perfect region [P], the ingot pulling speed is V (mm / min), and the temperature gradient in the ingot vertical direction in the vicinity of the interface between the silicon melt and the ingot is G (° C./mm). When the thermal oxidation treatment is performed, a value of V / G (mm ² / min · ° C.) is determined so that the OSF generated in a ring shape disappears in the center of the wafer.
On the other hand, some semiconductor device manufacturers require a silicon wafer that does not have OSF, COP, and LD, but has the ability to getter metal contamination generated in the device process. When a wafer that does not have sufficient gettering capability is contaminated with metal in the device process, junction leakage, device malfunction due to trap levels due to metal impurities, and the like, resulting in a decrease in product yield.
[0004]
[Problems to be solved by the invention]
However, although the silicon wafer cut out from the ingot composed of the perfect region [P] does not have OSF, COP, and LD, oxygen precipitation does not necessarily occur inside the wafer in the heat treatment of the device manufacturing process. The IG effect may not be sufficiently obtained.
The object of the present invention consists only of the mixed region or region [P _V ] of the region [P _V ] and the region [P _I ] , and the oxygen concentration is 0.5 × 10 ^{18 to} 1.1 × 10 ¹⁸ atoms / cm. ^{3 Even if} a silicon wafer cut from an ingot (former ASTM) is subjected to a predetermined heat treatment for a relatively short time, there is no agglomeration of point defects and gettering ability It is providing the manufacturing method of a silicon wafer which can form the IG layer which has this, and the silicon wafer manufactured by the method.
Another object of the present invention is to provide a silicon wafer manufacturing method and a silicon wafer manufactured by the method, which do not require an oxygen donor killer treatment.
[0005]
[Means for Solving the Problems]
As shown in FIGS. 1 to 4, the invention according to claim 1 grows a silicon single crystal ingot doped with nitrogen by 1 × 10 ¹⁰ to 1 × 10 ¹⁴ atoms / cm ³ by the Czochralski method. A region in which interstitial silicon type point defects exist predominantly in [I], a region in which vacancy type point defects exist predominantly [V], This is a method for producing a silicon wafer in which a point defect aggregate cut out from an ingot composed of a perfect region [P] does not exist, where [P] is a perfect region where no hole-type point defect aggregate exists.
The characteristic configuration is that the region below the lowest interstitial silicon concentration that is adjacent to the region [I] and belongs to the perfect region [P] and capable of forming an interstitial dislocation is [P _I ], and is adjacent to the region [V]. In addition, when the region below the vacancy concentration that belongs to the perfect region [P] and can form COP or FPD is [P _V ], the mixed region or region [P _{V of the} region [P _V ] and the region [P _I ] ] consists only and oxygen concentration pulling a silicon single crystal ingot is ^{0.5 × 10 18 ~1.1 × 10 18} atoms / cm 3 ( old ASTM), a a silicon wafer cut out from an ingot argon and Heat from room temperature to 1100 to 1300 ° C. at a heating rate of 10 to 100 ° C./second in a mixed gas atmosphere of nitrogen, hold at 1100 to 1300 ° C. for 0 to 10 seconds, and further from 1100 to 1300 ° C. to room temperature. There is to be cooled at a cooling rate of 10~100 ℃ / sec.
[0006]
In the silicon wafer manufacturing method described in claim 1, the oxygen concentration of the nitrogen-doped ingot is 0.5 × 10 ^{18 to} 1.1 × 10 ¹⁸ atoms / cm ³ (former ASTM). Thus, when the silicon wafer is composed of only the mixed region or region [P _V ] of the region [P _V ] and the region [P _I ], the silicon wafer cut out from the ingot is heat-treated for a relatively short time as described above. By applying (rapid heating and rapid cooling), oxygen precipitation nuclei are also expressed in a region [P _I ] where oxygen precipitation nuclei are not introduced during crystal growth, and regions where oxygen precipitation nuclei are introduced during crystal growth [P _V ] Increases the density of the oxygen precipitation nuclei. Therefore, when the heat-treated wafer is thermally oxidized in the device manufacturing process of the semiconductor device manufacturer, the oxygen precipitation nuclei grow into oxygen precipitates (Bulk Micro Defect, hereinafter referred to as BMD), and the region [P _V ]. Even if the wafer is composed of only the mixed region of the region [P _I ] or the region [P _V ] , an IG layer having gettering ability is formed on the wafer, that is, the entire surface of the wafer exhibits the IG effect.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
The silicon wafer of the present invention is manufactured by pulling up an ingot (nitrogen-doped) from a silicon melt in a hot zone furnace with a predetermined pulling speed profile based on Boronkov theory by the CZ method, and then cutting out the ingot. Is done.
In general, when a silicon single crystal ingot is pulled from a silicon melt in a hot zone furnace by the CZ method, point defects and agglomerates (agglomerates: three-dimensional) Defect) occurs. There are two general forms of point defects: vacancy-type point defects and interstitial silicon-type point defects. A vacancy-type point defect is one in which one silicon atom leaves one of the normal positions in the silicon crystal lattice. Such holes become hole-type point defects. On the other hand, when an atom is found at a position (interstitial site) other than the lattice point of the silicon crystal, this becomes an interstitial silicon point defect.
[0009]
Point defects are generally formed at the contact surface between a silicon melt (molten silicon) and an ingot (solid silicon). However, by continuously pulling up the ingot, the portion that was the contact surface begins to cool as it is pulled up. During cooling, vacancy point defects or interstitial silicon point defects merge with each other by diffusion to form vacancy agglomerates or interstitial agglomerates. Is formed. In other words, the aggregate is a three-dimensional structure generated due to the merge of point defects.
The agglomerates of vacancy-type point defects include defects called LSTD (Laser Scattering Tomograph Defects) or FPD (Flow Pattern Defects) in addition to the above-mentioned COP. Contains a defect called. FPD appears when a silicon wafer produced by cutting an ingot is subjected to secco etching (Secco etching, etching with a mixed solution of HF: K ₂ Cr ₂ O ₇ (0.15 mol / l) = 2: 1) for 30 minutes. It is a source of traces that exhibit a unique flow pattern, and LSTD is a source that generates scattered light having a refractive index different from that of silicon when an infrared ray is irradiated into a silicon single crystal.
[0010]
Boronkov's theory is that in order to grow a high purity ingot with a small number of defects, the ingot pulling speed is V (mm / min), and the temperature gradient in the vertical direction of the ingot near the interface between the ingot and the silicon melt is G (° C. / Mm), V / G (mm ² / min · ° C.) is controlled. In this theory, as shown in FIG. 1, V / G is taken on the horizontal axis, and the vacancy-type point defect concentration and the interstitial silicon type point defect concentration are taken on the same vertical axis. Is described schematically, and it is explained that the boundary between the void region and the interstitial silicon region is determined by V / G. More specifically, when the V / G ratio is equal to or higher than the critical point, an ingot having a dominant vacancy-type point defect concentration is formed. On the other hand, when the V / G ratio is lower than the critical point, an ingot having a dominant interstitial silicon-type point defect concentration is formed. It is formed. In FIG. 1, [I] indicates a region where an interstitial silicon type point defect is dominant and an interstitial silicon type point defect exists ((V / G) ₁ or less), and [V] indicates an ingot. The vacancy-type point defect is dominant and indicates a region ((V / G) ₂ or more) where the vacancy-type point defect aggregate exists, [P] A perfect region ((V / G) ₁ to (V / G) ₂ ) in which an aggregate of interstitial silicon type point defects does not exist is shown. A region [OSF] ((V / G) ₂ to (V / G) ₃ ) that forms an OSF nucleus exists in the region [V] adjacent to the region [P].
[0011]
The perfect region [P] is further classified into a region [P _I ] and a region [P _V ]. [P _I ] is a region where the V / G ratio is from the above (V / G) ₁ to the critical point, and [P _V ] is a region where the V / G ratio is from the critical point to the above (V / G) _2. is there. That is, [P _I ] is a region adjacent to the region [I] and having an interstitial silicon type point defect concentration lower than the lowest interstitial silicon type point defect concentration capable of forming interstitial dislocations, and [P _V]. ] Is a region adjacent to the region [V] and having a vacancy-type point defect concentration lower than the lowest vacancy-type point defect concentration capable of forming an OSF.
The predetermined pulling rate profile of the present invention shows that when the ingot is pulled from the silicon melt in the hot zone furnace, the ratio of the pulling rate to the temperature gradient (V / G) indicates the formation of agglomerates of interstitial silicon type point defects. The first critical ratio to be prevented ((V / G) ₁ ) or higher, and the agglomeration of vacancy-type point defects is limited to a region where the vacancy-type point defects in the center of the ingot are dominantly present. It is determined so as to be maintained below the two critical ratio ((V / G) ₂ ).
[0012]
The profile of the pulling speed is determined based on the above-mentioned Boronkov theory by simulation, by experimentally cutting a reference ingot in the axial direction, or by combining these techniques. That is, this determination is performed by cutting the ingot cut in the axial direction in the transverse direction after the simulation, confirming it in the wafer state, and repeating the simulation. For the simulation, a plurality of types of pulling speeds are determined within a predetermined range, and a plurality of reference ingots are grown. As shown in FIG. 2, the pulling speed profile for the simulation is from a high pulling speed (a) such as 1.2 mm / min to a low pulling speed (c) of 0.5 mm / min and again a high pulling speed (d). Adjusted to The low pulling speed may be 0.4 mm / min or less, and the change in pulling speeds (b) and (d) is preferably linear.
A plurality of reference ingots pulled up at different speeds are cut in the axial direction. The optimum V / G is determined from the correlation of the results of axial cutting, wafer verification and simulation, then the optimum pulling speed profile is determined, and an ingot is manufactured with that profile. The actual pull rate profile will depend on many variables including, but not limited to, the desired ingot diameter, the particular hot zone furnace used and the quality of the silicon melt.
[0013]
Drawing the cross-sectional view of the ingot when V / G is continuously reduced by gradually reducing the pulling speed, the fact shown in FIG. 3 can be seen. FIG. 3 shows a region [V] in which vacancy type point defects exist predominantly in the ingot [V], a region in which interstitial silicon type point defects exist predominantly [I], and vacancy type point defects. A perfect region where no agglomerates and no agglomerates of interstitial silicon type point defects exist is indicated as [P]. As described above, the perfect region [P] is further classified into a region [P _I ] and a region [P _V ]. The region [P _V ] is a region where vacant point defects that do not become aggregates exist in the perfect region [P], and the region [P _I ] is an interstitial silicon type that does not become aggregates in the perfect region [P]. This is an area where point defects exist. Specifically, the axial positions 1 (circle numeral 1 in FIG. 3 ) to 3 (circle numeral 3 in FIG. 3 ) of the ingot in FIG. 3 are aggregates of hole type point defects and interstitial silicon type point defects. It is a perfect region without a collection, and only the region [P _V ] and the region [P _I ] mixed region (axial position 2 (circle numeral 2 in FIG. 3)) and region [P _V ] (axial position 1 ( In FIG. 3, the circled numbers 1)) are the areas according to the present invention . Note that the axial position 3 in FIG. 3 (circle numeral 3 in FIG. 3) is only the region [P _I ] and is not included in the region of the present invention.
[0014]
By doping the ingot with nitrogen at 1 × 10 ¹⁰ to 1 × 10 ¹⁴ atoms / cm ³ , preferably 5 × 10 ¹² to 1 × 10 ¹⁴ atoms / cm ³ , the region [P _V ] or the region [P _I ] is doped. Aggregation of point defects does not occur in any one region or both mixed regions, the density of oxygen precipitation nuclei in the region [P _V ] increases, and oxygen precipitation of a desired density or more also occurs in the region [P _I ]. Nuclei can be formed. As a method of doping the ingot with nitrogen, when the ingot is pulled up, it is poured into a polycrystalline silicon mixed with nitride or a polycrystalline silicon melt formed with a nitride film, or the ingot is pulled up in a nitrogen atmosphere. Is done. The reason for limiting the doping amount of nitrogen to 1 × 10 ¹⁰ to 1 × 10 ¹⁴ atoms / cm ³ is that the effect of promoting the formation of oxygen precipitates cannot be obtained if it is less than 1 × 10 ¹⁰ atoms / cm ^3. This is because if it exceeds × 10 ¹⁴ atoms / cm ³ , it deviates from the desired resistivity due to electrical compensation. That is, if the amount of nitrogen doping that makes the wafer N-type (this nitrogen replaces silicon) increases in the wafer that has become P-type due to boron doping, the P-type and N-type cancel each other and resistance This is because the value rises.
[0015]
In addition, in a slight region ((V / G) ₂ to (V / G) _{3 in} FIG. 1) in contact with the perfect region where the vacancy-type point defects exist predominantly, COP and LD are generated in the wafer surface. It is an area that is not. But for the silicon-way Ha containing this region, according to the conventional OSF manifestation heat treatment under an oxygen atmosphere, and heat-treated 2-5 hours at a temperature of 1000 ° C. ± 30 ° C., subsequently 1130 ° C. at a temperature of ± 30 ° C. When heat-treated for 1 to 16 hours, OSF is generated. That is, the OSF ring occurs in the vicinity of a half of the radius of the wafer. COP tends to appear in the region where the vacancy-type point defects surrounded by the OSF ring are dominant.
[0016]
In addition, agglomerates of point defects such as COP and LD may show different values for detection sensitivity and detection lower limit depending on the detection method. Therefore, in this specification, the meaning of “there is no agglomeration of point defects” means that the product of the observation area and the etching allowance is measured by an optical microscope after the mirror-finished silicon single crystal is subjected to non-stirring secco etching. Is observed as an inspection volume, each aggregate of flow pattern (vacancy type defects) and dislocation clusters (interstitial silicon type point defects) has one defect for the inspection volume of 1 × 10 ⁻³ cm ^3. When the detected case is defined as a detection lower limit (1 × 10 ³ pieces / cm ³ ), it means that the number of point defect aggregates is not more than the above detection lower limit.
The silicon wafer of the present invention is obtained by cutting wafers 1 (circle number 1 in FIG. 3) and 2 (circle number 1 in FIG. 3 ) cut out at the axial positions 1 (circle number 1 in FIG. 3) and 2 (circle number 2 in FIG. In FIG. 4A and FIG. 4B, the plan view is a circled number 2) . Wafers 1 (circled number 1 in FIG. 3) and 2 (circled number 2 in FIG. 3) are processed by rapid heating and rapid heat treatment of the present invention . In order to generate oxygen precipitation nuclei having a desired density or higher in 2) , it is necessary that the oxygen concentration be 0.5 × 10 ^{18 to} 1.1 × 10 ¹⁸ atoms / cm ³ (former ASTM).
[0017]
Next, rapid heating and rapid cooling heat treatment of the silicon wafer 1 (circled number 1 in FIG. 3) and 2 (circled number 2 in FIG. 3) will be described.
This heat treatment wafer 1 (FIG. 3 circled numeral 1) and 2 (circled number 2 in FIG. 3) to 1100 to 1300 ° C. from room temperature under a mixed gas atmosphere of an argon and nitrogen 20 to 70 ° C. / sec Atsushi Nobori It heats at a speed | rate, hold | maintains at 1100-1300 degreeC for 0 to 10 second, and also cools by cooling at a temperature-fall rate of 20-100 degrees C / second from 1100-1300 degreeC to room temperature. Here, the holding time of 0 seconds means that the temperature is lowered immediately after the temperature is raised and is not kept at a predetermined temperature. The wafer is introduced into a heat treatment furnace maintained at room temperature or a heat treatment furnace with a residual heat of several hundred degrees in continuous operation, and an incandescent lamp, halogen lamp, arc is applied to the silicon wafer in this heat treatment furnace. Radiation light such as a lamp or a graphite heater is irradiated, and the temperature is raised to 1100 to 1300 ° C. at a temperature raising rate of 10 to 100 ° C./second, preferably 20 to 70 ° C./second. When the rate of temperature increase is less than 10 ° C./second, the oxygen precipitation nuclei increase, but the processing ability is inferior and is not practical. Further, when the holding temperature is lower than 1100 ° C., the oxygen precipitation nuclei do not increase sufficiently, and when the thermal oxidation treatment is performed in the device manufacturing process of the semiconductor device manufacturer, the IG effect cannot be sufficiently exhibited. If the holding temperature exceeds 1300 ° C. or the holding time exceeds 10 seconds, a slip occurs or the heat treatment productivity decreases. On the other hand, if the rate of temperature rise exceeds 100 ° C./second, there is a problem that slip occurs due to variations in self-weight stress and in-plane temperature distribution.
[0018]
On the other hand, the cooling is performed by stopping or gradually decreasing the irradiation of radiant light such as an incandescent lamp of a heat treatment furnace maintained at the predetermined temperature, and the temperature is lowered by 10 to 100 ° C / second, preferably 20 to 100 ° C / second. Cool to room temperature at speed. When the rate of temperature decrease is less than 10 ° C./second, sufficient oxygen precipitation nuclei are not formed, and when the rate of temperature decrease exceeds 100 ° C./second, a difference in temperature distribution increases in the plane, causing slip. As described above, the heat treatment (rapid heating time, holding time at a predetermined temperature, and rapid cooling time) that is shorter than the conventional heat treatment can be completed by doping the ingot before cutting the wafer with nitrogen. Because. As a result, no agglomerates of point defects are present in one or both of the region [P _V ] and the region [P _I ] of the wafer, and the density of oxygen precipitation nuclei in the region [P _V ] is high. At the same time, oxygen precipitation nuclei having a desired density or more are formed in the region [P _I ], so that the wafer has gettering capability by performing thermal oxidation treatment in the semiconductor device manufacturing process on the wafer after the heat treatment. An IG layer is formed, and the wafer can exhibit the IG effect.
[0019]
In addition, by shortening the heat treatment time as described above, the haze of the silicon wafer (the degree to which the wafer surface looks whitish when irradiated with a spotlight), microroughness (the wafer surface after mirror polishing the silicon wafer) Surface roughness at a pitch of 100 to 1000 nm), slip (crystal defects caused by sliding in silicon wafer crystals) and contamination (Cu, Fe, Cr, Ni) are reduced. Furthermore, by performing the above heat treatment, the oxygen donor killer treatment in the wafer process becomes unnecessary.
[0020]
【Example】
Next, examples of the present invention will be described together with reference examples and comparative examples.
< Reference Example 1 >
A p-type silicon ingot doped with boron (B) and nitrogen (N) having a diameter of 8 inches was pulled using a silicon single crystal pulling apparatus. The ingot had a length of 1200 mm, a crystal orientation of (100), a resistivity of about 10 Ωcm, and an oxygen concentration of 0.9 × 10 ¹⁸ atoms / cm ³ (former ASTM). ^Two ingots were grown under the same conditions while continuously decreasing the V / G at the time of pulling from 0.28 mm ² / min ° C. to 0.16 mm ² / min ° C. One of the ingots is cut in the center of the ingot in the pulling direction as shown in FIG. 3, and the position of each region is examined. From another one, the axial position 2 in FIG. 3 (circle number 2 in FIG. 3) A silicon wafer 2 (circled number 2 in FIG. 3) was cut out and used as a sample. In this example, the wafer to be a sample is the wafer 2 shown in FIG. 4B having a region [P _V ] at the center and a region [P _I ] around it (circle numeral 2 in FIG. 3). .
This wafer 2 cut out from the ingot and mirror-polished (circled number 2 in FIG. 3) is heated from room temperature to 1250 ° C. at a heating rate of 40 ° C./second in a nitrogen atmosphere, held at 1250 ° C. for 3 seconds, and further 50 ° C. It was cooled at a rate of temperature decrease of / sec. In order to prevent nitriding of the surface, 1% oxygen was allowed to flow simultaneously with nitrogen up to 1250 to 700 ° C.
[0021]
< Reference Example 2 >
Heat treatment was performed in the same manner as in Reference Example 1 using a wafer 1 (circled number 1 in FIG. 3) cut out from the same ingot as in Reference Example 1 at an axial position 1 in FIG. 3 (circled number 1 in FIG. 3) and mirror-polished.
<Reference Example 3 >
Using the wafer 3 (circle number 3 in FIG. 3) cut out from the same ingot as that of Reference Example 1 at the axial position 3 in FIG. 3 (circle number 3 in FIG. 3), heat treatment was performed in the same manner as in Reference Example 1 .
[0022]
<Reference Example 4 >
Wafer 2 (circle number 2 in FIG. 3) cut out from the same ingot as in Reference Example 1 at the axial position 2 in FIG. 3 (circle number 2 in FIG. 3) is 40 ° C. from room temperature to 1250 ° C. in an argon atmosphere. The sample was heated at a rate of temperature increase of / sec, held at 1250 ° C for about 3 seconds, and further cooled at a rate of temperature decrease of 50 ° C / sec.
<Example 1 >
Wafer 2 (circle numeral 2 in FIG. 3) cut out from the same ingot as in Reference Example 1 at the axial position 2 in FIG. 3 (circle numeral 2 in FIG. 3), and argon and nitrogen are 50% and 50%, respectively. Under an atmosphere, the sample was heated from room temperature to 1250 ° C. at a temperature increase rate of 40 ° C./second, held at 1250 ° C. for about 3 seconds, and further cooled at a temperature decrease rate of 50 ° C./second.
[0023]
<Comparative Example 1>
Under the same conditions as in Reference Example 1 , a wafer 2 (circle number 2 in FIG. 3) that was cut out from the ingot grown without doping nitrogen at the axial position 2 in FIG. 3 (circle number 2 in FIG. 3) and mirror-polished was obtained. Under a nitrogen atmosphere, the sample was heated from room temperature to 1250 ° C. at a temperature increase rate of 40 ° C./second, held at 1250 ° C. for 3 seconds, and further cooled at a temperature decrease rate of 50 ° C./second.
<Comparative example 2>
Wafer 2 (circle number 2 in FIG. 3) cut out from the same ingot as in Comparative Example 1 at axial position 2 in FIG. 3 (circle number 2 in FIG. 3) and mirror-polished in a nitrogen atmosphere from room temperature to 1250 ° C. at 40 ° C. / The sample was heated at a rate of temperature increase of 1 second, held at 1250 ° C. for 30 seconds, and further cooled at a temperature decrease rate of 50 ° C./second.
[0024]
<Comparison test and evaluation>
After holding the wafers of Example 1 , Reference Examples 1 to 4 , and Comparative Examples 1 and 2 in an oxygen atmosphere at 800 ° C. for 4 hours in a similar manner to the heat treatment in the device manufacturing process of a semiconductor device manufacturer. Then, a heat treatment was performed for 16 hours at 1000 ° C. in an oxygen atmosphere. Next, the haze and microroughness of each one of the two wafers were measured.
In addition, the other of the two wafers is cleaved, and the wafer surface is further selectively etched with a Wright etching solution. By observation with an optical microscope, a region [P _V ] and a region at a depth of 350 μm from the wafer surface are observed. The presence / absence of slip in the portion corresponding to [P _I ], the degree of contamination, the BMD volume density, and the width of the denuded zone (hereinafter referred to as DZ) were measured.
[0025]
The haze is evaluated by measuring at a gain of 7 using a particle counter (Surf Scan 6200: manufactured by KLA Tencor), and the microroughness is measured in an area of 1000 × 1000 nm using an AFM (atomic force microscope). Evaluation was made by measuring the average roughness (Ra). The presence or absence of slip was evaluated using X-ray topography, and the degree of contamination was evaluated by measuring metal contamination (Cu, Fe, Cr) on the wafer surface using an atomic absorption method. Furthermore, the BMD volume density is evaluated by measuring the BMD volume density of the entire wafer surface from the wafer center to the wafer periphery at a depth of 100 μm from the wafer surface by observation with an optical microscope. Evaluation was made by measuring the depth from the wafer surface in a region where no observable was observed.
Table 1 shows the heat treatment conditions of the wafers of Example 1, Reference Examples 1 to 4 , Comparative Examples 1 and 2, and the cutting position of FIG. 3, and shows haze, microroughness, presence or absence of slip, degree of contamination, and BMD volume density. And Table 2 shows the widths of Dz. Also, in Table 2, N. D. Is an abbreviation of “Not Detect”.
[0026]
[Table 1]
[0027]
[Table 2]
[0028]
As is clear from Tables 1 and 2, in the nitrogen-doped wafers of Example 1 and Reference Examples 1 to 4 , a sufficient amount of oxygen was generated even in a short heat treatment time (annealing time) of 3 seconds, It was also found that the Dz width was secured. On the other hand, in the wafer of Comparative Example 1 that was not doped with nitrogen, a predetermined BMD volume density could not be secured, and in the wafer of Comparative Example 2 that was not doped with nitrogen, the heat treatment time (annealing time) was 30. Although a predetermined BMD volume density could be ensured by extending the time to a second, it was found that slipping and contamination occurred, and the surface roughness of the wafer was also increased.
[0029]
【The invention's effect】
As described above, according to the heat treatment method of the present invention, the region [P _V ] and the mixed region of the region [P _I ] or only the region [P _V ] and the oxygen concentration is 0.5 × 10 ¹⁸ to 1 .1 × 10 ¹⁸ atoms / cm ³ (former ASTM) of a silicon wafer doped with nitrogen at a temperature rising rate of 10 to 100 ° C./second from room temperature to 1100 to 1300 ° C. in a mixed gas atmosphere of argon and nitrogen Aggregates of point defects by heating and holding at 1100 to 1300 ° C. for 0 to 10 seconds and further cooling from 1100 to 1300 ° C. to room temperature at a cooling rate of 10 to 100 ° C./sec. In addition to the fact that the density of oxygen precipitation nuclei in the region [P _V ] increases, oxygen precipitation nuclei having a desired density or more are also formed in the region [P _I ]. As a result, by performing the thermal oxidation process in the semiconductor device manufacturing process on the wafer that has been subjected to the heat treatment, an IG layer having gettering capability is formed on the wafer, and the wafer can exhibit the IG effect.
Further, by performing the heat treatment of the present invention, there is an advantage that the oxygen donor killer treatment which has been conventionally performed becomes unnecessary.
[Brief description of the drawings]
FIG. 1 is a diagram showing that a void-rich ingot is formed when the V / G ratio is higher than a critical point, and an interstitial silicon-rich ingot is formed when the V / G ratio is lower than the critical point, based on the Boronkov theory. .
FIG. 2 is a characteristic diagram showing a change in pulling speed for determining a desired pulling speed profile.
FIG. 3 is a schematic view of an X-ray topography showing a region in which vacancies are dominant in a reference ingot according to the present invention, a region in which interstitial silicon is dominant and a perfect region.
4A is a plan view of a wafer in which a [P _V ] region appears on the silicon wafer corresponding to position 1 in FIG. 3 (circled number 1 in FIG. 3) .
(B) A plan view of a wafer in which a [P _V ] region and a [P _I ] region appear on the silicon wafer corresponding to position 2 in FIG. 3 (circled number 2 in FIG. 3) .
(C) Plan view of the wafer in which the [P _I ] region appears on the silicon wafer corresponding to position 3 in FIG. 3 (circle numeral 3 in FIG. 3) .

Claims (1)

A silicon single crystal ingot doped with 1 × 10 ¹⁰ to 1 × 10 ¹⁴ atoms / cm ³ of nitrogen is grown by the Czochralski method, and a region in which interstitial silicon type point defects exist predominantly in the ingot. [V] is a region where vacancy-type point defects exist predominantly, and [P] is a perfect region where there are no interstitial silicon-type point defect aggregates and no vacancy-type point defect aggregates. And when
A method for producing a silicon wafer in which no agglomerates of point defects cut out from an ingot comprising the perfect region [P] exist,
A region below the lowest interstitial silicon concentration that is adjacent to the region [I] and belongs to the perfect region [P] and capable of forming an interstitial dislocation is defined as [P _I ], adjacent to the region [V] and the When the region below the vacancy concentration that belongs to the perfect region [P] and can form COP or FPD is [P _V ],
The region [P _V ] and the mixed region of the region [P _I ] or the region [P _V ] alone, and the oxygen concentration is 0.5 × 10 ^{18 to} 1.1 × 10 ¹⁸ atoms / cm ³ (former ASTM ) Is a silicon single crystal ingot,
A silicon wafer cut out from the ingot was heated at a heating rate of 10 to 100 ° C. / sec to 1100 to 1300 ° C. from room temperature under a mixed gas atmosphere of an argon and nitrogen, 0-10 seconds at 1100 to 1300 ° C. A method for producing a silicon wafer, wherein the silicon wafer is held and further cooled from 1100 to 1300 ° C. to room temperature at a cooling rate of 10 to 100 ° C./second.