JP4055474B2 - Multilayer circuit board manufacturing method - Google Patents

Multilayer circuit board manufacturing method Download PDF

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JP4055474B2
JP4055474B2 JP2002153491A JP2002153491A JP4055474B2 JP 4055474 B2 JP4055474 B2 JP 4055474B2 JP 2002153491 A JP2002153491 A JP 2002153491A JP 2002153491 A JP2002153491 A JP 2002153491A JP 4055474 B2 JP4055474 B2 JP 4055474B2
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resistor
layer
wiring layer
circuit board
multilayer circuit
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JP2003347739A (en
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龍雄 鈴木
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株式会社トッパンＮｅｃサーキットソリューションズ
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Description

【０００１】
【発明の属する技術分野】
本発明は、抵抗体を内蔵した多層回路板及びその製造方法に関する。
【０００２】
【従来の技術】
近年、パーソナルコンピューター等に代表されるように、電子機器の小型化、薄型化が求められている。そのため、そのような電子機器等に用いられるプリント配線板も、小型化、薄型化のために、高密度、高精度の配線が求められ、最近では抵抗体等の回路部品を内蔵した多層回路板の開発も行われている。
高密度の配線を行うために、配線層の線幅も小さくなり、配線層間の接続に用いられるフィルドビアはより小さい穴径とすることが求められている。そして、ビア用孔の孔加工も、位置ずれを極力小さくするように高い精度の加工が求められている。そのような、高密度、高精度の配線層を有する多層回路板では、絶縁基材及び絶縁層が薄型化する傾向にあり、多層回路板の製造工程及び実装時の熱工程により、多層回路板に伸縮、反り等が発生し易いという問題を有しており、抵抗体等の回路部品を内蔵した多層回路板では、信頼性を損なうという問題が発生することがある。
【０００３】
【発明が解決しようとする課題】
本発明は、上記問題点に鑑み考案されたもので、信頼性を有する抵抗体内蔵の多層回路板及びその製造方法を提供することを目的とする。
【０００４】
【課題を解決するための手段】
本発明に於いて上記問題を解決するために、まず請求項１においては、絶縁基材上に絶縁層を介して少なくとも２層以上の配線層が形成された抵抗体内蔵の多層プリント配線板であって、前記絶縁層がガラスクロス及び絶縁樹脂とで構成されていることを特徴とする多層回路板としたものである。
【０００５】
また、請求項２においては、前記絶縁層にフィラーが混入されていることを特徴とする請求項１記載の多層回路板としたものである。
【０００６】
また、請求項３においては、以下の工程を少なくとも備えることを特徴とする請求項１に記載の多層回路板の製造方法としたものである。
（ａ）絶縁基材１１の両面に第１配線層２１ａ及び第１配線層２１ｂを形成する工程。
（ｂ）絶縁基材１１上の所定の第１配線層２１ａ及び第１配線層２１ｂ間の配線電極上に抵抗体４１ａを形成する工程。
（ｃ）抵抗体４１ａ及び絶縁層３１上にガラスクロス及び絶縁樹脂からなる絶縁層５１を形成する工程。
（ｄ）絶縁層５１上に第２配線層８１ａ及び第２配線層８１ｂを形成する工程。
（ｅ）（ｂ）〜（ｄ）の工程を必要回数繰り返して所望の多層回路板を作製する工程。
【０００７】
さらにまた、請求項４においては、以下の工程を少なくとも備えることを特徴とする請求項２に記載の多層回路板の製造方法としたものである。
（ａ）絶縁基材１１の両面に第１配線層及び第１配線層２１ｂを形成する工程。
（ｂ）絶縁基材１１上の所定の第１配線層２１ａ及び第１配線層２１ｂ間の配線電極上に抵抗体４１ａを形成する工程。
（ｃ）抵抗体４１ａ及び絶縁層３１上にガラスクロス、フィラー及び絶縁樹脂からなる絶縁層６１を形成する工程。
（ｄ）絶縁層６１上に第２配線層８１ａ及び第２配線層８１ｂを形成する工程。
（ｅ）（ｂ）〜（ｄ）の工程を必要回数繰り返して所望の多層回路板を作製する工程。
【０００８】
【発明の実施の形態】
以下本発明の実施の形態につき説明する。
図１（ａ）は、請求項１に係る本発明の多層回路板の一実施例を示す。
図１（ｂ）は、請求項２に係る本発明の多層回路板の一実施例を示す。
請求項１に係る本発明の多層回路板は、図１（ａ）に示すように、第１配線層２１ａ及び第１配線層２１ｂ間に抵抗体４１ａを形成し、第１配線層２１ａ及び第１配線層２１ｂと第２配線層８１ａ及び第２配線層８１ｂ間にガラスクロスに絶縁樹脂を含浸させたプリプレグを積層して絶縁層５１を形成した抵抗体内蔵の４層の多層回路板１００で、絶縁層５１にガラスクロス及び絶縁樹脂を用いることにより、多層回路板の製造工程及び実装時の熱工程により発生する多層回路板の伸縮、反り等を軽減させている。
【０００９】
請求項２に係る本発明の多層回路板は、図１（ｂ）に示すように、第１配線層２１ａ及び第１配線層２１ｂ間に抵抗体４１ａを形成し、第１配線層２１ａ及び第１配線層２１ｂと第２配線層８１ａ及び第２配線層８１ｂ間にガラスクロスにフィラー及び絶縁樹脂を含浸させたプリプレグを積層して絶縁層６１を形成した抵抗体内蔵の４層の多層回路板２００で、絶縁層６１にガラスクロス、フィラー及び絶縁樹脂を用いることにより、絶縁層６１にビア用孔をレーザー加工等により形成する際の加工適性を上げると同時に、多層回路板の製造工程及び実装時の熱工程により発生する多層回路板の伸縮、反り等を軽減させている。
【００１０】
以下請求項１及び２に係る本発明の多層回路板の製造方法について説明する。請求項１に係る本発明の多層回路板の製造方法の一実施例を図２（ａ）〜（ｅ）及び図３（ｆ）〜（ｉ）に示す。まず、ガラスクロスにエポキシ樹脂、もしくはビスマレイドトリアジン樹脂、もしくはポリイミド樹脂等を含浸させた絶縁基材１１の両面に第１配線層２１ａ及び第１配線層２１ｂを形成する（図２（ａ）参照）。ここで、第１配線層２１ａ及び第１配線層２１ｂの形成方法は、サブトラクティブ法、セミアディティブ法、フルアディティブ法のいずれでも良い。
【００１１】
次に、第１配線層２１ａ及び第１配線層２１ｂが形成された絶縁基材１１の両面にプリプレグ絶縁フィルムを貼付し、加圧、加熱して、所定厚の絶縁層３１を形成する。さらに、絶縁層３１の所定位置をレーザー加工等により穴明け加工して開口部３２を形成し、第１配線層２１ａ及び第１配線層２１ｂ間の配線電極を露出させる（図２（ｂ）参照）。
【００１２】
次に、開口部３２にカーボン、グラファイト等を樹脂に混入した抵抗ペーストをスクリーン印刷、ディスペンサー等で埋め込み、乾燥硬化して第１配線層２１ａ及び第１配線層２１ｂ間の配線電極上に抵抗体４１を形成する（図２（ｃ）参照）。
【００１３】
次に、抵抗体４１の表面を研磨処理して、表面が平坦化された抵抗体４１ａを形成する（図２（ｄ）参照）。
ここで、抵抗体の形成にあたっては、絶縁層に開口部を形成し、抵抗ペーストを埋め込む方法で説明したが、これは、バラツキの少ない抵抗体が得られる方法の一例である。第１配線層２１ａ及び第１配線層２１ｂ間の配線電極上に直接抵抗ペーストをスクリーン印刷等でパターン化して形成する方法でも良い。
【００１４】
次に、ガラスクロスにエポキシ等の絶縁樹脂を含浸させたプリプレグフィルムを絶縁層３１及び抵抗体４１上に積層し、加圧・加熱して絶縁層５１を形成する（図２（ｅ）参照）。
【００１５】
次に、絶縁層５１及び絶縁層３１の所定位置をＣＯ2レーザーにて穴明け加工して、ビア用孔５２を形成する（図３（ｆ）参照）。
【００１６】
次に、絶縁層５１及びビア用孔５２内に無電解銅めっきにて薄膜導体層（特に図示せず）を形成し、薄膜導体層上に感光層を形成し、露光、現像等の一連のパターニング処理を行ってレジストパターン７１を形成する（図３（ｇ）参照）。
【００１７】
次に、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層５１上に所定厚の導体層８１及びビア用孔５２にフィルドビア８２を形成する（図３（ｈ）参照）。
【００１８】
次に、レジストパターン７１を専用の剥離液で剥離し、レジストパターン下部にあった薄膜導体層を過硫酸アンモニウム水溶液でソフトエッチングして、第２配線層８１ａ及び第２配線層８１ｂを形成して、絶縁基材上１１に第１配線層、抵抗体、絶縁層及び第２配線層が形成された４層の抵抗体内蔵の多層回路板１００を得る（図３（ｉ）参照）。
ここで、第２配線層８１ａ及び第２配線層８１ｂはセミアディティブ方式で作製したがこれに限定されるものではない。
さらに、必要に応じて、抵抗体、絶縁層及び配線層の作製工程を繰り返して所望の多層回路板を得ることができる。
【００１９】
請求項２に係る本発明の多層回路板の製造方法の一実施例を図４（ａ）〜（ｅ）及び図５（ｆ）〜（ｉ）に示す。まず、ガラスクロスにエポキシ樹脂、もしくはビスマレイドトリアジン樹脂、もしくはポリイミド樹脂等を含浸させた絶縁基材１１の両面に第１配線層２１ａ及び第１配線層２１ｂを形成する（図４（ａ）参照）。ここで、第１配線層２１ａ及び第１配線層２１ｂの形成方法は、サブトラクティブ法、セミアディティブ法、フルアディティブ法のいずれでも良い。
【００２０】
次に、第１配線層２１ａ及び第１配線層２１ｂが形成された絶縁基材１１の両面にプリプレグ絶縁フィルムを積層し、加圧、加熱して、所定厚の絶縁層３１を形成する。さらに、絶縁層３１の所定位置をレーザー加工等により穴明け加工して開口部３２を形成し、第１配線層２１ａ及び第１配線層２１ｂ間の配線電極を露出させる（図４（ｂ）参照）。
【００２１】
次に、開口部３２にカーボン、グラファイト等を樹脂に混入した抵抗ペーストをスクリーン印刷、ディスペンサー等で埋め込み、乾燥硬化して第１配線層２１ａ及び第１配線層２１ｂ間の配線電極上に抵抗体４１を形成する（図４（ｃ）参照）。
【００２２】
次に、抵抗体４１の表面を研磨処理して、表面が平坦化された抵抗体４１ａを形成する（図４（ｄ）参照）。
ここで、抵抗体の形成にあたっては、絶縁層に開口部を形成し、抵抗ペーストを埋め込む方法で説明したが、これは、バラツキの少ない抵抗体が得られる方法の一例である。第１配線層２１ａ及び第１配線層２１ｂ間の配線電極上に直接抵抗ペーストをスクリーン印刷等でパターン化して形成する方法でも良い。
【００２３】
次に、ガラスクロスにエポキシ等の絶縁樹脂及び水酸化アルミニウム、二酸化珪素等からなるフィラーを含浸させたプリプレグフィルムを絶縁層３１及び抵抗体３１上に積層し、加圧・加熱して絶縁層６１を形成する（図４（ｅ）参照）。
【００２４】
次に、絶縁層６１及び絶縁層３１の所定位置をＣＯ2レーザーにて穴明け加工して、ビア用孔６２を形成する（図５（ｆ）参照）。
【００２５】
次に、絶縁層６１及びビア用孔６２内に無電解銅めっきにて薄膜導体層（特に図示せず）を形成し、薄膜導体層上に感光層を形成し、露光、現像等の一連のパターニング処理を行ってレジストパターン７１を形成する（図５（ｇ）参照）。
【００２６】
次に、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層６１上に所定厚の導体層８１及びビア用孔６２にフィルドビア８２を形成する（図５（ｈ）参照）。
【００２７】
次に、レジストパターン７１を専用の剥離液で剥離し、レジストパターン下部にあった薄膜導体層を過硫酸アンモニウム水溶液でソフトエッチングして、第２配線層８１ａ及び第２配線層８１ｂを形成して、絶縁基材上１１に第１配線層、抵抗体、絶縁層及び第２配線層が形成された４層の抵抗体内蔵の多層回路板２００を得る（図５（ｉ）参照）。
ここで、第２配線層８１ａ及び第２配線層８１ｂはセミアディティブ方式で作製したがこれに限定されるものではない。
さらに、必要に応じて、抵抗体、絶縁層及び配線層の作製工程を繰り返して所望の多層回路板を得ることができる。
【００２８】
【発明の効果】
本発明の抵抗体内蔵の多層回路板は絶縁層がガラスクロス及び絶縁樹脂、もしくはガラスクロス、フィラー及び絶縁樹脂とで構成されているため、多層回路板の製造工程及び実装時の熱工程により発生する多層回路板の伸縮、反り等を軽減でき、信頼性のある多層回路板を得ることができる。
【図面の簡単な説明】
【図１】（ａ）は、請求項１に係る本発明の多層回路板の一実施例を示す模式平面図である。
（ｂ）は、請求項２に係る本発明の多層回路板の一実施例を示す模式平面図である。
【図２】（ａ）〜（ｅ）は、請求項１に係る本発明の多層回路板の製造方法における工程の一部を示す模式平面図である。
【図３】（ｆ）〜（ｉ）は、請求項１に係る本発明の多層回路板の製造方法における工程の一部を示す模式平面図である。
【図４】（ａ）〜（ｅ）は、請求項２に係る本発明の多層回路板の製造方法における工程の一部を示す模式平面図である。
【図５】（ｆ）〜（ｉ）は、請求項２に係る本発明の多層回路板の製造方法における工程の一部を示す模式部分構成断面図である。
【符号の説明】
１１……絶縁基材
２１ａ、２１ｂ……第１配線層
３１……絶縁層
３２……開口部
４１……抵抗体
４１ａ……平坦化された抵抗体
５１……ガラスクロス及び絶縁樹脂とで構成されている絶縁層
５２……ビア用孔
６１……ガラスクロス、フィラー及び絶縁樹脂とで構成されている絶縁層
７１……レジストパターン
８１……導体層
８２……フィルドビア
１００、２００……多層回路板[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a multilayer circuit board with a built-in resistor and a method for manufacturing the same.
[0002]
[Prior art]
In recent years, as represented by personal computers and the like, there has been a demand for downsizing and thinning of electronic devices. For this reason, printed circuit boards used in such electronic devices are also required to have high-density and high-precision wiring for miniaturization and thinning, and recently, multilayer circuit boards incorporating circuit components such as resistors. Development is also underway.
In order to perform high-density wiring, the line width of the wiring layer is also reduced, and the filled via used for connection between the wiring layers is required to have a smaller hole diameter. In addition, high-precision processing is also required for hole processing of via holes so as to minimize positional deviation. In such a multilayer circuit board having a high-density, high-accuracy wiring layer, the insulating base material and the insulating layer tend to be thinned, and the multilayer circuit board is manufactured by the manufacturing process of the multilayer circuit board and the thermal process during mounting. There is a problem that expansion and contraction, warpage, and the like are likely to occur, and in a multilayer circuit board incorporating a circuit component such as a resistor, there is a problem that reliability is impaired.
[0003]
[Problems to be solved by the invention]
The present invention has been devised in view of the above problems, and an object thereof is to provide a reliable multilayer circuit board with a built-in resistor and a method for manufacturing the same.
[0004]
[Means for Solving the Problems]
In order to solve the above-mentioned problems in the present invention, first, in claim 1, there is provided a multilayer printed wiring board with a built-in resistor in which at least two wiring layers are formed on an insulating substrate via an insulating layer. A multilayer circuit board is characterized in that the insulating layer is composed of glass cloth and insulating resin.
[0005]
According to a second aspect of the present invention, there is provided the multilayer circuit board according to the first aspect, wherein a filler is mixed in the insulating layer.
[0006]
According to a third aspect of the present invention, the multilayer circuit board manufacturing method according to the first aspect includes at least the following steps.
(A) A step of forming the first wiring layer 21a and the first wiring layer 21b on both surfaces of the insulating base material 11.
(B) A step of forming the resistor 41a on the wiring electrode between the predetermined first wiring layer 21a and the first wiring layer 21b on the insulating base material 11.
(C) A step of forming an insulating layer 51 made of glass cloth and insulating resin on the resistor 41a and the insulating layer 31.
(D) A step of forming the second wiring layer 81a and the second wiring layer 81b on the insulating layer 51.
(E) A step of producing a desired multilayer circuit board by repeating the steps (b) to (d) as many times as necessary.
[0007]
Furthermore, according to a fourth aspect of the invention, there is provided the multilayer circuit board manufacturing method according to the second aspect, comprising at least the following steps.
(A) A step of forming the first wiring layer and the first wiring layer 21b on both surfaces of the insulating base material 11.
(B) A step of forming the resistor 41a on the wiring electrode between the predetermined first wiring layer 21a and the first wiring layer 21b on the insulating base material 11.
(C) A step of forming an insulating layer 61 made of glass cloth, filler and insulating resin on the resistor 41a and the insulating layer 31.
(D) A step of forming the second wiring layer 81a and the second wiring layer 81b on the insulating layer 61.
(E) A step of producing a desired multilayer circuit board by repeating the steps (b) to (d) as many times as necessary.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described.
FIG. 1A shows an embodiment of a multilayer circuit board according to the first aspect of the present invention.
FIG. 1B shows an embodiment of the multilayer circuit board according to the second aspect of the present invention.
As shown in FIG. 1A, the multilayer circuit board according to the first aspect of the present invention includes a resistor 41a formed between the first wiring layer 21a and the first wiring layer 21b, and the first wiring layer 21a and the first wiring layer 21a. A four-layer multilayer circuit board 100 with a built-in resistor, in which an insulating layer 51 is formed by laminating a prepreg impregnated with a glass cloth between one wiring layer 21b, a second wiring layer 81a, and a second wiring layer 81b. By using a glass cloth and an insulating resin for the insulating layer 51, expansion / contraction, warpage, etc. of the multilayer circuit board generated by the manufacturing process of the multilayer circuit board and the thermal process at the time of mounting are reduced.
[0009]
As shown in FIG. 1B, the multilayer circuit board of the present invention according to claim 2 includes a resistor 41a formed between the first wiring layer 21a and the first wiring layer 21b, and the first wiring layer 21a and the first wiring layer 21a. A four-layer multilayer circuit board with a built-in resistor, in which an insulating layer 61 is formed by laminating a prepreg impregnated with a filler and an insulating resin in a glass cloth between one wiring layer 21b, the second wiring layer 81a, and the second wiring layer 81b In 200, by using glass cloth, filler, and insulating resin for the insulating layer 61, the processability when forming the via hole in the insulating layer 61 by laser processing or the like is improved, and at the same time, the manufacturing process and mounting of the multilayer circuit board This reduces the expansion and contraction, warpage, etc., of the multilayer circuit board caused by the heat process.
[0010]
A method for manufacturing the multilayer circuit board according to the first and second aspects of the present invention will be described below. An embodiment of the method for producing a multilayer circuit board according to the first aspect of the present invention is shown in FIGS. 2 (a) to 2 (e) and FIGS. 3 (f) to 3 (i). First, the first wiring layer 21a and the first wiring layer 21b are formed on both surfaces of the insulating base material 11 in which a glass cloth is impregnated with an epoxy resin, a bismaleide triazine resin, or a polyimide resin (see FIG. 2A). ). Here, the formation method of the first wiring layer 21a and the first wiring layer 21b may be any of a subtractive method, a semi-additive method, and a full additive method.
[0011]
Next, a prepreg insulating film is affixed to both surfaces of the insulating base material 11 on which the first wiring layer 21a and the first wiring layer 21b are formed, and pressurized and heated to form the insulating layer 31 having a predetermined thickness. Further, a predetermined position of the insulating layer 31 is drilled by laser processing or the like to form an opening 32 to expose the wiring electrode between the first wiring layer 21a and the first wiring layer 21b (see FIG. 2B). ).
[0012]
Next, a resistor paste in which carbon, graphite, or the like is mixed in the opening 32 is embedded by screen printing, a dispenser or the like, dried and cured, and a resistor is formed on the wiring electrode between the first wiring layer 21a and the first wiring layer 21b. 41 is formed (see FIG. 2C).
[0013]
Next, the surface of the resistor 41 is polished to form a resistor 41a having a flattened surface (see FIG. 2D).
Here, in the formation of the resistor, the method of forming the opening in the insulating layer and embedding the resistor paste has been described, but this is an example of a method for obtaining a resistor with little variation. A method may also be used in which a resistance paste is directly patterned on the wiring electrodes between the first wiring layer 21a and the first wiring layer 21b by screen printing or the like.
[0014]
Next, a prepreg film in which an insulating resin such as epoxy is impregnated into a glass cloth is laminated on the insulating layer 31 and the resistor 41, and pressurized and heated to form the insulating layer 51 (see FIG. 2 (e)). .
[0015]
Next, predetermined positions of the insulating layer 51 and the insulating layer 31 are drilled with a CO 2 laser to form via holes 52 (see FIG. 3F).
[0016]
Next, a thin film conductor layer (not shown) is formed by electroless copper plating in the insulating layer 51 and the via hole 52, a photosensitive layer is formed on the thin film conductor layer, and a series of exposure, development, and the like are performed. A resist pattern 71 is formed by performing a patterning process (see FIG. 3G).
[0017]
Next, electrolytic copper plating is performed using the thin film conductor layer as a cathode to form a conductor layer 81 having a predetermined thickness on the insulating layer 51 and a filled via 82 in the via hole 52 (see FIG. 3H).
[0018]
Next, the resist pattern 71 is stripped with a dedicated stripping solution, and the thin film conductor layer under the resist pattern is soft-etched with an aqueous ammonium persulfate solution to form the second wiring layer 81a and the second wiring layer 81b. A multilayer circuit board 100 having a four-layer resistor in which a first wiring layer, a resistor, an insulating layer, and a second wiring layer are formed on an insulating substrate 11 is obtained (see FIG. 3I).
Here, the second wiring layer 81a and the second wiring layer 81b are manufactured by a semi-additive method, but the present invention is not limited to this.
Furthermore, a desired multilayer circuit board can be obtained by repeating the steps of producing the resistor, the insulating layer, and the wiring layer as necessary.
[0019]
One embodiment of the method for producing a multilayer circuit board according to the second aspect of the present invention is shown in FIGS. 4 (a) to 4 (e) and FIGS. 5 (f) to 5 (i). First, the first wiring layer 21a and the first wiring layer 21b are formed on both surfaces of the insulating substrate 11 in which a glass cloth is impregnated with an epoxy resin, a bismaleide triazine resin, or a polyimide resin (see FIG. 4A). ). Here, the formation method of the first wiring layer 21a and the first wiring layer 21b may be any of a subtractive method, a semi-additive method, and a full additive method.
[0020]
Next, a prepreg insulating film is laminated on both surfaces of the insulating base material 11 on which the first wiring layer 21a and the first wiring layer 21b are formed, and pressurized and heated to form the insulating layer 31 having a predetermined thickness. Further, a predetermined position of the insulating layer 31 is drilled by laser processing or the like to form an opening 32 to expose the wiring electrode between the first wiring layer 21a and the first wiring layer 21b (see FIG. 4B). ).
[0021]
Next, a resistor paste in which carbon, graphite, or the like is mixed in the opening 32 is embedded by screen printing, a dispenser or the like, dried and cured, and a resistor is formed on the wiring electrode between the first wiring layer 21a and the first wiring layer 21b. 41 is formed (see FIG. 4C).
[0022]
Next, the surface of the resistor 41 is polished to form a resistor 41a having a flattened surface (see FIG. 4D).
Here, in the formation of the resistor, the method of forming the opening in the insulating layer and embedding the resistor paste has been described, but this is an example of a method for obtaining a resistor with little variation. A method may also be used in which a resistance paste is directly patterned on the wiring electrodes between the first wiring layer 21a and the first wiring layer 21b by screen printing or the like.
[0023]
Next, a prepreg film obtained by impregnating a glass cloth with an insulating resin such as epoxy and a filler made of aluminum hydroxide, silicon dioxide or the like is laminated on the insulating layer 31 and the resistor 31, and the insulating layer 61 is pressed and heated. (See FIG. 4E).
[0024]
Next, predetermined positions of the insulating layer 61 and the insulating layer 31 are drilled with a CO 2 laser to form via holes 62 (see FIG. 5F).
[0025]
Next, a thin film conductor layer (not shown) is formed in the insulating layer 61 and the via hole 62 by electroless copper plating, a photosensitive layer is formed on the thin film conductor layer, and a series of exposure, development, etc. A resist pattern 71 is formed by performing a patterning process (see FIG. 5G).
[0026]
Next, electrolytic copper plating is performed using the thin film conductor layer as a cathode, and a filled via 82 is formed in the conductor layer 81 and the via hole 62 on the insulating layer 61 (see FIG. 5H).
[0027]
Next, the resist pattern 71 is stripped with a dedicated stripping solution, and the thin film conductor layer under the resist pattern is soft-etched with an aqueous ammonium persulfate solution to form the second wiring layer 81a and the second wiring layer 81b. A multilayer circuit board 200 having a four-layered resistor in which a first wiring layer, a resistor, an insulating layer, and a second wiring layer are formed on an insulating substrate 11 is obtained (see FIG. 5I).
Here, the second wiring layer 81a and the second wiring layer 81b are manufactured by a semi-additive method, but the present invention is not limited to this.
Furthermore, a desired multilayer circuit board can be obtained by repeating the steps of producing the resistor, the insulating layer, and the wiring layer as necessary.
[0028]
【The invention's effect】
In the multilayer circuit board with a built-in resistor according to the present invention, the insulating layer is made of glass cloth and insulating resin, or glass cloth, filler, and insulating resin, and therefore it is generated by the manufacturing process of the multilayer circuit board and the heat process during mounting. The multilayer circuit board can be reduced in expansion and contraction, warpage, and the like, and a reliable multilayer circuit board can be obtained.
[Brief description of the drawings]
FIG. 1 (a) is a schematic plan view showing an embodiment of a multilayer circuit board according to the first aspect of the present invention.
(B) is a schematic plan view showing an embodiment of the multilayer circuit board according to the second aspect of the present invention.
FIGS. 2A to 2E are schematic plan views showing a part of steps in the method for manufacturing a multilayer circuit board according to the first aspect of the present invention. FIGS.
3 (f) to (i) are schematic plan views showing a part of steps in the method for manufacturing a multilayer circuit board according to the first aspect of the present invention.
4A to 4E are schematic plan views showing a part of steps in the method for manufacturing a multilayer circuit board according to the second aspect of the present invention.
5 (f) to (i) are schematic partial cross-sectional views showing a part of steps in the method for manufacturing a multilayer circuit board according to the second aspect of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 11 ... Insulating base material 21a, 21b ... 1st wiring layer 31 ... Insulating layer 32 ... Opening 41 ... Resistor 41a ... Flattened resistor 51 ... Consists of glass cloth and insulating resin Insulating layer 52 ... Via hole 61 ... Insulating layer 71 composed of glass cloth, filler and insulating resin ... Resist pattern 81 ... Conductor layer 82 ... Filled via 100, 200 ... Multilayer circuit Board

Claims (2)

ガラスクロスに樹脂を含浸させた絶縁基材に抵抗体の両極用の配線電極を有する第１配線層を形成する第１の工程と、前記絶縁基材の両面に第１のプリプレグフィルムを貼付し、加圧、加熱して、第１の絶縁樹脂層を形成する第２の工程と、前記第１の絶縁樹脂層をレーザー穴明け加工することにより抵抗体埋め込み用の開口部を形成し、かつ、前記開口部に前記抵抗体の両極用の配線電極を露出させる第３の工程と、前記開口部に抵抗ペーストを埋め込、乾燥硬化させることで前記抵抗体の両極用の配線電極上に抵抗体を形成する第４の工程と、前記抵抗体の表面を研磨処理により平坦化した後、前記抵抗体と前記第１の絶縁樹脂層の表面にガラスクロスに絶縁樹脂を含浸させた第２のプリプレグフィルムを積層し加圧・加熱し第２の絶縁樹脂層を形成する第５の工程と、レーザ穴明け加工により前記第２の絶縁樹脂層と第１の絶縁樹脂層に前記第１配線層に達するビア用孔を形成する第６の工程と、銅めっきにより、前記第２の絶縁樹脂層の表面の第２配線層と前記ビア用孔内のフィルドビアを形成する第７の工程を有することを特徴とする多層回路板の製造方法。A first step of forming a first wiring layer having wiring electrodes for bipolar electrodes of a resistor on an insulating base material in which a glass cloth is impregnated with a resin; A second step of forming a first insulating resin layer by pressurization and heating, forming an opening for embedding the resistor by laser drilling the first insulating resin layer, and A third step of exposing the wiring electrode for the electrodes of the resistor in the opening, and a resistance paste on the wiring electrode for the electrodes of the resistor by embedding a resistance paste in the opening and drying and curing. A fourth step of forming a body, and a surface of the resistor is flattened by a polishing process, and then a surface of the resistor and the first insulating resin layer is impregnated with an insulating resin in a glass cloth Laminate prepreg film, pressurize and heat to make second insulation A fifth step of forming an oil layer; a sixth step of forming a via hole reaching the first wiring layer in the second insulating resin layer and the first insulating resin layer by laser drilling; A method for producing a multilayer circuit board, comprising: a seventh step of forming a second wiring layer on a surface of the second insulating resin layer and a filled via in the via hole by copper plating. 前記第２のプリプレグフィルムが、ガラスクロスに絶縁樹脂と、水酸化アルミニウム又は二酸化珪素のフィラー、を含浸させて成ることを特徴とする請求項１記載の多層回路板の製造方法。2. The method of manufacturing a multilayer circuit board according to claim 1, wherein the second prepreg film is formed by impregnating a glass cloth with an insulating resin and a filler of aluminum hydroxide or silicon dioxide.
JP2002153491A 2002-05-28 2002-05-28 Multilayer circuit board manufacturing method Expired - Fee Related JP4055474B2 (en)

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