JP4023085B2 - IC tester - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an IC tester that tests a test object that outputs a multistage voltage from a plurality of pins, for example, a liquid crystal drive driver, and the like, and to an IC tester that can test a test object at high speed.
[0002]
[Prior art]
The liquid crystal drive driver outputs a multi-stage (multi-gradation) voltage from a plurality of pins to drive the liquid crystal display. An IC tester for testing such a liquid crystal drive driver will be described with reference to FIG.
[0003]
In the figure, a device under test (hereinafter abbreviated as DUT) 1 outputs a multistage voltage from a plurality of pins. The switch 2 selects the pin of DUT1. The A / D converter 3 receives the output from the switch 2 and converts it into digital data. The memory 4 stores the digital data from the A / D converter 3. A digital signal processing unit (hereinafter abbreviated as DSP) 5 performs pass / fail judgment of the DUT 1 based on the digital data in the memory 4.
[0004]
The operation of such an apparatus will be described below. The DUT 1 outputs the multistage voltage shown in FIG. Then, the switch 2 sequentially selects and outputs the pins of the DUT 1. The A / D converter 3 converts this output into digital data and stores it in the memory 4. Then, the DSP 5 determines the quality of the DUT 1 by performing arithmetic processing on the magnitude of the absolute value of the output voltage of each pin, the magnitude of variation in the output voltage between the pins, and the like based on the digital data in the memory 4.
[0005]
[Problems to be solved by the invention]
However, according to such a conventional configuration, when the output voltage of each pin of DUT 1 is measured, the output voltage of each pin of DUT 1 is switched by switch 2 and input to A / D converter 3. Measurement time is required.
[0006]
As a method for shortening the measurement time, an A / D converter 3 can be provided for each pin of the DUT 1 and measurement can be shortened by measuring in parallel. However, a plurality of high-precision A / D converters 3 must be provided. It becomes expensive.
[0007]
Also, the digital signal processing unit 5 is required to have high speed processing performance, which is a factor of high cost.
[0008]
Therefore, an object of the present invention is to realize an IC tester capable of performing a test on an object to be tested at high speed without providing an A / D converter or a digital signal processing unit.
[0009]
[Means for Solving the Problems]
The first aspect of the present invention is
In an IC tester that tests a device under test that outputs multi-stage voltages from multiple pins,
A first voltage generator for outputting a voltage;
Said provided for each pin in which a multi-stage voltage than under test is output, the differential voltage generator for outputting a difference voltage multistage voltage and the first voltage generator of the voltage of the under test,
A second voltage generator for outputting a voltage;
A comparator that compares the output of the differential voltage generator with the output of the second voltage generator;
A change detection unit that detects a change in the output of the comparator, and increases or decreases at least one of the first voltage generation unit and the second voltage generation unit for each step voltage ΔV1, and the change detection unit , When it is detected that all the outputs of the comparator have changed, when the step voltage ΔV1 is increased, it is decreased for each step voltage ΔV2 (<ΔV1), and when it is decreased, the voltage is increased for each step voltage ΔV2. When the change detecting unit detects that all the outputs of the comparator have changed, the sum of the outputs of the first and second voltage generating units is set to the minimum value or the maximum value among the inter-pin variations, and the inter-pin variations are It is characterized by seeking.
[0010]
The second aspect of the present invention
In an IC tester that tests a device under test that outputs multi-stage voltages from multiple pins,
A voltage generating unit for outputting a voltage,
A comparator that is provided for each pin from which a multi-stage voltage is output from the test target, and that compares the output of the test target with the output of the voltage generator,
A change detecting unit that detects a change in the output of the comparator, the voltage generating unit is increased or decreased for each step voltage ΔV1, and the change detecting unit detects that all the outputs of the comparator have changed. When the step voltage ΔV1 is increased, the voltage is decreased for each step voltage ΔV2 (<ΔV1). When the step voltage ΔV1 is decreased, the voltage is increased for each step voltage ΔV2, and the change detection unit indicates that all the outputs of the comparator have changed. When detected, the output of the voltage generation unit is set to the minimum value or the maximum value in the inter-pin variation, and the inter-pin variation is obtained.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention.
[0012]
In the figure, a D / A converter 6 is a first voltage generator and outputs an expected value voltage corresponding to the multi-stage voltage of the DUT 1. The subtractor 7 is provided for each pin of the differential voltage generator DUT 1 and outputs a differential voltage between the multi-stage voltage of the DUT 1 and the expected value voltage of the D / A converter 6. The voltage amplifier 8 amplifies the difference voltage of the subtracter 7. The D / A converter 9 is a second voltage generator and outputs a comparison voltage corresponding to the output of the voltage amplifier 8. The comparator 10 compares the output of the voltage amplifier 8 with the output of the D / A converter 9. The digital comparator 11 is a change detection unit that detects a change and outputs a pass / fail according to the output of the comparator 10. It goes without saying that a control unit (not shown) controls the D / A converters 6 and 9 and inputs the output of the digital comparator 11.
[0013]
The operation of such a device will be described below. First, an inter-pin variation test will be described with reference to FIGS. 2 is a flowchart showing the operation of the apparatus shown in FIG. 1, and FIG. 3 is a diagram for explaining the operation of the apparatus shown in FIG. The inter-pin variation test is performed in the case of a liquid crystal drive driver because display unevenness occurs when the variation exceeds an allowable range.
[0014]
The DUT 1 outputs a voltage corresponding to the expected value voltage indicated by the broken line in FIG. 3 from all pins. Since the count value SC1 is “0” as an initial value, the step voltage ΔV is “0” (S1). Therefore, the D / A converter 6 outputs a voltage V1 lower than the expected value voltage and lower than the lower limit voltage of variation. A subtracter 7 outputs a difference voltage between the output of the DUT 1 and the output of the D / A converter 6. The voltage amplifier 8 amplifies this difference voltage. The D / A converter 9 outputs 0 V as a comparison voltage in an ideal state. Then, the comparator 10 inputs and compares the output of the voltage amplifier 8 and the output of the D / A converter 9. As a result of this comparison, all outputs of the digital comparator 11 are at a high level.
[0015]
Since all are at the high level, the count value SC1 is set to "1" (S2, S3). Then, the D / A converter 6 outputs “V1 + ΔV”, that is, “V1 + ΔV1” (S1). However, since all outputs of the digital comparator 11 are at a high level, the count value SC1 is set to “2” (S2, S3). Then, the D / A converter 6 outputs “V1 + ΔV”, that is, “V1 + 2 × ΔV1”. As a result, the minimum value VA among the variations is exceeded, and all the outputs of the digital comparator 11 are not at the high level.
[0016]
Next, the count value SC1 is set to “2”, the count value SC2 is set to “1”, and the D / A converter 6 outputs “V1 + ΔV”, that is, “V1 + 2 × ΔV1−ΔV2” (ΔV2 <ΔV1) (S2). , S4). However, since all the outputs of the digital comparator 11 are not at the high level, the count value SC2 is set to “2” (S5, S6). Then, the D / A converter 6 outputs “V1 + ΔV”, that is, “V1 + 2 × ΔV1-2 × ΔV2” (S2, S4). However, since all the outputs of the digital comparator 11 are not at the high level, the count value SC2 is set to “3” (S5, S6). Such an operation is repeated, and when the count value SC2 is “4”, the minimum value VA is not exceeded, and all the outputs of the digital comparator 11 become high level.
[0017]
Then, the count values SC1, SC2, SC3 are set to “2, 4, 1”, and the D / A converter 6 outputs “V1 + 3 × ΔV1-4 × ΔV2” (S5, S7). As a result, since all outputs of the digital comparator 11 are not at the low level, the count value SC3 is increased and the voltage of the D / A converter 6 is increased. When the count value SC3 is "3", the maximum value among the variations Exceeding VB, all outputs of the digital comparator 11 become low level (S8, S9, S7).
[0018]
Next, the count values SC1, SC2, SC3, and SC4 are set to “2, 4, 3, 1”, and the D / A converter 6 outputs “V1 + 5 × ΔV1-5 × ΔV2” (S8, S10). However, since all outputs of the digital comparator 11 are low, the count value SC4 is increased and the voltage of the D / A converter 6 is decreased. When the count value SC4 is “3”, the maximum value VB in the variation is set. As a result, all outputs of the digital comparator 11 are not at a low level (S12, S10, S11).
[0019]
As a result, the inter-pin variation “VB−VA” becomes “ΔV1 × SC3− ΔV2 × SC4 ”. Then, VA = V1 + ΔV1 × SC1−ΔV2 × SC2, and VB = V1 + ΔV1 × (SC1 + SC3) −ΔV2 × (SC2 + SC4). In this way, the variation of each gradation is obtained, and whether the DUT 1 is good or not is determined based on whether the inter-pin variation “VB-VA” is within an allowable range.
[0020]
For example, if the difference between the voltage lower than the lower limit voltage of the pin-to-pin variation and the voltage higher than the upper limit voltage is 40 mV, ΔV1 is 5 mV, and ΔV2 is 0.1 mV, the measurement step is 40 mV / 5 mV + 2 × 5 mV / 0.1 mV = 108 It can be measured in steps.
[0021]
In this way, the output voltage of the D / A converter 6 is changed in two stages, the change is detected by the digital comparator 11, and the inter-pin variation is obtained. Therefore, without using an A / D converter or a digital signal processing unit, Tests can be performed at high speed. Therefore, an IC tester can be configured at a low cost.
[0022]
Next, an output voltage test for each pin of the DUT 1 will be described. The DUT 1 outputs a voltage from all pins, and the D / A converter 6 outputs an expected value voltage. The subtracter 7 outputs a difference voltage between the output of the DUT 1 and the expected value voltage of the D / A converter 6. The voltage amplifier 8 amplifies the difference voltage. Then, the D / A converter 9 outputs a comparison voltage. The comparator 10 compares the output of the voltage amplifier 8 with the output of the D / A converter 9. Normally, the comparator 10 is configured by a window comparator, and the D / A converter 9 gives an upper limit and a lower limit voltage to the comparator 10. Based on the comparison result, the digital comparator 11 outputs pass / fail.
[0023]
The second embodiment will be described with reference to FIG. Here, the same components as those shown in FIG.
[0024]
In the figure, the D / A converter 12 outputs an expected value voltage. The comparator 13 compares the output of the DUT 1 with the output of the D / A converter 12 and outputs the result to the digital comparator 11.
[0025]
In such a device test for variation between pins, the D / A converter 12 performs the same operation as the D / A converter 6 of the device shown in FIG. The description is omitted.
[0026]
The operation of the output voltage test for each pin is omitted because the D / A converter 12 outputs only the combined D / A converters 6 and 9 shown in FIG. .
[0027]
The present invention is not limited to this, and the D / A converter 6 is changed in two stages, ΔV1 and ΔV2, but it may be in three or more stages. Further, the D / A converter 9 may be changed instead of changing the D / A converter 6.
[0028]
The D / A converter 6 is configured to increase ΔV1 and decrease ΔV2 from a voltage lower than the lower limit voltage of inter-pin variation, but is configured to decrease ΔV1 and increase ΔV2 from a voltage higher than the upper limit voltage of inter-pin variation. But you can.
[0029]
Furthermore, although the configuration using the subtractor 7 is shown as the differential voltage generator, an adder may be used. In this case, the D / A converter 6 outputs a negative value of the expected value voltage.
[0030]
【The invention's effect】
According to the present invention, the output voltage of the voltage generator is changed in two or more stages, the change is detected by the change detector, and the inter-pin variation is obtained. The test can be performed at high speed. Therefore, an IC tester can be configured at a low cost.
[Brief description of the drawings]
FIG. 1 is a configuration diagram showing an embodiment of the present invention.
FIG. 2 is a flowchart showing the operation of the apparatus shown in FIG.
FIG. 3 is a diagram for explaining the operation of the apparatus shown in FIG. 1;
FIG. 4 is a configuration diagram showing another embodiment of the present invention.
FIG. 5 is a diagram showing a configuration of a conventional IC tester.
FIG. 6 is a diagram illustrating an output example of a multi-stage voltage.
[Explanation of symbols]
1 DUT
6, 9, 12 D / A converter 7 Subtractor 8 Voltage amplifier 10, 13 Comparator 11 Digital comparator

Claims (3)

In an IC tester that tests a device under test that outputs multi-stage voltages from multiple pins,
A first voltage generator for outputting a voltage;
Said provided for each pin in which a multi-stage voltage than under test is output, the differential voltage generator for outputting a difference voltage multistage voltage and the first voltage generator of the voltage of the under test,
A second voltage generator for outputting a voltage;
A comparator that compares the output of the differential voltage generator with the output of the second voltage generator;
A change detection unit that detects a change in the output of the comparator, and increases or decreases at least one of the first voltage generation unit and the second voltage generation unit for each step voltage ΔV1, and the change detection unit , When it is detected that all the outputs of the comparator have changed, when the step voltage ΔV1 is increased, it is decreased for each step voltage ΔV2 (<ΔV1), and when it is decreased, the voltage is increased for each step voltage ΔV2. When the change detecting unit detects that all the outputs of the comparator have changed, the sum of the outputs of the first and second voltage generating units is set to the minimum value or the maximum value among the inter-pin variations, and the inter-pin variations are An IC tester characterized by the demand.   2. The IC tester according to claim 1, wherein a voltage amplifier is provided between the differential voltage generator and the comparator. In an IC tester that tests a device under test that outputs multi-stage voltages from multiple pins,
A voltage generating unit for outputting a voltage,
A comparator that is provided for each pin from which a multi-stage voltage is output from the test target, and that compares the output of the test target with the output of the voltage generator,
A change detecting unit that detects a change in the output of the comparator, the voltage generating unit is increased or decreased for each step voltage ΔV1, and the change detecting unit detects that all the outputs of the comparator have changed. When the step voltage ΔV1 is increased, the voltage is decreased for each step voltage ΔV2 (<ΔV1). When the step voltage ΔV1 is decreased, the voltage is increased for each step voltage ΔV2, and the change detection unit indicates that all the outputs of the comparator have changed. An IC tester characterized in that, when detected, the output of the voltage generator is set to the minimum value or the maximum value in the inter-pin variation, and the inter-pin variation is obtained.

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