JP4012022B2

JP4012022B2 - Multilayer wiring substrate, base material for multilayer wiring substrate, and manufacturing method thereof

Info

Publication number: JP4012022B2
Application number: JP2002261968A
Authority: JP
Inventors: 知中尾; 雅克永田; 太郎渡辺; 誠裕岡本; 彰二伊藤
Original assignee: Fujikura Ltd
Current assignee: Fujikura Ltd
Priority date: 2002-09-06
Filing date: 2002-09-06
Publication date: 2007-11-21
Anticipated expiration: 2022-09-06
Also published as: JP2004103739A

Description

【０００１】
【発明の属する技術分野】
この発明は、多層配線基板（多層プリント配線板）、多層配線基板用基材およびその製造方法に関し、特に、ベアチップ等の高密度実装が可能な多層配線基板、多層配線基板用基材およびその製造方法に関するものである。
【０００２】
【従来の技術】
電子機器の軽薄短小化、半導体チップや部品の小型化および端子の狭ピッチ化に連動して、プリント基板（配線基板）にも実装面積の縮小や配線の精細化が進んでいる。同時に、情報関連機器では、信号周波数の広帯域化に対応して部品間を連結する配線の短距離化が求められており、高密度、高性能を達成するためのプリント基板の多層化は必要不可欠の技術となっている。
【０００３】
多層配線基板では、従来の平面回路にはなかった層間を電気的に接続する回路形成がキーテクノロジーである。多層配線基板の第１ステップである両面配線基板は、絶縁基材に貫通孔をあけ、貫通孔の壁面に沿って導体をめっきして表裏の配線を導通接続している。
【０００４】
ＩＢＭ社のＳＬＣ（ＳｕｒｆａｃｅＬａｍｉｎａｒＣｉｒｃｕｉｔ）に代表されるビルドアッブ多層配線基板においても、回路層間の絶縁層の一部をレーザ等で除去し、めっきで導通接続する方法を用いている（例えば、非特許文献１参照）。
【０００５】
めっきを用いた配線の導通接続は、微細な回路を低抵抗で導通接続できる利点を持つが、工程が複雑で、工数も多いため、コストが高くなり、多層配線基板の用途を制限する要因となっている。
【０００６】
近年、めっきに代わる安価な層間接続方法として、松下グループのＡＬＩＶＨ（ＡｎｙＬａｙｅｒＩｎｔｅｒｓｔｉｔｉａｌＶｉａＨｏｌｅ）基板や、東芝グループのＢ^２ｂｉｔ（ＢｕｒｉｅｄＢｕｍｐＩｎｔｅｒｃｏｎｎｅｃｔｉｏｎＴｅｃｈｎｏｌｏｇｙ）に代表される導電性樹脂を用いた多層配線基板が実用化され、多層配線基板の用途が急速に拡大し始めている（例えば、非特許文献２参照）。
【０００７】
ＡＬＩＶＨでは、図９（ａ）〜（ｈ）に示されているように、絶縁樹脂板／フィルム１０１を出発材としてレーザを用いてビアホール（バイアホール）１０２をあけ、印刷法によってビアホール１０２に導電性樹脂（導電性ペースト）１０３を充填し、この導電性樹脂１０３の充填によって所望の箇所に表裏導通接続部を有する絶縁層１０４を作成する。そして、絶縁層１０４の表裏に銅箔１０５を貼り付け、銅箔１０５をエッチングして配線パターン（銅箔回路）１０６を形成したものを、複数枚、貼り合わせて多層配線基板１００を得る。
【０００８】
ＡＬＩＶＨの工法以外にも、ＳＬＣのように、絶縁層として感光性樹脂を用いて露光・現像を行うことにより、ビアホールを形成したり、ケミカルあるいはドライエッチングによって樹脂を除去する方法も適用できる可能性がある。
【０００９】
導電性樹脂を用いた多層配線基板は、安価である反面、導電性樹脂部分の電気抵抗が高く、銅箔回路との接触抵抗が安定しないなどのいくつかの欠点もあるが、それらも徐々に克服されつつある。
【００１０】
マルチチップモジュールなど、ベアチップを実装する基板では、配線の高密度化に伴って多層板を構成する積層板（多層配線基板用基材）の単層の厚さも減少する傾向にある。この積層板の層厚の減少によって絶縁フィルム単体では、基板のたわみやしわが発生し易くなり、寸法安定性が確保し難くなっている。
【００１１】
このことに対し、層間接続に導電性樹脂を用いる多層配線基板の製造方法として、図１０（ａ）〜（ｆ）に示されているように、銅箔付きフィルム２０１を出発材とし、銅箔付きフィルム２０１にビアホール（バイアホール）２０２をあけ、ビアホール２０２に導電性樹脂（導電性ペースト）２０３を充填してインナビアを形成し、銅箔付きフィルム２０１の銅箔２０４をエッチングして配線パターン（銅箔回路）２０５を形成したものを貼り合わせて多層配線基板２００を得る製造方法がある。
【００１２】
この製造方法では、樹脂フィルムを絶縁層としてそれに銅箔による導電層を貼り付けられている銅張基板を出発材としていることにより、フィルムの剛性が高まり、高い寸法精度を維持できる。このような多層配線基板の製造方法は、本願出願人と同一の出願人による特願２００１−８５２２４号で提案されている。
【００１３】
【非特許文献１】
高木清著「ビルドアップ多層プリント基板配線板技術」日刊工業新聞社出版、２００１年６月１５日、初版２刷、５３頁〜７６頁
【非特許文献２】
高木清著「ビルドアップ多層プリント基板配線板技術」日刊工業新聞社出版、２００１年６月１５日、初版２刷、７７頁〜７９頁
【００１４】
【発明が解決しようとする課題】
従来、一般的に、多層配線基板のビアホールに使用される導電性樹脂は、図１１、図１２に示されているように、導電性フィラーとして含まれる平均粒子径が３μｍ〜１０μｍの銀や銅などの導電性粒子３０１をエポキシ系樹脂等の樹脂バインダ３０２で固着したポリマー型の導電性樹脂３００であり、導電性粒子３０１同士の接触によって電気伝導性を得ている。このため、絶縁基板３１０のビアホール３１１に充填された導電性樹脂３００の導電性粒子３０１同士の接触、導電性粒子３０１と絶縁基板３１０上の銅箔等による回路導体層３１２との間の導通接触は、点接触に近い。このため、ポリマー型の導電性樹脂３００による層間導通では、十分な導電率を得ることができないことがある。
【００１５】
特に、回路の微細化に伴い、ビアホール径が小径化するほど、導電性粒子同士の接点数が減少するため、見かけの導電率が減少し、ビアの電気抵抗を上昇するにとどまらず、インピダンス整合を難しくし、高周波伝送における損失を著しく増大することになる。
【００１６】
また、冷熱サイクルなどによって繰り返しの応力が発生すると、導電性粒子同士の接触部や導電性粒子と回路導体層との間の導通接触部の接触抵抗が増加するため、多層配線基板を搭載した製品の使用環境によって伝送特性が不安定になる問題がある。
【００１７】
ポリマー型と呼ばれる上述の導電性樹脂材料に対して、セラミック配線板の導体などに用いられる導電性樹脂材料では、印刷して導電性樹脂を５００〜１０００℃の高温に加熱することにより、フィラーを融着させ、冷熱サイクルにおいても安定した低抵抗による導通性を実現している。
【００１８】
従来、この種の導電性樹脂材料は、高温での焼成を必要としているため、樹脂基板では使用することができなかったが、近年、２００℃以下の低温でも、フィラーを融着できる導電性樹脂材料として、ナノオーダの微粒子（ナノ粒子）を用いた低温融着型の導電性樹脂材料が注目を集めている。
【００１９】
ナノ粒子を用いた低温融着型の導電性樹脂は、導電性粒子同士の融着により比抵抗１０^−６Ω／ｃｍ程度の高い導電性を示し、印刷回路の導体として高い評価を受けている。
【００２０】
しかし、ナノ粒子を用いた低温融着型の導電性樹脂は、ペーストの状態では、有機溶剤やナノ粒子を分散させるための分散剤や粒子の結合を補助する揮発性の薬剤を大量に含んでいるため、加熱硬化後の体積収縮が、ポリマー型の導電性樹脂等に比して著しく大きく、多層配線基板のビアホールに充填される導電性樹脂としては、適していない。
【００２１】
この発明は、上述の如き課題を解決するためになされたもので、多層配線基板のビアホールに充填する導電性樹脂として、ナノ粒子を用いた低温融着型の導電性樹脂とポリマー型の導電性樹脂の両方を使用し、その両者の欠点を補い合って長所を活かし合い、多層接続電気回路の電気抵抗が低く、電気的特性に優れ、高周波帯域での伝送特性を改善できる多層配線基板用基材およびその多層配線基板用基材を用いた多層配線基板、および多層配線基板用基材の製造方法を提供することを目的としている。
【００２２】
【課題を解決するための手段】
上述の目的を達成するために、この発明による多層配線基板用基材は、ビアホールに導電性樹脂が充填され導電部を形成し、前記導電部により層間導通を得る多層配線基板用基材であって、前記ビアホールに充填された導電性樹脂による導電部が、前記ビアホールの内周面を取り巻く第１の導電性樹脂による第１導電部と、前記第１導電部の内側を埋める第２の導電性樹脂による第２導電部とによる２重構造を有している。
【００２３】
この発明による多層配線基板用基材によれば、第１導電部（第１の導電性樹脂）を低温融着型の導電性樹脂で構成し、第２導電部（第２の導電性樹脂）をポリマー型の導電性樹脂より構成することが可能になり、ビアホールの内周面（ビア外周部）を取り巻く低温融着型の導電性樹脂による第１導電部によって層間導通の導電率を高めることができ、第１導電部をなす低温融着型の導電性樹脂が加熱硬化によって体積収縮しても、体積収縮により第１導電部の内側に生じる空間がポリマー型の導電性樹脂による第２導電部によって埋められ、ビアホール内部に構造欠陥となるような空洞が生じることがなく、多層化の積層プレス時に他層の導電層に対して安定した突き刺し接触を得ることができる。
【００２４】
また、この発明による多層配線基板用基材は、絶縁性基材の一方の面に配線パターンをなす導電層を、絶縁性基材の他方の面に層間接着のための接着層を設けられ、少なくも前記絶縁性基材と前記接着層に連続形成されたビアホールに層間導通を得るための導電性樹脂を充填された多層配線基板用基材であって、前記ビアホールに充填された導電性樹脂による導電部が、前記ビアホールの内周面を取り巻く第１の導電性樹脂による第１導電部と、前記第１導電部の内側を埋める第２の導電性樹脂による第２導電部とによる２重構造を有している。
【００２５】
この発明による多層配線基板用基材でも、第１導電部を低温融着型の導電性樹脂で構成し、第２導電部をポリマー型の導電性樹脂より構成することが可能になり、絶縁性基材、接着層に形成されたビアホールの内周面（ビア外周部）を取り巻く低温融着型の導電性樹脂による第１導電部によって層間導通の導電率を高めることができ、第１導電部をなす低温融着型の導電性樹脂が加熱硬化によって体積収縮しても、体積収縮により第１導電部の内側に生じる空間がポリマー型の導電性樹脂による第２導電部によって埋められ、ビアホール内部に構造欠陥となるような空洞が生じることがなく、多層化の積層プレス時に他層の導電層に対して安定した突き刺し接触を得ることができる。
【００２６】
また、この発明による多層配線基板用基材は、層間接着のための接着層を兼ねた絶縁性基材の一方の面に配線パターンをなす導電層を設けられ、少なくとも前記絶縁性基材に形成されたビアホールに層間導通を得るための導電性樹脂を充填された多層配線基板用基材であって、前記ビアホールに充填された導電性樹脂による導電部が、前記ビアホールの内周面を取り巻く第１の導電性樹脂による第１導電部と、前記第１導電部の内側を埋める第２の導電性樹脂による第２導電部とによる２重構造を有している。
【００２７】
この発明による多層配線基板用基材でも、第１導電部を低温融着型の導電性樹脂で構成し、第２導電部をポリマー型の導電性樹脂より構成することが可能になり、絶縁性基材に形成されたビアホールの内周面（ビア外周部）を取り巻く低温融着型の導電性樹脂による第１導電部によって層間導通の導電率を高めることができ、第１導電部をなす低温融着型の導電性樹脂が加熱硬化によって体積収縮しても、体積収縮により第１導電部の内側に生じる空間がポリマー型の導電性樹脂による第２導電部によって埋められ、ビアホール内部に構造欠陥となるような空洞が生じることがなく、多層化の積層プレス時に他層の導電層に対して安定した突き刺し接触を得ることができる。
【００２８】
また、この発明による多層配線基板用基材は、ビアホールに対する樹脂ペースト充填時の空気抜き孔として、前記導電層に前記ビアホールの口径より小径の小孔があけられていてよい。
【００２９】
この場合、ビアホールの底面は、導電層の裏面により与えられ、ビアホールと小孔の口径差による面積を有し、第１導電部は、この導電層裏面で、比較的広い面積をもって導電層と導通接触することができ、第１導電部と導電層との接触抵抗が低減する。
【００３０】
また、この発明による多層配線基板用基材は、前記絶縁性基材と共に前記導電層にも前記ビアホールが形成され、前記第１導電部は前記導電層の表面に接触して広がる拡大導電部を有する構造にすることもできる。
【００３１】
この場合、拡大導電部によって第１導電部と導電層との接触面積が増大し、第１導電部と導電層との接触抵抗が低減する。
【００３２】
この発明による多層配線基板用基材において、第１導電部をなす低温融着型の導電性樹脂としては、ナノサイズの導電性微粒子を用いた低温融着型の導電性樹脂が好適であり、また、第２導電部をなすポリマー型の導電性樹脂としては、平均粒子径が３μｍ〜１０μｍの導電性フィラーを樹脂バインダで固着したポリマー型の導電性樹脂が好適である。
【００３３】
この発明による多層配線基板は、上述の発明による多層配線基板用基材を複数枚、重ねて接合したものであり、電気抵抗が低い多層接続電気回路を得ることができる。
【００３４】
上述の目的を達成するために、この発明による多層配線基板用基材の製造方法は、絶縁性基材の一方の面に配線パターンをなす導電層を、絶縁性基材の他方の面に層間接着のための接着層を設けられたものの、少なくも前記絶縁性基材と前記接着層にビアホールを穿孔する穿孔工程と、前記ビアホールに低温融着型の導電性樹脂ペーストを充填する第１の充填工程と、前記ビアホールに充填された前記低温融着型の導電性樹脂ペーストを加熱硬化して第１導電部を形成する第１の加熱硬化工程と、前記ビアホールの前記第１導電部の内側にポリマー型の導電性樹脂ペーストを充填する第２の充填工程と、前記第１導電部の内側に充填された前記ポリマー型の導電性樹脂ペーストを加熱硬化して第２導電部を形成する第２の加熱硬化工程とを有する。
【００３５】
また、上述の目的を達成するために、この発明による多層配線基板用基材の製造方法は、層間接着のための接着層を兼ねた絶縁性基材の一方の面に配線パターンをなす導電層を設けらたものの、少なくも前記絶縁性基材にビアホールを穿孔する穿孔工程と、前記ビアホールに低温融着型の導電性樹脂ペーストを充填する第１の充填工程と、前記ビアホールに充填された前記低温融着型の導電性樹脂ペーストを加熱硬化して第１導電部を形成する第１の加熱硬化工程と、前記ビアホールの前記第１導電部の内側にポリマー型の導電性樹脂ペーストを充填する第２の充填工程と、前記第１導電部の内側に充填された前記ポリマー型の導電性樹脂ペーストを加熱硬化して第２導電部を形成する第２の加熱硬化工程とを有する。
【００３６】
これらの発明による多層配線基板用基材の製造方法によれば、第１の充填工程として、ビアホールに低温融着型の導電性樹脂ペーストを充填し、つづく第１の加熱硬化工程で、ビアホールに充填された低温融着型の導電性樹脂ペーストを加熱硬化する。この加熱硬化により低温融着型の導電性樹脂ペーストが体積収縮し、加熱硬化した低温融着型の導電性樹脂による第１導電部は、内側に空間を生じ、ビアホールの内周面を取り巻く。この第１導電部によってビア部分の導電率を高めることができる。
【００３７】
つぎに、第２の充填工程として、第１導電部の内側にポリマー型の導電性樹脂ペーストを充填し、つづく第２の加熱硬化工程で、第１導電部の内側に充填されたポリマー型の導電性樹脂ペーストを加熱硬化する。これにより、ビアホール内部に構造欠陥となるような空洞が生じることなく、多層化の積層プレス時に他層の導電層に対して安定した突き刺し接触を得ることができる。
【００３８】
この発明による多層配線基板用基材の製造方法で使用する低温融着型の導電性樹脂ペーストとしては、ナノサイズの導電性微粒子を有機溶剤に混ぜてペースト状にしたものがあり、ポリマー型の導電性樹脂ペーストとしては、平均粒子径が３μｍ〜１０μｍを樹脂バインダに混入したものを溶剤に混ぜてペースト状にしたものがある。
【００３９】
【発明の実施の形態】
以下に添付の図を参照してこの発明の実施形態を詳細に説明する。
図１はこの発明による一実施形態に係わる多層配線基板用基材の基本構成を示している。
【００４０】
図１に示されている多層配線基板用基材１０は、絶縁性基材をなす絶縁樹脂層１１の一方の面に銅箔等による配線パターン部（導電層）１２を、他方の面に層間接着のための接着層１３を各々設けられ、接着層１３と絶縁樹脂層１１とを貫通するビアホール（バイアホール）１４を穿設されている。
【００４１】
絶縁樹脂層１１は、全芳香族ポリイミド（ＡＰＩ）等によるポリイミドフィルムやポリエステルフィルム等の可撓性を有する樹脂フィルムで構成され、絶縁樹脂層１１と配線パターン部１２と接着層１３との３層構造は、汎用の片面銅箔付きポリイミド基材の銅箔とは反対側の面に接着層１３としてポリイミド系接着材を貼付したもので構成できる。
【００４２】
ポリイミド系接着材による接着層１３は、熱可塑性ポリイミド（ＴＰＩ）あるいは熱可塑性ポリイミドに熱硬化機能を付与したフィルムの貼り付けにより形成することができる。
【００４３】
ビアホール１４は、当該ビアホール１４に充填された導電性樹脂によって層間導通のため導通部（ＩＶＨ）をなす。この導通部は、ビアホール１４の内周面（ビア外周部）を取り巻く低温融着型の導電性樹脂（第１の導電性樹脂）（低温で粒子同志が融着するフィラーを含む導電性樹脂）による第１導電部１５と、第１導電部１５の内側を埋めるポリマー型の導電性樹脂（第２の導電性樹脂）による第２導電部１６とによる２重構造を有している。
【００４４】
第１導電部１５をなす低温融着型の導電性樹脂とは、低温で粒子同志が融着するフィラーを含む導電性樹脂のことであり、粒径が数ｎｍのナノサイズの酸化銀等による導電性微粒子を用いた低温融着型の導電性樹脂が好適である。低温融着型の導電性樹脂は、２００℃程度の加熱によって導電性微粒子同士が融着し、比抵抗１０^−６Ω／ｃｍ程度の高い導電性を示す。
【００４５】
第２導電部１６をなすポリマー型の導電性樹脂としては、銀、銅等の導電機能を有する平均粒子径が３μｍ〜１０μｍ程度の金属粉末、すなわち導電性フィラー１６Ａをエポキシ樹脂等による熱硬化型の樹脂バインダ１６Ｂで固着したポリマー型導電性樹脂等、加熱硬化によって体積収縮がないもの、少ないものが好適である。
【００４６】
この多層配線基板用基材１０によれば、ビアホール１４の内周面を取り巻く低温融着型の導電性樹脂による第１導電部１５によって層間導通の導電率を高めることができ、第１導電部１５をなす低温融着型の導電性樹脂が加熱硬化によって体積収縮しても、体積収縮により第１導電部１５の内側に生じる空間がポリマー型の導電性樹脂による第２導電部１６によって埋められ、ビアホール１４の内部に構造欠陥となるような空洞が生じることがない。これにより、多層化の積層プレス時に他層の導電層に対して安定した突き刺し接触を得ることができる。
【００４７】
つぎに、この発明による多層配線基板用基材およびその多層配線基板用基材による多層配線基板の製造方法の一実施形態を図２を参照して説明する。
【００４８】
図２（ａ）に示されているように、絶縁樹脂層をなすポリイミドフィルム２１の片面に導電層をなす銅箔２２を設けられた片面銅張基板（ＣＣＬ：ＣｏｐｐｅｒＣｌａｄＬａｍｉｎａｔｅ）２０を準備し、これのポリイミドフィルム表面側（銅箔２２とは反対側の表面）に、熱可塑性ポリイミドあるいは熱可塑性ポリイミドに熱硬化機能を付与したフィルムによる接着層２３を貼り合わせた積層フィルムを出発材料とする。
【００４９】
ここで使用するＣＣＬには、ポリイミド等の絶縁樹脂と導体箔とを接着剤を用いて接着したタイプ、銅箔上にポリイミドの前駆体を塗布して加熱焼成したタイプやポリイミドフィルム上に金属膜を蒸着したタイプ、蒸着した金属膜をシード層としてめっきにより銅を成長させたタイプがある。
【００５０】
つぎに、ロールラミネータを用いて銅箔２２の表面にレジストフィルム（図示省略）を熱圧着し、パターンを露光・現像してレジストマスクパターン（図示省略）を形成した後、塩化第二鉄を主成分とするエッチング液を用いて銅のケミカルエッチングを行い、図２（ｂ）に示されているように、銅回路部２４を形成する。
【００５１】
つぎに、図２（ｃ）に示されているように、ビアホール穿孔工程として、接着層２３の表面側からＹＡＧレーザを照射してポリイミドフィルム２１、接着層２３に、直径が１００μｍ程度のビアホール２５を形成する。穴あけ用のレーザとしては、ＹＡＧレーザ以外にも＜ＣＯ２レーザやエキシマレーザを用いることもできる。このポリイミドフィルム２１、接着層２３の穴あけは、レーザ加工法以外に、プラズマエッチングや適当な薬液を用いた化学エッチングを適用することもできる。
【００５２】
続いて、銅回路部２４にＹＡＧレーザによって小孔２６を穿設する。小孔２６の直径は、ビアホール２５の孔径半分以下、たとえば、３０〜５０μｍ程度とする。小孔２６は、ビアホール２５を形成する前に、レジストマスクを利用して銅のケミカルエッチングによって形成することもできる。
【００５３】
つぎに、図２（ｄ）に示されているように、第１の樹脂ペースト充填工程として、接着層２３の表面側からスクリーン印刷法等によって、低温融着型の導電性樹脂ペースト２７を、ビアホール２５と小孔２６の全てに穴埋め充填する。低温融着型の導電性樹脂ペースト２７は、粒径が数ｎｍのナノサイズ酸化銀等による導電性微粒子を還元剤や分散剤等と共に有機溶剤に混ぜてペースト状にしたものである。
【００５４】
つぎに、第１の加熱硬化工程として、ビアホール２５、小孔２６に充填された低温融着型の導電性樹脂ペースト２７を２００℃程度の加熱によって加熱硬化し、図２（ｅ）に示されているように、第１導電部２８を形成する。
【００５５】
低温融着型の導電性樹脂ペースト２７は、加熱硬化により体積を１／３程度に収縮する。これにより、図２（ｅ）に示されているように、ビアホール２５の底面およびビアホール２５、小孔２６の内周面を取り巻くように固化した低温融着型の導電性樹脂によって第１導電部２８が形成される。そして、第１導電部２８の内側に空間２９が形成される。
【００５６】
ビアホール２５の底面は、銅回路部２４の裏面２４ａとなり、ビアホール２５と小孔２６の口径差による面積を有し、第１導電部２８は、この銅回路部裏面２４ａで、比較的広い面積をもって銅回路部２４と導通接触する。
【００５７】
低温融着型の導電性樹脂は、焼結によって導電性微粒子同士が融着するので、第１導電部２８では比抵抗１０^−６Ω／ｃｍ程度の高い導電性が得られ、しかも、第１導電部２８と銅回路部２４とが銅回路部裏面２４ａで比較的広い面積をもって導通接触するから、第１導電部２８と銅回路部２４との接触抵抗が著しく低減する。
【００５８】
つぎに、第２の樹脂充填工程として、図２（ｆ）に示されているように、ビアホール２５および小孔２６に形成されている第１導電部２８の内側の空間２９の全体に、ポリマー型の導電性樹脂ペースト３０をスクリーン印刷法等によって穴埋め充填する。小孔２６は、この樹脂ペースト充填時に、ビアホール２５の空気抜き孔として作用する。
【００５９】
ポリマー型の導電性樹脂ペースト３０には、エポキシ系樹脂を主成分とするバインダと、平均粒子径５μｍの銀をフィラーとする粘度５０〜１５０Ｐａ・ｓの加熱硬化型ペーストを使用した。ビアホール２５および小孔２６に充填する導電性樹脂としては、銀ペースト以外に、銅粒子や表面を銀で被覆した銅粒子をフィラーとするペーストを使用することもできる。また、溶媒成分が少なく、乾燥および硬化時の体積減少が僅かであれば、樹脂の種類を問わない。
【００６０】
つぎに、第２の加熱硬化工程加熱硬化工程として、充填したポリマー型の導電性樹脂ペースト３０を１００℃のオーブン中で加熱硬化させ、第２導電部３１（図２（ｆ）参照）を形成する。
【００６１】
ポリマー型の導電性樹脂ペースト３０は、揮発性溶媒成分を殆ど含まず、硬化後の体積収縮がない、あるいは極く少ないので、硬化したポリマー型の導電性樹脂による第２導電部３１は、ビアホール２５および小孔２６内を隙間なく満たし、ビアホール２５の内部に構造欠陥となるような空洞が生じることを回避する。
【００６２】
以上で、１枚の多層配線基板用基材（基本配線板）４０が完成する。
【００６３】
多層配線基板の製作は、図３に示されているように、複数枚の多層配線基板用基材４０を重ね合わせて多層化接合を行う。この多層化接合工程は、加熱プレス装置を用い、接着層２３を構成する熱可塑性ポリイミドのガラス転移温度と接着層２３に対する銅回路部２４の埋め込み状態に応じて、１０〜５０ｋＰａ程度の加圧力を印加しつつ、１５０〜２５０℃程度に加熱して行う。これにより、多層配線基板５０が完成する。
【００６４】
完成した多層配線基板５０を観察すると、図４に示されているように、ビアホール２５の内周には低温融着型の導電性樹脂ペーストの加熱硬化により得られたナノ粒子融着層による約１０μｍ厚の第１導通部２８が存在し、その内側にポリマー型の導電性樹脂による第２導通部３１が形成され、２重構造の導体部（ＩＶＨ）が形成されていた。
【００６５】
この多層配線基板５０の導体部による層間導通の電気抵抗は、抵抗が低いナノ粒子融着層による第１導通部２９の存在により、通常のポリマー型の導電性樹脂だけによる場合に比して低くなる。
【００６６】
特に、高周波の伝送では、表皮効果により、図４に示されているように、電流Ａの多くは、ビア外周部（ビアホール２５の内周面）に沿って流れるので、その差は拡大する。シミュレーションでは、５００ＭＨｚ以上の周波数になると、通常のポリマー型の導電性樹脂だけによるＩＶＨに比して抵抗の差が顕著に拡大し始めることが予測できた。
【００６７】
第２導通部３１をなすポリマー型の導電性樹脂のフィラーは、従来のものと同様に、平均粒径が３〜１０μｍの金属粒子を含んでいる。なぜならば、金属粒子の粒径が１０μｍ以上の大きいで粒径あると、粒径がビアホール径に近づき、ビアホール内における金属粒子同士の接点数が減少し、見かけの抵抗率が増加するからである。粒径が１０μｍでは、ビアホール径が１００μｍ以下になると、抵抗の増加が無視できなくなる。
【００６８】
一方、金属粒子の粒径が小さいほど、小径ビアホールへの適合性は良好になるが、金属粒子の凝集によりバインダ中に金属粒子を均一に分散させることが難しくなる。また、金属粒子の粒径が小さすぎると、銅箔との接触抵抗が不安定になる傾向が見られる。このことは、多層化の積層プレス時の加圧力によって安定した突き刺し接触を得るためには、ある程度の大きさの粒子径が必要であることを示唆している。
【００６９】
この発明による多層配線基板用基材は、他の実施形態として、図５（ａ）に示されているように、ビアホール形成以前に、接着層２３の表面側にＰＥＴフィルム等によるマスキングテープ３２を貼着し、ビアホール２５を形成する。
【００７０】
そして、マスキングテープ貼着状態で、ビアホール２５に低温融着型の導電性樹脂ペーストを充填する第１の充填工程と、ビアホール２５に充填された低温融着型の導電性樹脂ペーストを加熱硬化して第１導電部２８を形成する第１の加熱硬化工程と、ビアホール２５の第１導電部２８の内側にポリマー型の導電性樹脂ペーストを充填する第２の充填工程と、第１導電部２８の内側に充填されたポリマー型の導電性樹脂ペーストを加熱硬化して第２導電部３１を形成する第２の加熱硬化工程を順に行う。
【００７１】
第２の加熱硬化工程完了後に、マスキングテープ３２を剥がす。これにより、図５（ｂ）に示されているように、接着層２３の側に、マスキングテープ３２の厚さに相当する寸法の導電性樹脂突起部３３が形成される。導電性樹脂突起部３３は、多層化の積層プレスによる他層の導電層に対する突き刺し接触を良好にし、接触抵抗を小さくする効果を生じる。
【００７２】
また、この発明による多層配線基板用基材は、他の実施形態として、図６に示されているように、絶縁性基材をなす絶縁樹脂層３４を、熱可塑性ポリイミド（ＴＰＩ）あるいは熱可塑性ポリイミドに熱硬化機能を付与したものなど、絶縁樹脂層自体が層間接着のための接着性を有するもので構成することができる。この場合には、絶縁樹脂層３４の一方の面に銅回路部２４をなす銅箔等による導電層を設け、他方の面の接着層を省略できる。
【００７３】
この多層配線基板用基材では、絶縁樹脂層３４にビアホール２５が穿設され、銅回路部２４に小孔２６が穿設され、前述の実施形態と同様に、ビアホール２５、小孔２６の内周面（ビア外周部）を取り巻く低温融着型の導電性樹脂による第１導電部２８と、第１導電部２８の内側を埋めるポリマー型の導電性樹脂による第２導電部３１とによる２重構造になっている。
【００７４】
この実施形態でも、ビアホール２５の内周面を取り巻く低温融着型の導電性樹脂による第１導電部２８によって層間導通の導電率を高めることができ、第１導電部２８をなす低温融着型の導電性樹脂が加熱硬化によって体積収縮しても、体積収縮により第１導電部２８の内側に生じる空間がポリマー型の導電性樹脂による第２導電部３１によって埋められ、多層化の積層プレス時に他層の導電層に対して安定した突き刺し接触を得ることができる。
【００７５】
また、この発明の多層配線基板用基材は、出発材料として、熱可塑性挙動を示す液晶ポリマーを絶縁層として用いたＣＣＬを使用することもできる。
【００７６】
また、上述の実施形態では、銅回路部２４に小孔２６をあけたが、この発明は、図７に示されているように、銅回路部２４に小孔２６があけられていないものにも、同様に適用でき、同様の効果を得ることができる。
【００７７】
この実施形態では、樹脂ペースト充填時の気泡の巻き込みを抑制し、樹脂ペースト充填量を精密に制御する目的で、真空印刷機を用いて樹脂ペーストの充填が行われることが好ましい。
【００７８】
図８（ａ）〜（ｃ）は、この発明による多層配線基板用基材の他の実施形態を示している。この実施形態では、ビアホール２５が、ポリイミドフィルム２１、接着層２３、銅回路部２４の全てをストレートに貫通している。
【００７９】
この場合、図８（ａ）に示されているように、第１の樹脂ペースト充填工程として、ビアホール２５の口径より大きいパターンを有するマスキングテープ（図示省略）を銅回路部２４の側に貼り付け、接着層２３の表面側からスクリーン印刷法等によって、低温融着型の導電性樹脂ペースト２７を、ビアホール２５に穴埋め充填する。これにより、銅回路部２４の表面に接触して広がる低温融着型導電性樹脂ペーストによる拡張部２７Ａが形成される。
【００８０】
つぎに、第１の加熱硬化工程として、ビアホール２５に充填された低温融着型の導電性樹脂ペースト２７を２００℃程度の加熱によって加熱硬化し、第１導電部２８を形成する。
【００８１】
低温融着型の導電性樹脂ペースト２７は、加熱硬化により体積収縮する。これにより、図８（ｂ）に示されているように、ビアホール２５の内周面を取り巻くように固化した低温融着型の導電性樹脂によって第１導電部２８が形成される。そして、第１導電部２８の内側に空間２９が形成される。拡張部２７Ａは、銅回路部２４の表面に接触して広がる拡大導電部２８Ａとなり、第１導電部２８と銅回路部２４との接触面積を増大し、第１導電部２８と銅回路部２４との接触抵抗を低減する。
【００８２】
つぎに、第２の樹脂充填工程として、図８（ｃ）に示されているように、ビアホール２５に形成されている第１導電部２８の内側の空間２９の全体に、ポリマー型の導電性樹脂ペースト３０をスクリーン印刷法等によって穴埋め充填する。
【００８３】
つぎに、第２の加熱硬化工程加熱硬化工程として、充填したポリマー型の導電性樹脂ペースト３０を１００℃のオーブン中で加熱硬化させ、第２導電部３１（図８（ｃ）参照）を形成する。
【００８４】
ポリマー型の導電性樹脂ペースト３０は、揮発性溶媒成分を殆ど含まず、硬化後の体積収縮がない、あるいは極く少ないので、この実施形態でも、硬化したポリマー型の導電性樹脂による第２導電部３１（図８（ｃ）参照）は、ビアホール２５内を隙間なく満たし、ビアホール２５の内部に構造欠陥となるような空洞が生じることを回避する。
【００８５】
【発明の効果】
以上の説明から理解される如く、この発明による多層配線基板、多層配線基板用基材およびその製造方法によれば、ビアホールに充填された導電性樹脂による導電部が、ビアホールの内周面を取り巻く低温融着型の導電性樹脂による第１導電部と、第１導電部の内側を埋めるポリマー型の導電性樹脂による第２導電部とによる２重構造になっているので、多層接続電気回路の電気抵抗が低く、電気的特性に優れ、高周波帯域での伝送特性を改善できる。
【図面の簡単な説明】
【図１】この発明の一つの実施形態に係わる多層配線基板用基材を示す断面図である。
【図２】（ａ）〜（ｆ）はこの発明の一つの実施形態に係わる多層配線基板用基材の製造方法の一実施形態を示す工程図である。
【図３】この発明の一つの実施形態に係わる多層配線基板の一実施形態を示す断面図である。
【図４】この発明の一つの実施形態に係わる多層配線基板の導通特性を模式的に示す説明図である。
【図５】（ａ）、（ｂ）はこの発明の他の一つの実施形態に係わる多層配線基板用基材の製造方法の一実施形態を示す工程図である。
【図６】この発明の他の一つの実施形態に係わる多層配線基板用基材を示す断面図である。
【図７】この発明の他の一つの実施形態に係わる多層配線基板用基材を示す断面図である。
【図８】（ａ）〜（ｃ）はこの発明の他の一つの実施形態に係わる多層配線基板用基材の製造方法の一実施形態を示す工程図である。
【図９】（ａ）〜（ｈ）は従来の多層配線基板の製造工程を示す工程図である。
【図１０】（ａ）〜（ｆ）は従来の他の多層配線基板の製造工程を示す工程図である。
【図１１】従来の多層配線基板のビア部分を示す断面図である。
【図１２】従来の多層配線基板のビア部分を示す拡大断面図である。
【符号の説明】
１０多層配線基板用基材
１１絶縁樹脂層
１２配線パターン部
１３接着層
１４ビアホール
１５第１導電部
１６第２導電部
２１ポリイミドフィルム
２２銅箔
２０片面銅張基板
２４銅回路部
２５ビアホール
２６小孔
２７低温融着型の導電性樹脂ペースト
２８第１導電部
３０ポリマー型の導電性樹脂ペースト
３１第２導電部
３４絶縁樹脂層
４０多層配線基板用基材
５０多層配線基板[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a multilayer wiring board (multilayer printed wiring board), a multilayer wiring board base material, and a manufacturing method thereof, and more particularly to a multilayer wiring board capable of high-density mounting such as a bare chip, a multilayer wiring board base material, and a manufacturing method thereof. It is about the method.
[0002]
[Prior art]
As electronic devices become lighter, thinner and smaller, semiconductor chips and components are miniaturized, and terminals have a narrower pitch, printed circuit boards (wiring boards) are also being reduced in mounting area and finer wiring. At the same time, information-related equipment is required to shorten the wiring distance between components in response to the wider bandwidth of signal frequencies, and multilayered printed circuit boards are essential to achieve high density and high performance. Technology.
[0003]
In multilayer wiring boards, the key technology is to form circuits that electrically connect layers that were not found in conventional planar circuits. In the double-sided wiring board which is the first step of the multilayer wiring board, a through hole is formed in an insulating base, and a conductor is plated along the wall surface of the through hole to electrically connect the front and back wiring.
[0004]
Even in a build-up multilayer wiring board represented by IBM's SLC (Surface Laminar Circuit), a method of removing a part of an insulating layer between circuit layers with a laser and conducting a conductive connection by plating (for example, non-patent) Reference 1).
[0005]
The conductive connection of wiring using plating has the advantage that a fine circuit can be conductively connected with low resistance, but the process is complicated and the man-hours are high, which increases costs and limits the use of multilayer wiring boards. It has become.
[0006]
In recent years, as an inexpensive interlayer connection method that replaces plating, Matsushita Group's ALIVH (Any Layer Intermediary Via Hole) substrate and Toshiba Group's B ² A multilayer wiring board using a conductive resin typified by bit (Buried Bump Interconnection Technology) has been put into practical use, and uses of the multilayer wiring board have begun to expand rapidly (for example, see Non-Patent Document 2).
[0007]
In ALIVH, as shown in FIGS. 9A to 9H, via holes (via holes) 102 are formed using an insulating resin plate / film 101 as a starting material using a laser, and the via holes 102 are electrically conductive by a printing method. A conductive resin (conductive paste) 103 is filled, and by filling the conductive resin 103, an insulating layer 104 having front and back conductive connection portions at desired locations is formed. A multilayer wiring substrate 100 is obtained by bonding a plurality of copper foils 105 bonded to the front and back surfaces of the insulating layer 104 and then etching the copper foil 105 to form a wiring pattern (copper foil circuit) 106.
[0008]
In addition to the ALIVH method, there is a possibility that a method of forming a via hole or removing the resin by chemical or dry etching can be applied by performing exposure and development using a photosensitive resin as an insulating layer, as in SLC. There is.
[0009]
The multilayer wiring board using conductive resin is inexpensive, but has some drawbacks such as high electrical resistance of the conductive resin part and unstable contact resistance with the copper foil circuit. It is being overcome.
[0010]
In a substrate on which a bare chip is mounted such as a multi-chip module, the thickness of a single layer of a laminated board (base material for a multilayer wiring board) constituting a multilayer board tends to decrease as the wiring density increases. Due to the reduction in the layer thickness of the laminated board, the insulating film alone is likely to bend and wrinkle on the substrate, making it difficult to ensure dimensional stability.
[0011]
On the other hand, as a method for manufacturing a multilayer wiring board using a conductive resin for interlayer connection, as shown in FIGS. 10A to 10F, a film 201 with a copper foil is used as a starting material, and a copper foil is used. A via hole (via hole) 202 is formed in the attached film 201, an inner via is formed by filling the via hole 202 with a conductive resin (conductive paste) 203, and the copper foil 204 of the film 201 with copper foil is etched to form a wiring pattern ( There is a manufacturing method in which a multilayer wiring board 200 is obtained by pasting together a copper foil circuit) 205.
[0012]
In this manufacturing method, since the starting material is a copper-clad substrate having a resin film as an insulating layer and a conductive layer made of copper foil attached thereto, the rigidity of the film is increased and high dimensional accuracy can be maintained. A method for manufacturing such a multilayer wiring board is proposed in Japanese Patent Application No. 2001-85224 by the same applicant as the present applicant.
[0013]
[Non-Patent Document 1]
Kiyoshi Takagi “Build-up multilayer printed circuit board technology” published by Nikkan Kogyo Shimbun, June 15, 2001, first edition, 2nd edition, pages 53-76
[Non-Patent Document 2]
Kiyoshi Takagi “Build-up multilayer printed circuit board technology” published by Nikkan Kogyo Shimbun, June 15, 2001, first edition, 2nd edition, pages 77-79
[0014]
[Problems to be solved by the invention]
Conventionally, generally, the conductive resin used for the via hole of the multilayer wiring board is silver or copper having an average particle diameter of 3 μm to 10 μm contained as a conductive filler, as shown in FIGS. A polymer type conductive resin 300 in which conductive particles 301 such as epoxy resin are fixed with a resin binder 302 such as an epoxy resin, and electrical conductivity is obtained by contact between the conductive particles 301. Therefore, contact between the conductive particles 301 of the conductive resin 300 filled in the via hole 311 of the insulating substrate 310, and conductive contact between the conductive particles 301 and the circuit conductor layer 312 by the copper foil or the like on the insulating substrate 310. Is close to point contact. For this reason, sufficient electrical conductivity may not be obtained by interlayer conduction using the polymer-type conductive resin 300.
[0015]
In particular, as the via hole diameter is reduced with the miniaturization of the circuit, the number of contacts between conductive particles decreases, so the apparent conductivity decreases and the electrical resistance of the via increases. And the loss in the high frequency transmission is remarkably increased.
[0016]
In addition, when repeated stress is generated by a thermal cycle, contact resistance between conductive particles and conductive contact between conductive particles and circuit conductor layers increases, so products with a multilayer wiring board are installed. There is a problem that transmission characteristics become unstable depending on the usage environment.
[0017]
In contrast to the above-mentioned conductive resin material called a polymer type, in the conductive resin material used for the conductor of the ceramic wiring board, the filler is obtained by printing and heating the conductive resin to a high temperature of 500 to 1000 ° C. It is fused to achieve stable conductivity with low resistance even in a cooling cycle.
[0018]
Conventionally, since this type of conductive resin material requires firing at a high temperature, it could not be used on a resin substrate. However, in recent years, a conductive resin that can fuse a filler even at a low temperature of 200 ° C. or lower. As a material, a low-temperature fusion-type conductive resin material using nano-order fine particles (nanoparticles) attracts attention.
[0019]
The low-temperature fusion type conductive resin using nanoparticles has a specific resistance of 10 due to fusion of the conductive particles. ^-6 It exhibits high conductivity of about Ω / cm and is highly evaluated as a conductor for printed circuits.
[0020]
However, the low temperature fusion type conductive resin using nanoparticles contains a large amount of organic solvent, a dispersant for dispersing the nanoparticles, and a volatile agent for assisting the bonding of the particles in a paste state. Therefore, the volume shrinkage after heat curing is significantly larger than that of polymer type conductive resin and the like, which is not suitable as the conductive resin filled in the via hole of the multilayer wiring board.
[0021]
The present invention has been made to solve the above-described problems. As a conductive resin for filling a via hole of a multilayer wiring board, a low temperature fusion type conductive resin using nanoparticles and a polymer type conductive resin are used. A substrate for multilayer wiring boards that uses both resins and compensates for the disadvantages of both, making use of the advantages, low electrical resistance of the multilayer connection circuit, excellent electrical characteristics, and improved transmission characteristics in the high frequency band Another object of the present invention is to provide a multilayer wiring board using the multilayer wiring board substrate and a method for producing the multilayer wiring board substrate.
[0022]
[Means for Solving the Problems]
In order to achieve the above-described object, a multilayer wiring board substrate according to the present invention is a multilayer wiring board substrate in which via holes are filled with a conductive resin to form a conductive portion, and interlayer conduction is obtained by the conductive portion. In addition, a conductive portion made of a conductive resin filled in the via hole has a first conductive portion made of a first conductive resin surrounding an inner peripheral surface of the via hole and a second conductive portion filling the inside of the first conductive portion. It has a double structure with the second conductive part made of a conductive resin.
[0023]
According to the multilayer wiring board substrate of the present invention, the first conductive portion (first conductive resin) is made of a low-temperature fusion-type conductive resin, and the second conductive portion (second conductive resin). Can be made of a polymer-type conductive resin, and the conductivity of the interlayer conduction is increased by the first conductive portion made of the low-temperature fusion-type conductive resin surrounding the inner peripheral surface (via outer peripheral portion) of the via hole. Even if the low-temperature fusion type conductive resin forming the first conductive portion shrinks in volume due to heat curing, the space generated inside the first conductive portion due to the volume shrinkage becomes the second conductive by the polymer type conductive resin. A cavity that is filled with the portion and becomes a structural defect does not occur inside the via hole, and stable piercing contact can be obtained with respect to another conductive layer at the time of multilayer press.
[0024]
Further, the multilayer wiring board substrate according to the present invention is provided with a conductive layer forming a wiring pattern on one surface of the insulating substrate, and an adhesive layer for interlayer adhesion on the other surface of the insulating substrate, A base material for a multilayer wiring board filled with a conductive resin for obtaining interlayer conduction in a via hole continuously formed in the insulating base material and the adhesive layer, wherein the conductive resin is filled in the via hole The conductive portion by the double is formed by the first conductive portion made of the first conductive resin surrounding the inner peripheral surface of the via hole and the second conductive portion made of the second conductive resin filling the inside of the first conductive portion. It has a structure.
[0025]
Even in the multilayer wiring board substrate according to the present invention, it is possible to configure the first conductive portion with a low-temperature fusion-type conductive resin and the second conductive portion with a polymer-type conductive resin. The conductivity of the interlayer conduction can be increased by the first conductive portion made of the low temperature fusion type conductive resin surrounding the inner peripheral surface (via outer peripheral portion) of the via hole formed in the base material and the adhesive layer. Even if the low-temperature fusion-type conductive resin forming the shrinkage is caused by heat curing, the space generated inside the first conductive part due to the volume shrinkage is filled with the second conductive part by the polymer-type conductive resin, and the inside of the via hole Therefore, a stable piercing contact can be obtained with respect to another conductive layer at the time of multi-layer lamination pressing.
[0026]
In addition, the multilayer wiring board substrate according to the present invention is provided with a conductive layer forming a wiring pattern on one surface of an insulating substrate that also serves as an adhesive layer for interlayer adhesion, and is formed at least on the insulating substrate. A base material for a multilayer wiring board filled with a conductive resin for obtaining interlayer conduction in the formed via hole, wherein a conductive portion made of the conductive resin filled in the via hole surrounds the inner peripheral surface of the via hole. A first conductive portion made of one conductive resin and a second conductive portion made of a second conductive resin filling the inside of the first conductive portion.
[0027]
Even in the multilayer wiring board substrate according to the present invention, it is possible to configure the first conductive portion with a low-temperature fusion-type conductive resin and the second conductive portion with a polymer-type conductive resin. The conductivity of the interlayer conduction can be increased by the first conductive portion made of the low temperature fusion type conductive resin surrounding the inner peripheral surface (via outer peripheral portion) of the via hole formed in the base material, and the low temperature forming the first conductive portion. Even if the fusion-type conductive resin shrinks in volume due to heat curing, the space generated inside the first conductive part due to volume shrinkage is filled with the second conductive part made of the polymer-type conductive resin, and a structural defect is formed inside the via hole. Therefore, a stable piercing contact can be obtained with respect to the other conductive layer at the time of multi-layer lamination pressing.
[0028]
In the multilayer wiring board substrate according to the present invention, a small hole having a diameter smaller than the diameter of the via hole may be formed in the conductive layer as an air vent hole when filling the via hole with the resin paste.
[0029]
In this case, the bottom surface of the via hole is provided by the back surface of the conductive layer and has an area due to the difference in the diameter of the via hole and the small hole. The first conductive portion is electrically connected to the conductive layer with a relatively wide area on the back surface of the conductive layer. The contact resistance between the first conductive part and the conductive layer can be reduced.
[0030]
In the multilayer wiring board substrate according to the present invention, the via hole is formed in the conductive layer together with the insulating substrate, and the first conductive portion has an enlarged conductive portion that spreads in contact with the surface of the conductive layer. It can also be made into the structure which has.
[0031]
In this case, the contact area between the first conductive part and the conductive layer is increased by the enlarged conductive part, and the contact resistance between the first conductive part and the conductive layer is reduced.
[0032]
In the base material for a multilayer wiring board according to the present invention, the low temperature fusion type conductive resin using nano-sized conductive fine particles is suitable as the low temperature fusion type conductive resin forming the first conductive part, Moreover, as the polymer-type conductive resin forming the second conductive portion, a polymer-type conductive resin in which a conductive filler having an average particle diameter of 3 μm to 10 μm is fixed with a resin binder is preferable.
[0033]
The multilayer wiring board according to the present invention is obtained by stacking and joining a plurality of multilayer wiring board substrates according to the above-described invention, and a multilayer connection electric circuit having a low electric resistance can be obtained.
[0034]
In order to achieve the above-mentioned object, a method for manufacturing a substrate for a multilayer wiring board according to the present invention comprises a conductive layer forming a wiring pattern on one surface of an insulating substrate and an interlayer on the other surface of the insulating substrate. Although a bonding layer for bonding is provided, a first step of drilling a via hole in at least the insulating base material and the bonding layer, and filling the via hole with a low temperature fusion type conductive resin paste A filling step; a first heat-curing step of heat-curing the low-temperature fusion-type conductive resin paste filled in the via hole to form a first conductive portion; and an inner side of the first conductive portion of the via hole A second filling step of filling the polymer-type conductive resin paste into the first conductive portion, and a second conductive portion formed by heating and curing the polymer-type conductive resin paste filled inside the first conductive portion. 2 heat curing process That.
[0035]
In order to achieve the above-mentioned object, the method for manufacturing a multilayer wiring board substrate according to the present invention comprises a conductive layer forming a wiring pattern on one surface of an insulating substrate that also serves as an adhesive layer for interlayer adhesion. However, the via hole is filled with the via hole, the first filling step of filling the via hole with a low temperature fusion type conductive resin paste, and the via hole filled with the via hole. A first heat-curing step of heat-curing the low-temperature fusion-type conductive resin paste to form a first conductive portion; and filling the via-hole with the polymer-type conductive resin paste inside the first conductive portion And a second heat curing step of forming the second conductive portion by heat curing the polymer type conductive resin paste filled inside the first conductive portion.
[0036]
According to the method for manufacturing a substrate for a multilayer wiring board according to these inventions, as a first filling step, a via hole is filled with a low-temperature fusion-type conductive resin paste, and then in the first heat curing step, the via hole is filled. The filled low-temperature fusion-type conductive resin paste is cured by heating. Due to this heat curing, the low-temperature fusion-type conductive resin paste shrinks in volume, and the first conductive portion made of the heat-cured low-temperature fusion-type conductive resin creates a space inside and surrounds the inner peripheral surface of the via hole. The first conductive portion can increase the conductivity of the via portion.
[0037]
Next, as a second filling step, a polymer-type conductive resin paste is filled inside the first conductive portion, and then in the second heat curing step, the polymer-type conductive resin filled inside the first conductive portion is filled. The conductive resin paste is cured by heating. Thereby, a stable piercing contact can be obtained with respect to the other conductive layer at the time of multi-layer lamination pressing without generating a cavity that causes a structural defect inside the via hole.
[0038]
The low-temperature fusion type conductive resin paste used in the method for manufacturing a substrate for a multilayer wiring board according to the present invention includes a paste in which nano-sized conductive fine particles are mixed with an organic solvent. As the conductive resin paste, there is a paste obtained by mixing a resin binder having an average particle diameter of 3 μm to 10 μm with a solvent.
[0039]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 shows a basic configuration of a multilayer wiring board substrate according to an embodiment of the present invention.
[0040]
A multilayer wiring board substrate 10 shown in FIG. 1 has a wiring pattern portion (conductive layer) 12 made of copper foil or the like on one surface of an insulating resin layer 11 forming an insulating substrate, and an interlayer on the other surface. Adhesive layers 13 for adhesion are provided, and via holes (via holes) 14 penetrating the adhesive layer 13 and the insulating resin layer 11 are formed.
[0041]
The insulating resin layer 11 is composed of a flexible resin film such as a polyimide film or a polyester film made of wholly aromatic polyimide (API) or the like, and includes three layers of the insulating resin layer 11, the wiring pattern portion 12, and the adhesive layer 13. A structure can be comprised by sticking the polyimide-type adhesive material as the contact bonding layer 13 on the surface on the opposite side to the copper foil of the polyimide base material with a general purpose single-sided copper foil.
[0042]
The adhesive layer 13 made of a polyimide-based adhesive can be formed by attaching a thermoplastic polyimide (TPI) or a film obtained by imparting a thermosetting function to a thermoplastic polyimide.
[0043]
The via hole 14 forms a conduction portion (IVH) for interlayer conduction by the conductive resin filled in the via hole 14. This conductive part is a low-temperature fusion-type conductive resin (first conductive resin) surrounding the inner peripheral surface (via outer peripheral part) of the via hole 14 (a conductive resin containing a filler in which particles are fused at a low temperature). Has a double structure including a first conductive part 15 and a second conductive part 16 made of a polymer type conductive resin (second conductive resin) filling the inside of the first conductive part 15.
[0044]
The low-temperature fusion-type conductive resin forming the first conductive portion 15 is a conductive resin containing a filler in which particles are fused at a low temperature, such as nano-sized silver oxide having a particle size of several nm. A low temperature fusion type conductive resin using conductive fine particles is suitable. The low-temperature fusion-type conductive resin fuses the conductive fine particles to each other by heating at about 200 ° C., and has a specific resistance of 10 ^-6 High conductivity of about Ω / cm.
[0045]
As the polymer-type conductive resin forming the second conductive portion 16, a metal powder having a conductive function, such as silver or copper, having an average particle diameter of about 3 μm to 10 μm, that is, a conductive filler 16A is a thermosetting type using an epoxy resin or the like. A polymer type conductive resin fixed with a resin binder 16B, such as one having no volume shrinkage due to heat curing, and a small one is suitable.
[0046]
According to this multilayer wiring board base material 10, the first conductive portion 15 made of a low-temperature fusion-type conductive resin surrounding the inner peripheral surface of the via hole 14 can increase the conductivity of interlayer conduction, and the first conductive portion Even if the low-temperature fusion-type conductive resin 15 is shrunk by heat curing, the space generated inside the first conductive part 15 by the volume shrinkage is filled with the second conductive part 16 made of the polymer-type conductive resin. In addition, a cavity that causes a structural defect does not occur inside the via hole 14. Thereby, the stable stab contact with respect to the conductive layer of another layer can be obtained at the time of the multilayer press.
[0047]
Next, a multilayer wiring board substrate according to the present invention and a multilayer wiring board manufacturing method using the multilayer wiring board substrate according to an embodiment of the present invention will be described with reference to FIG.
[0048]
As shown in FIG. 2A, a single-sided copper clad substrate (CCL) 20 having a copper foil 22 forming a conductive layer on one side of a polyimide film 21 forming an insulating resin layer is prepared. A laminated film obtained by bonding a thermoplastic polyimide or an adhesive layer 23 made of a thermoplastic polyimide with a thermosetting function to the polyimide film surface side (surface opposite to the copper foil 22) is used as a starting material. .
[0049]
The CCL used here is a type in which an insulating resin such as polyimide and a conductive foil are bonded using an adhesive, a type in which a polyimide precursor is applied on a copper foil and heated and fired, or a metal film on a polyimide film There is a type in which copper is grown, and a type in which copper is grown by plating using the deposited metal film as a seed layer.
[0050]
Next, using a roll laminator, a resist film (not shown) is thermocompression bonded to the surface of the copper foil 22, the pattern is exposed and developed to form a resist mask pattern (not shown), and then ferric chloride is mainly used. Copper chemical etching is performed using an etchant as a component to form a copper circuit portion 24 as shown in FIG.
[0051]
Next, as shown in FIG. 2C, as a via hole drilling step, a YAG laser is irradiated from the surface side of the adhesive layer 23, and the polyimide film 21 and the adhesive layer 23 have a via hole 25 having a diameter of about 100 μm. Form. As a laser for drilling, other than a YAG laser, a <CO 2 laser or an excimer laser can be used. For the drilling of the polyimide film 21 and the adhesive layer 23, plasma etching or chemical etching using an appropriate chemical solution can be applied in addition to the laser processing method.
[0052]
Subsequently, a small hole 26 is formed in the copper circuit portion 24 by a YAG laser. The diameter of the small hole 26 is not more than half the diameter of the via hole 25, for example, about 30 to 50 μm. The small holes 26 can also be formed by chemical etching of copper using a resist mask before the via holes 25 are formed.
[0053]
Next, as shown in FIG. 2 (d), as a first resin paste filling step, a low temperature fusion type conductive resin paste 27 is applied from the surface side of the adhesive layer 23 by screen printing or the like. The via hole 25 and the small hole 26 are filled and filled. The low-temperature fusion-type conductive resin paste 27 is obtained by mixing conductive fine particles made of nano-sized silver oxide or the like having a particle size of several nanometers with an organic solvent together with a reducing agent, a dispersant and the like into a paste.
[0054]
Next, as a first heat curing step, the low temperature fusion type conductive resin paste 27 filled in the via hole 25 and the small hole 26 is heated and cured by heating at about 200 ° C., as shown in FIG. As shown, the first conductive portion 28 is formed.
[0055]
The low-temperature fusion-type conductive resin paste 27 shrinks in volume to about 1/3 due to heat curing. As a result, as shown in FIG. 2E, the first conductive portion is formed by the low-temperature fusion-type conductive resin solidified so as to surround the bottom surface of the via hole 25 and the inner peripheral surfaces of the via hole 25 and the small hole 26. 28 is formed. A space 29 is formed inside the first conductive portion 28.
[0056]
The bottom surface of the via hole 25 becomes the back surface 24a of the copper circuit portion 24, and has an area due to the difference in diameter between the via hole 25 and the small hole 26. The first conductive portion 28 has a relatively wide area on the back surface 24a of the copper circuit portion. Conductive contact is made with the copper circuit portion 24.
[0057]
In the low temperature fusion type conductive resin, the conductive fine particles are fused to each other by sintering. ^-6 High conductivity of about Ω / cm is obtained, and the first conductive portion 28 and the copper circuit portion 24 are in conductive contact with a relatively wide area on the copper circuit portion back surface 24a. The contact resistance with the portion 24 is significantly reduced.
[0058]
Next, as a second resin filling step, as shown in FIG. 2 (f), the entire space 29 inside the first conductive part 28 formed in the via hole 25 and the small hole 26 is polymerized. A mold conductive resin paste 30 is filled in by a screen printing method or the like. The small hole 26 functions as an air vent hole for the via hole 25 when the resin paste is filled.
[0059]
As the polymer-type conductive resin paste 30, a thermosetting paste having a viscosity of 50 to 150 Pa · s and containing a binder mainly composed of an epoxy resin and silver having an average particle diameter of 5 μm was used. As the conductive resin filling the via hole 25 and the small hole 26, in addition to the silver paste, a paste using copper particles or copper particles whose surfaces are coated with silver as fillers can also be used. Moreover, if there are few solvent components and the volume reduction at the time of drying and hardening is slight, the kind of resin will not be ask | required.
[0060]
Next, as the second heat-curing step, the filled polymer-type conductive resin paste 30 is heat-cured in an oven at 100 ° C. to form the second conductive portion 31 (see FIG. 2F). To do.
[0061]
Since the polymer-type conductive resin paste 30 contains almost no volatile solvent component and there is no or very little volume shrinkage after curing, the second conductive portion 31 made of the cured polymer-type conductive resin is a via hole. 25 and the small hole 26 are filled without any gaps, and it is avoided that a cavity that causes a structural defect is generated inside the via hole 25.
[0062]
As described above, one base material (basic wiring board) 40 for the multilayer wiring board is completed.
[0063]
As shown in FIG. 3, the multilayer wiring board is manufactured by stacking a plurality of multilayer wiring board base materials 40 and performing multilayer bonding. In this multi-layer bonding process, a pressure of about 10 to 50 kPa is applied according to the glass transition temperature of the thermoplastic polyimide constituting the adhesive layer 23 and the embedded state of the copper circuit portion 24 in the adhesive layer 23 using a hot press device. While applying, heating to about 150-250 ° C. Thereby, the multilayer wiring board 50 is completed.
[0064]
When the completed multilayer wiring board 50 is observed, as shown in FIG. 4, the inner periphery of the via hole 25 is approximately about the nanoparticle fusion layer obtained by heat-curing the low-temperature fusion-type conductive resin paste. A first conductive portion 28 having a thickness of 10 μm was present, a second conductive portion 31 made of a polymer-type conductive resin was formed inside, and a double-structure conductor portion (IVH) was formed.
[0065]
The electrical resistance of the interlayer conduction by the conductor portion of the multilayer wiring board 50 is lower than that of a normal polymer type conductive resin alone due to the presence of the first conduction portion 29 by the nanoparticle fusion layer having a low resistance. Become.
[0066]
In particular, in high-frequency transmission, because of the skin effect, most of the current A flows along the outer periphery of the via (the inner peripheral surface of the via hole 25), as shown in FIG. In the simulation, when the frequency is 500 MHz or higher, it can be predicted that the difference in resistance starts to significantly increase as compared with IVH using only a normal polymer type conductive resin.
[0067]
The filler of the polymer-type conductive resin that forms the second conductive portion 31 includes metal particles having an average particle size of 3 to 10 μm, as in the conventional case. This is because if the particle size of the metal particles is larger than 10 μm, the particle size approaches the via hole diameter, the number of contact points between the metal particles in the via hole decreases, and the apparent resistivity increases. . When the particle diameter is 10 μm, the increase in resistance cannot be ignored when the via hole diameter is 100 μm or less.
[0068]
On the other hand, the smaller the particle size of the metal particles, the better the compatibility with the small diameter via hole, but it becomes difficult to uniformly disperse the metal particles in the binder due to the aggregation of the metal particles. Moreover, when the particle size of a metal particle is too small, the tendency for contact resistance with copper foil to become unstable is seen. This suggests that a particle size of a certain size is necessary in order to obtain a stable piercing contact by the applied pressure during the multi-layer lamination press.
[0069]
As shown in FIG. 5 (a), the multilayer wiring board substrate according to the present invention has a masking tape 32 made of PET film or the like on the surface side of the adhesive layer 23 before the formation of the via hole, as shown in FIG. A via hole 25 is formed by sticking.
[0070]
Then, with the masking tape attached, the first filling step of filling the via hole 25 with the low temperature fusion type conductive resin paste, and the low temperature fusion type conductive resin paste filled in the via hole 25 are heated and cured. A first heat-curing step for forming the first conductive portion 28, a second filling step for filling the first conductive portion 28 of the via hole 25 with a polymer-type conductive resin paste, and the first conductive portion 28 The second heat-curing step of forming the second conductive portion 31 by heating and curing the polymer-type conductive resin paste filled inside is sequentially performed.
[0071]
After completion of the second heat curing step, the masking tape 32 is peeled off. As a result, as shown in FIG. 5B, the conductive resin protrusion 33 having a size corresponding to the thickness of the masking tape 32 is formed on the adhesive layer 23 side. The conductive resin protrusion 33 has an effect of improving the piercing contact with another conductive layer by a multi-layered laminating press and reducing the contact resistance.
[0072]
Moreover, as shown in FIG. 6, the multilayer wiring board substrate according to the present invention is made of an insulating resin layer 34 constituting an insulating substrate, which is made of thermoplastic polyimide (TPI) or thermoplastic as shown in FIG. The insulating resin layer itself can be composed of an adhesive for interlayer adhesion, such as a polyimide having a thermosetting function. In this case, a conductive layer made of copper foil or the like forming the copper circuit portion 24 can be provided on one surface of the insulating resin layer 34, and the adhesive layer on the other surface can be omitted.
[0073]
In this multilayer wiring board base material, a via hole 25 is formed in the insulating resin layer 34, and a small hole 26 is formed in the copper circuit portion 24. As in the above-described embodiment, the inside of the via hole 25 and the small hole 26 is formed. A double layer composed of a first conductive portion 28 made of a low-temperature fusion-type conductive resin surrounding a peripheral surface (via outer peripheral portion) and a second conductive portion 31 made of a polymer-type conductive resin filling the inside of the first conductive portion 28. It has a structure.
[0074]
Also in this embodiment, the conductivity of interlayer conduction can be increased by the first conductive portion 28 made of a low-temperature fusion-type conductive resin surrounding the inner peripheral surface of the via hole 25, and the low-temperature fusion type forming the first conductive portion 28. Even if the conductive resin of this type shrinks due to heat curing, the space generated inside the first conductive part 28 due to the volume shrinkage is filled with the second conductive part 31 made of polymer-type conductive resin, A stable piercing contact can be obtained with respect to another conductive layer.
[0075]
Moreover, the base material for multilayer wiring boards of this invention can also use CCL which used the liquid crystal polymer which shows a thermoplastic behavior as an insulating layer as a starting material.
[0076]
Moreover, in the above-mentioned embodiment, although the small hole 26 was made in the copper circuit part 24, as this invention is shown by FIG. 7, the small hole 26 is not made in the copper circuit part 24. Can be applied in the same manner, and the same effect can be obtained.
[0077]
In this embodiment, it is preferable that the resin paste is filled using a vacuum printing machine for the purpose of suppressing entrainment of bubbles when filling the resin paste and precisely controlling the amount of resin paste filling.
[0078]
8 (a) to 8 (c) show other embodiments of the substrate for a multilayer wiring board according to the present invention. In this embodiment, the via hole 25 penetrates all of the polyimide film 21, the adhesive layer 23, and the copper circuit portion 24 straight.
[0079]
In this case, as shown in FIG. 8A, as the first resin paste filling step, a masking tape (not shown) having a pattern larger than the diameter of the via hole 25 is attached to the copper circuit portion 24 side. Then, the via hole 25 is filled with a low-temperature fusion-type conductive resin paste 27 by screen printing or the like from the surface side of the adhesive layer 23. As a result, an extended portion 27 </ b> A is formed of the low-temperature fusion-type conductive resin paste that spreads in contact with the surface of the copper circuit portion 24.
[0080]
Next, as a first heat-curing step, the low-temperature fusion-type conductive resin paste 27 filled in the via hole 25 is heat-cured by heating at about 200 ° C. to form the first conductive portion 28.
[0081]
The low temperature fusion type conductive resin paste 27 shrinks in volume by heat curing. As a result, as shown in FIG. 8B, the first conductive portion 28 is formed of the low-temperature fusion-type conductive resin solidified so as to surround the inner peripheral surface of the via hole 25. A space 29 is formed inside the first conductive portion 28. The expanded portion 27A becomes an expanded conductive portion 28A that spreads in contact with the surface of the copper circuit portion 24, increases the contact area between the first conductive portion 28 and the copper circuit portion 24, and the first conductive portion 28 and the copper circuit portion 24. To reduce contact resistance.
[0082]
Next, as a second resin filling step, as shown in FIG. 8C, the polymer-type conductive property is formed in the entire space 29 inside the first conductive portion 28 formed in the via hole 25. The resin paste 30 is filled and filled by a screen printing method or the like.
[0083]
Next, as a second heat-curing step, the filled polymer-type conductive resin paste 30 is heat-cured in an oven at 100 ° C. to form the second conductive portion 31 (see FIG. 8C). To do.
[0084]
Since the polymer-type conductive resin paste 30 contains almost no volatile solvent component and there is no or very little volume shrinkage after curing, the second conductivity of the cured polymer-type conductive resin is also used in this embodiment. The portion 31 (see FIG. 8C) fills the via hole 25 without a gap, and avoids the generation of a cavity that causes a structural defect inside the via hole 25.
[0085]
【The invention's effect】
As understood from the above description, according to the multilayer wiring board, the multilayer wiring board base material, and the manufacturing method thereof according to the present invention, the conductive portion made of the conductive resin filled in the via hole surrounds the inner peripheral surface of the via hole. Since it has a double structure composed of a first conductive portion made of a low temperature fusion type conductive resin and a second conductive portion made of a polymer type conductive resin filling the inside of the first conductive portion, Low electrical resistance, excellent electrical characteristics, and improved transmission characteristics in the high frequency band.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a multilayer wiring board substrate according to an embodiment of the present invention.
FIGS. 2A to 2F are process diagrams showing one embodiment of a method for producing a substrate for a multilayer wiring board according to one embodiment of the present invention.
FIG. 3 is a cross-sectional view showing one embodiment of a multilayer wiring board according to one embodiment of the present invention.
FIG. 4 is an explanatory view schematically showing conduction characteristics of a multilayer wiring board according to one embodiment of the present invention.
FIGS. 5A and 5B are process diagrams showing an embodiment of a method for producing a base material for a multilayer wiring board according to another embodiment of the present invention. FIGS.
FIG. 6 is a cross-sectional view showing a multilayer wiring board substrate according to another embodiment of the present invention.
FIG. 7 is a cross-sectional view showing a multilayer wiring board substrate according to another embodiment of the present invention.
FIGS. 8A to 8C are process diagrams showing an embodiment of a method for producing a base material for a multilayer wiring board according to another embodiment of the present invention.
FIGS. 9A to 9H are process diagrams showing a manufacturing process of a conventional multilayer wiring board. FIGS.
FIGS. 10A to 10F are process diagrams showing manufacturing steps of another conventional multilayer wiring board. FIGS.
FIG. 11 is a cross-sectional view showing a via portion of a conventional multilayer wiring board.
FIG. 12 is an enlarged cross-sectional view showing a via portion of a conventional multilayer wiring board.
[Explanation of symbols]
10 Base material for multilayer wiring board
11 Insulating resin layer
12 Wiring pattern section
13 Adhesive layer
14 Beer Hall
15 First conductive part
16 Second conductive part
21 Polyimide film
22 Copper foil
20 single-sided copper-clad board
24 Copper circuit
25 Beer Hall
26 Small hole
27 Low temperature fusion type conductive resin paste
28 1st conductive part
30 Polymer type conductive resin paste
31 Second conductive part
34 Insulating resin layer
40 Base material for multilayer wiring board
50 multilayer wiring board

Claims

A base material for a multilayer wiring board in which a conductive resin is filled in a via hole to form a conductive part, and interlayer conduction is obtained by the conductive part,
A conductive portion made of a conductive resin filled in the via hole,
A first conductive portion made of a first conductive resin surrounding the inner peripheral surface of the via hole;
A second conductive portion made of a second conductive resin filling the inside of the first conductive portion;
A double structure due to possess,
The first conductive portion is made of a fusion-type conductive resin, and the second conductive portion is made of a polymer-type conductive resin .

A conductive layer forming a wiring pattern is provided on one surface of the insulating base material, and an adhesive layer for interlayer adhesion is provided on the other surface of the insulating base material, and at least continuous with the insulating base material and the adhesive layer. A base material for a multilayer wiring board filled with a conductive resin for obtaining interlayer conduction in the formed via hole,
A conductive portion made of a conductive resin filled in the via hole,
A first conductive portion made of a first conductive resin surrounding the inner peripheral surface of the via hole;
A second conductive portion made of a second conductive resin filling the inside of the first conductive portion;
A double structure due to possess,
The first conductive portion is made of a fusion-type conductive resin, and the second conductive portion is made of a polymer-type conductive resin .

A conductive resin provided with a conductive layer forming a wiring pattern on one surface of an insulating base material also serving as an adhesive layer for interlayer adhesion, and for obtaining interlayer conduction at least in via holes formed in the insulating base material A substrate for a multilayer wiring board filled with
A conductive portion made of a conductive resin filled in the via hole,
A first conductive portion made of a first conductive resin surrounding the inner peripheral surface of the via hole;
A second conductive portion made of a second conductive resin filling the inside of the first conductive portion;
A double structure due to possess,
The first conductive portion is made of a fusion-type conductive resin, and the second conductive portion is made of a polymer-type conductive resin .

The multilayer wiring board substrate according to claim 2 or 3, wherein a small hole having a diameter smaller than the diameter of the via hole is formed in the conductive layer.

4. The multilayer wiring board substrate according to claim 2, wherein the via hole is formed in the conductive layer together with the insulating base, and the first conductive portion has an enlarged conductive portion that expands in contact with the surface of the conductive layer. Wood.

Said first conductive portion, the multilayer wiring board base material according to claim 5 wherein wherein is formed by low-temperature fusion-type conductive resin using conductive particles of nano size.

The second conductive portion, the average particle diameter 3μm~10μm conductive fillers a multilayer wiring board base material according to claim 6, characterized in that is made of a conductive resin polymer type which is fixed in a resin binder.

A plurality of multi-layer wiring board substrate of any one of claims 1 to 7, overlaid multilayer wiring substrate formed by bonding.

A conductive layer forming a wiring pattern is provided on one surface of the insulating base material, and an adhesive layer for interlayer adhesion is provided on the other surface of the insulating base material, but at least the insulating base material and the adhesive layer are provided. A drilling process for drilling via holes in
A first filling step of filling the via hole with a low-temperature fusion-type conductive resin paste;
A first heat curing step of heat-curing the low-temperature fusion-type conductive resin paste filled in the via hole to form a first conductive portion;
A second filling step of filling a polymer-type conductive resin paste inside the first conductive part of the via hole;
A second heat-curing step of heat-curing the polymer-type conductive resin paste filled inside the first conductive portion to form a second conductive portion;
The manufacturing method of the base material for multilayer wiring boards which has this.

Although a conductive layer forming a wiring pattern is provided on one surface of an insulating base material that also serves as an adhesive layer for interlayer adhesion, at least a perforating step of drilling a via hole in the insulating base material;
A first filling step of filling the via hole with a low-temperature fusion-type conductive resin paste; and heat-curing the low-temperature fusion-type conductive resin paste filled in the via hole to form a first conductive portion. A first heat curing step;
A second filling step of filling a polymer-type conductive resin paste inside the first conductive part of the via hole;
A second heat-curing step of heat-curing the polymer-type conductive resin paste filled inside the first conductive portion to form a second conductive portion;
The manufacturing method of the base material for multilayer wiring boards which has this.

The method for producing a substrate for a multilayer wiring board according to claim 9 or 10, wherein the low-temperature fusion-type conductive resin paste is a paste obtained by mixing nano-sized conductive fine particles with an organic solvent.

The multilayer wiring board according to any one of claims 9 to 11, wherein a polymer-type conductive resin paste using a paste obtained by mixing a resin binder with an average particle diameter of 3 µm to 10 µm in a solvent is used. Method for manufacturing a substrate.