JP3991633B2 - Drive circuit, electro-optical device, and electronic apparatus - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a drive circuit for an electro-optical device, an electro-optical device, and an electronic apparatus suitable for use in displaying various types of information.
[0002]
[Background]
(1) Subfield drive system
An electro-optical device, for example, a liquid crystal display device using liquid crystal as an electro-optical material, is widely used as a display device in place of a cathode ray tube (CRT) in a display unit of various information processing devices, a liquid crystal television, and the like. Here, the conventional electro-optical device is configured as follows, for example. In other words, a conventional electro-optical device includes a pixel electrode arranged in a matrix, an element substrate provided with a switching element such as a TFT (Thin Film Transistor) connected to the pixel electrode, and a pixel electrode. It is composed of a counter substrate on which counter electrodes facing each other are formed, and a liquid crystal as an electro-optical material filled between the two substrates.
[0003]
In such a configuration, when a scanning signal is applied to the switching element via the scanning line, the switching element becomes conductive. In this conductive state, when an image signal having a voltage corresponding to the gradation is applied to the pixel electrode through the data line, a charge corresponding to the voltage of the image signal is applied to the liquid crystal layer between the pixel electrode and the counter electrode. Accumulated. After the charge accumulation, even if the switching element is turned off, the charge accumulation in the liquid crystal layer is maintained by the capacity of the pixel electrode and the counter electrode, the storage capacity, and the like. As described above, when each switching element is driven and the amount of charge to be stored is controlled according to the gradation, the density at which light is modulated and displayed for each pixel changes. Therefore, it is possible to display gradation.
[0004]
At this time, since charges may be accumulated in the electrodes of each pixel during a part of the period for displaying one screen, first, each scanning line is sequentially arranged by the scanning line driving circuit. In the selection period of the scanning line, secondly, the data line is sequentially selected by the data line driving circuit, and thirdly, an image signal having a voltage corresponding to the gradation is sampled on the selected data line. With this configuration, it is possible to perform time-division multiplex driving in which the scanning line and the data line are shared by a plurality of pixels.
[0005]
However, the image signal applied to the data line is a voltage corresponding to the gradation, that is, an analog signal. For this reason, a D / A conversion circuit, an operational amplifier, and the like are required for the peripheral circuit of the electro-optical device, which increases the cost of the entire device. In addition, display unevenness occurs due to the non-uniformity of these D / A conversion circuits, operational amplifiers, and various wiring resistances, so that high-quality display is extremely difficult. This is particularly noticeable when high-definition display is performed. Furthermore, in an electro-optical material such as liquid crystal, the relationship between the applied voltage and the transmittance varies depending on the type of electro-optical material. For this reason, as a drive circuit for driving the electro-optical device, a general-purpose circuit that can handle various electro-optical devices is desired.
[0006]
Due to the circumstances described above, the present applicant has developed a technique for dividing one frame into a plurality of subfields and turning on / off each pixel for each subfield. According to this technique, the applied voltage when a pixel is turned on / off within each subfield is constant regardless of the gradation, and the duty ratio (or voltage effective value) at which the pixel is turned on within one frame. Determines the gradation of the pixel.
[0007]
Here, when the gradation characteristics of the electro-optical device are observed while changing the duty ratio between 0% and 100%, the gradation does not change in the vicinity of the duty ratio of 0% even though the duty ratio is changed. An area exists. Here, the effective voltage value at the point where the gradation characteristic rises is called a threshold voltage Vth. Although the value of the threshold voltage Vth differs depending on the composition of the liquid crystal, it is necessary to provide a subfield that is always set to the ON state in order to give this threshold voltage Vth regardless of the value of the gradation data.
[0008]
Here, the required number of gradations of the image is 2 ^K (K is an integer greater than or equal to 1), 2 in one frame ^K A method of providing +1 subfield and a method of providing K + 1 subfield are conceivable. In the former method, each subfield period has substantially the same length, but the subfield period is slightly increased or decreased as necessary in order to compensate for the nonlinear characteristic of the electro-optical device. As a result, the former method is advantageous in that it can accurately compensate for the nonlinear characteristics of the electro-optical device.
[0009]
On the other hand, in the latter method, K of the K + 1 subfield periods are associated with each bit of the gradation data. Here, each subfield period is 2 in one frame according to the number of digits of the corresponding bit. ⁰ , 2 ¹ , 2 ² ,…, 2 ^K-1 The length is divided into the ratio of
Compared with the former method, the latter method is advantageous in that the number of on / off times of pixels in one frame can be reduced and the power consumption can be suppressed low.
[0010]
(2) Inversion method
If a direct current component is included in the voltage applied to the liquid crystal, the liquid crystal is deteriorated. Therefore, in the conventional TFT liquid crystal display device, the polarity of the voltage applied to each dot is inverted for each frame. Here, focusing on all the dots constituting the screen, a method in which a voltage having the same polarity is applied to all the dots within one frame is called a frame inversion method. Further, a method for switching the polarity for each scanning line is called a line inversion method, and a method for switching the polarity for each data line is called a source inversion method. Further, a method of switching the polarity for each dot is called a dot inversion method.
[0011]
When the polarity of the voltage applied to each dot is switched for each frame, there is a slight difference in the transmittance depending on the error of the absolute value of the positive and negative voltages, and flicker may occur. In order to reduce the influence of this flicker, it is optimal to adopt the dot inversion method, and the next preferred is the line inversion method or the source inversion method. The frame inversion method is disadvantageous in that the flicker is conspicuous because the polarity of all dots is switched for each frame.
[0012]
[Problems to be solved by the invention]
However, there are many cases where the frame inversion method has to be adopted due to various demands imposed on the liquid crystal display device. For example, in some small electronic devices, in order to lower the power supply voltage of the data line driving circuit, there is one that switches the polarity of the counter electrode every frame. In this case, the polarity of the applied voltage of all dots is changed. We had to make it common for every frame.
The present invention has been made in view of the above-described circumstances, and provides an electro-optical device drive circuit, an electro-optical device, and an electronic apparatus that can reduce the influence of flicker while making the polarity of the applied voltage of all dots common. It is an object.
[0013]
[Means for Solving the Problems]
The driving circuit according to the present invention includes a pixel provided corresponding to an intersection of the data line and the scanning line, and the gray level of the pixel is in accordance with a duty ratio at which the pixel is turned on in one frame. A driving circuit for driving the electro-optical device to be determined, wherein a data signal for turning on or off the pixel is supplied to the pixel via the data line, and the polarity of the data signal is an AC signal The waveform of the alternating signal in the next frame of the one frame is an inverted waveform of the waveform of the alternating signal in the one frame, and the plurality of subfields At least in the first subfield, the pixel is always turned on, and the polarity of the data signal is inverted by an odd number of 3 or more in the one frame. .
In the driving circuit described above, in the second and third subfields consecutive among the plurality of subfields, the polarity of the data signal in the second subfield is inverted in the third subfield. May be.
In the driving circuit described above, in some subfields of the plurality of subfields, the polarity of the data signal is inverted a plurality of times, and in each of the subfields, the polarity of the data signal is inverted. The data signal may be written to the pixel.
In the above drive circuit, the partial subfield may include at least the longest subfield of the plurality of subfields.
In the driving circuit, in two consecutive subfields of the plurality of subfields, the polarity of the data signal is kept constant, and the pixel is added to the pixel for each of the two consecutive subfields. A data signal may be written.
In the above driving circuit, the two consecutive subfields may include at least the shortest subfield of the plurality of subfields.
In the above drive circuit, the polarity of the alternating signal may be inverted within the one frame.
The electro-optical device according to the present invention includes a plurality of scanning lines, a plurality of data lines, a plurality of pixels disposed corresponding to intersections of the plurality of scanning lines and the plurality of data lines, and The drive circuit according to any one of claims 1 to 9, wherein the plurality of pixels include a pixel electrode, a counter electrode disposed to face the pixel electrode, and a gap between the pixel electrode and the counter electrode. The electro-optic material is disposed, and a switching element that controls conduction between one data line of the plurality of data lines and the pixel electrode is provided.
In the above electro-optical device, the potential applied to the counter electrode may be reversed so as to have a polarity opposite to the polarity of the data signal.
The electro-optical device further includes a scanning line driving circuit that drives the plurality of scanning lines, and the scanning line driving circuit outputs a scanning signal while skipping the plurality of scanning lines for each of the plurality of lines. It may be.
An electronic apparatus according to an aspect of the invention includes the above electro-optical device.
The driving circuit according to the present invention drives the electro-optical device that performs gradation display by turning on or off a plurality of pixels for each of a plurality of subfields included in one of a plurality of frames. A data line driving circuit configured to apply a data signal having an ON potential or an OFF potential to each of the plurality of subfields for each of the plurality of pixels based on grayscale data. The data line driving circuit includes a potential selection circuit, and the potential selection circuit outputs a binary signal as a potential by converting a binary signal to a potential based on an alternating signal, and the polarity of the data signal is The waveform of the alternating signal in the frame following the one frame of the plurality of frames is inverted according to the polarity inversion of the alternating signal. Wherein the at frame is an inverted waveform of the waveform of the AC signal.
In the above driving circuit, the polarity of the data signal may be inverted three or more odd times within the one frame.
In the driving circuit, in the first and second subfields consecutive among the plurality of subfields, the polarity of the data signal in the first subfield is inverted in the second subfield. May be.
In the driving circuit described above, in some subfields of the plurality of subfields, the polarity of the data signal is inverted a plurality of times, and in each of the subfields, the polarity of the data signal is inverted. The data signal may be written to the pixel.
In the above drive circuit, the partial subfield may include at least the longest subfield of the plurality of subfields.
In the driving circuit, in two consecutive subfields of the plurality of subfields, the polarity of the data signal is kept constant, and the pixel is added to the pixel for each of the two consecutive subfields. A data signal may be written.
In the above driving circuit, the two consecutive subfields may include at least the shortest subfield of the plurality of subfields.
Another driving circuit according to the present invention includes a pixel provided corresponding to an intersection of a data line and a scanning line, and the gradation of the pixel is set to a duty ratio that turns on the pixel in one frame. A driving circuit for driving the electro-optical device determined in accordance with the data signal; the data signal for turning on or off the pixel is supplied to the pixel through the data line; and the polarity of the data signal is alternating current And the waveform of the AC signal in the next frame of the one frame is an inverted waveform of the waveform of the AC signal in the one frame. To do.
In the above drive circuit, the polarity of the data signal in the first subfield among the plurality of subfields may be set so that the polarity of the data signal in the second subfield that is continuous with the first subfield among the plurality of subfields. The polarity of the data signal may be different.
In the above driving circuit, in some subfields of the plurality of subfields, the polarity of the data signal is inverted a plurality of times, and each time the data signal inverts the polarity in the some subfields. The data signal may be supplied to the pixel.
In the above drive circuit, the partial subfield may include at least the longest subfield of the plurality of subfields.
In the driving circuit, in two consecutive subfields of the plurality of subfields, the polarity of the data signal is kept constant, and the pixel is added to the pixel for each of the two consecutive subfields. A data signal may be supplied.
In the above driving circuit, the two consecutive subfields may include at least the shortest subfield of the plurality of subfields.
In the above drive circuit, the polarity of the alternating signal may be inverted within the one frame.
The electro-optical device according to the present invention includes a plurality of scanning lines, a plurality of data lines, a plurality of pixels disposed corresponding to intersections of the plurality of scanning lines and the plurality of data lines, and the driving described above. A plurality of pixels including a pixel electrode, a counter electrode disposed opposite to the pixel electrode, an electro-optic material disposed between the pixel electrode and the counter electrode, A switching element that controls conduction between one data line of the plurality of data lines and the pixel electrode is provided.
In the above electro-optical device, the potential applied to the counter electrode may be reversed so as to have a polarity opposite to the polarity of the data signal.
The electro-optical device further includes a scanning line driving circuit that drives the plurality of scanning lines, and the scanning line driving circuit outputs a scanning signal while skipping the plurality of scanning lines for each of the plurality of lines. It may be.
The above electro-optical device may be mounted on an electronic device.
In the driving circuit of the electro-optical device according to one aspect of the present invention, one frame is divided into a plurality of subfields, and a plurality of pixels arranged in a matrix are turned on or off for each subfield. A driving circuit of an electro-optical device that performs gradation display, and applies data signal (dk) that becomes on potential or off potential for each subfield to each pixel based on gradation data A line drive circuit (140) and a polarity inversion circuit (timing signal generation circuit 200) for inverting the polarity of the data signal (dk) a plurality of times in the one frame are characterized.
Here, in the drive circuit of the electro-optical device, the polarity inversion circuit (200) may invert the polarity of the data signal (dk) by an odd number of three or more times in the one frame.
Further, in the drive circuit of the electro-optical device, the polarity inversion circuit (200) changes the polarity of the data signal (dk) in the first frame in the first and second frames in succession. You may invert in the frame.
Further, in the driving circuit of the electro-optical device, the polarity inversion circuit (200) inverts the polarity of the data signal (dk) a plurality of times in some subfields, and the data line driving circuit (140). In the partial subfield, the data signal (dk) may be written to the pixel every time the data signal (dk) is inverted in polarity (PL04, PL05, etc. of the modification).
[0014]
In the driving circuit of the electro-optical device, it is preferable that the partial subfield includes at least the longest subfield (SF3).
Furthermore, in any one of the electro-optical device drive circuits described above, the polarity inversion circuit (200) holds the polarity of the data signal (dk) constant in a part of two consecutive subfields. The data line driving circuit (140) writes the data signal (dk) to the pixel for each subfield of the two consecutive subfields (PL03 of the embodiment, PL05 of the modification, etc.) You may do it.
Furthermore, in the driving circuit of the electro-optical device, the two consecutive subfields may include at least the shortest subfield (SF1).
[0015]
An electro-optical device according to another aspect of the present invention includes a plurality of scanning lines (112), a plurality of data lines (114), and pixels arranged corresponding to the intersections of the scanning lines and the data lines. An element provided with a pixel electrode (118) to be configured and a switching element that is provided for each pixel electrode and controls conduction between the data line and the pixel electrode by a scanning signal supplied via the scanning line. An electro-optic material (liquid crystal 105) sandwiched between a substrate (101), a counter substrate (102) having a counter electrode (108) disposed opposite to the pixel electrode, and the element substrate and the counter substrate. ), A scanning line driving circuit (130) for sequentially supplying the scanning signal to each of the scanning lines for each sub-field divided into one frame, and each support for each pixel based on grayscale data. Applying a data signal to be ON potential or OFF potential (dk) for each field, characterized by comprising the above-described driving circuit.
Further, in the electro-optical device, the polarity inversion circuit (200) inverts the potential applied to the counter electrode (108) so that the polarity is opposite to the polarity of the data signal (dk). It may be.
An electronic apparatus according to another aspect of the invention includes any one of the above electro-optical devices.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
1． Configuration of the embodiment
1.1. overall structure
Next, the configuration of the electro-optical device according to the embodiment of the invention will be described with reference to FIG.
In the figure, the timing signal generation circuit 200 is supplied with a vertical synchronizing signal Vs, a horizontal synchronizing signal Hs and a dot clock signal DCLK of input gradation data D0 to D2 from a host device (not shown). Further, the oscillation circuit 150 supplies the basic clock RCLK of the read timing to the timing signal generation circuit 200. The timing signal generation circuit 200 generates various timing signals and clock signals described below according to these signals.
[0017]
First, the drive signal LCOM is a signal applied to the counter electrode of the counter substrate, and has a constant potential (zero potential) in the present embodiment. In the present embodiment, one frame is divided into a plurality of subfields SF0 to SF3, and gradation display is performed by turning on / off pixels for each subfield. The start pulse DY is a pulse signal that is output first in each subfield. The clock signal CLY is a signal that defines a horizontal scanning period on the scanning side (Y side).
[0018]
The latch pulse LP is a pulse signal output at the beginning of the horizontal scanning period, and is output when the level of the clock signal CLY is changed (that is, rising and falling). The clock signal CLX is a dot clock signal for display. Next, the AC signal PL is a signal whose polarity is inverted at the start of the subfields SF0, SF2 and SF3 in each frame. However, the polarity is not reversed at the start of the subfield SF1.
[0019]
Here, an outline of the subfield driving will be described with reference to the waveform of the start pulse DY in FIG. First, a subfield SF0 is provided at the beginning of the frame. The length of this subfield is set to a length that becomes a boundary at which the transmittance of the liquid crystal rises from 0% (in the case of normally black), that is, a length that gives a threshold voltage Vth.
[0020]
The subfields SF1 to SF3 are set to lengths having weights corresponding to the respective bits of the input gradation data D0 to D2. That is, the subfield SF1 corresponds to the gradation data D0 that is the least significant bit, and is set to a length that causes a change in transmittance corresponding to the on / off of the gradation data D0 by the on / off thereof. The subfields SF2 and SF3 are also set to lengths that cause a change in transmittance corresponding to the on / off of the gradation data D1 and D2 by the on / off of each.
[0021]
In the present embodiment, the subfields SF2 and SF3 have a length that is about twice and four times that of the subfield SF1, respectively. In practice, however, the length of each subfield is appropriately increased or decreased in order to compensate for the non-linearity of the liquid crystal.
[0022]
Returning to FIG. 1, a plurality of scanning lines 112 are formed in the display region 101 a on the element substrate 101 so as to extend in the X (row) direction in the drawing. A plurality of data lines 114 are formed extending along the Y (column) direction. The pixels 110 are provided corresponding to the intersections of the scanning lines 112 and the data lines 114, and are arranged in a matrix. Here, the total number of scanning lines 112 is m, and the total number of data lines 114 is n (m and n are integers of 2 or more, respectively).
[0023]
1.2. Pixel configuration
As a specific configuration of the pixel 110, for example, the one shown in FIG. In this configuration, the gate of the thin film transistor (TFT) 116 is connected to the scanning line 112, the source is connected to the data line 114, and the drain is connected to the pixel electrode 118, and the electro-optic is provided between the pixel electrode 118 and the counter electrode 108. A liquid crystal layer is formed by sandwiching a liquid crystal 105 as a material. Here, the counter electrode 108 is a transparent electrode formed on one surface of the counter substrate so as to face the pixel electrode 118. In addition, a storage capacitor 119 is formed in parallel with the pixel electrode 118 and the counter electrode 108 to reduce the influence on display due to leakage of charge from the pixel electrode 118. In this embodiment, one potential of the storage capacitor 119 is set to the same potential as the counter electrode 108, but may be set to the same potential as the ground potential GND or the potential of the gate line.
[0024]
Here, in the configuration shown in FIG. 2A, since only one channel type is used as the transistor 116, an offset voltage is required. However, as shown in FIG. If the channel transistor and the N channel transistor are combined in a complementary manner, the influence of the offset voltage can be canceled. However, in this complementary configuration, it is necessary to supply mutually exclusive levels as scanning signals, so two scanning lines 112a and 112b are required for one row of pixels 110.
[0025]
1.3. Scan line driving circuit 130
The description returns to FIG. 1 again. The scanning line driving circuit 130 transfers the start pulse DY supplied at the beginning of the subfield according to the clock signal CLY, and sequentially supplies each of the scanning lines 112 exclusively as the scanning signals G1, G2, G3,. To do.
[0026]
1.4. Data conversion circuit 300
The data conversion circuit 300 converts the input gradation data D0 to D2 input in synchronization with the dot clock signal DCLK into a data signal Ds that is synchronized with the clock signal CLX and outputs the data signal Ds.
[0027]
1.5. Data line driving circuit 140
Next, the data line driving circuit 140 sequentially latches n data signals Ds corresponding to the number of data lines 114 in a certain horizontal scanning period, and then latches the n data signals Ds in the next horizontal scanning period. ., Dn are simultaneously supplied to the corresponding data lines 114 via the potential selection circuit 1440. Here, the specific configuration of the data line driving circuit 140 is as shown in FIG. That is, the data line driving circuit 140 includes an X shift register 1410, a first latch circuit 1420, a second latch circuit 1430, and a potential selection circuit 1440.
[0028]
Among them, the X shift register 1410 transfers the latch pulse LP supplied at the beginning of the horizontal scanning period in accordance with the clock signal CLX, and sequentially supplies the latch signals S1, S2, S3,. . Next, the first latch circuit 1420 sequentially latches the data signal Ds at the falling edges of the latch signals S1, S2, S3,..., Sn. Then, the second latch circuit 1430 latches each of the data signals Ds latched by the first latch circuit 1420 at the falling edge of the latch pulse LP, and transfers the data signals Ds to the potential selection circuit 1440.
[0029]
The potential selection circuit 1440 converts these latched binary signals into potentials based on the alternating signal PL and applies them to the data lines 114 as data signals d1, d2, d3,. That is, if AC signal PL is at L level, H level of data signals d1, d2, d3,... Dn is converted to potential V1, and L level is converted to zero potential. On the other hand, if the alternating signal PL is at the H level, the H level of the data signals d1, d2, d3,... Dn is converted to the potential -V1, and the L level is converted to the zero potential.
[0030]
1.6. Configuration of liquid crystal device
The structure of the above-described electro-optical device will be described with reference to FIGS. 5 (a) and 5 (b). 1A is a plan view showing the configuration of the electro-optical device 100, and FIG. 1B is a cross-sectional view taken along the line AA ′ in FIG. As shown in these drawings, the electro-optical device 100 includes a device substrate 101 on which a pixel electrode 118 and the like are formed and a counter substrate 102 on which a counter electrode 108 and the like are formed with a certain gap between each other by a sealant 104. And a liquid crystal 105 as an electro-optic material is sandwiched between the gaps. Actually, the sealing material 104 has a cut-out portion, and after the liquid crystal 105 is sealed through this, the sealing material 104 is sealed with the sealing material, but is omitted in these drawings. Here, the element substrate 101 and the counter substrate 102 are amorphous substrates such as glass and quartz. The pixel electrode 118 and the like are formed by TFTs formed by depositing a semiconductor film on the element substrate 101. That is, the electro-optical device 100 is used as a transmission type.
[0031]
Now, in the element substrate 101, a light shielding film 106 is provided inside the sealing material 104 and outside the display area 101a. In the region where the light shielding film 106 is formed, the scanning line driving circuit 130 is formed in the region 130a, and the data line driving circuit 140 is formed in the region 140a. That is, the light shielding film 106 prevents light from entering the drive circuit formed in this region. A drive signal LCOM is applied to the light shielding film 106 together with the counter electrode 108. For this reason, in the region where the light-shielding film 106 is formed, the voltage applied to the liquid crystal layer is almost zero, so that the display state is the same as the voltage non-application state of the pixel electrode 118.
[0032]
In the element substrate 101, a plurality of connection terminals are formed outside the region 140a where the data line driving circuit 140 is formed, and the sealant 104 is separated, and control signals and power from the outside are formed. And so on. On the other hand, the counter electrode 108 of the counter substrate 102 is electrically connected to the light-shielding film 106 and the connection terminal in the element substrate 101 by a conductive material (not shown) provided in at least one of the four corners of the substrate bonding portion. Conduction is achieved. That is, the drive signal LCOM is applied to the light shielding film 106 via a connection terminal provided on the element substrate 101 and further to the counter electrode 108 via a conductive material.
[0033]
In addition, the counter substrate 102 is first provided with a color filter arranged in a stripe shape, a mosaic shape, a triangle shape, or the like according to the use of the electro-optical device 100, for example, if it is a direct view type. Second, a light shielding film (black matrix) made of, for example, a metal material or resin is provided. In the case of use of color light modulation, for example, when used as a light valve of a projector described later, a color filter is not formed. In the case of the direct-view type, the electro-optical device 100 is provided with a front light that emits light from the counter substrate 102 side or a backlight that emits light from the element substrate 101 side as necessary. In addition, the electrode formation surfaces of the element substrate 101 and the counter substrate 102 are each provided with an alignment film (not shown) that is rubbed in a predetermined direction to define the alignment direction of the liquid crystal molecules when no voltage is applied. On the other hand, the element substrate 101 and the counter substrate 102 are provided with polarizing plates (not shown) corresponding to the alignment direction. However, if a polymer-dispersed liquid crystal dispersed as fine particles in a polymer is used as the liquid crystal 105, the above-described alignment film, polarizer, and the like are not required, so that the light utilization efficiency is increased. This is effective in terms of reducing power consumption.
[0034]
2． Operation of the embodiment
Next, the operation of the electro-optical device according to the above-described embodiment will be described. FIG. 6 is a timing chart for explaining the operation of the electro-optical device. First, as described above, the AC signal PL is a signal whose polarity is inverted at the start of the subfields SF0, SF2 and SF3 in each frame, and its waveform is 3 in one frame (1F) as shown in FIG. The polarity will be reversed. On the other hand, the start pulse DY is supplied at the start of each subfield.
[0035]
Here, when the start pulse DY is supplied in the subfield where the AC signal PL is at the L level, the scanning signals G1, G2 are transferred by the transfer according to the clock signal CLY in the scanning line driving circuit 130 (see FIG. 1). , G3,..., Gm are sequentially output exclusively in the period (t). Note that the period (t) is set to be equal to or shorter than the shortest subfield SF1.
[0036]
The scanning signals G1, G2, G3,..., Gm each have a pulse width corresponding to a half cycle of the clock signal CLY, and the scanning signal G1 corresponding to the first scanning line 112 counted from above is After the start pulse DY is supplied, the clock signal CLY rises for the first time and is output after being delayed by at least a half cycle of the clock signal CLY. Therefore, one shot (G0) of the latch pulse LP is supplied to the data line driving circuit 140 after the start pulse DY is supplied and before the scanning signal G1 is output.
[0037]
Consider a case where one shot (G0) of the latch pulse LP is supplied. First, when one shot (G0) of the latch pulse LP is supplied to the data line drive circuit 140, the latch signals S1, S2, and S2 are transferred by the transfer according to the clock signal CLX in the data line drive circuit 140 (see FIG. 3). S3,..., Sn are sequentially output exclusively in the horizontal scanning period (1H). The latch signals S1, S2, S3,..., Sn each have a pulse width corresponding to a half cycle of the clock signal CLX.
[0038]
At this time, the first latch circuit 1420 in FIG. 3 corresponds to the intersection of the first scanning line 112 counted from the top and the first data line 114 counted from the left at the falling edge of the latch signal S1. The data signal Ds to the pixel 110 is latched, and then corresponds to the intersection of the first scanning line 112 counted from the top and the second data line 114 counted from the left at the falling edge of the latch signal S2. The data signal Ds to the pixel 110 is latched. Similarly, the data signal to the pixel 110 corresponding to the intersection of the first scanning line 112 counted from the top and the nth data line 114 counted from the left is similarly described below. Latch Ds.
[0039]
Thereby, first, the data signal Ds for one row corresponding to the intersection with the first scanning line 112 from the top in FIG. 1 is latched dot-sequentially by the first latch circuit 1420. Needless to say, the data conversion circuit 300 converts the grayscale data D0 to D2 of each pixel into the data signal Ds in accordance with the latch timing of the first latch circuit 1420 and outputs the data signal Ds.
[0040]
Next, when the clock signal CLY falls and the scanning signal G1 is output, the first scanning line 112 counted from the top in FIG. 1 is selected, and as a result, the pixel corresponding to the intersection with the scanning line 112 is selected. All 110 transistors 116 are turned on. On the other hand, the latch pulse LP is output at the falling edge of the clock signal CLY. Then, at the falling timing of the latch pulse LP, the second latch circuit 1430 receives the data signal Ds latched dot-sequentially by the first latch circuit 1420 via the potential selection circuit 1440. The data signals d1, d2, d3,..., Dn are simultaneously supplied to each of the lines 114. Therefore, the data signals d1, d2, d3,..., Dn are simultaneously written in the pixels 110 in the first row counting from the top.
[0041]
In parallel with this writing, the first latch circuit 1420 latches the data signal Ds for one row corresponding to the intersection with the second scanning line 112 from the top in FIG. Thereafter, the same operation is repeated until the scanning signal Gm corresponding to the mth scanning line 112 is output. That is, in one horizontal scanning period (1H) in which a certain scanning signal Gi (i is an integer satisfying 1 ≦ i ≦ m) is output, data for one row of the pixels 110 corresponding to the i-th scanning line 112. The writing of the signals d1, d2, d3,..., Dn and the dot sequential latching of the data signal Ds for one row of the pixels 110 corresponding to the (i + 1) th scanning line 112 are performed in parallel. become. Note that the data signal written to the pixel 110 is held until writing in the next subfield.
[0042]
Thereafter, the same operation is repeated every time the start pulse DY that defines the start of the subfield is supplied. However, in the subfield SF0, the level of the data signal Ds is always H level. As described above, if the polarity of the alternating signal PL is inverted, the polarity of the data signals d1, d2, d3,. Here, FIG. 4 shows pixel applied voltage waveforms with respect to various values of the gradation data D2, D1, and D0 of a certain pixel.
[0043]
3． Specific examples of electronic devices
3.1. projector
Next, some examples in which the above-described electro-optical device is used in a specific electronic apparatus will be described.
First, a projector 5400 that is a projection display device using the electro-optical device according to the above-described embodiment as a light valve will be described.
FIG. 7A is a schematic configuration diagram showing a main part of the projection display device. In the drawing, 5431 is a light source, 5442 and 5444 are dichroic mirrors, 5443, 5448 and 5449 are reflection mirrors, 5445 is an entrance lens, 5446 is a relay lens, 5447 is an exit lens, and 100R, 100G and 100B are liquid crystals by the electro-optical device. An optical modulator, 5451 is a cross dichroic prism, and 5437 is a projection lens. The light source 5431 includes a lamp 5440 such as a metal halide and a reflector 5441 that reflects the light of the lamp. The blue light / green light reflecting dichroic mirror 5442 transmits red light out of the light flux from the light source 5431 and reflects blue light and green light. The transmitted red light is reflected by the reflection mirror 5443 and is incident on the liquid crystal light modulator for red light 100R. On the other hand, of the color light reflected by the dichroic mirror 5442, green light is reflected by the dichroic mirror 5444 that reflects green light and is incident on the liquid crystal light modulator for green light 100G.
[0044]
On the other hand, the blue light also passes through the second dichroic mirror 5444. For blue light, in order to prevent light loss due to a long optical path, a light guide means including a relay lens system including an incident lens 5445, a relay lens 5446, and an output lens 5447 is provided, through which blue light is converted into blue light. Incident on the liquid crystal light modulation device 100B. The three color lights modulated by the respective light modulation devices are incident on the cross dichroic prism 5451. In this prism, four right-angle prisms are bonded together, and a dielectric multilayer film that reflects red light and a dielectric multilayer film that reflects blue light are formed in a cross shape on the inner surface. These dielectric multilayer films combine the three color lights to form light representing a color image. The synthesized light is projected onto the screen 5452 by the projection lens 5437 which is a projection optical system, and the image is enlarged and displayed.
[0045]
3.2. Mobile computer
Next, an example in which the electro-optical device is applied to a mobile personal computer will be described. FIG. 7B is a front view showing the configuration of this personal computer. In the figure, a mobile computer 5200 includes a main body 5204 having a keyboard 5202 and a display unit 5206. The display unit 5206 is configured by adding a backlight behind the electro-optical device 100 described above.
[0046]
3.3. Mobile phone
Further, an example in which the electro-optical device is applied to a mobile phone will be described. FIG.7 (c) is a front view which shows the structure of this mobile telephone. In the figure, a cellular phone 5300 includes the electro-optical device 100 in addition to a plurality of operation buttons 5302 as well as an earpiece 5304 and a mouthpiece 5306. The electro-optical device 100 is also provided with a backlight behind it as necessary.
[0047]
3.4. Other
In addition to the above-described electronic devices, liquid crystal televisions, viewfinder type, monitor direct-view type video tape recorders, car navigation devices, pagers, electronic notebooks, calculators, word processors, workstations, videophones, POS terminals, Examples include a device equipped with a touch panel. Needless to say, the above-described electro-optical device can be applied to these various electronic devices.
[0048]
Four. Modified example
The present invention is not limited to the above-described embodiment, and various modifications can be made as follows, for example.
(1) In the embodiment described above, the AC signal PL is inverted as shown in the uppermost stage of FIG. 6, but the mode of inverting the AC signal PL is not limited to this. That is, if the polarity of the odd number of times “3” or more is inverted within one frame and the DC component of the pixel applied voltage waveform is “0” regardless of the gradation data D0 to D2, various signals are exchanged. It can be employed as the digitized signal PL.
[0049]
Here, various waveforms that can be specifically employed as the alternating signal PL are shown in PL02 to PL05 in FIG. The AC signal PL01 is a signal of the prior art whose polarity is inverted every frame period for reference. First, the AC signal PL03 is equal to the AC signal PL employed in the above embodiment. Next, the AC signal PL02 is an example in which the polarity is inverted at the start timing of the subfields SF1, SF2, and SF3. When this signal is adopted, the polarity in the subfield SF3 of a certain frame is equal to the polarity in the subfield SF0 of the next frame. For this reason, since the polarity of the pixel applied voltage waveform does not reverse over a relatively long period (a period corresponding to the sum of the subfields SF3 and SF0), flicker is slightly more noticeable than in the above embodiment.
[0050]
Further, the inversion timing of the alternating signal is not limited to the start of the subfield, and may be in the middle of the subfield. As an example, AC signals PL04 and PL05 show an example in which polarity inversion is performed at a timing half that of the subfield SF3. In the AC signal PL04, the polarity is inverted at the start timing of each of the subfields SF0 to SF3, so that the polarity is inverted five times within one frame. Further, in the AC signal PL05, the polarity is inverted at the start timing of the subfields SF0 and SF3, so that the polarity is inverted three times within one frame. In this way, by inverting the alternating signal an odd number of times within one frame, the waveform of the alternating signal can be just inverted in one frame (J frame) and the next frame (J + 1 frame). .
[0051]
In the AC signals PL04 and PL05, the polarity of the AC signal is inverted in the middle of the subfield SF3. Therefore, the data signals d1, d2, d3,. That is, at the timing half that of the subfield SF3, the start pulse DY is supplied to the scanning line driving circuit 130 and the data supplied at the start of the subfield SF3, as at the start of a new subfield. The data signal Ds that is the same as the signal Ds needs to be supplied to the data line driving circuit 140 again. On the other hand, in the AC signal PL04, the duration of the same polarity can be reduced to about ½ of the longest subfield SF3. Therefore, the waveform shown in FIG. 8 is most advantageous in terms of preventing flicker. is there.
[0052]
(2) In the above-described embodiment, the number of subfields is “4” (SF0 to SF3), but it goes without saying that the number of subfields is arbitrary in the present invention. As an example, various waveforms that can be employed when the number of subfields is “5” (SF0 to SF4) are shown in PL12 to PL16 in FIG. The AC signal PL11 is a signal of the prior art whose polarity is inverted every frame period for reference. First, the AC signal PL12 is inverted at the start timing of each of the subfields SF0 to SF4. Thus, if the number of subfields is odd, the number of inversions within one frame can be made odd (in this case, “5”) by inverting the polarity for each subfield.
[0053]
Further, in the AC signal PL13, the number of inversions is set to “3” by inversion at each start timing of the subfields SF0, SF2, and SF4. In AC signal PL14, the number of inversions is set to “5” by inverting the polarity at each start timing of subfields SF1, SF2, SF3, and SF4 and 1/2 of subfield SF4. . As described above, by inverting the polarity in the middle of the subfield SF4, the duration of the same polarity can be shortened to about ½ of the longest subfield SF4, similarly to the AC signal PL04 described in FIG. This is advantageous in terms of preventing flicker.
[0054]
In AC signal PL15, the polarity is inverted at the start timing of each of subfields SF0 to SF4 and at the timing of each half of subfields SF3 and SF4. That is, polarity inversion is performed “7” times within one frame. Further, in AC signal PL16, the polarity is inverted at each start timing of subfields SF0 and SF4 and at a half timing of subfield SF4. That is, polarity inversion is performed “3” times within one frame.
[0055]
(3) In the above-described embodiment, the waveform of the AC signal PL is inverted every period of one frame in order to set the DC component of the voltage applied to the liquid crystal to “0”. The invention is not limited to this. For example, the waveform may be inverted every two or more frames.
[0056]
(4) In the above embodiment, the ON section in which the pixels are always on is provided once as one sub-frame SF0 within one frame period, but may be provided divided into a plurality of times. Further, not only the on period, but also an off period in which the pixels are always off may be provided. By providing both the on-section and the off-section in this way, the length of the on-section can be adjusted while the length of one frame period is fixed.
[0057]
(5) In the above embodiment, the drive signal LCOM applied to the counter electrode 108 is zero potential, but the voltage applied to each pixel is shifted depending on the characteristics of the transistor 116, the storage capacitor 119, the capacitance of the liquid crystal, and the like. There is a case. In such a case, the level of the drive signal LCOM applied to the counter electrode 108 may be shifted according to the voltage shift amount.
[0058]
(6) In the above embodiment, the drive signal LCOM applied to the counter electrode 108 is set to a constant potential (zero potential), and the polarity of the data signals d1, d2, d3,. The voltage applied to was reversed. For this reason, as shown in FIG. 4, the amplitude of the pixel applied voltage waveform is “2 · V1”, and a power supply circuit for generating this voltage is required. However, the amplitude of the voltage applied to each pixel can be set to “V1” by setting the polarity of the drive signal LCOM to the polarity of the data signal d1, d2, d3,.
[0059]
In the example of FIG. 4, the drive signal LCOM is set to zero potential in the subfields SF0, SF1, SF3 of the nth frame and the subfield SF2 of the (n + 1) th frame, and the subfield SF2 of the nth frame and the subfield SF0 of the (n + 1) th frame. , SF1 and SF3, the drive signal LCOM may be set to the potential V1. In FIG. 4, the zero potential portion may be the same potential as the drive signal LCOM, and the “−V1” potential portion may be the zero potential. According to such a configuration, the amplitude of the pixel applied voltage waveform can be set to “V1” which is ½ of the above embodiment, and the power supply voltage of the data line driving circuit 140 can be lowered.
[0060]
(7) In the above embodiment, the element substrate 101 constituting the electro-optical device is an amorphous substrate such as glass or quartz, and a semiconductor film is deposited on the element substrate 101 to form a TFT to be a transmission type. However, the present invention is not limited to this. For example, a reflective layer is provided on the element substrate 101 or the counter substrate 102, the element substrate 101 is formed of an opaque semiconductor substrate, the dot electrode 118 is formed of a reflective metal such as aluminum, and the counter substrate 102 is formed. When configured from glass or the like, the electro-optical device 100 can be used as a reflection type.
[0061]
(8) In the above embodiment, the scanning lines 112 are selected in order from the top by sequentially outputting the scanning signals G1, G2, G3,..., Gm. Is not limited to this. For example, the scanning signal is output while skipping every plural lines as "G1, G11, G21, ..., G2, G12, G22, ..., G3, G13, G23, ...". Alternatively, all the scanning lines 112 may be selected within one subfield.
[0062]
【The invention's effect】
As described above, according to the present invention, since the polarity of the pixel applied voltage waveform is inverted a plurality of times within one frame, even if the polarity of the applied voltage of all dots is common, image degradation due to flicker is effective. Can be prevented.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating an electrical configuration of an electro-optical device according to an embodiment of the invention.
FIG. 2 is a diagram illustrating a configuration example of a pixel in the embodiment.
FIG. 3 is a block diagram of a data line driving circuit 140 in the embodiment.
4 is a diagram showing a relationship between gradation data and a waveform applied to a pixel electrode 118 in the embodiment. FIG.
FIG. 5 is a structural diagram of the electro-optical device in the embodiment.
FIG. 6 is a timing chart of the electro-optical device according to the embodiment.
FIG. 7 is a diagram illustrating examples of various electronic devices to which the electro-optical device is applied.
FIG. 8 is a waveform diagram of an AC signal in the related art, the above-described embodiment, and a modification when the number of subfields is “4”.
FIG. 9 is a waveform diagram of an AC signal in the related art and a modified example when the number of subfields is “5”.
[Explanation of symbols]
100: Electro-optical device
101: Element substrate
101a ... display area
102. Counter substrate
104 ... Sealing material
105 ... Liquid crystal
106: light shielding film
107 ... area
108 ... Counter electrode
110 ... pixel
112 ... Scanning line
114 ... data line
116: Thin film transistor
118: Pixel electrode
119 ... Storage capacity
130: Scanning line driving circuit
140 Data line driving circuit
150: Oscillator circuit
200: Timing signal generation circuit
300: Data conversion circuit
310: Write address control unit
320, 321, 322 ... memory block
330: Display address control unit
332: OR circuit
1410: Shift register
1420: First latch circuit
1430: Second latch circuit
1440: Potential selection circuit

Claims (11)

Drives an electro-optical device having pixels provided corresponding to intersections between data lines and scanning lines, and in which the gradation of the pixels is determined according to a duty ratio at which the pixels are turned on within one frame A driving circuit for
Supplying a data signal for turning on or off the pixel to the pixel via the data line;
The polarity of the data signal is inverted according to the inversion of the polarity of the alternating signal,
The waveform of the alternating signal in the next frame of the one frame is an inverted waveform of the waveform of the alternating signal in the one frame,
In at least a first subfield of the plurality of subfields, the pixel is always turned on,
Inverting the polarity of the data signal in an odd number of 3 or more in the one frame;
A drive circuit characterized by the above. Inverting the polarity of the data signal in the second subfield in the second subfield in the second and third subfields of the plurality of subfields;
The drive circuit according to claim 1. In some subfields of the plurality of subfields, the polarity of the data signal is inverted multiple times,
Writing the data signal to the pixel each time the data signal inverts the polarity in the partial subfield;
The drive circuit according to claim 1, wherein: The partial subfield includes at least a longest subfield of the plurality of subfields;
The drive circuit according to claim 3 . In two consecutive subfields among the plurality of subfields, the polarity of the data signal is kept constant,
Writing the data signal to the pixel for each of the two consecutive subfields;
The drive circuit according to claim 1, wherein: The two consecutive subfields include at least a shortest subfield of the plurality of subfields;
The drive circuit according to claim 5 . The drive circuit according to any one of claims 1 to 6 ,
Inverting the polarity of the alternating signal within the one frame;
A drive circuit characterized by the above. A plurality of scan lines;
Multiple data lines,
A plurality of pixels disposed corresponding to intersections of the plurality of scanning lines and the plurality of data lines;
A drive circuit according to any one of claims 1 to 7 ,
The plurality of pixels are:
A pixel electrode;
A counter electrode disposed opposite to the pixel electrode;
An electro-optic material disposed between the pixel electrode and the counter electrode;
A switching element for controlling conduction between one data line of the plurality of data lines and the pixel electrode;
An electro-optical device. The electro-optical device according to claim 8 .
The potential applied to the counter electrode is inverted so as to have a polarity opposite to the polarity of the data signal,
An electro-optical device. The electro-optical device according to claim 8 or 9 ,
A scanning line driving circuit for driving the plurality of scanning lines;
The scanning line driving circuit outputs a scanning signal while skipping the plurality of scanning lines every plural lines;
An electro-optical device. Comprising the electro-optical device according to claim 8 ;
Electronic equipment characterized by "

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