JP2002258765A - Electrooptical device and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a narrow frame and low power consumption of an electrooptical device formed by a low-temperature polysilicone process. SOLUTION: Pixel electrodes 118 are formed on an element substrate 101 by the low-temperature polysilicone process. An integrated circuit which is formed by a process other than that of these pixel electrodes and including a data line driving circuit is provided between a lower side 101d of the element substrate and the pixel electrodes, and a scanning line driving circuit and a timing signal generation circuit which are formed by the same process as that for the pixel electrodes are provided in areas 130a and 160a along a left side 101b and a right side 101c. Since the integrated circuit 170 can be operated with voltage sufficiently lower than the operating voltage of the low-temperature polysilicone and areas 130a and 160a can be made sufficiently narrow, a narrow frame and low power consumption can be realized together.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electro-optical device and an electronic apparatus suitable for displaying various information.

[0002]

2. Description of the Related Art Electro-optical devices, for example, liquid crystal display devices using liquid crystal as an electro-optical material, are widely used as display devices in place of cathode ray tubes (CRTs) for display sections of various information processing equipment and liquid crystal televisions. I have. Here, the conventional electro-optical device is configured as follows, for example. That is, a conventional electro-optical device includes an element substrate provided with pixel electrodes arranged in a matrix and a switching element such as a TFT (Thin Film Transistor) connected to the pixel electrodes;
A counter substrate on which a counter electrode facing the pixel electrode is formed,
A liquid crystal, which is an electro-optical material, is filled between these two substrates.

In such a configuration, when a scanning signal is applied to a switching element via a scanning line, the switching element becomes conductive. In this conductive state, when an image signal of a voltage corresponding to the gradation is applied to the pixel electrode via the data line, a charge corresponding to the voltage of the image signal is applied to the liquid crystal layer between the pixel electrode and the counter electrode. Stored. After the charge accumulation, even if the switching element is turned off, the accumulation of the charge in the liquid crystal layer is maintained by the capacitance and the storage capacitance of the pixel electrode and the counter electrode. As described above, when the switching elements are driven and the amount of charge to be stored is controlled according to the gradation, the alignment state of the liquid crystal changes for each pixel, so that the density changes for each pixel. Therefore, it is possible to perform gradation display.

[0004] At this time, since it is only necessary to accumulate charges in the electrodes of each pixel for a part of the period, first, each scanning line is sequentially selected by a scanning line driving circuit, and secondly, the scanning lines are selected. In the selection period, the data line driving circuit
Third, a time-division multiplex in which a scanning line and a data line are shared by a plurality of pixels by selecting a data line sequentially, and thirdly, by sampling an image signal of a voltage corresponding to a gradation on the selected data line. Driving becomes possible.

Incidentally, these electro-optical devices (particularly, TF
In a liquid crystal display such as T, a drive circuit and the like are known using thin film transistors formed directly on an element substrate. By doing this,
Manufacturing cost can be reduced and power consumption can be reduced.

[0006]

By the way, in recent years, there has been a high demand (referred to as a narrow frame) for expanding the size of a display area of a liquid crystal display or the like to almost the size of an element substrate.
This is because the information processing capability of a small electronic device such as a mobile phone is increased, and the maximum information is displayed in a limited space. In order to meet such demands, the present inventors are studying to configure a liquid crystal display by a low-temperature polysilicon process.

However, a transistor formed of low-temperature polysilicon has a high on / off threshold voltage and a large variation in threshold. If all the driving circuits and the like are formed using such transistors, the power consumption may be increased. On the other hand, making the element substrate a narrow frame is rarely required for four sides of the element substrate, and is often required only for some sides.

For example, in a display such as a portable telephone, there is a strong demand for a narrow frame in the horizontal direction, but there is often no such request in the vertical direction. This is because a mobile phone originally needs a certain length to be used as a handset, and a keyboard, microphone,
This is because the speakers and the like are also arranged in the vertical direction, so there is room in the vertical space. The present invention has been made in view of the above circumstances, and has as its object to provide an electro-optical device and an electronic apparatus that can achieve both a narrow frame and low power consumption.

[0009]

Means for Solving the Problems In order to solve the above problems, the present invention is characterized by having the following constitution. Note that the contents in parentheses are examples. In the configuration according to claim 1, a plurality of scanning lines (112), a plurality of data lines (114), and pixels arranged corresponding to respective intersections of the scanning lines and the data lines to constitute pixels. Electrode (118)
And a switching element provided for each of the pixel electrodes, for controlling conduction between the data line and the pixel electrode by a scanning signal supplied through the scanning line, and formed in a substantially rectangular shape. First side (lower side 101d)
Is disposed between an element substrate (101) formed so as to be more distant from the pixel electrode (118) than other sides and the first side and the pixel electrode, and transmits a data signal to the data line. IC including data line drive circuit (140) to be supplied
A thin film transistor is formed on the element substrate along a chip (170) and a second or third side (left side 101b or right side 101c) adjacent to the first side, and is formed with respect to the scanning line (112). A scanning line driving circuit (130, 160) for supplying the scanning signal, a counter substrate including a counter electrode disposed to face the pixel electrode, and a device substrate and the counter substrate. An electro-optic material (liquid crystal 105). Further, in the configuration according to claim 2, in the electro-optical device according to claim 1, an output terminal for outputting a signal to the scanning line driving circuit on a side adjacent to a side on the data line side of the IC chip. Is provided. Further, in the configuration according to claim 3, in the electro-optical device according to claim 1, the wiring for electrically connecting the output terminal of the IC chip and the scanning line driving circuit is provided on the element substrate. Characterized by being arranged in Also,
According to a fourth aspect of the invention, there is provided an electro-optical device according to any one of the first to third aspects.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION Configuration of Embodiment Next, the configuration of an electro-optical device according to an embodiment of the present invention is shown in FIG.
This will be described with reference to FIG. In the figure, a timing signal generation circuit 200 receives a vertical synchronization signal V from a higher-level device (not shown).
s, horizontal synchronizing signal Hs, and input gradation data D0 to D2
Is supplied. Further, the oscillation circuit 150 outputs the basic clock R of the read timing.
CLK is supplied to the timing signal generation circuit 200. The timing signal generation circuit 200 generates various timing signals and clock signals described below in accordance with these signals. First, the AC signal FR
Is a signal whose polarity is inverted every frame.

The drive signal LCOM is a signal applied to the counter electrode of the counter substrate, and has a constant potential (zero potential) in the present embodiment. The start pulse DY is a pulse signal output first in each frame. The clock signal CLY is a signal that defines a horizontal scanning period on the scanning side (Y side). The latch pulse LP is a pulse signal output at the beginning of the horizontal scanning period, and is a clock signal C
It is output at the time of LY level transition (that is, rising and falling). Clock signal CLX
Is a dot clock signal for display.

On the other hand, in the display area 101a on the element substrate 101, a plurality of scanning lines 112 are formed extending in the X (row) direction in the drawing. Also, a plurality of data lines 114 are formed extending along the Y (column) direction. The pixels 110 are provided corresponding to the intersections of the scanning lines 112 and the data lines 114, and are arranged in a matrix. Here, for convenience of explanation, in this embodiment, the total number of the scanning lines 112 is m and the total number of the data lines 114 is n (m and n are integers of 2 or more), and m rows × n columns However, the present invention is not limited to this.

1.1. <Configuration of Pixel> As a specific configuration of the pixel 110, for example, FIG.
Examples shown in (a) are given. In this configuration, the gate of the thin film transistor (TFT) 116 is connected to the scanning line 11.
2, the source is connected to the data line 114, and the drain is connected to the pixel electrode 118, respectively.
Liquid crystal 10 which is an electro-optical material between
5 are sandwiched to form a liquid crystal layer. Here, as will be described later, the counter electrode 108 is actually the pixel electrode 11.
8 is a transparent electrode formed on the entire surface of the opposing substrate so as to oppose the electrode 8. Further, a storage capacitor 119 is formed in parallel with the pixel electrode 118 and the counter electrode 108, and the pixel electrode 118
The effect on the display due to the leakage of the electric charges is reduced. In this embodiment, one potential of the storage capacitor 119 is set to the same potential as the counter electrode 108, but may be set to the same potential as the ground potential GND or the potential of the gate line.

Here, in the configuration shown in FIG.
Since only one of the channel types is used as the transistor 116, an offset voltage is required. However, as shown in FIG. 2B, a P-channel transistor and an N-channel transistor are complementarily combined. With such a configuration, the influence of the offset voltage can be canceled. However, in this complementary configuration, it is necessary to supply mutually exclusive levels as scanning signals, so that the scanning lines 112a, 112
Two scanning lines b are required.

1.2. <Scanning line driving circuits 130 and 160
> Return the description to FIG. 1 again. The scanning line driving circuit 130 transfers the start pulse DY supplied at the beginning of the frame according to the clock signal CLY, and outputs the scanning signals G1, G2, G
,..., Gm are sequentially and exclusively supplied to one end of each of the scanning lines 112. The scanning line driving circuit 160 has the same configuration, and the scanning signals G1, G2, and G are applied to the other end of the scanning line 112 at the same timing as the scanning line driving circuit 130.
3, ..., Gm are supplied sequentially and exclusively. The reason why the scanning signals are supplied from both of the scanning line driving circuits 130 and 160 is to suppress the voltage drop on the scanning line 112 and stabilize the operation.

1.3. <Data Conversion Circuit 300> The data conversion circuit 300 is provided with a dot clock signal DCLK.
Is converted into an analog data signal Ds synchronized with the clock signal CLX and output. The level of the data signal Ds is proportional to the gradation data D0 to D2, and is set to be the voltage V1 at full scale (when the gradation data D0 to D2 is "111").

1.4. <Data Line Driving Circuit 140> Next, the data line driving circuit 140 sequentially samples and holds n data signals Ds corresponding to the number of data lines 114 in a certain horizontal scanning period, and then samples and holds n data signals. Ds are simultaneously supplied as data signals d1, d2, d3,... Dn to the corresponding data lines 114 via the buffer circuit in the next horizontal scanning period. Here, the data line driving circuit 140
Is as shown in FIG. That is, the data line driving circuit 140
10, the first sample and hold circuit 1420, and the second
Sample and hold circuit 1430 and buffer circuit 14
40.

The X shift register 1410 transfers the latch pulse LP supplied at the beginning of the horizontal scanning period in accordance with the clock signal CLX, and the latch signal S1,
S2, S3,..., Sn are sequentially and exclusively supplied. Next, the first sample and hold circuit 1420 sequentially samples and holds the data signal Ds at the falling edges of the latch signals S1, S2, S3,..., Sn. Then, the second sample and hold circuit 1430
Each of the data signals Ds sampled and held by the first sample and hold circuit 1420 is converted into a latch pulse LP.
Are sampled and held at the same time, and transferred to the buffer circuit 1440.

The buffer circuit 1440 receives the AC signal FR
, Buffering these latched data signals Ds and applying them to the data lines 114 as data signals d1, d2, d3,..., Dn. That is, if the AC conversion signal FR is at the L level, the voltage amplification factor of the buffer circuit 1440 is set to “−1”, and the AC conversion signal FR is set to the H level.
If it is at the level, the voltage amplification factor of the buffer circuit 1440 is set to “+1”.

1.5. <Structure of Liquid Crystal Device> The structure of the above-described electro-optical device will be described with reference to FIGS. Here, FIG. 1A is a plan view showing the configuration of the electro-optical device 100, and FIG.
FIG. 3 is a sectional view taken along line AA ′ in FIG. As shown in these drawings, in the electro-optical device 100, an element substrate 101 on which a pixel electrode 118 and the like are formed, and a counter substrate 102 on which a counter electrode 108 and the like are formed,
4, the bonding is performed while maintaining a constant gap, and a liquid crystal 105 as an electro-optical material is sandwiched in the gap.

In practice, the sealing material 104 has a cutout portion, and after the liquid crystal 105 is sealed through the cutout portion, the sealing material is sealed with a sealing material, but is omitted in these drawings. I have. Here, the element substrate 101 and the counter substrate 102 are amorphous substrates such as glass and quartz. The pixel electrodes 118 and the like are formed by TFTs formed by depositing low-temperature polysilicon on the element substrate 101.
That is, the electro-optical device 100 is used as a transmission type.

On the element substrate 101, a light-shielding film 106 is provided inside the sealant 104 and outside the display area 101a. In the region where the light shielding film 106 is formed, the left side 101b and the right side 1
In the rectangular regions 130a and 160a along the line 01c, the scanning line driving circuits 130 and 160
It is formed on a substrate by a thin film transistor in the same manner as described above. Further, the light-shielding film 106 prevents light from entering a drive circuit formed in this region. This light shielding film 10
6 has a configuration in which the drive signal LCOM is applied together with the counter electrode 108. Therefore, the light shielding film 106
In the region where is formed, the voltage applied to the liquid crystal layer becomes almost zero, so that the display state is the same as the state where no voltage is applied to the pixel electrode 118.

The lower side 101d of the element substrate 101 is
The distance from the display area 101a is wider than the other sides. Then, the sealing material 104 and the lower side 101
and an integrated circuit 170, which is an IC chip,
(Chip on glass) or TAB. A plurality of connection terminals are formed in a region 107 between the integrated circuit 170 and the lower side 101d, so that a control signal and a power supply from the outside are input.

On the other hand, the counter electrode 108 of the counter substrate 102
Is electrically connected to the light-shielding film 106 and the connection terminals of the element substrate 101 by a conductive material (not shown) provided in at least one of the four corners of the substrate bonding portion. That is, the drive signal LCO
M is via a connection terminal provided on the element substrate 101,
The light blocking film 106 is further provided with a counter electrode 10 through a conductive material.
8 are applied.

Here, the integrated circuit 170 has the data line drive circuit 140, the oscillation circuit 150, the timing signal generation circuit 200, and the data conversion circuit 300 formed on a chip mainly composed of single crystal silicon. Is sealed with resin. As described in FIG. 1, the start pulse DY and the clock signal CLY are supplied from the timing signal generation circuit 200 to the scanning line driving circuits 130 and 160. These signals protrude left and right from the integrated circuit 170 and are directed to the L-shaped patterns 171 and 171 toward the regions 130a and 160a.
172. Here, the circuit in the integrated circuit 170 can be operated by a low power supply voltage of about 3 V, like a normal digital integrated circuit.
Power consumption of the timing signal generation circuit 200 and the data line driving circuit 140 can be reduced.

In addition, depending on the application of the electro-optical device 100, for example, in the case of a direct-view type, first, color filters arranged in a stripe shape, a mosaic shape, a triangle shape, etc. Second, a light-shielding film (black matrix) made of, for example, a metal material or a resin is provided. In the case of color light modulation, for example, when used as a light valve of a projector described later, no color filter is formed. In the case of the direct-view type, a front light that irradiates the electro-optical device 100 with light from the counter substrate 102 side or a backlight that irradiates light from the element substrate 101 side is provided as necessary. In addition, an alignment film (not shown) rubbed in a predetermined direction is provided on each of the electrode forming surfaces of the element substrate 101 and the counter substrate 102 to define the alignment direction of the liquid crystal molecules in a state where no voltage is applied. On the other hand, a polarizer (not shown) corresponding to the orientation direction is provided on the side of the counter substrate 102. However, when a polymer-dispersed liquid crystal in which fine particles are dispersed in a polymer is used as the liquid crystal 105, the above-described alignment film and polarizer are not required, and the light use efficiency is increased. This is effective in reducing power consumption.

2. Next, the operation of the electro-optical device according to the above-described embodiment will be described. FIG. 5 is a timing chart for explaining the operation of the electro-optical device. First, the alternating signal FR is a signal whose polarity is inverted every frame (1F). On the other hand, the start pulse DY is supplied at the start of each frame. Here, in one frame (1F) in which the alternating signal FR becomes L level, the start pulse D
When Y is supplied, the scanning line driving circuit 130 (see FIG. 1)
The scanning signals G1, G2, G3,..., Gm are sequentially and exclusively output within one frame by the transfer according to the clock signal CLY.

Each of the scanning signals G1, G2, G3,..., Gm has a pulse width corresponding to a half cycle of the clock signal CLY, and the scanning signal G1 corresponding to the first scanning line 112 counted from the top. Is configured such that after the clock signal CLY first rises after the start pulse DY is supplied, the clock signal CLY is output with a delay of at least a half cycle of the clock signal CLY. Therefore, one shot (G0) of the latch pulse LP is supplied to the data line driving circuit 140 from the supply of the start pulse DY to the output of the scanning signal G1.

Therefore, consider the case where one shot (G0) of the latch pulse LP is supplied. First, when one shot (G0) of the latch pulse LP is supplied to the data line driving circuit 140, the data lines driving circuit 140 (see FIG. 4) transfers the latch signals S1, S2, S3,…, S
n are sequentially and exclusively output during the horizontal scanning period (1H).
Each of the latch signals S1, S2, S3,..., Sn has a pulse width corresponding to a half cycle of the clock signal CLX.

At this time, the first sample and hold circuit 1420 in FIG. 4 connects the first scanning line 112 counted from the top and the first data line 114 counted from the left at the falling of the latch signal S1. Pixel 1 corresponding to the intersection
10, the pixel corresponding to the intersection of the first scanning line 112 counted from the top and the second data line 114 counted from the left at the falling of the latch signal S2. Latch the data signal Ds to the first scanning line 112 from the top.
Then, the data signal Ds to the pixel 110 corresponding to the intersection with the n-th data line 114 counted from the left is latched.

As a result, first, in FIG.
A data signal Ds for one row of pixels corresponding to the intersection with the first scanning line 112 is supplied to the first sample and hold circuit 1420.
Is latched dot-sequentially. Note that the data conversion circuit 300 includes the first sample and hold circuit 14.
Needless to say, the grayscale data D0 to D2 of each pixel is converted into the data signal Ds and output in accordance with the latch timing of the pixel 20.

Next, when the clock signal CLY falls and the scanning signal G1 is output, the first scanning line 112 counted from the top in FIG. All the transistors 116 of the corresponding pixel 110 are turned on. On the other hand, the falling edge of the clock signal CLY outputs the latch pulse LP. Then, at the falling timing of the latch pulse LP, the second sample and hold circuit 1430
Converts the data signal Ds latched dot-sequentially by the first sample-and-hold circuit 1420 into a buffer circuit 1
Via 440, data signals d1, d2, d3,..., Dn are simultaneously supplied to each of the corresponding data lines 114.
Therefore, the data signals d1, d2, d3,..., Dn are simultaneously written in the pixels 110 in the first row counted from the top.

In parallel with this writing, the data signal Ds for one row of pixels corresponding to the intersection with the second scanning line 112 from the top in FIG.
It is latched dot-sequentially by 0. Then, the same operation is performed thereafter by the scanning signal Gm corresponding to the m-th scanning line 112.
Is repeated until is output. That is, in one horizontal scanning period (1H) in which a certain scanning signal Gi (i is an integer satisfying 1 ≦ i ≦ m) is output, the i-th scanning line 1
, Dn for one row of the pixel 110 corresponding to the pixel 12 and the point of the data signal Ds for one row of the pixel 110 corresponding to the (i + 1) th scanning line 112. Sequential latching will be performed in parallel. Note that the data signal written to the pixel 110 is held until writing in the next frame. Hereinafter, the same operation is repeated every time the start pulse DY defining the start of the frame is supplied.

3. Specific examples of electronic device 3.1. <Mobile Computer> Next, some examples in which the above-described electro-optical device is used in specific electronic devices will be described. First, an example in which the electro-optical device is applied to a mobile personal computer will be described. FIG. 6A is a front view showing the configuration of the personal computer. In the figure, a mobile computer 1200 has a keyboard 1202
And a display unit 1206. The display unit 1206 is configured by adding a front light to the front surface of the electro-optical device 100 described above. In this configuration, since the electro-optical device 100 is used as a reflection direct-view type, it is preferable that the pixel electrode 118 has a configuration in which unevenness is formed so that reflected light is scattered in various directions.

3.2. <Cellular Phone> Further, an example in which the electro-optical device is applied to a cellular phone will be described. FIG. 6B is a perspective view showing the configuration of the mobile phone. In the figure, a mobile phone 1300 is shown.
Is a plurality of operation buttons 1302 and an earpiece 130
4. The electro-optical device 100 is provided together with the mouthpiece 1306. The electro-optical device 100 is also provided with a front light on its front surface as needed. Also,
Even in this configuration, since the electro-optical device 100 is used as a direct reflection type, a configuration in which the pixel electrode 118 has unevenness is desirable.

3.3. <Others> In addition to the electronic devices described above, in addition to those described above, LCD televisions, viewfinders, video tape recorders of the direct-view monitor type, car navigation devices, pagers, electronic notebooks, calculators, word processors, workstations, video phones, Examples include a POS terminal, a device equipped with a touch panel, and the like. It goes without saying that the above-described electro-optical device can be applied to these various electronic devices.

4. Modifications The present invention is not limited to the embodiments described above,
For example, various modifications are possible as follows. (1) In the above embodiment, the scanning line driving circuit 13
0, 160, the scanning signal G from both ends of the scanning line 112
1, G2, G3,..., Gm are supplied.
Only one of the scan lines 30 and 160 may be provided, and the scan signal may be supplied from only one end of the scan line 112. Also, for example, a scanning signal is supplied from the scanning line driving circuit 130 to odd lines, and a scanning line driving circuit 160 is supplied to even lines.
May be supplied with a scanning signal.

(2) In the above embodiment, the element substrate 101 constituting the electro-optical device is an amorphous substrate such as glass or quartz, and a semiconductor film is deposited thereon to form a TF.
Although T was formed, the present invention is not limited to this. For example, when the element substrate 101 is formed of an opaque semiconductor substrate, the pixel electrode 118 is formed of a reflective metal such as aluminum, and the counter substrate 102 is formed of glass or the like, the electro-optical device 100 can be used as a reflection type. .

(3) In the above embodiment, an example in which the present invention is applied to an electro-optical device using a liquid crystal has been described. However, the present invention is applicable to all other electro-optical devices. As such an electro-optical device, an electroluminescent device, a plasma display, or the like can be considered. Especially organic EL
In the case of (1), there is no need to perform AC driving such as liquid crystal, and there is no need to invert the polarity.

[0040]

As described above, according to the present invention, both a narrow frame and low power consumption can be achieved.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an electrical configuration of an electro-optical device according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration example of a pixel in the embodiment.

FIG. 3 is a data line drive circuit 14 according to the embodiment.
0 is a block diagram of FIG.

FIG. 4 is a structural diagram of the electro-optical device according to the embodiment.

FIG. 5 is a timing chart of the electro-optical device according to the embodiment.

FIG. 6 is a diagram illustrating examples of various electronic apparatuses to which the electro-optical device is applied.

[Explanation of symbols]

 101 element substrate 101a display area 101b left side (second side) 101c right side (third side) 101d bottom side (first side) 101e top side 102 counter substrate 104 ... Sealing material 105 Liquid crystal 106 Light-shielding film 107 Region 108 Counter electrode 110 Pixel 112 Scan line 114 Data line 116 Transistor 118 Pixel electrode 119 Storage capacitance 130, 160 scanning line driving circuit 130a, 160a region 140 data line driving circuit 150 oscillation circuit 170 integrated circuit 171, 172 pattern 200 timing signal generation circuit 300 data conversion Circuit 1100 Projector 1110 Polarized illumination device 1112 Lamp 1114 Reflector 1120 Integrator lens 1130 Polarizing conversion element 1140 Polarizing beam splitter 1141 Polarizing light beam reflecting surface 1151 Dichroic mirror 1152 Dichroic mirror 1160 Projection optical system 1170 Screen 1200 Mobile computer 1202 ... Keyboard 1204... Main unit 1206... Display unit 1300... Cellular phone 1302... Operation buttons 1304... Earpiece 1306. ... Second sample and hold circuit 1440... Buffer circuit

Continuation of the front page (72) Inventor Hiroshi Ozawa 3-5-5 Yamato, Suwa City, Nagano Prefecture Inside Seiko Epson Corporation (72) Inventor Ryo Ishii 3-5-5 Yamato, Suwa City, Nagano Prefecture Seiko Epson Corporation F term (reference) 2H092 GA59 GA60 JA24 NA26 5C094 AA22 AA43 AA44 BA03 BA43 CA19 EA04 EA07 5G435 AA16 BB05 BB06 BB12 CC09 EE34 EE40 LL07

Claims (4)

[Claims] A plurality of scanning lines, a plurality of data lines, a pixel electrode provided corresponding to each intersection of the scanning line and the data line, and a pixel electrode provided for each pixel electrode; By the scanning signal supplied via the scanning line,
A switching element for controlling conduction between the data line and the pixel electrode, an element formed in a substantially rectangular shape, and a first side of the rectangle formed so as to be farther from the pixel electrode than other sides; A substrate; an IC chip disposed between the first side and the pixel electrode, the IC chip including a data line driving circuit for supplying a data signal to the data line; and a second or a second side adjacent to the first side. Along side 3
Formed by a thin film transistor on the element substrate,
A scanning line driving circuit that supplies the scanning signal to the scanning line; a counter substrate including a counter electrode disposed to face the pixel electrode; An electro-optical device, comprising: an electro-optical material. 2. The electro-optical device according to claim 1, wherein an output terminal for outputting a signal to the scanning line driving circuit is provided on a side of the IC chip adjacent to a side on a data line side. 3. The electro-optical device according to claim 1, wherein a wiring for electrically connecting the output terminal of the IC chip and the scanning line driving circuit is disposed on the element substrate. . 4. An electronic apparatus comprising the electro-optical device according to claim 1.