JP3950793B2 - Digital / analog conversion method and apparatus - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a digital / analog conversion method and a digital / analog conversion device for obtaining a predetermined analog signal by controlling a port output of a microcomputer.
[0002]
[Prior art]
As a circuit configuration of a conventional digital / analog (D / A) conversion device, one as shown in FIG. 7 is known (for example, refer to Patent Document 1).
[0003]
The microcomputer 01 includes an up counter 02, a timer register 03, a comparator 04, and an analog / digital (A / D) converter 05. When the internal clock of the up counter 02 is input, a value corresponding to a predetermined time is set in the timer register 03 through the internal bus. The up-counter value of the up-counter 02 and the value of the timer register 03 are compared by the comparator 04. When the two values match, an interrupt is generated in the microcomputer 01 and the up-counter 02 is cleared.
[0004]
As described above, by setting desired data in the timer register 03, it is possible to generate an interrupt at regular intervals, and the result processed in the timer interrupt is output to the port as the PWM signal _VA .
[0005]
This V _A is integrated by a low-pass filter 06 composed of a resistor R ₁ and a capacitor C ₁ and converted into an analog waveform indicated by V _B. This V _B is input to the non-inverting amplifier 07 to obtain V _C. The voltage V _C is reduced as a voltage ripple by passing through a low-pass filter 08 including a resistor R ₄ and a capacitor C _2, and then output from the voltage follower 09 as V _D. Also input to the D conversion unit 05 as V _C ′ subjected to voltage conversion.
[0006]
The microcomputer 01 compares V _C ′ input to the A / D conversion unit 05 with the D / A output set value V _T, and when V _T > V _C ′, the port output is low, and V _T > V _C When ', port output is high.
[0007]
As described above, in the conventional D / A converter, by using the timer interrupt routine, the PWM signal V _A output from the microcomputer 01 as a port is output to a desired analog without monopolizing the timer of the microcomputer 01. it can be converted into the signal V _D.
[0008]
[Patent Document 1]
Japanese Patent Laid-Open No. 6-4218
[Problems to be solved by the invention]
However, the conventional D / A converting device, a PWM signal V _A output from the microcomputer 01, since the converted analog signal V _B using a low-pass filter 06, the ripple having a constant period to V _B Is included. Therefore, in order to remove this ripple, it is necessary to use a low-pass filter 08 having a time constant sufficiently long for V _B with respect to the period of the PWM signal.
[0010]
That is, poor response when changing the duty of the PWM signal V _A to alter the D / A output setting value V _T, is large response delay until V _C is D / A output setting value V _T There was a problem.
[0011]
The present invention has been made paying attention to the above problems, and an object of the present invention is to provide a digital / analog conversion method and a digital / analog conversion apparatus capable of achieving both suppression of ripple and high response. It is in.
[0012]
[Means for Solving the Problems]
In order to achieve the above object, in the digital / analog conversion method according to the first aspect of the present invention, in the digital / analog conversion method executed at the time of occurrence of an interrupt to the microcomputer at regular intervals, the micro / analog conversion method is performed based on the output set value. The signal output from the computer output port is input to the low-pass filter, the analog signal output from this low-pass filter is converted to the corresponding digital signal, and the absolute value of the difference between the converted digital signal value and the output setting value When the absolute value is equal to or greater than a preset threshold value, the output set value is compared with the digital signal value, and when the output set value is greater than the digital signal value, the output value is proportional to the absolute value. After setting the time output port to high, the output port is set to three-state while the output set value is When it is a value or less, after the low time output port proportional to the absolute value, characterized in that the output port and three-state.
[0013]
According to a second aspect of the present invention, in the digital / analog conversion method according to the first aspect, the cut-off frequency of the low-pass filter is set to a period equal to or less than the interval of interrupt times.
[0014]
4. The digital / analog converter according to claim 3, wherein a microcomputer, a timer for interrupting the microcomputer every predetermined time, and a signal output from an output port of the microcomputer are converted into an analog signal and output. A low-pass filter that converts the analog signal output from the low-pass filter into a corresponding digital signal, and the microcomputer converts the converted digital signal value when an interrupt occurs. The absolute value of the difference from the output set value is obtained, the output set value is compared with the digital signal value, and when the output set value is larger than the digital signal value, the time output port proportional to the absolute value is set to high. After setting the output port to three-state, the output setting value is digital When issue value or less, after the low time output port proportional to the absolute value, characterized in that it comprises a port output determining section for the output port and three-state.
[0015]
According to a fourth aspect of the present invention, in the digital / analog conversion device according to the third aspect, the cut-off frequency of the low-pass filter is set to a period equal to or less than the interrupt time interval.
[0016]
According to a fifth aspect of the present invention, in the digital / analog conversion device according to the third or fourth aspect, the port output determination unit compares the absolute value with a preset threshold value, When the value does not exceed the threshold value, the output port is held in the three state until the next interrupt occurrence.
[0017]
According to a sixth aspect of the present invention, in the digital / analog conversion device according to any one of the third to fifth aspects, the port output determination unit sets a proportional coefficient set separately for high and low in advance. The absolute value is multiplied to set a time for the output port to be high or low.
[0018]
According to a seventh aspect of the present invention, in the digital / analog conversion device according to the third to sixth aspects, a plurality of output ports are set in the microcomputer, and a timer and a low-pass filter are provided for each output port. A plurality of channels are set according to the number of analog signals output from the low-pass filter in the analog / digital conversion means, and the analog signal input to the analog / digital conversion means is input to which channel to the microcomputer. A channel detection unit for detecting whether or not the signal is detected and a signal is output from an output port corresponding to the detected channel.
[0019]
【The invention's effect】
In the digital / analog conversion method according to claim 1, the absolute value of the difference between the digital signal value corresponding to the analog signal output from the low-pass filter and the output set value is obtained at the time of timer interruption, and the absolute value is calculated in advance. When the set threshold value is exceeded, the output set value is compared with the digital signal value.
[0020]
When the output set value is larger than the digital signal value, the time output port proportional to the absolute value is set to high, and then the output port is set to three-state (input mode). On the other hand, when the output set value is equal to or less than the digital signal value, the time output port proportional to the absolute value is set to low, and then the output port is set to three-state.
[0021]
That is, in the present invention, since a signal is output from the output port only for a moment when the level is changed, the time constant of the low-pass filter can be set small, and both high responsiveness and ripple suppression are compatible. Can be achieved.
[0022]
In the digital / analog conversion method according to the second aspect, the responsiveness can be further improved by setting the cut-off frequency of the low-pass filter to be equal to or shorter than the interrupt time interval.
[0023]
In the digital / analog conversion device according to claim 3, the port output determination unit obtains an absolute value of a difference between the digital signal value output from the analog / digital conversion means and the output set value at the time of timer interruption, and further outputs it. Compare the set value with the digital signal value.
[0024]
When the output set value is larger than the digital signal value, the time output port proportional to the absolute value is set to high, and then the output port is set to three-state (input mode). On the other hand, when the output setting is equal to or less than the digital signal value, the time output port proportional to the absolute value is set to low, and then the output port is set to three-state.
[0025]
Therefore, since a signal is output from the output port only for a moment when the level is changed, the time constant of the low-pass filter can be set small, and both high response and suppression of ripple can be achieved.
[0026]
Further, the resolution of the obtained analog signal can be improved by increasing the resolution of the analog / digital conversion means.
[0027]
In the digital / analog conversion device according to claim 4, the responsiveness can be further improved by setting the cut-off frequency of the low-pass filter to the same or shorter cycle than the interval of the interrupt time.
[0028]
In the digital / analog conversion device according to claim 5, when the absolute value does not exceed the threshold value, the output port is kept in a three-state state until the next interrupt is generated, so that the analog / always-converted device is always analog. / When the digital signal value output from the digital conversion means does not match the output set value, the output port becomes high or low for a time proportional to the absolute value of the difference between the digital signal value and the output set value for each timer interrupt. This can prevent the analog value from becoming unstable.
[0029]
In the digital / analog conversion device according to the sixth aspect, it is possible to increase the speed only on the side where responsiveness is required by setting different proportional coefficients for high and low.
[0030]
8. The digital / analog conversion device according to claim 7, wherein a channel to which an analog signal input to the analog / digital conversion means is input is detected, and a signal is output from an output port corresponding to the detected channel. Thus, a plurality of desired analog signals can be output.
[0031]
DETAILED DESCRIPTION OF THE INVENTION
In the following, an embodiment for realizing a digital / analog conversion device of the present invention will be described based on a first example and a second example.
[0032]
(First embodiment)
First, the configuration will be described.
FIG. 1 is a circuit diagram of a digital / analog converter according to the first embodiment.
[0033]
The microcomputer 1 includes a port output determination unit 2 and an A / D conversion unit (analog / digital conversion means) 3. The port output determination unit 2 compares the set D / A output set value V _T with the signal V _C ′ from the A / D conversion unit 3 in response to a timer interrupt request generated every fixed time, and outputs the result. _VA is output from the port PC1.
[0034]
The output timing of _VA is shown in FIG. As shown in the figure, the port output V _A is output as digital data of “low level (low)”, “high level (high)”, and “high impedance state (three state)”. This V _A is integrated through a low-pass filter 4 composed of a resistor R ₁ and a capacitor C ₁ to become an analog signal V _B, and then amplified by a non-inverting amplifier 5 to obtain a final output V _c . V _c is also input to the input port AN1 of the A / D converter 3 as V _C ′ that has been subjected to voltage conversion.
[0035]
The gain (amplification factor) of the non-inverting amplifier 5 is determined by (finally desired maximum output voltage) / (maximum value of V _C ′).
[0036]
Note that, in the pulses P _{1 to} P ₃ in FIG. 2, the pulse is output even though the D / A output set value V _T is not changed, the capacitor C ₁ or the non-inverting amplifier 5. This is because the A / D conversion output voltage V _C ′ is lowered due to the leakage current of the input.
[0037]
3, the D / A output setting value V _T constant at a state input leakage current or the like is not of the capacitor C ₁ and the non-inverting amplifier 5, port output V _A will remain the three-state.
[0038]
The configuration of the D / A conversion circuit of this embodiment is substantially the same as that of the conventional D / A conversion circuit shown in FIG. 7 except that the low-pass filter 08 and the voltage follower 09 are deleted.
[0039]
Further, the low-pass filter 4 also uses a resistor R ₁ ′ and a capacitor C ₁ ′ having a smaller time constant than the resistor R ₁ and the capacitor C ₁ in the low-pass filter 06 of FIG. The cut-off frequency of the low-pass filter 4 is set to a cycle shorter than the timer interrupt time interval.
[0040]
Next, the operation will be described.
[D / A conversion control processing]
In the microcomputer 1, in addition to the main predetermined control, a subroutine for setting the D / A output set value V _T is executed. In this subroutine, a target value determined by another routine or the like, that is, a D / A output set value V _T is set. When the timer interrupt time is set, a timer interrupt is generated every predetermined time. When this timer interrupt occurs, a timer interrupt routine is executed.
[0041]
FIG. 4 is a flowchart showing the flow of the D / A conversion control process executed in the timer interrupt routine of the microcomputer 1.
[0042]
In step S1, reads the A / D-converted value _{V C} 'output from the A / D converter 3.
[0043]
In step S2, the D / A output set value _VT is read.
[0044]
In step S3, the absolute value of the difference between the A / D conversion value V _C ′ and the D / A output set value V _T is obtained, and the result is written in the result R1 secured on the RAM of the microcomputer 1.
[0045]
In step S4, the result R1 is compared with a preset threshold value A1, and when the result R1 is smaller than the threshold value A1, this control is terminated, and the result R1 is equal to or greater than the threshold value A1. The process proceeds to step S5.
[0046]
In step S5, the A / D conversion value _{V C} 'is compared with the D / A output setting value _{V T, if V T} is exceeded _{V C} proceeds to step S6, _{V T} is less _{V C} If so, the process proceeds to step S7.
[0047]
In step S6, a value obtained by multiplying the result R1 by a preset proportionality coefficient A2 is written in the ON time C1 secured on the RAM, and the level of the port output V _A is set to “high”.
[0048]
In step S7, a value obtained by multiplying the result R1 by a preset proportionality coefficient A3 is written in the ON time C1 secured on the RAM, and the level of the port output V _A is set to “low”.
[0049]
In this embodiment, the ON time C1 is set as the number of times of looping from step S8 → step S9 → step S8.
[0050]
In step S8, it is determined whether or not the ON time C1 is 0. If the ON time C1 is 0, the process proceeds to step S10. If the ON time C1 is other than 0, the process proceeds to step S9.
[0051]
In step S9, the ON time C1 is decremented.
[0052]
In step S10, the input / output direction of the port is set to input (three state), and this control is terminated.
[0053]
[D / A conversion control action]
When the D / A output set value V _T is larger than the A / D converted value V _C ′ and the difference is not less than the threshold value A1, step S1 → step S2 → step S3 → Step S4 → Step S5 → Step S6 → Step S8 → Step S10.
[0054]
That is, in step S6, the ON time C1 is set by multiplying the result R1 and the proportional coefficient A2, and the port output _VA is set to high. In step S8 and step S9, the ON time C1 is counted down to 0, In step S10, the port output is set to the three state.
[0055]
When the D / A output set value V _T is equal to or less than the A / D conversion value V _C ′ and the difference is equal to or greater than the threshold A1, step S1 → step S2 → step S3 → Step S4 → Step S5 → Step S7 → Step S8 → Step S10.
[0056]
That is, in step S7, the ON time C1 is set by multiplying the result R1 and the proportional coefficient A3, and the port output _VA is set to low. In steps S8 and S9, the ON time C1 is counted down to 0, In step S10, the port output is set to the three state.
[0057]
If the difference between the D / A output set value V _T and the A / D conversion value V _C ′ is smaller than the threshold value A1, in the flowchart of FIG. 4, go to step S1, step S2, step S3, and step S4. The control is terminated without changing the state of the port output V _A.
[0058]
Next, the effect will be described.
The digital / analog conversion device of the present embodiment has the following effects.
[0059]
(1) When the output set value V _T is larger than the digital signal value V _C ′, the output port PC1 is set to high for the ON time C1 proportional to the result R1, and then the output port PC1 is set to the three-state (input mode On the other hand, when the output set value V _T is equal to or less than the digital signal value V _C ′, the output port PC1 is set to the three-state after the output port PC1 is set low for the ON time C1 proportional to the result R1. By doing so, the time constant of the low-pass filter 4 can be set small, and both high response and suppression of ripple can be achieved.
[0060]
(2) Since the resistor R ₁ ′ and the capacitor C ₁ ′ having a small time constant are used as the low-pass filter 4 and the cut-off frequency is set to a period shorter than the timer interrupt time interval, high response can be ensured. it can.
[0061]
(3) When the result R1 is equal to or less than the threshold value A1, the A / D conversion output voltage that is always output from the A / D conversion unit 3 due to noise or the like by leaving the output port PC1 in three-state. When V _C ′ does not coincide with the output set value V _T , it is possible to prevent the analog signal V _{C from} becoming unstable even when the output port PC1 becomes high or low at every timer interrupt. .
[0062]
(4) D / A output setting value V _T is set by multiplying the the ON time C1 and result R1 and the proportionality coefficient A2 is is greater than A / D conversion value V _{C ',} D / A output set value V _{When T} is equal to or less than the A / D conversion value V _C ′, the ON time C1 is set by multiplying the result R1 and the proportionality coefficient A3. Therefore, it is possible to increase the speed only on the side that requires responsiveness. .
[0063]
(Second embodiment)
First, the configuration will be described.
The configuration of the digital / analog conversion circuit of the second embodiment is obtained by adding one channel of a D / A output circuit to the configuration of the first embodiment.
[0064]
Another circuit is added to the low-pass filter 4 and the non-inverting amplifier 5, and the A / D conversion unit 3 has two input channels (AN1 and AN2) and a channel to which the feedback voltage V _C ″ of the added output circuit is added. To enter.
[0065]
The port output determination unit 2 changed when the D / A output circuit has two channels is also set to two channels.
[0066]
Next, the operation will be described.
[D / A conversion control processing]
The D / A conversion control process of the second embodiment is obtained by adding step S21 between step S1 and step S2 and adding step S22 after step S10 in the flowchart shown in FIG. Only portions different from 4 will be described.
[0067]
In step S21, it is checked whether the channel of the A / D converter 3 is a channel (AN1 or AN2) corresponding to the port to be output. If the channel of the A / D conversion unit 3 is a channel corresponding to the port to be output, the process proceeds to step S2, and the channel of the A / D conversion unit 3 is not a channel corresponding to the port to be output. If this is the case, this control is terminated.
[0068]
In step S4, the result R1 is compared with a preset threshold value A1, and if the result R1 is smaller than the threshold value A1, the process proceeds to step S22. If the result R1 is equal to or greater than the threshold value A1, Advances to step S5.
[0069]
In step S22, the channel of the A / D converter 3 is changed to another channel, and this control is terminated.
[0070]
Next, the effect will be described.
(5) To output the port signal V _A (V _A ′) from the corresponding output port PC1 (PC2) only when the channel of the A / D converter 3 is a channel corresponding to the port to be output. A plurality of desired analog signals can be output.
[0071]
(Other examples)
[0072]
Although the embodiments of the present invention have been described based on the first and second examples, the specific configuration of the present invention is not limited to the first and second examples. The present invention includes any design changes that do not depart from the spirit of the invention.
[0073]
For example, the values of the threshold value A1 and the proportional coefficients A2 and A3 may be set in advance through experiments or after the apparatus is actually operated.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of a digital / analog converter according to a first embodiment.
FIG. 2 is a diagram illustrating an output timing of a port output V _A.
FIG. 3 is a diagram showing the output timing of the port output V _{A in} a state where there is no input leakage current of the capacitor C ₁ and the non-inverting amplifier 5;
FIG. 4 is a flowchart showing the flow of a D / A conversion control process executed in a timer interrupt routine of the microcomputer 1 according to the first embodiment.
FIG. 5 is a circuit diagram of a digital / analog converter according to a second embodiment.
FIG. 6 is a flowchart showing the flow of a D / A conversion control process executed in a timer interrupt routine of the microcomputer 1 according to the second embodiment.
FIG. 7 is a circuit diagram of a conventional digital / analog converter.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Microcomputer 2 Port output judgment part 3 A / D conversion part 4 Low pass filter 5 Non-inverting amplifier

Claims (7)

In a digital / analog conversion method that is executed when an interrupt occurs at regular intervals to a microcomputer,
Based on the output setting value, input the signal output from the microcomputer output port to the low-pass filter,
Convert the analog signal output from this low-pass filter into a corresponding digital signal,
Find the absolute value of the difference between the converted digital signal value and the output setting value,
When the absolute value is equal to or greater than a preset threshold value, the output set value is compared with the digital signal value. When the output set value is greater than the digital signal value, the time output port is proportional to the absolute value. The output port is three-stated, while
A digital / analog conversion method characterized in that, when the output set value is equal to or less than a digital signal value, the output port is set to a three-state after the time output port proportional to the absolute value is set to low. The digital / analog conversion method according to claim 1,
A digital / analog conversion method, wherein a cut-off frequency of the low-pass filter is set to a period equal to or less than an interrupt time interval. A microcomputer,
A timer for interrupting this microcomputer every predetermined time;
A low-pass filter that converts the signal output from the output port of the microcomputer into an analog signal and outputs the analog signal;
Analog / digital conversion means for converting an analog signal output from the low-pass filter into a corresponding digital signal;
With
When an interrupt occurs, the microcomputer obtains an absolute value of a difference between the converted digital signal value and the output set value, compares the output set value with the digital signal value, and the output set value is a digital signal. If the output port is three-state after the output port is set to high after the time output port is high when the output value is less than the digital signal value, the time output proportional to the absolute value is output. A digital / analog conversion apparatus comprising a port output determination unit that sets an output port to a three-state after setting the port to low. The digital / analog converter according to claim 3,
A digital / analog conversion apparatus characterized in that a cut-off frequency of the low-pass filter is set to a period equal to or less than an interrupt time interval. The digital / analog converter according to claim 3 or 4,
The port output determining unit compares the absolute value with a preset threshold value, and when the absolute value does not exceed the threshold value, holds the output port in a three-state state until the next interrupt is generated. A digital / analog converter characterized by that. The digital / analog converter according to any one of claims 3 to 5,
The port output determining unit sets a time for setting an output port to be high or low by multiplying a proportional coefficient set separately for high and low in advance by the absolute value. The digital / analog converter according to any one of claims 3 to 6,
A plurality of output ports are set in the microcomputer, and a timer and a low-pass filter are provided for each output port.
A plurality of channels are set according to the number of analog signals output from the low-pass filter to the analog / digital conversion means,
The microcomputer is provided with a channel detection unit that detects which channel the analog signal input to the analog / digital conversion means is input to.
A digital / analog converter which outputs a signal from an output port corresponding to a detected channel.

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