JP3932188B2 - Flexible substrate - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a flexible board, and more specifically, a flexible board having a plating lead cut hole for cutting a specific plating lead wiring formed to plate an inner lead exposed in a chip component placement portion. It relates to a substrate.
[0002]
[Prior art]
As a liquid crystal driver package, as shown in FIG. 4, for example, a TCP (Tape Carrier Package) in which an LSI chip 30 is disposed in a device hole 20 which is a chip component disposition portion of the flexible substrate 10 is widely used. .
[0003]
A large number of inner leads 12 drawn from the lead wiring 11 formed on the flexible substrate 10 are exposed in the device hole 20, and bumps of the LSI chip 30 are connected to the inner leads 12.
[0004]
Thereafter, in order to protect the connection portion, as shown in FIG. 5, the sealing resin 40 is filled from the periphery of the LSI chip 30 to the periphery of the device hole 20 so as to fill the device hole 20.
[0005]
The lead wiring 11 is covered with a solder resist. However, since the inner lead 12 is exposed, it may be oxidized or corroded with moisture. In order to prevent this, for example, the inner lead 21 is plated with gold.
[0006]
In many cases, the inner lead 12 is plated by an electroplating method. That is, the flexible substrate 10 is immersed in a solution containing a target metal salt, and the current is passed through the lead wires 11 by using the input electrode portion 13 and the output electrode portion 14 as cathodes. A metal film is formed on the inner lead 12.
[0007]
By the way, if there is an independent electrically neutral inner lead that is not connected to either the input side electrode portion 13 or the output side electrode portion 14, such as a jumper terminal, in the inner lead 12, The electrically neutral inner lead will not be plated.
[0008]
Therefore, a lead wire for plating (not shown) for connecting the electrically neutral inner lead to another lead wire 11 connected to the input side electrode portion 13 or the output side electrode portion 14 is formed. In general, all of the inner leads 12 including the neutral inner lead are electroplated, and thereafter, a plating lead cut hole H is formed by punching in the portion where the lead wiring for plating is formed. The lead wiring is cut.
[0009]
[Problems to be solved by the invention]
The hole diameter of the plating lead cut hole H is at most about 1.0 mm, but since the end face of the lead wiring connected to the input side electrode portion 13 or the output side electrode portion 14 is exposed in the hole, For example, when another circuit board is stacked on the flexible board 10, there is a risk of electrical conduction for some reason.
[0010]
Therefore, conventionally, an insulating tape is applied to the plating lead cut hole H. However, since the number of work steps increases, it is not preferable in terms of productivity. In addition, the insulating tape may be peeled off due to thermal influence or external impact.
[0011]
[Means for Solving the Problems]
The present invention has been made in order to solve the above-described problems. A chip component is arranged in a chip component arrangement portion having a plurality of plated inner leads, and the chip component arrangement is arranged around the chip component. The chip component placement portion is filled with sealing resin over the periphery of the installation portion, and has a plating lead cut hole for cutting a plating lead wiring formed for plating the specific inner lead. The flexible substrate is characterized in that the plating lead cut hole is arranged in the sealing resin application region at the periphery of the chip component arrangement portion.
[0012]
According to this configuration, when the sealing resin is applied from the periphery of the chip component to the periphery of the chip component placement portion, the plating lead cut hole is closed by the sealing resin, so that an insulating tape attaching work is not required. It becomes. Further, since the sealing resin also enters the plating lead cut hole, there is no possibility of peeling off due to thermal influence or external impact.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Next, an embodiment of the present invention will be described with reference to FIGS. 1 is a plan view of a flexible substrate according to the present invention, FIG. 2 is an enlarged cross-sectional view taken along line AA of FIG. 1, and FIG. 3 shows a device hole portion which is a chip component placement portion before a sealing resin is applied. It is a partially enlarged plan view. Note that the same reference numerals are used for portions that may be considered the same as or the same as the portions described in the above prior art.
[0014]
This embodiment relates to a TCP. As shown in FIG. 1, the flexible substrate 10A includes an input side electrode portion 13 and an output side electrode portion 14, and a chip component for a liquid crystal driver is interposed between them. For example, a device hole 20 for placing an LSI chip 30 is formed.
[0015]
As shown in FIG. 2, a large number of inner leads 12 drawn from a lead wiring 11 made of, for example, copper foil formed on the base film 101 are exposed in the device hole 20. The bumps 31 of the LSI chip 30 are soldered.
[0016]
After the LSI chip 30 is connected to the inner lead 12, a predetermined sealing resin 40 is applied to fill the device hole 20 from around the LSI chip 30 to the periphery of the device hole 20 in order to protect the soldered portion. Filled.
[0017]
The inner leads 12 include the specific inner leads 12a and 12b shown in FIG. 3. Except for the lead wires 11a and 11b, the lead wires 11 of the other inner leads 12 are connected to the input side electrode portion 13 or It is connected to one of the output side electrode portions 14. All the lead wires 11 including the lead wires 11a and 11b are covered with a solder resist 102.
[0018]
In this embodiment, the specific inner leads 12a, 12b are short-circuited between the lead wires 11a, 11b and are not connected to either the input side electrode portion 13 or the output side electrode portion 14. Neutral jumper terminal. Therefore, the predetermined leads 31 of the LSI chip 30 are short-circuited by the inner leads 12a and 12b.
[0019]
The inner lead 12 is bare and may be oxidized or corroded with moisture, so electroplating is performed. That is, the inner lead 12 is plated by immersing the flexible substrate 10A in a solution containing a target metal salt and passing an electric current with the input side electrode portion 13 and the output side electrode portion 14 as cathodes. However, since the specific inner leads 12a and 12b are not connected to either the input side electrode portion 13 or the output side electrode portion 14, they cannot be plated as they are.
[0020]
Therefore, as shown in FIG. 3, a plating lead wiring 110 is formed between the lead wirings 11a and 11b of the specific inner leads 12a and 12b and, for example, the lead wiring 11 arranged closest to the specific inner leads 12a and 12b. A plating current also flows through the leads 12a and 12b. The plating lead wiring 110 is formed at the same time in the lead wiring forming step.
[0021]
The plating lead wiring 110 is used after plating. If the lead wiring 110 is left, the specific inner leads 12a and 12b do not function as jumper terminals, and the LSI chip 30 does not operate normally. Sometimes.
[0022]
Therefore, after plating, a plating lead cut hole H is formed in a place where the plating lead wiring 110 exists, for example, by punching or drilling, and the plating lead wiring 110 is disconnected. Before applying the sealing resin 40 later, as shown in FIG. 1, a plating lead cut hole H is formed in the application region of the sealing resin 40 at the periphery of the device hole 20.
[0023]
According to this, the LSI chip 30 is arranged in the device hole 20, the bump 31 and the inner lead 12 are joined, and then the device hole 20 is filled from around the LSI chip 30 to the periphery of the device hole 20. When the predetermined sealing resin 40 is applied, the plating lead cut hole H is closed by the sealing resin 40.
[0024]
Therefore, it is not necessary to bother the plating lead cut hole H with the insulating tape as described in the prior art. Further, since the sealing resin 40 also enters the plating lead cut hole H, there is no possibility that the sealing resin 40 is peeled off from the plating lead cut hole H due to a thermal influence or an external impact.
[0025]
In the above embodiment, the specific inner leads 12a and 12b have been described as jumper terminals. However, this is an example, and in the present invention, the specific inner lead refers to the input side electrode portion 13 or the output side electrode portion 14. Includes all electrically neutral inner leads that are not connected to either.
[0026]
Further, the application region of the sealing resin 40 can also be arbitrarily determined within a range allowed in design. The chip components to be mounted include IC chips in addition to LSI chips. In the above embodiment, a flexible substrate as a TCP widely used as a liquid crystal driver has been described. However, the present invention is not limited to the TCP, and a flexible substrate in which the device hole 20 is not formed, for example, a COF (Chip on Film) can also be applied.
[0027]
【The invention's effect】
As described above, according to the present invention, the chip component is arranged in the chip component arrangement portion having a large number of plated inner leads, and extends from the periphery of the chip component to the periphery of the chip component arrangement portion. In the flexible substrate in which the chip component placement portion is filled with a sealing resin and has a plating lead cut hole for cutting a plating lead wiring formed for plating the specific inner lead. When the sealing resin is applied from the periphery of the chip component to the periphery of the chip component arrangement portion by arranging the plating lead cut hole in the application region of the sealing resin at the periphery of the chip component arrangement portion. Since the plating lead cut hole is closed by the sealing resin, an insulating tape attaching operation is not necessary. Further, since the sealing resin also enters the plating lead cut hole, there is an effect that there is no possibility of peeling off due to thermal influence or external impact.
[Brief description of the drawings]
FIG. 1 is a plan view of a flexible substrate according to the present invention.
FIG. 2 is an enlarged sectional view taken along line AA in FIG.
FIG. 3 is a partially enlarged plan view showing a device hole portion before a sealing resin is applied in the present invention.
FIG. 4 is a plan view of a flexible substrate according to the prior art.
FIG. 5 is a right side view of FIG. 4;
[Explanation of symbols]
10A Flexible substrate 11, 11a, 11b Lead wiring 110 Plating lead wiring 12, 12a, 12b Inner lead 13 Input side electrode part 14 Output side electrode part 20 Device hole 30 LSI chip 31 Bump 40 Sealing resin H Plating lead cut hole

Claims (1)

A chip component is arranged in a chip component arrangement portion having a large number of plated inner leads, and the chip component arrangement portion is filled with sealing resin from the periphery of the chip component to the periphery of the chip component arrangement portion. In a flexible substrate having a plating lead cut hole for cutting a lead wire for plating formed to plate the specific inner lead,
The flexible substrate, wherein the plating lead cut hole is disposed in a coating region of the sealing resin at a peripheral edge of the chip component disposition portion.

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