JP3900613B2 - Surface mount type chip component and manufacturing method thereof - Google Patents

Surface mount type chip component and manufacturing method thereof Download PDF

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Publication number
JP3900613B2
JP3900613B2 JP24592697A JP24592697A JP3900613B2 JP 3900613 B2 JP3900613 B2 JP 3900613B2 JP 24592697 A JP24592697 A JP 24592697A JP 24592697 A JP24592697 A JP 24592697A JP 3900613 B2 JP3900613 B2 JP 3900613B2
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electrode
insulating substrate
housing recess
chip component
electronic element
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JPH1174420A (en
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晃 小池
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Citizen Electronics Co Ltd
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Citizen Electronics Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Led Device Packages (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は携帯電話、ＦＡ機器、ＯＡ機器及び一般電子機器に使用される表面実装型チップ部品及びその製造方法に関する。
【０００２】
【従来の技術】
近年の電子機器は、高性能化、多機能化とともに小型化、軽量化を追求している。そのため電子部品をプリント基板上に実装し、樹脂封止するものが多い。表面実装型チップ部品の多くは略平行六面体形状をしており、プリント基板上の配線パターンに半田付け等の固着手段で接続される。
【０００３】
前記一般的な従来の表面実装型チップ部品について、図面に基づいてその概要を説明する。
【０００４】
図７〜図１５は、従来の表面実装型チップ部品及びその製造方法を示し、図７は、ガラスエポキシ材よりなる集合絶縁基板の部分平面図。図８は、単個の電極パターン平面図。図９は、ＬＥＤ素子の斜視図。図１０〜図１５は、各工程を示す部分斜視図。図１６は、単個の表面実装型チップ部品の斜視図。図２１は、図１６のＡ−Ａ線断面図である。
【０００５】
図１６及び図２１において、表面実装型チップ部品１０について説明する。ガラエポ樹脂材よりなる絶縁基板１ａの上面側に対向する一対の上面電極２ａ、２ｂを設け、該一対の上面電極２ａ、２ｂは、それぞれその裏面に下面電極３ａ、３ｂと、その側面に、前記上面電極２ａ、２ｂ及び下面電極３ａ、３ｂと連なる側面電極（スルーホール電極）４ａ、４ｂが形成されている。前記一方の上面電極２ａのＡｕメッキされたダイボンドパターンに導電性接着剤９（銀ペースト）でＬＥＤ素子５の一方の電極をダイポンドする。他方の上面電極２ｂのＡｕメッキされたワイヤーボンドパターンに、ＬＥＤ素子５の他方の電極をボンディングワイヤー（Ａｕ線）６でワイヤーボンドして接続されている。
【０００６】
前記絶縁基板１ａの上面電極２ａに接着されたＬＥＤ素子５をとり囲むように、液晶ポリマー材で樹脂成形され、上方に開口した窓部７ａを有する下面に接着剤９ａを印刷した回路封止枠７を絶縁基板１ａに接着して一体化している。前記窓部７ａの傾斜面７ｂは、ＬＥＤ素子５の上面方向の輝度向上の機能を有している。
【０００７】
前記ＬＥＤ素子５とボンディングワイヤー６と、その接続部を保護するために、前記回路封止枠７の上面と面一になるように、窓部７ａ内にエポキシ樹脂よりなる封止樹脂８を注入して、樹脂封止することにより、表面実装型チップ部品１０が完成される。
【０００８】
図７〜図１５により、前記表面実装型チップ部品１０の製造方法について、その概要を説明する。図７において、集合絶縁基板形成工程は、略四角形状をしたガラスエポキシ樹脂材よりなる上下両面が銅箔張りされた多数個取りする集合絶縁基板１Ａは、各列毎に複数個のスルーホール１１をマトリックス状にＮＣ切削等で加工し、前記集合絶縁基板１Ａのスルーホール１１の内面を含む全表面を無電解、電解メッキにより銅メッキ層を形成する。
【０００９】
次に、レジストフィルムを貼付し、マスクを合わせ、露光、現像、エッチング後レジストを剥離する。更に、液状レジストを塗付し、マスク合わせ、露光、現像後、電解メッキによりニッケルメッキ層を形成し、電解メッキにより金メッキ層を形成する。
【００１０】
以上により、集合絶縁基板１Ａの上面側には、図８（図７の点線円で囲むＡ部）に示すように、対向する一対の上面電極２ａ、２ｂと、下面側に対向する一対の図示しない下面電極及び、前記上面電極２ａ、２ｂ及び前記下面電極と連なるようにスルーホール電極４ａ、４ｂが形成される。
【００１１】
ＬＥＤ素子５の構成は、図９に示すように、ジャンクション５ａを挟み、Ｎ層５ｂとＰ層５ｃで形成されている。ＬＥＤ素子５のダイボンド工程は、図１０に示すように、ＬＥＤ素子５の一方の電極５ｄを、集合絶縁基板１Ａに形成されている、個々の絶縁基板の一方の上面電極２ａにダイボンディングして導電性接着剤９等の固着手段で固着する。ワイヤーボンド工程は、図１１において、ＬＥＤ素子５の他方の電極５ｅを、個々の絶縁基板の他方の上面電極２ｂに示すごとくボンディングワイヤー６で接続する。
【００１２】
回路封止枠接着工程は、図１２及び図１３に示すように、液晶ポリマー材よりなる集合回路封止枠７Ａは、前記集合絶縁基板１Ａ上にダイボンドされたＬＥＤ素子５の位置に合致するように、所定間隔に複数個の窓部７ａが成形されている。前記集合回路封止枠７Ａは、その下面に事前に接着剤９ａ等を印刷しておき、ＬＥＤ素子５の周囲を取り囲むように、位置合わせして集合絶縁基板１Ａに接着して一体化する。
【００１３】
樹脂封止工程は、図１４に示すように、前記集合回路封止枠７Ａの各窓部７ａ内に、ＬＥＤ素子５及びボンディングワイヤー６の接続部を保護するために、エポキシ樹脂よりなる封止樹脂８で、集合回路封止枠７Ａの上面と略面一になるように樹脂封止する。表面実装型チップ部品集合体１０Ａが完成される。
【００１４】
切断工程は、図１５に示すように、表面実装型チップ部品集合体１０Ａを、直交する２つのカットライン２（Ｘ方向のカットラインはスルーホール１１上を通る）に沿ってダイシング等の切断手段で単個に分割することにより、図１６で示す表面実装型チップ部品１０が完成される。
【００１５】
図１７〜図２０は、ＭＩＤ基板よりなる、従来の他の表面実装型チップ部品及びその製造方法に係わり、図１７は、ＭＩＤ基板よりなる集合絶縁基板の部分平面図。図１８は、単個の電極パターン平面図。図１９（ａ）〜（ｄ）は、各工程を示す部分斜視図。図２０は、単個の表面実装型チップ部品の斜視図。図２２は、図２０のＢ−Ｂ線断面図である。
【００１６】
図２０及び図２２において、ＭＩＤ絶縁基板１ｂは液晶ポリマー材よりなり、成形部品と立体的な三次元回路を一体化させた射出成形回路部品で、上述した絶縁基板と回路封止枠の製造プロセスに比べて、回路形成及び一体化組立が合理化されている。
【００１７】
図において、絶縁基板１ｂには、ＬＥＤ素子収納凹部１２が、すり鉢状に形成されている。前記ＬＥＤ素子収納凹部１２を含み、上面側に対向する一対の上面電極２ａ、２ｂと、下面側に対向する一対の下面電極３ａ、３ｂ及び、前記上面電極２ａ、２ｂ及び前記下面電極３ａ、３ｂと連なるように側面電極（長穴スルーホール電極）４ａ、４ｂが形成されている。上述と同様に、前記一対の上面電極の一方の上面電極２ａの底部に、ＬＥＤ素子５がダイボンドされ、他方の上面電極２ｂにＡｕワイヤ等よりなるボンディングワイヤ６で接続されている。前記ＬＥＤ素子５の周囲を囲むすり鉢状のＬＥＤ素子収納凹部１２は、Ａｕメッキされているので、ＬＥＤ素子５から発光した光を上面方向に反射し、集光させるので、輝度向上が図られる。
【００１８】
上述と同様に、絶縁基板１ｂのＬＥＤ素子収納凹部１２に、ＬＥＤ素子５及びボンディングワイヤー６と、その接続部を保護するために、エポキシ樹脂等の封止樹脂８で封止して、表面実装型チップ部品２０が完成される。
【００１９】
前記表面実装型チップ部品の製造方法は、上述した従来方法と同様に、多数個取りする集合基板の状態で行う。集合絶縁基の構成は、図１７に示すような略四角形状をした、液晶ポリマー材よりなる集合絶縁基板１Ｂの各列毎に長穴スルーホール１１ａ及び各列間で所定間隔に複数個のＬＥＤ素子収納凹部１２を射出成形で形成した成形品と、図１８（図１７の点線円で囲むＢ部）に示すような、三次元の電極パターンが、一体的にメッキ処理された構成となっている。
【００２０】
各製造工程は、図１９において、（ａ）は、ＬＥＤ素子５のダイボンド工程、（ｂ）は、ワイヤーボンディング工程、（ｃ）は、樹脂封止工程、（ｄ）は切断工程を示すものであり、上述した従来技術と同様であるので説明は省略する。
【００２１】
図２１〜図２４は、上述した、エポキシ樹脂基板及びＭＩＤ基板の信頼性試験における膨張及び収縮のメカニズムを示す断面図である。
【００２２】
図２１及び図２２は、ガラエポ樹脂基板及び液晶ポリマー樹脂よりなるＭＩＤ基板において、充填されたエポキシ樹脂が膨張する状態を示し、図２１では、充填した封止樹脂８と絶縁基板１ａとは同じエポキシ材で相性が良く、相互間の密着性の点でも問題がない。しかし、回路封止枠７の材料は充填した封止樹脂８と異なる液晶ポリマー材であるため、両者の線膨張係数が少し異なる。また、図２２では、立体成形の絶縁基板１ｂの材料が液晶ポリマーであるため、充填した封止樹脂８と材質が異なるため、両者の線膨張係数が少し異なり、両者の密着性の点で問題がある。充填した封止樹脂８が膨張すると、図の矢印Ｃ方向に樹脂は制約の無い上方に向かって膨らむ。この時、図２１に示すような、封止樹脂８と回路封止枠７との界面及び、図２２に示すような、封止樹脂８と絶縁基板１ｂ（液晶ポリマー材）との界面では、線膨張係数の差からズレが生じ、接着を剥がすような力が上方に働く。また、ボンディングワイヤー６及びＬＥＤ素子５にも上方に持ち上げるような力が働く。
【００２３】
図２３及び図２４は、ガラエポ樹脂基板及び液晶ポリマー樹脂よりなるＭＩＤ基板において、充填されたエポキシ樹脂が収縮する状態を示し、上述と同様に、図２３の封止樹脂８（エポキシ樹脂）と回路封止枠７（液晶ポリマー）、図２４の封止樹脂８（エポキシ樹脂）と絶縁基板１ｂ（液晶ポリマー）と材料が異なるため、両者の線膨張係数が少し異なり、両者の密着性の点で問題がある。充填した封止樹脂８が収縮すると、図の矢印Ｄに示すように、樹脂は内部に向かって縮む。この応力をＬＥＤ素子５が受けることになる。
【００２４】
【発明が解決しようとする課題】
しかしながら、前述した２つの従来の表面実装型チップ部品には次のような問題点がある。即ち、上述したように、信頼性試験において、温度サイクル試験とか、高温通電試験等の過酷な環境条件で製品が使用された場合、線膨張係数の小さい、前記液晶ポリマー材よりなる回路封止枠とか、立体成形基板は、それほど膨張・収縮しないのに対し、線膨張係数の大きいエポキシ樹脂よりなる封止樹脂が、大いに膨張・収縮するので、両者の間にズレを生じる。その結果、充填樹脂が膨張した場合は、回路封止枠、立体成形基板の界面で剥離が生じる。また、収縮した場合は、樹脂の応力が、脆弱なＬＥＤ素子に加わりＬＥＤ素子の特性を劣化させてしまう恐れがある等、表面実装型チップ部品の信頼性の点で問題があった。
【００２５】
また、絶縁基板として高価なガラエポ基板を使用し、絶縁基板に別体の回路封止枠を導電性接着剤等で一体化するので、金型による回路封止枠の成形、接着剤の印刷、絶縁基板との一体化工程等を要し、コストアップになる。
【００２６】
また、絶縁基板として、高価な立体成形基板を使用し、成形基板のワイヤーボンディング面が平滑でないため、ワイヤーボンディング不良が発生し、組立工程の歩留りに悪影響を及ぼしてしまう等のさまざまな問題があった。
【００２７】
本発明は上記従来の課題に鑑みなされたものであり、その目的は、絶縁基板及び充填する封止樹脂に、線膨張係数の略同一な材料を使用することにより、信頼性が向上し、回路封止枠を使用しない、寸法精度の高い立体成形基板で、製品のコストダウン及び歩留りが向上し、更に、輝度性能のアップを図った安価な表面実装型チップ部品及びその製造方法を提供するものである。
【００２８】
【課題を解決するための手段】
上記目的を達成するために、本発明における表面実装型チップ部品は、樹脂材よりなる絶縁基板の上面側に、傾斜面及び底部を有する電子素子収納凹部を形成し、前記絶縁基板の上面側に前記電子素子収納凹部の傾斜面及び底部に延びる、対向する一対の上面電極を形成し、前記絶縁基板の裏面に、対向する一対の下面電極と、前記絶縁基板の側面に、前記上面電極及び下面電極と連なる側面電極を形成し、前記電子素子収納凹部の底部に延びる一方の上面電極の端部であるダイボンドパターンに電子素子の一方の電極を接続し、前記電子素子収納凹部の底部に延びる他方の上面電極の端部であるワイヤーボンドパターンと前記電子素子の他方の電極をボンディングワイヤーで接続し、前記ボンディングワイヤーと前記電子素子を保護するために前記電子素子収納凹部を樹脂封止してなる表面実装型チップ部品において、前記絶縁基板及び封止樹脂は共にエポキシ樹脂よりなり、前記上面電極、側面電極及び下面電極は、エポキシ樹脂の表面にメッキで形成されていることを特徴とするものである。
【００２９】
また、前記絶縁基板は電子素子収納凹部が形成された立体成形基板であることを特徴とするものである。
【００３０】
また、前記電子素子はＬＥＤ素子であり、前記絶縁基板の上面から電子素子収納凹部の底部及び傾斜面における前記上面電極パターンを避けた空きスペースに光反射用のダミーパターンが形成されていることを特徴とするものである。
【００３１】
また、前記ダミーパターンは、前記電子素子収納凹部の底面及び上方に広がる傾斜面に、前記上面電極を避けた空きスペースにメッキで形成されていることを特徴とするものである。
【００３３】
また、本発明における表面実装型チップ部品の製造方法は、エポキシ樹脂よりなる多数個取りする集合絶縁基板の各列間に長穴スルーホール、及び前記長穴スルーホール間で所定の間隔に、傾斜面及び底部を有する電子素子収納凹部を形成し、前記長穴スルーホール内面を含む全表面に銅メッキ層を形成し、メッキレジストをラミネートし、露光、現像後パターンマスクを形成し、パターンエッチング後、Ｎｉメッキ、Ａｕメッキ処理を行うことにより、前記集合絶縁基板の上面側には前記電子素子収納凹部の傾斜面及び底部に延びる、対向する一対の上面電極と、前記集合絶縁基板の下面側には対向する一対の下面電極、及び前記長穴スルーホール内には前記上面電極及び前記下面電極と連なる側面電極の電極パターンと、前記集合絶縁基板の上面から電子素子収納凹部の底面及び傾斜面に上面電極を避けるように形成されたダミーパターンを有する立体成形基板を形成する集合絶縁基板形成工程と、前記集合絶縁基板の電子素子収納凹部の底部に延びる一方の上面電極の端部であるダイボンドパターン上に、前記電子素子を導電性接着剤でダイボンドする電子素子ダイボンド工程と、前記集合絶縁基板の電子素子収納凹部の底部に延びる他方の上面電極の端部であるワイヤーボンドパターン上に、前記電子素子からのボンディングワイヤーを接続して電気導通をとるワイヤーボンド工程と、前記ボンディングワイヤーと前記電子素子を保護するために前記電子素子収納凹部にエポキシ樹脂よりなる封止樹脂を注入する樹脂封止工程と、前記各工程を経て形成された前記表面実装型チップ部品集合体を直交する２つのカットラインに沿って切断して単個の表面実装型チップ部品に分割する切断工程とからなることを特徴とするとするものである。
【００３４】
また、前記電子素子がＬＥＤ素子であることを特徴とするものである。
【００３５】
【発明の実施の形態】
以下図面に基づいて本発明における表面実装型チップ部品について説明する。図１は、本発明の実施の形態である表面実装型チップ部品の斜視図である。図において、従来技術と同一部材は同一符号で示す。
【００３６】
図１において、１は、略平行六面体形状のエポキシ樹脂等よりなる立体成形した絶縁基板であり、絶縁基板１には、ＬＥＤ素子収納凹部１２の底面にＬＥＤ素子５を固着し、前記底面及び上方に広がる４面の傾斜面には、上面電極２ａ、２ｂと干渉しない空きスペースに、上面電極２ａ、２ｂと共にＡｕメッキされたＬＥＤの光反射用ダミーパターン１３が形成されている。絶縁基板１の上面側及び傾斜面に対向する一対の上面電極２ａ、２ｂと、下面に下面電極３ａ、３ｂと、前記上面電極２ａ、２ｂ及び下面電極３ａ、３ｂと連なるように側面電極４ａ、４ｂが形成されている。前記一方の上面電極２ａと、その端部のダイボンドパターンは共にＡｕメッキされ、ダイボンドパターンには、導電性接着剤９の固着手段でＬＥＤ素子５を固着し、前記他方の上面電極２ｂと、その端部のワイヤーボンドパターンは共にＡｕメッキされ、ワイヤーボンドパターンには、Ａｕワイヤ等よりなるボンディングワイヤ６がワイヤボンディングされている。８は、前記絶縁基板１と同材のエポキシ樹脂等の封止樹脂で、ＬＥＤ素子５と接続部を保護するために、絶縁基板１の上面と略面一になるように樹脂封止されている。以上の構成より表面実装型チップ部品３０が形成されている。
【００３７】
図２〜図６により、前記表面実装型チップ部品３０の製造方法について説明する。図２及び図４において、集合絶縁基板形成工程は、略四角形状をしたエポキシ樹脂よりなる上下両面が銅箔張りされた多数個取りする集合絶縁基板１Ｃに、所定の間隔で各列毎に複数個の長穴スルーホール１１Ａ及び各列間で所定間隔に複数個のＬＥＤ素子収納凹部１２が形成される立体成形基板である。前記集合絶縁基板１Ｃの全表面を無電解メッキにより銅メッキ層を形成し、裏面レジストシルク印刷、エッチング（メッキ密着性向上）、キャタリスト（Ｎｉ無電解のためＰｂ，Ｓｎ触媒担持）、アクセレーター（活性化処理）、レジスト露光（レジスト硬化）、レジスト剥離、無電解Ｎｉメッキ、レジスト剥離、電気Ｎｉメッキ、Ａｕメッキフラッシュ＋Ａｕメッキ、水洗いの各工程を経てエポキシ樹脂からなる立体成形の集合絶縁基板が形成される。
【００３８】
集合絶縁基板１Ｃの上面側には、図３（図２の点線円で囲むＣ部）に示すように、ＬＥＤ素子収納凹部１２の傾斜面及び底部に延びる、対向する一対の上面電極２ａ、２ｂと、前記ＬＥＤ素子収納凹部１２の底面及び底面周囲４面の傾斜面に、上面電極２ａ、２ｂと干渉しない空きスペースに、Ａｕメッキで形成された光反射用のダミーパターン１３が形成されている。下面側には対向する一対の図示しない下面電極及び、前記上面電極２ａ、２ｂ及び前記下面電極と連なる側面電極４ａ、４ｂが形成されている。
【００３９】
図５において、ＬＥＤ素子ダイボンド工程及びワイヤーボンド工程は、図４（ａ）に示すＬＥＤ素子５を、個々のＬＥＤ素子収納凹部１２内の底面に延びる一方の上面電極２ａの端部であるダイボンドパターンに導電性接着剤９で固着する。他方の上面電極２ｂの端部であるワイヤーボンドパターンにはＬＥＤ素子５からボンディングワイヤー６で接続する。
【００４０】
図６における樹脂封止工程及び切断工程は、前記ＬＥＤ素子収納凹部１２内に、ＬＥＤ素子５及びボンディングワイヤー６の接続部を保護するために、集合絶縁基板１Ｃと同材のエポキシ樹脂の封止樹脂８で、集合絶縁基板１Ｃの上面と略面一になるように樹脂封止することにより表面実装型チップ部品集合体３０Ａが形成される。切断工程は、前記表面実装型チップ部品集合体３０Ａを、直交する２つのカットライン２のＸ、Ｙ（Ｘ方向のカットランは長穴スルーホール１１Ａ上を通る）に沿ってスライシング又はダイシング等の切断手段で単個に分割することにより、図１で示す表面実装型チップ部品３０が完成される。
【００４１】
【発明の効果】
以上説明したように、本発明によれば、表面実装型チップ部品において、立体成形基板及び封止樹脂は共に同じエポキシ材のため、線膨張係数が同じなので、膨張・収縮の際に、基板と充填樹脂が共に、伸び縮し、基板と樹脂の境目が剥がれる恐れがない。また、ＬＥＤ素子への応力の心配もなく、製品寿命の点で効果が極めて大きく、信頼性が向上する。
【００４２】
また、立体成形基板では、電極パターンとそれらの電極パターンと干渉しない空きスペースに、光反射用のダミーパターンを同時に形成できるので、余計な工程を掛けず、上面方向への輝度アップを図ることができる。
【００４３】
また、従来のように、回路封止枠を使用しないので、金型が不要となり、更に、回路封止枠への接着剤の印刷、これを基板と一体化する作業も不要となる。また、従来のＭＩＤ基板が抱えていた、基板の悪い品質（ワイヤーボンディング面が平滑でない）に起因する組立工程の歩留りダウンが解消される。
【００４４】
また、製造方法において、集合状態の絶縁基板に安価なエポキシ樹脂材を使用して寸法精度の高い立体成形基板を作り、多数個取りするので、信頼性に優れた表面実装型チップ部品を安価に大量に製造することができる。
【図面の簡単な説明】
【図１】本発明の実施の形態に係わる表面実装型チップ部品の斜視図である。
【図２】本発明の製造方法を示す集合絶縁基板の部分平面図である。
【図３】図２の点線円Ｃ部の電極パターンを示す平面図である。
【図４】ＬＥＤ素子と図２の集合絶縁基板の部分斜視図である。
【図５】図４のＬＥＤ素子を固着するダイボンド及びワイヤーボンド工程を示す集合絶縁基板の部分斜視図である。
【図６】図５に封止樹脂を注入する樹脂封止及び切断工程を示す表面実装型チップ部品集合体の部分斜視図である。
【図７】従来の表面実装型チップ部品の製造方法を示す集合絶縁基板の部分平面図である。
【図８】図７の点線円Ａ部の電極パターンを示す平面図である。
【図９】ＬＥＤ素子の斜視図である。
【図１０】図７にＬＥＤ素子を固着するダイボンド工程を示す集合絶縁基板の部分斜視図である。
【図１１】図１０にワイヤをワイヤーボンディングするワイヤーボンド工程を示す集合絶縁基板の部分斜視図である。
【図１２】図１１の集合絶縁基板に回路封止枠接着工程を示す部分斜視図である。
【図１３】図１２の一体化された集合絶縁基板の部分斜視図である。
【図１４】図１３に封止樹脂を注入する樹脂封止工程を示す表面実装型チップ部品集合体の部分斜視図である。
【図１５】図１４のカッティングラインに沿って単個の表面実装型チップ部品に切断する切断工程を示す部分斜視図である。
【図１６】従来の表面実装型チップ部品を示す斜視図である。
【図１７】従来の他の表面実装型チップ部品の製造方法を示す集合絶縁基板の部分平面図である。
【図１８】図１７の点線円Ｂ部の電極パターンを示す平面図である。
【図１９】ＬＥＤ素子ダイボンド工程、ワイヤーボンド工程、樹脂封止工程、切断工程を示す集合絶縁基板の部分斜視図である。
【図２０】従来の他の表面実装型チップ部品を示す斜視図である。
【図２１】従来の表面実装型チップ部品の信頼性試験における膨張のメカニズムを示す図１６のＡ−Ａ線断面図である。
【図２２】従来の表面実装型チップ部品の信頼性試験における膨張のメカニズムを示す図２０のＢ−Ｂ線断面図である。
【図２３】従来の表面実装型チップ部品の信頼性試験における収縮のメカニズムを示す図１６のＡ−Ａ線断面図である。
【図２４】従来の表面実装型チップ部品の信頼性試験における収縮のメカニズムを示す図２０のＢ−Ｂ線断面図である。
【符号の説明】
１ 絶縁基板
１Ｃ 集合絶縁基板
２ａ、２ｂ 上面電極
３ａ、３ｂ 下面電極
４ａ、４ｂ 側面電極
５ ＬＥＤ素子
６ ボンディングワイヤ
８ 封止樹脂
９ 導電性接着剤
１１Ａ 長穴スルーホール
１２ ＬＥＤ素子収納凹部
１３ ダミーパターン
３０ 表面実装型チップ部品
３０Ａ 表面実装型チップ部品集合体[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a surface-mounted chip component used for a mobile phone, FA device, OA device, and general electronic device, and a method for manufacturing the same.
[0002]
[Prior art]
In recent years, electronic devices have been pursued to be smaller and lighter with higher performance and more functions. Therefore, many electronic components are mounted on a printed circuit board and sealed with resin. Many surface-mounted chip components have a substantially parallelepiped shape, and are connected to a wiring pattern on a printed circuit board by a fixing means such as soldering.
[0003]
An outline of the general conventional surface mount chip component will be described with reference to the drawings.
[0004]
7 to 15 show a conventional surface mount chip component and a manufacturing method thereof, and FIG. 7 is a partial plan view of a collective insulating substrate made of a glass epoxy material. FIG. 8 is a plan view of a single electrode pattern. FIG. 9 is a perspective view of the LED element. 10 to 15 are partial perspective views showing the respective steps. FIG. 16 is a perspective view of a single surface-mounted chip component. 21 is a cross-sectional view taken along line AA in FIG.
[0005]
The surface mount chip component 10 will be described with reference to FIGS. A pair of upper surface electrodes 2a, 2b facing the upper surface side of the insulating substrate 1a made of glass epoxy resin material is provided, and the pair of upper surface electrodes 2a, 2b are respectively provided with lower surface electrodes 3a, 3b on the back surface thereof and on the side surfaces thereof, Side electrodes (through-hole electrodes) 4a and 4b are formed which are continuous with the upper surface electrodes 2a and 2b and the lower surface electrodes 3a and 3b. One electrode of the LED element 5 is die-bonded with a conductive adhesive 9 (silver paste) on the Au-plated die bond pattern of the one upper surface electrode 2a. The other electrode of the LED element 5 is connected by wire bonding with a bonding wire (Au wire) 6 to the Au-bonded wire bond pattern of the other upper surface electrode 2b.
[0006]
A circuit sealing frame formed by resin molding with a liquid crystal polymer material so as to surround the LED element 5 bonded to the upper surface electrode 2a of the insulating substrate 1a, and having an adhesive 9a printed on the lower surface having a window portion 7a opened upward. 7 is bonded to and integrated with the insulating substrate 1a. The inclined surface 7 b of the window portion 7 a has a function of improving luminance in the upper surface direction of the LED element 5.
[0007]
In order to protect the LED element 5, the bonding wire 6, and the connection portion thereof, a sealing resin 8 made of an epoxy resin is injected into the window portion 7 a so as to be flush with the upper surface of the circuit sealing frame 7. Then, the surface-mounted chip component 10 is completed by resin sealing.
[0008]
The outline of the method for manufacturing the surface-mounted chip component 10 will be described with reference to FIGS. In FIG. 7, in the collective insulating substrate forming step, a large number of collective insulating substrates 1A made of glass epoxy resin material having a substantially rectangular shape and having both upper and lower surfaces covered with copper foil are divided into a plurality of through holes 11 for each row. Is processed into a matrix by NC cutting or the like, and a copper plating layer is formed on the entire surface including the inner surface of the through hole 11 of the collective insulating substrate 1A by electroless and electrolytic plating.
[0009]
Next, a resist film is affixed, the mask is aligned, the resist is peeled off after exposure, development and etching. Furthermore, after applying a liquid resist, aligning the mask, exposing and developing, a nickel plating layer is formed by electrolytic plating, and a gold plating layer is formed by electrolytic plating.
[0010]
As described above, on the upper surface side of the collective insulating substrate 1A, as shown in FIG. 8 (A portion surrounded by a dotted circle in FIG. 7), a pair of opposed upper surface electrodes 2a and 2b and a pair of illustrated materials opposed to the lower surface side. Through-hole electrodes 4a and 4b are formed so as to be continuous with the lower electrode and the upper electrodes 2a and 2b and the lower electrode.
[0011]
As shown in FIG. 9, the LED element 5 has a junction 5a and an N layer 5b and a P layer 5c. In the die bonding step of the LED element 5, as shown in FIG. 10, one electrode 5d of the LED element 5 is die-bonded to one upper surface electrode 2a of each insulating substrate formed on the collective insulating substrate 1A. It is fixed by fixing means such as conductive adhesive 9. In the wire bonding step, in FIG. 11, the other electrode 5e of the LED element 5 is connected by the bonding wire 6 as shown on the other upper surface electrode 2b of each insulating substrate.
[0012]
In the circuit sealing frame bonding step, as shown in FIGS. 12 and 13, the collective circuit seal frame 7A made of a liquid crystal polymer material matches the position of the LED element 5 die-bonded on the collective insulating substrate 1A. A plurality of window portions 7a are formed at predetermined intervals. The collective circuit sealing frame 7A is preliminarily printed with an adhesive 9a or the like on its lower surface, and is aligned and adhered to the collective insulating substrate 1A so as to surround the LED element 5.
[0013]
As shown in FIG. 14, the resin sealing step is a sealing made of an epoxy resin in order to protect the connection portion of the LED element 5 and the bonding wire 6 in each window portion 7a of the collective circuit sealing frame 7A. The resin 8 is resin-sealed so as to be substantially flush with the upper surface of the collective circuit sealing frame 7A. The surface mount type chip component assembly 10A is completed.
[0014]
As shown in FIG. 15, the cutting process is performed by cutting the surface-mounted chip component assembly 10A by cutting means such as dicing along two orthogonal cut lines 2 (the cut line in the X direction passes through the through hole 11). Thus, the surface-mounted chip component 10 shown in FIG. 16 is completed.
[0015]
FIGS. 17 to 20 relate to another conventional surface-mounted chip component made of an MID substrate and a method for manufacturing the same, and FIG. 17 is a partial plan view of an aggregate insulating substrate made of an MID substrate. FIG. 18 is a plan view of a single electrode pattern. 19 (a) to 19 (d) are partial perspective views showing each step. FIG. 20 is a perspective view of a single surface-mounted chip component. 22 is a cross-sectional view taken along line BB in FIG.
[0016]
20 and 22, the MID insulating substrate 1b is made of a liquid crystal polymer material, and is an injection molded circuit component in which a molded component and a three-dimensional three-dimensional circuit are integrated. Compared to, circuit formation and integrated assembly are streamlined.
[0017]
In the figure, an LED element housing recess 12 is formed in a mortar shape on an insulating substrate 1b. A pair of upper surface electrodes 2a, 2b that face the upper surface side, a pair of lower surface electrodes 3a, 3b that face the lower surface side, and the upper surface electrodes 2a, 2b and the lower surface electrodes 3a, 3b that include the LED element housing recess 12 Side electrodes (long hole through-hole electrodes) 4a and 4b are formed so as to be continuous with each other. Similarly to the above, the LED element 5 is die-bonded to the bottom of one upper surface electrode 2a of the pair of upper surface electrodes, and is connected to the other upper surface electrode 2b by a bonding wire 6 made of Au wire or the like. Since the mortar-shaped LED element housing recess 12 surrounding the LED element 5 is Au-plated, the light emitted from the LED element 5 is reflected and condensed in the upper surface direction, so that the luminance is improved.
[0018]
In the same manner as described above, the LED element housing recess 12 of the insulating substrate 1b is sealed with a sealing resin 8 such as an epoxy resin in order to protect the LED element 5 and the bonding wire 6 and the connecting portion thereof, and is mounted on the surface. The die chip part 20 is completed.
[0019]
The method for manufacturing the surface-mounted chip component is performed in the state of a collective substrate in which a large number of chips are taken, as in the conventional method described above. The structure of the collective insulating group has a substantially square shape as shown in FIG. 17, and a long hole through hole 11a is provided for each row of the collective insulating substrate 1B made of a liquid crystal polymer material, and a plurality of LEDs are arranged at predetermined intervals between the rows. A molded product in which the element housing recess 12 is formed by injection molding and a three-dimensional electrode pattern as shown in FIG. 18 (B portion surrounded by a dotted circle in FIG. 17) are integrally plated. Yes.
[0020]
In FIG. 19, (a) shows the die bonding process of LED element 5, (b) shows the wire bonding process, (c) shows the resin sealing process, and (d) shows the cutting process. Since it is the same as the prior art described above, description thereof is omitted.
[0021]
FIGS. 21 to 24 are cross-sectional views showing the expansion and contraction mechanisms in the reliability test of the epoxy resin substrate and the MID substrate described above.
[0022]
21 and 22 show a state in which the filled epoxy resin expands in the MID substrate made of the glass epoxy resin substrate and the liquid crystal polymer resin. In FIG. 21, the filled sealing resin 8 and the insulating substrate 1a are the same epoxy. Good compatibility with the material, no problem in terms of adhesion between each other. However, since the material of the circuit sealing frame 7 is a liquid crystal polymer material different from the filled sealing resin 8, the linear expansion coefficients of both are slightly different. Also, in FIG. 22, since the material of the three-dimensionally formed insulating substrate 1b is a liquid crystal polymer, the material is different from that of the filled sealing resin 8, so that the linear expansion coefficients of the two are slightly different, and there is a problem in terms of adhesion between the two. There is. When the filled sealing resin 8 expands, the resin expands upward in the direction of arrow C in the figure without restriction. At this time, at the interface between the sealing resin 8 and the circuit sealing frame 7 as shown in FIG. 21 and at the interface between the sealing resin 8 and the insulating substrate 1b (liquid crystal polymer material) as shown in FIG. Deviation occurs from the difference in linear expansion coefficient, and a force that peels off the adhesive works upward. Further, a force that lifts upward also acts on the bonding wire 6 and the LED element 5.
[0023]
23 and 24 show a state in which the filled epoxy resin contracts in the MID substrate made of the glass epoxy resin substrate and the liquid crystal polymer resin. Similarly to the above, the sealing resin 8 (epoxy resin) and the circuit of FIG. Since the sealing frame 7 (liquid crystal polymer), the sealing resin 8 (epoxy resin) and the insulating substrate 1b (liquid crystal polymer) in FIG. 24 are made of different materials, their linear expansion coefficients are slightly different, and in terms of adhesion between the two. There's a problem. When the filled sealing resin 8 contracts, the resin contracts inward as indicated by an arrow D in the figure. The LED element 5 receives this stress.
[0024]
[Problems to be solved by the invention]
However, the two conventional surface mount chip components described above have the following problems. That is, as described above, when the product is used under severe environmental conditions such as a temperature cycle test or a high temperature current test in the reliability test, the circuit sealing frame made of the liquid crystal polymer material having a small linear expansion coefficient. On the other hand, the three-dimensional molded substrate does not expand or contract so much, but the sealing resin made of an epoxy resin having a large linear expansion coefficient expands and contracts greatly, so that a deviation occurs between them. As a result, when the filling resin expands, peeling occurs at the interface between the circuit sealing frame and the three-dimensional molded substrate. Further, when contracted, there is a problem in terms of the reliability of the surface-mounted chip component, such as the stress of the resin being applied to the fragile LED element, which may deteriorate the characteristics of the LED element.
[0025]
In addition, since an expensive glass epoxy substrate is used as an insulating substrate, and a separate circuit sealing frame is integrated with the insulating substrate with a conductive adhesive, etc., molding of the circuit sealing frame with a mold, printing of the adhesive, An integration process with an insulating substrate is required, resulting in an increase in cost.
[0026]
In addition, since an expensive three-dimensional molded substrate is used as the insulating substrate and the wire bonding surface of the molded substrate is not smooth, there are various problems such as a wire bonding failure and an adverse effect on the yield of the assembly process. It was.
[0027]
The present invention has been made in view of the above-described conventional problems. The purpose of the present invention is to improve reliability by using a material having substantially the same linear expansion coefficient for the insulating substrate and the sealing resin to be filled. A three-dimensional molded substrate with high dimensional accuracy that does not use a sealing frame, and provides a low-cost surface-mount chip component that improves product cost reduction and yield, and further improves luminance performance, and a method for manufacturing the same. It is.
[0028]
[Means for Solving the Problems]
In order to achieve the above object, the surface-mounted chip component according to the present invention is formed with an electronic element housing recess having an inclined surface and a bottom on the upper surface side of an insulating substrate made of a resin material, and on the upper surface side of the insulating substrate. A pair of opposing upper surface electrodes extending to the inclined surface and bottom of the electronic element housing recess are formed, a pair of opposing lower surface electrodes on the back surface of the insulating substrate, and the upper surface electrode and lower surface on the side surface of the insulating substrate. A side electrode connected to the electrode is formed, one electrode of the electronic element is connected to a die bond pattern which is an end of one upper surface electrode extending to the bottom of the electronic element housing recess, and the other extending to the bottom of the electronic element housing recess of connecting the other electrode of the wire bonding pattern and the electronic device is an end of the upper electrode by a bonding wire, to protect the electronic element and the bonding wire In the surface-mounted chip component formed by resin-sealing the electronic element housing recess, both the insulating substrate and the sealing resin are made of epoxy resin, and the upper surface electrode, the side surface electrode, and the lower surface electrode are on the surface of the epoxy resin. It is formed by plating.
[0029]
In addition, the insulating substrate is a three-dimensionally formed substrate in which an electronic element housing recess is formed.
[0030]
Further, the prior SL electronic elements are LED elements, the dummy pattern for light reflection in the empty space that avoids the top electrode pattern from the upper surface of the insulating substrate at the bottom and the inclined surface of the electronic device housing recess is formed It is characterized by being.
[0031]
The dummy pattern may be formed by plating in an empty space avoiding the upper surface electrode on the bottom surface of the electronic element housing recess and an inclined surface extending upward.
[0033]
In the method of manufacturing a surface mount type chip component in the present invention, the elongated hole through holes between each row of the set insulating substrate to multi-piece made of an epoxy resin, and a predetermined spacing between the elongated hole through hole, the inclination After forming an electronic device housing recess having a surface and a bottom , forming a copper plating layer on the entire surface including the inner surface of the long hole through hole, laminating a plating resist, forming a pattern mask after exposure and development, and after pattern etching , Ni plating, a Au plating processing line Ukoto, on the upper surface side of the set insulating substrate extends inclined surface and the bottom of the electronic device housing recess, and a pair of upper surface electrode facing the lower surface side of the set insulating substrate the electrode pattern of the side surface electrodes continuous to the upper electrode and the lower electrode in the pair of the lower electrode, and the elongated hole through holes facing in, the set insulating base Top from a set insulating substrate forming step of forming a three-dimensionally shaped substrate having formed a dummy pattern so as to avoid a top electrode on the bottom及beauty inclined slope of the electronic device housing recess, the electronic device housing recess in the set insulating substrate on the die bonding pattern is an end portion of one of the upper electrode extending bottom, and an electronic device die bonding step of die-bonding the electronic element with a conductive adhesive, the other of the upper surface extending to the bottom of the electronic device housing recess in the set insulating substrate on wire bonding pattern is the end of the electrode, and wire bonding step of providing electrical conduction by connecting the bonding wires from the electronic device, the electronic device housing recess to protect said bonding wire said electronic device A resin sealing step for injecting a sealing resin made of an epoxy resin, and the surface mounting formed through each of the steps It is an characterized by comprising a cutting step of dividing by cutting along two cut lines perpendicular to the chip component assembly to a single number of surface-mounted chip component.
[0034]
Further, the electronic element is an LED element.
[0035]
DETAILED DESCRIPTION OF THE INVENTION
The surface mount chip component according to the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view of a surface mount chip component according to an embodiment of the present invention. In the figure, the same members as those in the prior art are denoted by the same reference numerals.
[0036]
In FIG. 1, reference numeral 1 denotes a three-dimensionally formed insulating substrate made of a substantially parallelepiped-shaped epoxy resin or the like, and the LED element 5 is fixed to the bottom surface of the LED element housing recess 12 on the insulating substrate 1. On the four inclined surfaces extending to the surface, light-reflective dummy patterns 13 of the Au-plated LED together with the upper surface electrodes 2a and 2b are formed in empty spaces that do not interfere with the upper surface electrodes 2a and 2b. A pair of upper surface electrodes 2a, 2b facing the upper surface side and the inclined surface of the insulating substrate 1, a lower surface electrode 3a, 3b on the lower surface, and a side electrode 4a, connected to the upper surface electrode 2a, 2b and lower surface electrode 3a, 3b, 4b is formed. The one upper surface electrode 2a and the die bond pattern at the end thereof are both Au-plated, and the LED element 5 is fixed to the die bond pattern by the fixing means of the conductive adhesive 9, and the other upper surface electrode 2b, Both end wire bond patterns are Au-plated, and bonding wires 6 made of Au wires or the like are wire-bonded to the wire bond patterns. 8 is a sealing resin such as an epoxy resin, which is the same material as the insulating substrate 1, and is resin-sealed so as to be substantially flush with the upper surface of the insulating substrate 1 in order to protect the LED element 5 and the connection portion. Yes. The surface mount type chip component 30 is formed by the above configuration.
[0037]
A method for manufacturing the surface-mounted chip component 30 will be described with reference to FIGS. 2 and 4, a plurality of collective insulating substrates 1C each having a substantially rectangular shape made of an epoxy resin and having both upper and lower surfaces coated with copper foil are provided for each row at predetermined intervals. This is a three-dimensionally formed substrate in which a plurality of LED element storage recesses 12 are formed at a predetermined interval between each of the long hole through holes 11A and each row. A copper plating layer is formed on the entire surface of the collective insulating substrate 1C by electroless plating, backside resist silk printing, etching (improvement of plating adhesion), catalyst (supporting Pb, Sn catalyst for Ni electroless), accelerator (Activation treatment), resist exposure (resist curing), resist stripping, electroless Ni plating, resist stripping, electric Ni plating, Au plating flash + Au plating, water washing, and three-dimensional molded collective insulating substrate made of epoxy resin Is formed.
[0038]
On the upper surface side of the collective insulating substrate 1C, as shown in FIG. 3 (C portion surrounded by a dotted circle in FIG. 2), a pair of opposed upper surface electrodes 2a and 2b extending to the inclined surface and bottom of the LED element housing recess 12 are provided. A light reflecting dummy pattern 13 formed by Au plating is formed in an empty space that does not interfere with the upper surface electrodes 2a and 2b on the inclined surface of the bottom surface of the LED element housing recess 12 and the four surfaces around the bottom surface. . On the lower surface side, a pair of lower electrodes (not shown) opposed to each other and side electrodes 4a and 4b connected to the upper surface electrodes 2a and 2b and the lower surface electrodes are formed.
[0039]
In FIG. 5, the LED element die bonding step and the wire bonding step are the die bonding patterns which are the end portions of one upper surface electrode 2a extending from the LED element 5 shown in FIG. It is fixed to the conductive adhesive 9. The wire bonding pattern which is the end of the other upper surface electrode 2 b is connected from the LED element 5 with the bonding wire 6.
[0040]
In the resin sealing step and the cutting step in FIG. 6, in order to protect the connection portion of the LED element 5 and the bonding wire 6 in the LED element housing recess 12, the epoxy resin of the same material as the collective insulating substrate 1 </ b> C is sealed. A surface mount type chip component assembly 30A is formed by resin sealing with the resin 8 so as to be substantially flush with the upper surface of the collective insulating substrate 1C. In the cutting step, the surface-mounted chip component assembly 30A is sliced or diced along the X and Y of the two orthogonal cut lines 2 (the cut run in the X direction passes over the long hole through hole 11A). The surface mounting type chip component 30 shown in FIG. 1 is completed by dividing into single pieces by the cutting means.
[0041]
【The invention's effect】
As described above, according to the present invention, in the surface-mounted chip component, since the three-dimensionally molded substrate and the sealing resin are both the same epoxy material, the linear expansion coefficient is the same. Both the filling resin expands and contracts, and there is no fear that the boundary between the substrate and the resin is peeled off. Further, there is no worry about stress on the LED element, and the effect is extremely great in terms of product life, and the reliability is improved.
[0042]
Further, in the three-dimensionally formed substrate, since the dummy pattern for light reflection can be simultaneously formed in the electrode pattern and the empty space that does not interfere with those electrode patterns, it is possible to increase the luminance in the upper surface direction without taking extra steps. it can.
[0043]
Moreover, since a circuit sealing frame is not used as in the prior art, a mold is not required, and further, printing of an adhesive on the circuit sealing frame and an operation for integrating this with a substrate are not required. Moreover, the yield reduction of the assembly process due to the poor quality of the substrate (the wire bonding surface is not smooth), which the conventional MID substrate has, is eliminated.
[0044]
In addition, the manufacturing method uses a cheap epoxy resin material for the insulating substrate in the assembled state to make a three-dimensional molded substrate with high dimensional accuracy, and a large number of them are taken, so surface mount chip parts with excellent reliability can be made inexpensively Can be manufactured in large quantities.
[Brief description of the drawings]
FIG. 1 is a perspective view of a surface mount chip component according to an embodiment of the present invention.
FIG. 2 is a partial plan view of a collective insulating substrate showing a manufacturing method of the present invention.
3 is a plan view showing an electrode pattern of a dotted circle C part in FIG. 2. FIG.
4 is a partial perspective view of the LED element and the collective insulating substrate of FIG. 2;
5 is a partial perspective view of a collective insulating substrate showing a die bonding and wire bonding process for fixing the LED device of FIG. 4; FIG.
6 is a partial perspective view of a surface-mounted chip component assembly showing a resin sealing and cutting step for injecting a sealing resin in FIG. 5;
FIG. 7 is a partial plan view of a collective insulating substrate showing a conventional method of manufacturing a surface mount chip component.
8 is a plan view showing an electrode pattern of a dotted circle A part in FIG.
FIG. 9 is a perspective view of an LED element.
FIG. 10 is a partial perspective view of the collective insulating substrate showing a die bonding process for fixing the LED element in FIG. 7;
FIG. 11 is a partial perspective view of the collective insulating substrate showing a wire bonding step of wire bonding the wires in FIG. 10;
12 is a partial perspective view showing a circuit sealing frame adhering step to the collective insulating substrate of FIG. 11. FIG.
13 is a partial perspective view of the integrated collective insulating substrate of FIG. 12. FIG.
14 is a partial perspective view of the surface-mounted chip component assembly showing the resin sealing step of injecting the sealing resin in FIG. 13;
15 is a partial perspective view showing a cutting process for cutting into a single surface-mounted chip component along the cutting line of FIG. 14;
FIG. 16 is a perspective view showing a conventional surface-mounted chip component.
FIG. 17 is a partial plan view of a collective insulating substrate showing another conventional method for manufacturing a surface-mounted chip component.
18 is a plan view showing an electrode pattern of a dotted circle B part in FIG.
FIG. 19 is a partial perspective view of a collective insulating substrate showing an LED element die bonding step, a wire bonding step, a resin sealing step, and a cutting step.
FIG. 20 is a perspective view showing another conventional surface-mounted chip component.
FIG. 21 is a cross-sectional view taken along line AA of FIG. 16 showing a mechanism of expansion in a reliability test of a conventional surface mount chip component.
22 is a cross-sectional view taken along the line BB of FIG. 20 showing a mechanism of expansion in a reliability test of a conventional surface mount chip component.
23 is a cross-sectional view taken along the line AA of FIG. 16 showing a shrinkage mechanism in a reliability test of a conventional surface mount chip component.
24 is a cross-sectional view taken along the line BB of FIG. 20 showing a shrinkage mechanism in a reliability test of a conventional surface mount chip component.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Insulation board | substrate 1C Collective insulation board | substrate 2a, 2b Upper surface electrode 3a, 3b Lower surface electrode 4a, 4b Side electrode 5 LED element 6 Bonding wire 8 Sealing resin 9 Conductive adhesive agent 11A Long hole through hole 12 LED element accommodation recessed part 13 Dummy pattern 30 surface mount chip component 30A surface mount chip component assembly

Claims (6)

樹脂材よりなる絶縁基板の上面側に、傾斜面及び底部を有する電子素子収納凹部を形成し、前記絶縁基板の上面側に前記電子素子収納凹部の傾斜面及び底部に延びる、対向する一対の上面電極を形成し、前記絶縁基板の裏面に、対向する一対の下面電極と、前記絶縁基板の側面に、前記上面電極及び下面電極と連なる側面電極を形成し、前記電子素子収納凹部の底部に延びる一方の上面電極の端部であるダイボンドパターンに電子素子の一方の電極を接続し、前記電子素子収納凹部の底部に延びる他方の上面電極の端部であるワイヤーボンドパターンと前記電子素子の他方の電極をボンディングワイヤーで接続し、前記ボンディングワイヤーと前記電子素子を保護するために前記電子素子収納凹部を
樹脂封止してなる表面実装型チップ部品において、前記絶縁基板及び封止樹脂は共にエポキシ樹脂よりなり、前記上面電極、側面電極及び下面電極は、エポキシ樹脂の表面にメッキで形成されていることを特徴とする表面実装型チップ部品。A pair of opposing upper surfaces, wherein an electronic element housing recess having an inclined surface and a bottom portion is formed on the upper surface side of the insulating substrate made of a resin material, and extends to the inclined surface and the bottom portion of the electronic element housing recess on the upper surface side of the insulating substrate. An electrode is formed, a pair of lower electrodes facing each other on the back surface of the insulating substrate, and side electrodes connected to the upper surface electrode and the lower surface electrode are formed on the side surface of the insulating substrate, and extend to the bottom of the electronic device housing recess. One electrode of the electronic element is connected to a die bond pattern that is an end portion of one upper surface electrode, and the wire bond pattern that is an end portion of the other upper surface electrode that extends to the bottom portion of the electronic element housing recess and the other of the electronic device A surface mount type chip component in which an electrode is connected with a bonding wire, and the electronic element housing recess is sealed with resin in order to protect the bonding wire and the electronic element. There are, the insulating substrate and the sealing resin are both made of epoxy resin, the upper electrode, the side surface electrode and the lower electrode is a surface mount type chip components, characterized in that it is formed by plating on the surface of the epoxy resin. 前記絶縁基板は、立体成形基板であることを特徴とする請求項１記載の表面実装型チップ部品。The surface-mount type chip component according to claim 1 , wherein the insulating substrate is a three-dimensionally formed substrate. 前記電子素子はＬＥＤ素子であり、前記絶縁基板の上面から電子素子収納凹部の底部及び傾斜面における前記上面電極パターンを避けた空きスペースに光反射用のダミーパターンが形成されていることを特徴とする請求項１記載の表面実装型チップ部品。The electronic element is a LED element, that before the dummy pattern for light reflection in the empty space that avoids the top electrode pattern from the upper surface of Kize' edge board at the bottom and the inclined surface of the electronic device housing recess is formed The surface-mounted chip component according to claim 1, wherein 前記ダミーパターンは、メッキで形成されていることを特徴とする請求項３記載の表面実装型チップ部品。The dummy pattern is a surface-mounted chip component according to claim 3, characterized in that it is formed by main Tsu key. エポキシ樹脂よりなる多数個取りする集合絶縁基板の各列間に長穴スルーホール、及び前記長穴スルーホール間で所定の間隔に、傾斜面及び底部を有する電子素子収納凹部を形成し、前記長穴スルーホール内面を含む全表面に銅メッキ層を形成し、メッキレジストをラミネートし、露光、現像後パターンマスクを形成し、パターンエッチング後、Ｎｉメッキ、Ａｕメッキ処理を行うことにより、前記集合絶縁基板の上面側には前記電子素子収納凹部の傾斜面及び底部に延びる、対向する一対の上面電極と、前記集合絶縁基板の下面側には対向する一対の下面電極、及び前記長穴スルーホール内には前記上面電極及び前記下面電極と連なる側面電極の電極パターンと、前記集合絶縁基板の上面から電子素子収納凹部の底面及び傾斜面に上面電極を避けるように形成されたダミーパターンを有する立体成形基板を形成する集合絶縁基板形成工程と、前記集合絶縁基板の電子素子収納凹部の底部に延びる一方の上面電極の端部であるダイボンドパターン上に、前記電子素子を導電性接着剤でダイボンドする電子素子ダイボンド工程と、前記集合絶縁基板の電子素子収納凹部
の底部に延びる他方の上面電極の端部であるワイヤーボンドパターン上に、前記電子素子からのボンディングワイヤーを接続して電気導通をとるワイヤーボンド工程と、前記ボンディングワイヤーと前記電子素子を保護するために前記電子素子収納凹部にエポキシ樹脂よりなる封止樹脂を注入する樹脂封止工程と、前記各工程を経て形成された前記表面実装型チップ部品集合体を直交する２つのカットラインに沿って切断して単個の表面実装型チップ部品に分割する切断工程とからなることを特徴とする表面実装型チップ部品の製造方法。A long hole through hole is formed between each row of the collective insulating substrate made of epoxy resin, and an electronic element housing recess having an inclined surface and a bottom is formed at a predetermined interval between the long hole through holes. hole through hole inner surface of the copper plating layer is formed on the entire surface including the, laminating a plating resist, exposure, forming a post-development pattern mask, after the pattern etching, Ni plating, a Au plating processing line Ukoto, the set A pair of opposed upper surface electrodes extending on the inclined surface and bottom of the electronic element housing recess on the upper surface side of the insulating substrate, a pair of opposed lower surface electrodes on the lower surface side of the collective insulating substrate, and the elongated hole through hole the top electrode and the electrode pattern of the side surface electrodes continuous to the lower electrode, the upper electrode on the bottom及beauty inclined slope of the electronic device housing recess from the top surface of the set insulating substrate within A set insulating substrate forming step of forming a three-dimensionally shaped substrate having formed a dummy pattern so as to avoid, in the die bonding pattern on an end portion of one of the upper electrode extending to the bottom of the electronic device housing recess of the set insulating substrate, An electronic element die-bonding step in which the electronic element is die-bonded with a conductive adhesive; and an electronic element housing recess of the collective insulating substrate
On wire bonding pattern is the end of the other of the upper surface electrodes extending to the bottom of the wire bonding process to electrically conductive by connecting the bonding wires from the electronic device, for protecting the electronic element and the bonding wire A resin sealing step of injecting an epoxy resin sealing resin into the electronic device housing recess and cutting the surface-mounted chip component assembly formed through the steps along two orthogonal cut lines And a cutting step of dividing into a single surface-mounted chip component. A method for manufacturing a surface-mounted chip component. 前記電子素子がＬＥＤ素子であることを特徴とする請求項５記載の表面実装型チップ部品の製造方法。6. The method of manufacturing a surface-mounted chip component according to claim 5, wherein the electronic element is an LED element.
JP24592697A 1997-08-28 1997-08-28 Surface mount type chip component and manufacturing method thereof Expired - Lifetime JP3900613B2 (en)

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