JP3879319B2 - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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Publication number
JP3879319B2
JP3879319B2 JP18876099A JP18876099A JP3879319B2 JP 3879319 B2 JP3879319 B2 JP 3879319B2 JP 18876099 A JP18876099 A JP 18876099A JP 18876099 A JP18876099 A JP 18876099A JP 3879319 B2 JP3879319 B2 JP 3879319B2
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carrier substrate
semiconductor device
semiconductor element
recess
electrode
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JP2001015558A (en
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和弘 石川
信弥 松村
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Panasonic Corp
Panasonic Holdings Corp
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Panasonic Corp
Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device wherein a resin portion between a semiconductor element and a carrier board is reliably formed while preventing the bulging out of a superfluous portion of resin, to thereby prevent the degradation of adhesive strength between the semiconductor element and the carrier board. SOLUTION: This semiconductor device comprises: a carrier board 8 having a recess 7 with an inclined stepping portion 6 in the upper surface thereof, electrodes within the recess 7, and external electrodes 3 on the bottom thereof, the electrodes 3 being connected to the electrodes within the recess 7; a semiconductor element 1 placed into the recess 7 of the board 8 and connected to the electrodes of the board 8 through projecting electrodes 2; and a resin portion 9 provided between the element 1 and the recess 7 of the board 8. The portion 9 is interposed between the element 1 and the board 8 so as to be contained in the recess 7 having the portion 6 which is inclined in a tapered manner.

Description

【０００１】
【発明の属する技術分野】
本発明はフリップチップ実装工法を用いて、半導体素子をキャリア基板等の被接合体に樹脂を介在させて実装した半導体装置およびその製造方法に関するものであり、特に半導体素子と基板等の被接合体との間に樹脂を効果的に介在させた半導体装置およびその製造方法に関するものである。
【０００２】
【従来の技術】
近年、樹脂基板、セラミック基板等の半導体キャリアや半導体素子、またはプリント基板等のマザーボードヘのチップ実装技術として、主とする半導体素子をフリップチップ実装する工法が盛んに開発されている。
【０００３】
以下、従来のフリップチップ実装工法を用いた半導体装置の製造方法について図面を参照しながら説明する。図１１〜図１４は従来の半導体装置の製造方法を示す各工程ごとの断面図である。
【０００４】
まず図１１に示すように、フリップチップしようとする半導体素子１を用意し、その半導体素子１上の複数の電極パッド（図示せず）上に各々、突起電極２（バンプ）を形成する。なお、この工程では、さらに突起電極２の頭頂部の高さを一定にそろえるためにバンプレベリングが施され、このレベリングでは、平坦板治具を用いた加圧によるレベリングによって、突起電極２の高さは、概ね５０［μｍ］にレベリング調整されている。
【０００５】
次に図１２に示すように、上面に搭載しようとする半導体素子の電極パッドと対応した電極（図示せず）を有し、底面にその電極と基板内部のビアホールにより接続された外部電極３を有したセラミックなどの絶縁性のキャリア基板４を用意し、その上面の電極領域に対して、絶縁性の樹脂フィルム５を載置する。
【０００６】
そして図１３に示すように、樹脂フィルム５が載置されたキャリア基板４に対して、その樹脂フィルムを挟み込むように半導体素子１をその突起電極２を下にし、位置合わせして押圧する。すなわち、半導体素子１の突起電極２とキャリア基板４の電極とを位置合わせして、互いの電極を接続するものである。両者間に介在する樹脂フィルム５は、押圧によって外側領域に逃げながら広がっていくため、突起電極２とキャリア基板４の電極との間は導通がとれるものである。なお、この工程は加熱状況下で行われ、樹脂フィルム５が軟化され、外側領域に逃げながら広がっていくものである。
【０００７】
したがって図１４に示すように、半導体素子１とキャリア基板４とが突起電極２を介して互いの電極が接続され、両者間には樹脂フィルム５による絶縁性の樹脂が介在し、また底面には外部電極３を有したフリップチップ実装型の半導体装置が得られるものである。
【０００８】
【発明が解決しようとする課題】
しかしながら前記従来の半導体装置の製造方法では、半導体素子とキャリア基板との間に介在した樹脂による諸問題があった。
【０００９】
以下、その諸問題について図面を参照しながら説明する。図１５は従来の半導体装置を示す平面図であり、図１６は従来の半導体装置を示す断面図である。
【００１０】
まず、図１５に示すように、半導体素子１とキャリア基板４との間の樹脂フィルム５が、接続時の押圧力によって、外方に逃げようとするが、その逃げ量の差によって、半導体素子１の各辺の側面からはみ出る量に差が生じてしまう。この樹脂フィルム５のはみ出し量の違いによって、応力印加に差が生じて、製品としての信頼性を損ねるという課題があった。この押圧時の樹脂フィルム５の逃げ量の差は、キャリア基板上面に対して、樹脂フィルムを載置する際、その位置決め精度のバラツキ、および樹脂フィルム量の違いによるものである。
【００１１】
また図１６に示すように、半導体素子１とキャリア基板４との接続時の押圧力如何によっては、樹脂フィルム５の半導体素子１の側面部分が弛みを有し、半導体素子／キャリア基板間の接続強度の劣化を引き起こす恐れがあった。また図１６において、樹脂フィルム５の弛みが、樹脂フィルム５ａのように弛み自体が少ない場合であれば、製品の検査工程においても影響はなく、検査工程を進めることができるが、樹脂フィルム５の弛みが、樹脂フィルム５ｂのように弛み自体が多く、その高さが大きい場合であれば、製品検査時のソケット収納で、余分な厚みとなり、半導体素子自体にソケットによる押圧力が印加され、半導体素子の割れを引き起こす恐れもある。
【００１２】
本発明は前記従来の課題を解決するものであり、半導体素子／キャリア基板間の樹脂を余分なはみ出しを抑えて確実に形成し、両者間の接着強度の劣化を防止した半導体装置を提供するものであり、また半導体素子とキャリア基板との間に位置精度よく樹脂を介在した半導体装置およびその製造方法を提供することを目的とする。
【００１３】
前記従来の課題を解決するために本発明の半導体装置およびその製造方法は以下のような構成を有している。すなわち、本発明の半導体装置は、平坦な下面に外部電極を形成し、上面に段差部分が傾斜をなした凹部を有し、前記凹部内の面に配線電極を有したキャリア基板と、前記キャリア基板の前記凹部に載置され、突起電極を介して前記配線電極と接続された半導体素子と、前記半導体素子と前記キャリア基板の凹部との間に設けられた樹脂部とよりなる半導体装置である。
【００１４】
また、さらに半導体素子の面とキャリア基板上面との間に放熱性接着剤を介して放熱板が設けられている半導体装置である。
また、樹脂部は、半導体素子の突起電極の形成された面と側面とを封止している半導体装置である。
また、キャリア基板の上面の高さと同一面まで樹脂部が形成されている半導体装置である。
【００１５】
本発明の半導体装置の製造方法は、平坦な下面に外部電極を形成し、上面に段差部分が傾斜をなした凹部を有し、前記凹部内の面に配線電極を有したキャリア基板を用意する工程と、前記キャリア基板の前記凹部に樹脂を載置する工程と、半導体素子の電極パッドが形成された面を前記キャリア基板の前記凹部に対して押圧し、前記半導体素子の前記電極パッドと前記キャリア基板上の前記配線電極とを接続する工程とよりなる半導体装置の製造方法である。
【００１６】
また、本発明の半導体装置の製造方法は、半導体素子の電極パッド上に突起電極を形成する工程と、上面に段差部分が傾斜をなした凹部と、前記凹部内に前記半導体素子の前記電極パッドと対応した配線電極と、下面に前記配線電極と電気的に接続した外部電極とを有したキャリア基板を用意する工程と、前記キャリア基板の前記凹部に樹脂フィルムを載置する工程と、前記半導体素子の前記突起電極が形成された面を前記樹脂フィルムが載置された前記キャリア基板の前記凹部に対して押圧し、前記半導体素子の前記突起電極と前記配線電極とを接続する工程とよりなる半導体装置の製造方法である。
【００１７】
さらに、半導体素子の突起電極が形成された面を樹脂フィルムが載置されたキャリア基板の凹部に対して押圧し、前記半導体素子の前記突起電極と前記キャリア基板の上面の電極とを接続する工程は、加熱状況下で行う半導体装置の製造方法である。
【００１８】
前記構成の通り、本発明の半導体装置は、テーパー状などの傾斜部を有した凹部に樹脂部が収納した形で介在しているので、半導体素子／キャリア基板間の樹脂を余分なはみ出しを抑えて確実に形成し、両者間の接着強度の劣化を防止した半導体装置を実現できる。
【００１９】
また本発明の半導体装置の製造方法の通り、キャリア基板の凹部にその凹部の底面積の同等面積、またはそれより小さく相似形を有した樹脂フィルムを載置するため、セルフアライメント的に位置決めが行われ、位置決め精度のバラツキを抑え、半導体素子／キャリア基板の接続時の押圧でも外方に逃げる樹脂フィルムを均一とすることができる。さらに、キャリア基板の凹部は、段差部分がテーパー状の傾斜部を有した凹部であるため、半導体素子／キャリア基板の接続時の押圧で外方に逃げる樹脂フィルムは、そのテーパー状の形状にならい、逃げて広がっていくため、外方に逃げる樹脂フィルムを均一にし、かつその凹部内に確実に形成することができる。そのため応力印加によっても局所な印加を避け、製品としての信頼性を損ねることを防止できる。
【００２０】
【発明の実施の形態】
以下、本発明の半導体装置およびその製造方法の一実施形態について、図面を参照しながら説明する。
【００２１】
まず本発明の半導体装置の一実施形態について説明する。図１，図２は本実施形態の半導体装置を示す断面図である。
【００２２】
まず、図１に示すように、本実施形態の半導体装置は、上面に段差部分がテーパー状の傾斜部６を有した凹部７と、その凹部内の面に配線電極（図示せず）を有し、底面にその配線電極と基板内部のビアホールにより接続された外部電極３を有したキャリア基板８と、そのキャリア基板の凹部７に載置され、基板の配線電極とその主面の電極パッドとが突起電極２を介して接続された半導体素子１と、その半導体素子１とキャリア基板８の凹部７との間に設けられた樹脂部９とよりなるものである。
【００２３】
本実施形態の半導体装置は、搭載する半導体素子の面積よりも大きく、テーパー状の傾斜部６を有した凹部７に樹脂部９が収納された形で介在しているので、半導体素子１／キャリア基板８間の樹脂部９が余分なはみ出しを抑えられて確実に形成されており、両者間の接着強度の劣化を防止した半導体装置である。
【００２４】
テーパー状の傾斜部６を有した凹部７において、その傾斜角度θは樹脂部９が確実にその凹部内に形成されるような角度であって、製造過程において樹脂部が抵抗を受けず、その樹脂自体の広がりによって外方に効率よく逃げることができる角度である。本実施形態では、傾斜角度θを４５度乃至６０度としている。なお、凹部７の段差の傾斜角度θを３０度，２０度としてもよいが、傾斜角度が小さくなると、半導体素子１を収納するため、その分、凹部７自体が大きくなってしまい、キャリア基板８自体も大型化してしまうので、小型化した半導体装置を実現するのであれば、傾斜角度θを４５度前後とすることが望ましい。
【００２５】
また本実施形態では、樹脂部９はエポキシ樹脂を主成分とする絶縁性の樹脂であり、キャリア基板８としては、絶縁性基板としてセラミック基板、エポキシ樹脂を主成分とする樹脂基板であり、上面に配線パターンとその配線電極を有し、その配線電極と内部接続された外部電極を底面に有した基板である。また本実施形態では、樹脂部９はフィルム状の樹脂を介在させ、樹脂部としたものであるが、流動性のある樹脂を介在させて樹脂部を形成してもよい。
【００２６】
さらに凹部７の深さ（段差）は、半導体素子１を収納し、半導体素子１底面側とキャリア基板８の上面とを同一面とするのであれば、半導体素子１の厚み＋突起電極２の高さ以上の深さ（段差）とし、本実施形態では、半導体素子１の厚みが３００［μｍ］であり、突起電極２の高さがレベリング後で５０［μｍ］であるため、凹部７の深さを３５０［μｍ］としている。また図１に示すように、半導体素子１の底面側をキャリア基板８の上面よりも突出させる場合は、凹部７の深さを２５０［μｍ］程度としてもよい。
【００２７】
次に図２に示す半導体装置は、樹脂部９の高さが図１に示した半導体装置と異なる構成であり、キャリア基板８の上面の高さと同一面にまで樹脂部９が形成されているものである。すなわち、半導体素子１の突起電極２の面と側面部とを樹脂部９で包囲した構造である。このような構造とすることにより、さらに半導体素子１／キャリア基板８間の接着強度の劣化を防止でき、信頼性を高めることができる。
【００２８】
また本実施形態の半導体装置において、凹部７の面とキャリア基板８の底面との厚みＴについては、０．１［ｍｍ］〜０．５［ｍｍ］とすることにより、熱膨張による搭載した半導体素子１の突起電極２に印加される応力による影響を抑制できるため、フリップチップ実装の信頼性を向上させることができるものである。
【００２９】
次に本実施形態の半導体装置の別の実施形態について図面を参照しながら説明する。図３は本実施形態の半導体装置を示す断面図である。
【００３０】
図３に示すように、図１，図２に示した半導体装置と同様に、上面に段差部分がテーパー状の傾斜部６を有した凹部７と、その凹部内の面に配線電極（図示せず）を有し、底面にその配線電極と基板内部のビアホールにより接続された外部電極３を有したキャリア基板８と、そのキャリア基板の凹部７に載置され、基板の配線電極とその主面の電極パッドとが突起電極２を介して接続された半導体素子１と、その半導体素子１とキャリア基板８の凹部７との間に設けられた樹脂部９とよりなるものであるが、さらに半導体素子１の底面（背面）、キャリア基板８の上面部分に放熱性接着剤１０により、放熱部材１１を設けたものである。
【００３１】
本実施形態の構造により、放熱部材１１が半導体素子１より発せられる熱を半導体素子１の背面および、キャリア基板８から受け、外部に放熱させることができるので、発熱による半導体素子１の劣化、特性不良を防止できるものである。
【００３２】
なお、図３においては、樹脂部９を半導体素子１の側面部に接する程度としているが、図２に示したように半導体素子１の突起電極２の面と側面部とを樹脂部９で包囲した構造としてもよく、半導体素子１からの発熱をキャリア基板８側に伝導させ、放熱部材１１によって効率よく外部に放熱できるものである。
【００３３】
次に本発明の半導体装置の製造方法は、主として、半導体素子の電極パッドとキャリア基板上の電極とをフィルム状の樹脂を介在させて接続する半導体装置の製造方法においては、キャリア基板として、段差部分がテーパー状の傾斜部を有した凹部と、その凹部内に半導体素子の電極パッドと対応した電極を有したキャリア基板を用い、そのキャリア基板の凹部にその凹部の底面積と同等面積を有した樹脂フィルムを載置し、半導体素子の電極パッドが形成された面を樹脂フィルムが載置されたキャリア基板の凹部に対して押圧し、半導体素子の電極パッドとキャリア基板上の電極とを接続することを主眼するものである。
【００３４】
以下、本発明の半導体装置の製造方法の一実施形態について図面を参照しながら説明する。
【００３５】
図４〜図８は本実施形態の半導体装置の製造方法を示す断面図である。
【００３６】
まず図４に示すように、基板に対してフリップチップしようとする半導体素子１を用意し、その半導体素子１上の複数の電極パッド（図示せず）上に各々、突起電極２（バンプ）を形成する。なお、この工程では、さらに突起電極２の頭頂部の高さを一定にそろえるためにバンプレベリングが施され、このレベリングでは、平坦板治具を用いた加圧によるレベリングによって、突起電極２の高さは、概ね５０［μｍ］にレベリング調整されている。
【００３７】
次に図５に示すように、上面に段差部分がテーパー状の傾斜部６を有した凹部７と、その凹部７内に半導体素子の電極パッドと対応した配線電極を有し、底面にその配線電極と基板内部のビアホールにより接続された外部電極３とを有したキャリア基板８を用意し、そのキャリア基板８の凹部７にその凹部７の底面積と同等面積、同等形状を有した樹脂フィルム５を載置する。本実施形態では、凹部７の面積と同等であって、搭載する半導体素子と相似形の樹脂フィルム５を用いているので、樹脂フィルム５の位置決めがセルフアライメント的に行われ、位置決め精度のバラツキを抑え、半導体素子／キャリア基板の接続時の押圧時に外方に逃げる樹脂（樹脂フィルム）を均一とすることができる。また、ここで載置する樹脂フィルム５は、エポキシ樹脂を主成分とする絶縁性の樹脂フィルムであり、その厚みは４０［μｍ］のシートを用いているが、キャリア基板８の凹部７の深さ（段差）と、半導体素子の側端面の所望とする被覆面積によっては、１００［μｍ］程度でもよい。
【００３８】
次に図６に示すように、半導体素子１の突起電極２が形成された面を樹脂フィルム５が載置されたキャリア基板８の凹部７に対して押圧し、半導体素子１の突起電極２とキャリア基板８の上面の電極とを接続する。この工程では、加熱状況下で行なわれるものであり、キャリア基板８がセラミック基板の場合は２２０［℃］であり、またキャリア基板８が樹脂基板の場合は１８０［℃］であり、その接続のための押圧時間は、２０［ｓｅｃ］程度の数１０［ｓｅｃ］である。
【００３９】
ここで図７に示すように、接続のための押圧において、半導体素子１を樹脂フィルム５を介在させてキャリア基板８に対して押圧（矢印Ａ）した場合、キャリア基板８側は加熱されているので、樹脂フィルム５は軟化しており、押圧により樹脂は広がり、外方に逃げる（矢印Ｂ）。そしてその外方に逃げる過程では、樹脂は余分な抵抗を受けずにキャリア基板８の凹部７の傾斜部６の形状を辿り、傾斜部６とキャリア基板８との境界部分でその表面張力によって留まる。なお、半導体素子１の側面部分をも樹脂で覆う場合は、樹脂フィルム５の厚みを厚くし、樹脂量を多くすることによって可能である。ただし、過剰な厚みの樹脂フィルム５を用いると、凹部７から樹脂がはみ出してしまう恐れがあるので、適宜、最適の厚みの樹脂フィルムを用いる。
【００４０】
したがって図８に示すように、上面に段差部分がテーパー状の傾斜部６を有した凹部７と、その凹部内の面に配線電極（図示せず）を有し、底面にその配線電極と基板内部のビアホールにより接続された外部電極３を有したキャリア基板８と、そのキャリア基板の凹部７に載置され、基板の配線電極とその主面の電極パッドとが突起電極２を介して接続された半導体素子１と、その半導体素子１とキャリア基板８の凹部７との間に設けられた樹脂部９とよりなるフリップチップ実装型の半導体装置が得られるものである。
【００４１】
本実施形態の半導体装置の製造方法により、図９に示すように、半導体素子１／キャリア基板８間の樹脂９の余分なはみ出しを抑えて確実かつ均一に形成し、両者間の接着強度の劣化を防止した半導体装置を得ることができる。
【００４２】
勿論、図１０に示すように、キャリア基板８の上面の高さと同一面にまで樹脂部９が形成されるようにしてもよく、その際は、介在させる樹脂フィルムの厚みを厚くし、樹脂量を多くすることによって可能である。このような構造とすることにより、さらに半導体素子１／キャリア基板８間の接着強度の劣化を防止でき、信頼性を高めることができる。
【００４３】
なお、本実施形態において、キャリア基板としては、底面に複数の外部接続用のランドである外部電極が形成され、その外部電極と内部ビアによって電気的に接続した配線電極をその表面に有する絶縁性基板であるが、キャリア基板としては、プリント基板等のマザー実装基板であってもよい。
【００４４】
以上、本実施形態の半導体装置では、テーパー状を成した凹部に樹脂部が収納した形で介在しているので、半導体素子／キャリア基板間の樹脂を余分なはみ出しを抑えて確実に形成し、両者間の接着強度の劣化を防止した半導体装置を実現できる。
【００４５】
また半導体装置の製造方法においては、キャリア基板の凹部にその凹部の底面積の同等面積またはそれより小さく、半導体素子の面積以上であって相似形を有した樹脂フィルムを載置するため、セルフアライメント的に位置決めが行われ、位置決め精度のバラツキを抑え、半導体素子／キャリア基板の接続時の押圧でも外方に逃げる樹脂フィルムを均一とすることができる。さらに、キャリア基板の凹部は、段差部分がテーパー状を成した凹部であるため、半導体素子／キャリア基板の接続時の押圧で外方に逃げる樹脂フィルムは、そのテーパー状の形状にならい、逃げて広がっていくため、外方に逃げる樹脂フィルムを均一にし、かつその凹部内に確実に形成することができる。そのため応力印加によっても局所な印加を避け、製品としての信頼性を損ねることを防止できる。
【００４６】
【発明の効果】
以上、本発明の半導体装置は、半導体素子／キャリア基板間の樹脂が余分なはみ出しを抑えて確実に形成され、両者間の接着強度の劣化を防止した半導体装置である。また半導体素子とキャリア基板との間に位置精度よく樹脂を介在した半導体装置である。
【００４７】
また本発明の半導体装置の製造方法により、キャリア基板の凹部にその凹部の底面積の同等面積またはそれより小さく、半導体素子の面積以上であって相似形を有した樹脂フィルムを載置するため、セルフアライメント的に位置決めが行われ、位置決め精度のバラツキを抑え、半導体素子／キャリア基板の接続時の押圧でも外方に逃げる樹脂フィルムを均一とすることができる。そのため、半導体素子／キャリア基板の両者間の接着強度の劣化を防止し、半導体素子とキャリア基板との間に位置精度よく樹脂を介在した半導体装置を実現できるものである。
【図面の簡単な説明】
【図１】本発明の一実施形態の半導体装置を示す断面図
【図２】本発明の一実施形態の半導体装置を示す断面図
【図３】本発明の一実施形態の半導体装置を示す断面図
【図４】本発明の一実施形態の半導体装置の製造方法を示す断面図
【図５】本発明の一実施形態の半導体装置の製造方法を示す断面図
【図６】本発明の一実施形態の半導体装置の製造方法を示す断面図
【図７】本発明の一実施形態の半導体装置の製造方法を示す断面図
【図８】本発明の一実施形態の半導体装置の製造方法を示す断面図
【図９】本発明の一実施形態の半導体装置の製造方法を示す平面図
【図１０】本発明の一実施形態の半導体装置の製造方法を示す断面図
【図１１】従来の半導体装置の製造方法を示す断面図
【図１２】従来の半導体装置の製造方法を示す断面図
【図１３】従来の半導体装置の製造方法を示す断面図
【図１４】従来の半導体装置の製造方法を示す断面図
【図１５】従来の半導体装置の課題を示す平面図
【図１６】従来の半導体装置の課題を示す断面図
【符号の説明】
１ 半導体素子
２ 突起電極
３ 外部電極
４ キャリア基板
５ 樹脂フィルム
６ 傾斜部
７ 凹部
８ キャリア基板
９ 樹脂部
１０ 放熱性接着剤
１１ 放熱部材[0001]
BACKGROUND OF THE INVENTION
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a semiconductor element is mounted on a bonded body such as a carrier substrate using a flip chip mounting method, and a method for manufacturing the same, and more particularly to a bonded body such as a semiconductor element and a substrate. The present invention relates to a semiconductor device in which a resin is effectively interposed between and a manufacturing method thereof.
[0002]
[Prior art]
In recent years, as a chip mounting technique on a semiconductor carrier such as a resin substrate or a ceramic substrate, a semiconductor element, or a mother board such as a printed circuit board, a method for flip-chip mounting a main semiconductor element has been actively developed.
[0003]
Hereinafter, a semiconductor device manufacturing method using a conventional flip chip mounting method will be described with reference to the drawings. 11 to 14 are cross-sectional views for each process showing a conventional method of manufacturing a semiconductor device.
[0004]
First, as shown in FIG. 11, a semiconductor element 1 to be flip-chip is prepared, and protruding electrodes 2 (bumps) are formed on a plurality of electrode pads (not shown) on the semiconductor element 1. In this step, bump leveling is further performed in order to make the height of the top of the protruding electrode 2 constant. In this leveling, the height of the protruding electrode 2 is increased by leveling using a flat plate jig. The leveling is adjusted to approximately 50 [μm].
[0005]
Next, as shown in FIG. 12, an external electrode 3 having an electrode (not shown) corresponding to the electrode pad of the semiconductor element to be mounted on the upper surface and connected to the electrode by a via hole inside the substrate is provided on the bottom surface. An insulating carrier substrate 4 made of ceramic or the like is prepared, and an insulating resin film 5 is placed on the upper electrode region.
[0006]
Then, as shown in FIG. 13, the semiconductor element 1 is pressed against the carrier substrate 4 on which the resin film 5 is placed, with the protruding electrode 2 facing down, so as to sandwich the resin film. That is, the protruding electrode 2 of the semiconductor element 1 and the electrode of the carrier substrate 4 are aligned and the electrodes are connected to each other. Since the resin film 5 interposed between the two spreads while escaping to the outer region by pressing, conduction between the protruding electrode 2 and the electrode of the carrier substrate 4 can be established. In addition, this process is performed under a heating condition, and the resin film 5 is softened and spreads while escaping to the outer region.
[0007]
Therefore, as shown in FIG. 14, the semiconductor element 1 and the carrier substrate 4 are connected to each other via the protruding electrode 2, and an insulating resin by the resin film 5 is interposed between them, A flip chip mounting type semiconductor device having the external electrode 3 can be obtained.
[0008]
[Problems to be solved by the invention]
However, the conventional method for manufacturing a semiconductor device has various problems due to the resin interposed between the semiconductor element and the carrier substrate.
[0009]
Hereinafter, the problems will be described with reference to the drawings. FIG. 15 is a plan view showing a conventional semiconductor device, and FIG. 16 is a cross-sectional view showing the conventional semiconductor device.
[0010]
First, as shown in FIG. 15, the resin film 5 between the semiconductor element 1 and the carrier substrate 4 tries to escape outward by the pressing force at the time of connection. There is a difference in the amount of protrusion from the side surface of each side of 1. Due to the difference in the protruding amount of the resin film 5, there is a problem that a difference in stress application occurs and the reliability as a product is impaired. The difference in the escape amount of the resin film 5 at the time of pressing is due to a variation in positioning accuracy and a difference in the resin film amount when the resin film is placed on the upper surface of the carrier substrate.
[0011]
Further, as shown in FIG. 16, depending on the pressing force when the semiconductor element 1 and the carrier substrate 4 are connected, the side surface portion of the semiconductor element 1 of the resin film 5 has a slack, and the connection between the semiconductor element and the carrier substrate. There was a risk of causing deterioration of strength. Further, in FIG. 16, if the slack of the resin film 5 is small as in the resin film 5a, there is no influence in the product inspection process, and the inspection process can proceed. If the slack is a lot of slack itself as in the case of the resin film 5b and its height is large, the socket is accommodated at the time of product inspection, and an excessive thickness is obtained, and a pressing force by the socket is applied to the semiconductor element itself. There is also a risk of causing cracking of the element.
[0012]
The present invention solves the above-described conventional problems, and provides a semiconductor device in which a resin between a semiconductor element and a carrier substrate is reliably formed while suppressing excessive protrusion, and deterioration in adhesive strength between the two is prevented. It is another object of the present invention to provide a semiconductor device in which a resin is interposed between a semiconductor element and a carrier substrate with high positional accuracy and a method for manufacturing the same.
[0013]
In order to solve the above conventional problems, the semiconductor device and the manufacturing method thereof according to the present invention have the following configurations. That is, the semiconductor device of the present invention, to form external electrodes on the flat lower surface, having a recess step portion on the upper surface were Na of tilt oblique, and the carrier substrate having a wiring electrode on a surface of the recess, wherein It is placed in the recess of the carrier substrate, impact and semiconductor element connected to the wiring electrode through the electromotive electrodes, become more semiconductor devices and a resin portion provided between the recess of the carrier substrate and the semiconductor element It is.
[0014]
Further, the semiconductor device is further provided with a heat dissipation plate between the surface of the semiconductor element and the upper surface of the carrier substrate via a heat dissipation adhesive.
The resin portion is a semiconductor device that seals the surface and the side surface on which the protruding electrode of the semiconductor element is formed.
In addition, in the semiconductor device, the resin portion is formed up to the same height as the upper surface of the carrier substrate.
[0015]
The method of manufacturing a semiconductor device of the present invention, to form external electrodes on the flat lower surface, having a recess step portion on the upper surface were Na of inclination obliquely, providing a carrier substrate having a wiring electrode on a surface of said recess a step of the steps of placing the resin in the recess of the carrier substrate, the surface on which the electrode pads are formed of a semi-conductor element is pressed against the concave portion of the front Symbol carrier substrate, said electrodes of said semiconductor element A method of manufacturing a semiconductor device comprising a step of connecting a pad and the wiring electrode on the carrier substrate.
[0016]
A method of manufacturing a semiconductor device of the present invention includes the steps of: forming a projecting electrode on the electrode pads of the semiconductor elements, a recess step portion has name the inclined obliquely to the upper surface, the electrode of the semiconductor element in the recess a wiring electrodes corresponding to the pad, preparing a carrier board having an external electrode connected the wiring electrode electrically to the lower surface, a step of placing a tree fat film in the recess of the carrier substrate , the step of the said surface on which protruding electrodes are formed of the semiconductor device is pressed against the recess of the carrier substrate to the resin film is placed, connecting the protruding electrode and the wiring electrode of the semiconductor element This is a method for manufacturing a semiconductor device.
[0017]
Furthermore, the step of pressing the surface of the semiconductor element on which the protruding electrode is formed against the concave portion of the carrier substrate on which the resin film is placed, and connecting the protruding electrode of the semiconductor element and the electrode on the upper surface of the carrier substrate Is a method for manufacturing a semiconductor device under heating conditions.
[0018]
As described above, in the semiconductor device of the present invention, the resin portion is interposed in a concave portion having an inclined portion such as a tapered shape, so that excessive protrusion of the resin between the semiconductor element and the carrier substrate is suppressed. Thus, it is possible to realize a semiconductor device that is reliably formed and prevents deterioration of the adhesive strength between the two.
[0019]
In addition, as in the method for manufacturing a semiconductor device of the present invention, a resin film having a similar shape or smaller than the bottom area of the concave portion is placed in the concave portion of the carrier substrate. In addition, the variation in positioning accuracy can be suppressed, and the resin film that escapes outward even when the semiconductor element / carrier substrate is connected can be made uniform. Further, since the concave portion of the carrier substrate is a concave portion having a tapered inclined portion, the resin film that escapes outward by pressing at the time of connecting the semiconductor element / carrier substrate does not follow the tapered shape. Since it escapes and spreads, the resin film that escapes outward can be made uniform and reliably formed in the recess. Therefore, local application can be avoided even by applying stress, and the reliability as a product can be prevented from being impaired.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, an embodiment of a semiconductor device and a manufacturing method thereof according to the invention will be described with reference to the drawings.
[0021]
First, an embodiment of a semiconductor device of the present invention will be described. 1 and 2 are cross-sectional views showing the semiconductor device of this embodiment.
[0022]
First, as shown in FIG. 1, the semiconductor device according to the present embodiment has a recess 7 having an inclined portion 6 with a stepped portion tapered on the upper surface, and a wiring electrode (not shown) on the surface in the recess. The carrier substrate 8 having the external electrode 3 connected to the wiring electrode and the via hole inside the substrate on the bottom surface, and placed on the concave portion 7 of the carrier substrate, the wiring electrode of the substrate and the electrode pad on the main surface thereof Is composed of a semiconductor element 1 connected through a protruding electrode 2 and a resin part 9 provided between the semiconductor element 1 and the recess 7 of the carrier substrate 8.
[0023]
Since the semiconductor device of the present embodiment is larger than the area of the semiconductor element to be mounted and is interposed in the concave portion 7 having the tapered inclined portion 6 so that the resin portion 9 is accommodated, the semiconductor element 1 / carrier The resin portion 9 between the substrates 8 is reliably formed with an excessive protrusion suppressed, and the semiconductor device prevents the adhesive strength between them from deteriorating.
[0024]
In the concave portion 7 having the tapered inclined portion 6, the inclination angle θ is an angle such that the resin portion 9 is surely formed in the concave portion, and the resin portion is not subjected to resistance during the manufacturing process. The angle at which the resin can escape efficiently due to the spread of the resin itself. In the present embodiment, the inclination angle θ is set to 45 degrees to 60 degrees. Note that the inclination angle θ of the step of the recess 7 may be 30 degrees or 20 degrees. However, if the inclination angle is decreased, the semiconductor element 1 is accommodated. Since the size of the semiconductor device itself also increases, it is desirable to set the inclination angle θ to around 45 degrees in order to realize a downsized semiconductor device.
[0025]
In the present embodiment, the resin portion 9 is an insulating resin whose main component is an epoxy resin, and the carrier substrate 8 is a ceramic substrate as an insulating substrate and a resin substrate whose main component is an epoxy resin, The substrate has a wiring pattern and its wiring electrode on the bottom surface, and an external electrode internally connected to the wiring electrode. In the present embodiment, the resin portion 9 is a resin portion with a film-like resin interposed therebetween, but the resin portion may be formed with a fluid resin interposed.
[0026]
Further, the depth (step) of the recess 7 is such that the semiconductor element 1 is accommodated and the bottom surface side of the semiconductor element 1 and the top surface of the carrier substrate 8 are the same surface, the thickness of the semiconductor element 1 + the height of the protruding electrode 2. In this embodiment, since the thickness of the semiconductor element 1 is 300 [μm] and the height of the protruding electrode 2 is 50 [μm] after leveling, the depth of the recess 7 is increased. The thickness is set to 350 [μm]. As shown in FIG. 1, when the bottom surface side of the semiconductor element 1 is protruded from the top surface of the carrier substrate 8, the depth of the concave portion 7 may be about 250 [μm].
[0027]
Next, the semiconductor device shown in FIG. 2 has a configuration in which the height of the resin portion 9 is different from that of the semiconductor device shown in FIG. 1, and the resin portion 9 is formed to be flush with the height of the upper surface of the carrier substrate 8. Is. That is, the semiconductor element 1 has a structure in which the surface and the side surface portion of the protruding electrode 2 are surrounded by the resin portion 9. By adopting such a structure, it is possible to further prevent the deterioration of the adhesive strength between the semiconductor element 1 / carrier substrate 8 and to improve the reliability.
[0028]
In the semiconductor device of the present embodiment, the thickness T between the surface of the recess 7 and the bottom surface of the carrier substrate 8 is set to 0.1 [mm] to 0.5 [mm], thereby mounting the semiconductor mounted by thermal expansion. Since the influence of the stress applied to the protruding electrode 2 of the element 1 can be suppressed, the reliability of flip chip mounting can be improved.
[0029]
Next, another embodiment of the semiconductor device of this embodiment will be described with reference to the drawings. FIG. 3 is a cross-sectional view showing the semiconductor device of this embodiment.
[0030]
As shown in FIG. 3, similarly to the semiconductor device shown in FIGS. 1 and 2, a recess 7 having an inclined portion 6 with a stepped portion on the upper surface and a wiring electrode (not shown) on the surface in the recess. And a carrier substrate 8 having an external electrode 3 connected to the wiring electrode by a via hole inside the substrate on the bottom surface and a wiring electrode of the substrate and its main surface. The semiconductor element 1 is connected to the first electrode pad via the protruding electrode 2 and the resin portion 9 is provided between the semiconductor element 1 and the recess 7 of the carrier substrate 8. A heat radiating member 11 is provided by a heat radiating adhesive 10 on the bottom surface (back surface) of the element 1 and the upper surface portion of the carrier substrate 8.
[0031]
With the structure of the present embodiment, the heat radiating member 11 can receive heat generated from the semiconductor element 1 from the back surface of the semiconductor element 1 and the carrier substrate 8 and dissipate the heat to the outside. Defects can be prevented.
[0032]
In FIG. 3, the resin portion 9 is in contact with the side surface portion of the semiconductor element 1, but the surface of the protruding electrode 2 and the side surface portion of the semiconductor element 1 are surrounded by the resin portion 9 as shown in FIG. 2. The heat generation from the semiconductor element 1 can be conducted to the carrier substrate 8 side, and the heat dissipation member 11 can efficiently dissipate heat to the outside.
[0033]
Next, the method for manufacturing a semiconductor device of the present invention mainly uses a step as a carrier substrate in a method for manufacturing a semiconductor device in which an electrode pad of a semiconductor element and an electrode on a carrier substrate are connected via a film-like resin. A carrier substrate having a concave portion having a tapered inclined portion and an electrode corresponding to the electrode pad of the semiconductor element in the concave portion is used, and the concave portion of the carrier substrate has an area equivalent to the bottom area of the concave portion. The surface of the semiconductor element on which the electrode pad is formed is pressed against the concave portion of the carrier substrate on which the resin film is placed to connect the electrode pad of the semiconductor element and the electrode on the carrier substrate. The main thing is to do.
[0034]
Hereinafter, an embodiment of a method for manufacturing a semiconductor device of the present invention will be described with reference to the drawings.
[0035]
4 to 8 are cross-sectional views showing the method for manufacturing the semiconductor device of this embodiment.
[0036]
First, as shown in FIG. 4, a semiconductor element 1 to be flip-chipd with respect to a substrate is prepared, and protruding electrodes 2 (bumps) are respectively formed on a plurality of electrode pads (not shown) on the semiconductor element 1. Form. In this step, bump leveling is further performed in order to make the height of the top of the protruding electrode 2 constant. In this leveling, the height of the protruding electrode 2 is increased by leveling using a flat plate jig. The leveling is adjusted to approximately 50 [μm].
[0037]
Next, as shown in FIG. 5, a recess 7 having a tapered portion 6 with a stepped portion on the upper surface, a wiring electrode corresponding to the electrode pad of the semiconductor element in the recess 7 and the wiring on the bottom surface A carrier substrate 8 having an electrode and an external electrode 3 connected by a via hole inside the substrate is prepared, and a resin film 5 having an area equivalent to the bottom area of the recess 7 and an equivalent shape in the recess 7 of the carrier substrate 8. Is placed. In this embodiment, since the resin film 5 having the same area as the recess 7 and similar to the semiconductor element to be mounted is used, the positioning of the resin film 5 is performed in a self-alignment manner, and the positioning accuracy varies. Resin (resin film) that escapes outward when pressed during connection of the semiconductor element / carrier substrate can be made uniform. The resin film 5 placed here is an insulating resin film mainly composed of an epoxy resin, and a sheet having a thickness of 40 [μm] is used. Depending on the thickness (step) and the desired covering area of the side end face of the semiconductor element, it may be about 100 [μm].
[0038]
Next, as shown in FIG. 6, the surface of the semiconductor element 1 on which the protruding electrode 2 is formed is pressed against the concave portion 7 of the carrier substrate 8 on which the resin film 5 is placed, and the protruding electrode 2 of the semiconductor element 1 The electrode on the upper surface of the carrier substrate 8 is connected. This process is performed under heating conditions. When the carrier substrate 8 is a ceramic substrate, the temperature is 220 [° C.], and when the carrier substrate 8 is a resin substrate, the temperature is 180 [° C.]. The pressing time for this is several tens [sec] of about 20 [sec].
[0039]
Here, as shown in FIG. 7, when the semiconductor element 1 is pressed against the carrier substrate 8 with the resin film 5 interposed (arrow A) in connection pressing, the carrier substrate 8 side is heated. Therefore, the resin film 5 is softened, and the resin spreads by pressing and escapes outward (arrow B). In the process of escaping to the outside, the resin follows the shape of the inclined portion 6 of the concave portion 7 of the carrier substrate 8 without receiving excessive resistance, and remains at the boundary portion between the inclined portion 6 and the carrier substrate 8 by the surface tension. . In addition, when covering the side part of the semiconductor element 1 with resin, it is possible to increase the thickness of the resin film 5 and increase the amount of resin. However, if the resin film 5 having an excessive thickness is used, the resin may protrude from the recess 7, and therefore a resin film having an optimal thickness is appropriately used.
[0040]
Therefore, as shown in FIG. 8, the upper surface has a recess 7 having an inclined portion 6 having a tapered step portion, a wiring electrode (not shown) on the surface in the recess, and the wiring electrode and the substrate on the bottom surface. A carrier substrate 8 having an external electrode 3 connected by an internal via hole, and placed on a concave portion 7 of the carrier substrate, a wiring electrode of the substrate and an electrode pad on the main surface thereof are connected via a protruding electrode 2. Thus, a flip chip mounting type semiconductor device comprising the semiconductor element 1 and the resin part 9 provided between the semiconductor element 1 and the recess 7 of the carrier substrate 8 is obtained.
[0041]
As shown in FIG. 9, the semiconductor device manufacturing method of this embodiment forms the resin 9 between the semiconductor element 1 and the carrier substrate 8 reliably and uniformly without excessive protrusion, and deteriorates the adhesive strength between the two. It is possible to obtain a semiconductor device that prevents the above.
[0042]
Of course, as shown in FIG. 10, the resin portion 9 may be formed so as to be flush with the height of the upper surface of the carrier substrate 8. In this case, the thickness of the interposed resin film is increased and the amount of resin is increased. It is possible by making more. By adopting such a structure, it is possible to further prevent the deterioration of the adhesive strength between the semiconductor element 1 / carrier substrate 8 and to improve the reliability.
[0043]
In this embodiment, as the carrier substrate, an insulating electrode having a plurality of external electrodes as external connection lands formed on the bottom surface and wiring electrodes electrically connected to the external electrodes by internal vias on the surface. Although it is a substrate, the carrier substrate may be a mother mounting substrate such as a printed circuit board.
[0044]
As described above, in the semiconductor device of the present embodiment, since the resin portion is interposed in the tapered recess, the resin between the semiconductor element / carrier substrate is reliably formed while suppressing excessive protrusion, A semiconductor device can be realized in which the deterioration of the adhesive strength between them is prevented.
[0045]
In the method of manufacturing a semiconductor device, a resin film having a similar shape that is equal to or smaller than the bottom area of the concave portion and larger than the area of the semiconductor element is placed in the concave portion of the carrier substrate. Thus, positioning is performed, variation in positioning accuracy is suppressed, and a resin film that escapes outward even when pressed when the semiconductor element / carrier substrate is connected can be made uniform. Further, since the concave portion of the carrier substrate is a concave portion with a stepped portion, the resin film that escapes outward by the pressure at the time of connection of the semiconductor element / carrier substrate escapes according to the tapered shape. Since it spreads, the resin film which escapes outward can be made uniform and reliably formed in the recess. Therefore, local application can be avoided even by applying stress, and the reliability as a product can be prevented from being impaired.
[0046]
【The invention's effect】
As described above, the semiconductor device of the present invention is a semiconductor device in which the resin between the semiconductor element and the carrier substrate is reliably formed while suppressing excessive protrusion, and deterioration of the adhesive strength between the two is prevented. Further, the semiconductor device has a resin interposed between the semiconductor element and the carrier substrate with high positional accuracy.
[0047]
Further, according to the method for manufacturing a semiconductor device of the present invention, in order to place a resin film having a similar shape, which is equal to or smaller than the area of the bottom of the concave portion and larger than the area of the semiconductor element, in the concave portion of the carrier substrate, Positioning is performed in a self-aligning manner, and variations in positioning accuracy can be suppressed, and a resin film that escapes outward even when pressed when the semiconductor element / carrier substrate is connected can be made uniform. Therefore, it is possible to prevent the deterioration of the adhesive strength between the semiconductor element / carrier substrate and to realize a semiconductor device in which a resin is interposed between the semiconductor element and the carrier substrate with high positional accuracy.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view illustrating a semiconductor device according to an embodiment of the present invention. FIG. 2 is a cross-sectional view illustrating a semiconductor device according to an embodiment of the present invention. FIG. 4 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 5 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 7 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 8 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 9 is a plan view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 10 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 12 is a cross-sectional view showing a manufacturing method of a conventional semiconductor device. 13 is a cross-sectional view showing a conventional method for manufacturing a semiconductor device. FIG. 14 is a cross-sectional view showing a method for manufacturing a conventional semiconductor device. FIG. 15 is a plan view showing problems of the conventional semiconductor device. Sectional drawing showing problems of semiconductor device
DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Protruding electrode 3 External electrode 4 Carrier substrate 5 Resin film 6 Inclined part 7 Recessed part 8 Carrier substrate 9 Resin part 10 Heat radiation adhesive 11 Heat radiation member

Claims (7)

平坦な下面に外部電極を形成し、上面に段差部分が傾斜をなした凹部を有し、前記凹部内の面に配線電極を有したキャリア基板と、
前記キャリア基板の前記凹部に載置され、突起電極を介して前記配線電極と接続された半導体素子と、
前記半導体素子と前記キャリア基板の凹部との間に設けられた樹脂部とよりなることを特徴とする半導体装置。 To form external electrodes on the flat lower surface, having a recess step portion on the upper surface were Na of tilt oblique, and the carrier substrate having a wiring electrode on a surface of the recess,
Is placed in the recess of the carrier substrate, a semiconductor element connected to the wiring electrode through the collision force electrodes,
A semiconductor device comprising: a resin portion provided between the semiconductor element and a concave portion of the carrier substrate. 半導体素子の面とキャリア基板上面との間に放熱性接着剤を介して放熱板が設けられていることを特徴とする請求項１に記載の半導体装置。  The semiconductor device according to claim 1, wherein a heat radiating plate is provided between the surface of the semiconductor element and the upper surface of the carrier substrate via a heat radiating adhesive. 樹脂部は、半導体素子の突起電極の形成された面と側面とを封止していることを特徴とする請求項１に記載の半導体装置。The semiconductor device according to claim 1, wherein the resin portion seals a surface and a side surface on which the protruding electrode of the semiconductor element is formed. キャリア基板の上面の高さと同一面まで樹脂部が形成されていることを特徴とする請求項１に記載の半導体装置。2. The semiconductor device according to claim 1, wherein the resin portion is formed up to the same level as the height of the upper surface of the carrier substrate. 平坦な下面に外部電極を形成し、上面に段差部分が傾斜をなした凹部を有し、前記凹部内の面に配線電極を有したキャリア基板を用意する工程と、
前記キャリア基板の前記凹部に樹脂を載置する工程と、
半導体素子の電極パッドが形成された面を前記キャリア基板の前記凹部に対して押圧し、前記半導体素子の前記電極パッドと前記キャリア基板上の前記配線電極とを接続する工程とよりなることを特徴とする半導体装置の製造方法。 To form external electrodes on the flat lower surface, the steps of the stepped portion on the upper surface has a recess that name the tilt oblique, providing a carrier substrate having a wiring electrode on a surface of the recess,
A step of placing the resin in the recess of said carrier substrate,
A surface electrode pads are formed of a semi-conductor element is pressed against the concave portion of the front Symbol carrier substrate, the electrode pad and more becomes possible and the step of connecting the wiring electrodes of the carrier substrate of said semiconductor device A method of manufacturing a semiconductor device. 半導体素子の電極パッド上に突起電極を形成する工程と、
上面に段差部分が傾斜をなした凹部と、前記凹部内に前記半導体素子の前記電極パッドと対応した配線電極と、下面に前記配線電極と電気的に接続した外部電極とを有したキャリア基板を用意する工程と、
前記キャリア基板の前記凹部に樹脂フィルムを載置する工程と、
前記半導体素子の前記突起電極が形成された面を前記樹脂フィルムが載置された前記キャリア基板の前記凹部に対して押圧し、前記半導体素子の前記突起電極と前記配線電極とを接続する工程とよりなることを特徴とする半導体装置の製造方法。Forming a protruding electrode on the electrode pad of the semiconductor element;
A recess step portion has name the inclined obliquely to the upper surface, the electrode pad and the wiring electrodes corresponding carrier group and an external electrode connected the wiring electrode electrically to the lower surface of the semiconductor element in the recess Preparing a plate ;
A step of placing the tree fat film in the recess of the carrier substrate,
A step of the said surface on which protruding electrodes are formed of the semiconductor device is pressed against the recess of the carrier substrate to the resin film is placed, connecting the protruding electrode and the wiring electrode of the semiconductor element A method for manufacturing a semiconductor device, comprising: 半導体素子の突起電極が形成された面を樹脂フィルムが載置されたキャリア基板の凹部に対して押圧し、前記半導体素子の前記突起電極と前記キャリア基板の配線電極とを接続する工程は、加熱状況下で行うことを特徴とする請求項６に記載の半導体装置の製造方法。The step of pressing the surface of the semiconductor element on which the protruding electrode is formed against the concave portion of the carrier substrate on which the resin film is placed, and connecting the protruding electrode of the semiconductor element and the wiring electrode of the carrier substrate is performed by heating The method for manufacturing a semiconductor device according to claim 6 , wherein the method is performed under a situation.
JP18876099A 1999-07-02 1999-07-02 Semiconductor device and manufacturing method thereof Expired - Fee Related JP3879319B2 (en)

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