JP3861338B2 - Method for manufacturing printed wiring board - Google Patents

Method for manufacturing printed wiring board Download PDF

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Publication number
JP3861338B2
JP3861338B2 JP24114396A JP24114396A JP3861338B2 JP 3861338 B2 JP3861338 B2 JP 3861338B2 JP 24114396 A JP24114396 A JP 24114396A JP 24114396 A JP24114396 A JP 24114396A JP 3861338 B2 JP3861338 B2 JP 3861338B2
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Japan
Prior art keywords
layer
resin
insulating
conductor circuit
insulating resin
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JPH1065317A (en
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雅一 青山
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Ibiden Co Ltd
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Ibiden Co Ltd
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  • Manufacturing Of Printed Wiring (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

【0001】
【技術分野】
本発明は,表面が平坦な絶縁層を形成することができるプリント配線板の製造方法に関する。
【0002】
【従来技術】
従来,プリント配線板としては,例えば,図14に示すごとく,基板91の表面に導体回路92を形成し,これらを絶縁層93により被覆したものがある。
絶縁層93の被覆は,ロールコータ塗布法により行う。これは,一対のロールに絶縁性樹脂を塗布し,これらを,導体回路92を形成した基板91の両側面に接触させ荷重をかけながら転動させることにより,絶縁性樹脂を基板91の表面に写す方法である。
【0003】
絶縁性樹脂を塗布した後には,絶縁性樹脂の中の溶剤を揮発させて絶縁性樹脂を乾燥させる。乾燥の程度は,絶縁性樹脂の塗布面を指で触ったときに絶縁性樹脂が付着しない程度とする。これにより,基板91の表面に,絶縁性樹脂からなる絶縁層93が形成される。
【0004】
【解決しようとする課題】
しかしながら,上記従来のプリント配線板においては,図14に示すごとく,導体回路92の厚みに比例して,絶縁層93の表面が凹凸にうねる。この凹凸は,絶縁層93の表面に導体回路を形成するときに,セミアディティブ法の場合には露光かぶりが発生し,またフルアディティブ法の場合にはめっき後の研磨残りが発生するという不具合をもたらす。
【0005】
本発明はかかる従来の問題点に鑑み,表面が平坦な絶縁層を形成することができるプリント配線板の製造方法を提供しようとするものである。
【0006】
【課題の解決手段】
請求項1の発明は,基板の表面に導体回路を形成し,次いで,該導体回路を含めて上記基板の表面に絶縁層を被覆するプリント配線板の製造方法であって
上記導体回路表面へ黒化層を形成した後に,上記基板の表面における,隣接する上記導体回路の間に,埋込用樹脂を埋め込む工程と,
該埋込用樹脂及び上記導体回路の表面全体に,上記黒化層を保護する表面処理用材料の第1の絶縁性樹脂を塗布して第1の絶縁性樹脂層を形成する工程と
上記第1の絶縁性樹脂の成分にシリカフィラーを添加した第2の絶縁性樹脂を,上記第1の絶縁性樹脂層の表面に塗布して第2の絶縁性樹脂層を形成する工程と
上記第1の絶縁性樹脂の成分にエポキシ樹脂フィラーを添加した第3の絶縁性樹脂を,上記第2の絶縁性樹脂層の表面に塗布して第3の絶縁性樹脂層を形成する工程と
を含むことを特徴とするプリント配線板の製造方法である。
【0007】
この発明の作用効果について説明する。
本発明においては,隣接する導体回路の間に,埋込用樹脂を設けている。隣接する導体回路の間は,導体回路の表面よりも低く凹状に窪んでいる。そのため,この凹状の導体回路の間に埋込用樹脂を埋め込むことにより,埋込用樹脂の表面が導体回路の表面の高さに近くなり,両者間の高さが近似することとなる。それ故,これらの表面に絶縁性樹脂を塗布することにより,表面が平坦な絶縁層を形成できる。
【0008】
本発明は特にロールコータ法により絶縁性樹脂を塗布する場合にも,絶縁層の表面を平坦にすることができる。
なお,本発明は,セミアディティブ法,フルアディティブ法を始めとして,導体回路を有するプリント配線板のあらゆる製造方法において適用できる。
【0009】
次に,上記埋込用樹脂の埋め込みは,スクリーン印刷により行うことが好ましい。これにより,埋込用樹脂の埋め込みを容易に行うことができる。
【0010】
また,請求項2の発明のように,上記埋込用樹脂の埋め込みは,スクリーン印刷により行い,かつ,当該スクリーン印刷は,隣接する導体回路の間よりも狭いメッシュ部を有するスクリーンを用いることが好ましい。ここにメッシュ部とは,埋込用樹脂が通過する印刷可能部分をいう。
これにより,メッシュ部を通過した埋込用樹脂が,導体回路の間において,メッシュ部よりも外側に回り込み,埋込用樹脂の表面が平坦となる。そのため,平坦な埋込用樹脂の表面に絶縁性樹脂を被覆することによって,より平坦な絶縁層を形成することができる。
また,これにより,導体回路の端部付近の表面に埋込用樹脂が付着しない。そのため,その後に導体回路と絶縁性樹脂との密着性を高めるための表面処理用材料を導体回路に塗布することによって,該表面処理用材料が導体回路の表面全体を均一に被覆する。それ故,絶縁性樹脂と導体回路との密着性が確実に向上する。
【0011】
なお,200μm以上の間隔を有する,隣接する導体回路の間には,埋込用樹脂を埋め込むことが好ましい。これにより,間隔が200μm未満の導体回路の間であれば,埋込用樹脂を埋め込まなくても,その後に塗布する絶縁性樹脂のみで十分な表面平坦性を有する絶縁層を形成することができるからである。
【0012】
また,隣接する導体回路の間の間隔が10mm以下の場合には埋込用樹脂を埋め込むことが好ましい。10mm以下の間隔を有する導体回路の間に埋込用樹脂を埋め込むことによって,たとえ間隔が10mmを越える導体回路の間に埋込用樹脂を埋め込まなくても,表面全体が平坦な絶縁層を形成できる。
【0013】
また,上記埋込用樹脂は,上記導体回路の高さの少なくとも90%以上の高さまで埋め込むことが好ましい。これにより,絶縁層の表面をより平坦にすることができる。一方,90%未満の高さまでしか埋め込まない場合には,絶縁層の表面が凹凸にうねるおそれがある。
また,埋込用樹脂は,導体回路の高さの110%以下の高さまで埋め込むことが好ましい。これにより,絶縁層の表面をより平坦にすることができる。
【0014】
また,隣接する上記導体回路の間に埋め込んだ埋込用樹脂は,その表面が平坦であることが好ましい。これにより,上記平坦な埋込用樹脂及び導体回路の表面に絶縁性樹脂を塗布した場合,絶縁層の表面をより平坦にすることができる。
【0015】
また,上記埋込用樹脂を埋め込んだ後には,該埋込用樹脂を乾燥し,表面研磨してその表面を平坦となし,しかる後に上記絶縁性樹脂を塗布することが好ましい。これにより,埋込用樹脂の表面を平坦にすることができ,更には絶縁性樹脂層の表面をもより平坦に形成することができる。
【0016】
次に,請求項3の発明のように,上記絶縁層を形成した後,該絶縁層にバイアホールを形成し,次いで,該バイアホールの内壁及び絶縁層の表面を粗化液に浸漬することにより粗化し,次いで,金属めっき処理を行って上記バイアホールの内壁には導体層を,また上記絶縁層の表面には導体回路を形成するに当たり,上記埋込用樹脂は粗化液に溶解する性質を有することが好ましい。これにより,導体回路の表面に上記埋込用樹脂の一部が付着した場合にも,上記粗化処理の際に,埋込用樹脂が絶縁性樹脂中の溶解性成分と共に溶解して,導体回路の表面が露出する。そのため,上記金属めっき処理を行うことによって,露出した導体回路の表面に確実にバイアホール用の導体層が形成される。それ故,バイアホール用の導体層との電気接続信頼性が向上する。
【0017】
【発明の実施の形態】
実施形態例1
本発明の実施形態例にかかるプリント配線板の製造方法について,図1〜図9を用いて説明する。
本例により製造されるプリント配線板10は,図1に示すごとく,基板7の表面に,内層回路としての導体回路6を設けて,これらの表面に絶縁層2を被覆したものである。絶縁層2には,導体回路6の表面に向けてバイアホール20が開口している。バイアホール20の内部には,導体回路6と導通する導体層4が設けられている。
また,絶縁層2の表面には,外層回路としての導体回路40が設けられている。
【0018】
次に,上記プリント配線板の製造方法の概要について説明する。まず,基板7の表面に,内層回路となる導体回路6を形成する(図2)。次に,上記基板7の表面における,隣接する導体回路6の間に,埋込用樹脂1を埋め込む(図3)。次いで,埋込用樹脂1及び導体回路6の表面の全面に絶縁層2を形成する(図5)。
【0019】
次いで,絶縁層2にバイアホール20を形成する(図6)。次いで,セミアディティブ法により,バイアホール20の内壁には導体層4を形成すると共に絶縁層2の表面には導体回路40を形成する(図8,図9,図1)。これにより,プリント配線板10を得る。
【0020】
次に,これを詳細に説明する。
まず,出発材料として,樹脂製の基板の表面に,厚み30〜40μmの銅箔をラミネートしてなる銅張積層板を準備する。次に,銅箔をパターン状にエッチングして,図2に示すごとく,基板7の表面に,内層回路となる導体回路6を形成する。
次いで,上記基板7に黒化処理を行い,導体回路6の表面全体に,厚み0.2〜3μmの針状の黒化層を形成する(図示略)。
【0021】
また,感光性を有する3種の絶縁性樹脂V1,V2,V3,及び埋込用樹脂を,以下のようにして準備する。
絶縁性樹脂V1は,後述するように,黒化層を保護すると共に導体回路と絶縁性樹脂層との密着性を向上させるための表面処理用材料である。かかる絶縁性樹脂V1は,ビスフェノールA型エポキシ樹脂と,イミダゾール系硬化剤とを混合したものを,3本ロールで均一に混練し,その混練物に所定量の溶剤を添加することによって調製する。
【0022】
絶縁性樹脂V2は,絶縁層2の中心部を形成するための材料である。かかる絶縁性樹脂V2は,上記絶縁性樹脂V1の成分に,更にシリカフィラーを添加したものを,3本ロールで均一に混練し,その混練物に所定量の溶剤を添加することによって調製する。
【0023】
絶縁性樹脂V3は絶縁層とその表面に形成すべき導体回路との接着性を高めるための材料である。かかる絶縁性樹脂V3は,上記絶縁性樹脂V1の成分からシリカの代わりにエポキシ樹脂フィラーを添加したものを,3本ロールで均一に混練し,その混練物に所定量の溶剤を添加することによって調製する。
【0024】
埋込用樹脂は,粗化液に溶解する性質を有する樹脂である。かかる埋込用樹脂は,上記絶縁性樹脂V2と同様の組成である。
なお,埋込用樹脂としては,上記の他に,例えば,ノボラック型エポキシ樹脂等を用いることもできる。
【0025】
次に,図3に示すごとく,スクリーン印刷により,基板7の表面における,隣接する導体回路6の間に,埋込用樹脂1を埋め込み,指触乾燥することによって,埋込用樹脂1を半硬化させる。上記指触乾燥とは,埋込用樹脂を指で触ったときに埋込用樹脂が指に付着しない程度になるまで溶剤を除去する乾燥をいう。
指触乾燥状態の埋込用樹脂1の厚みは30〜40μmであり,導体回路6の厚みとほぼ同じである。スクリーン印刷において用いるスクリーン8は,隣接する導体回路6の間よりも狭いメッシュ部80と,導体回路6を覆うマスク部81とからなる。
【0026】
導体回路6の端部とメッシュ部80の端部との間には0.3〜0.5mmの間隙Aが設けられている。
一方,図4に示すごとく,間隙Aが0.3mm未満の場合には,スクリーンのズレ等により,導体回路6の端部付近の表面に埋込用樹脂1が付着するおそれがあり,また埋込用樹脂1の表面が平坦になる場合がある。しかし,この場合にも,埋込用樹脂1の表面をベルトサンダー等の手段により研磨することにより,導体回路6の端部付近の表面に付着した埋込用樹脂1を除去することができ,埋込用樹脂1の表面を平坦にすることもできる。
逆に,上記間隙Aが0.5mmを越える場合には,導体回路6の間に埋込用樹脂未充填部が幅広の窪みとなって発生し,これにより,平坦な絶縁層を形成することができないおそれがある。
【0027】
次に,絶縁性樹脂V1が満たされたプレディップ槽内に,黒化処理後の上記基板7を静かにディップする。ディップ条件は,70〜80℃,5〜15分間である。次いで,基板7を静かに引き上げ,次いで表面に付着した絶縁性樹脂V1を指触乾燥する。これにより,図5に示すごとく,基板7の表面に,導体回路6を覆う薄層の絶縁性樹脂層21を形成する。
【0028】
次いで,基板7に対し,ロールコータを用いて絶縁性樹脂V2を塗布する。次いで,80℃,40分間の指触乾燥を行うことによって,絶縁性樹脂V2を半硬化させる。これにより,上記絶縁性樹脂層21の表面に,厚み30〜80μmの絶縁性樹脂層22を形成する。
【0029】
次いで,絶縁性樹脂層22が形成された基板7に対し,ロールコータを用いて絶縁性樹脂V3を塗布する。その後,80℃,40分間の指触乾燥を行うことによって,塗布された絶縁性樹脂V3を半硬化させる。これにより,上記絶縁性樹脂22の表面に,厚み20〜50μmの絶縁性樹脂層23を形成する。
【0030】
以上により,埋込用樹脂1及び導体回路6の表面全体に,絶縁性樹脂層21,22,23からなる絶縁層2を形成する。
なお,表面処理用材料である絶縁性樹脂V1は,固形分の重量比が10%と少ないため,流動性に富み,導体回路6の表面の黒化層を均一に被覆して保護する。この状態で,次工程の絶縁性樹脂V2,V3のロールコータによる塗布を行うことにより,ロールが導体回路6の表面に当接する影響が緩和される。また,絶縁性樹脂層21は0.3〜0.5μmの表面粗さを有するため,導体回路と絶縁性樹脂層22との密着強度が向上する。
【0031】
次いで,図6に示すごとく,一般的なフォトリソグラフィの手法に従って露光,現像を行うことにより,絶縁層2にバイアホール20を形成する。このとき,上記導体回路6の上面の一部が絶縁層2から露出する。
次に,上記露光,現像の後には,光・熱硬化工程を行い,埋込用樹脂1及び絶縁層2を本硬化する。
【0032】
次いで,上記基板7を,クロム酸等の粗化液で処理することによって,絶縁層2における樹脂フィラーを選択的に溶解する。これにより,図7に示すごとく,絶縁層2の表面及びバイアホール20の内壁に粗化面29が形成される。また,導体回路6の表面に存在する埋込用樹脂1も溶解,除去される。
【0033】
次に,図8に示すごとく,絶縁層2の表面及びバイアホール20の内壁に,触媒核を付与した後,無電解銅めっき層41を形成する。次いで,絶縁層2の表面における,導体回路を形成しない部分に,レジスト膜5を形成する。
次いで,無電解銅めっき層41の表面における,バイアホール20の内壁及び導体回路形成部分に,電解銅めっき層42を形成する。
【0034】
次いで,レジスト膜5を除去し,その後クイックエッチングを行い,導体回路を形成しない部分に形成された無電解めっき膜41を除去する。これにより,図9,図1に示すごとく,バイアホール20の内壁が無電解銅めっき層41及び電解銅めっき層42からなる導体層4により被覆されると共に,絶縁層2の表面に無電解銅めっき層41及び電解銅めっき層42からなる導体回路40が形成される。
以上により,上記プリント配線板10が得られる。
【0035】
次に,本例の作用効果について説明する。
本例においては,図3に示すごとく,隣接する導体回路6の間に,埋込用樹脂1を設けている。隣接する導体回路6の間は,導体回路6の表面よりも低く凹状に窪んでいる。そのため,この凹状の導体回路6の間に埋込用樹脂1を埋め込むことにより,埋込用樹脂1の表面が導体回路6の表面の高さに近くなり,両者の高さが近似することとなる。それ故,これらの表面に絶縁性樹脂を塗布することにより,表面が平坦な絶縁層2を形成できる。
【0036】
また,埋込用樹脂は,スクリーン印刷により,隣接する導体回路6の間に埋め込んでいる。そのため,埋込用樹脂の埋め込みを容易に行うことができる。
また,図3に示すごとく,スクリーン印刷において用いるスクリーン8は,隣接する導体回路6の間よりも狭いメッシュ部80を有する。そのため,メッシュ部80を通過した埋込用樹脂1が,導体回路6の間において,メッシュ部80よりも外側に回り込み,絶縁層2の表面をより平坦にすることができる。また,導体回路6の端部付近の表面に埋込用樹脂が付着しない。そのため,導体回路6の表面全体に薄層状の絶縁性樹脂層21を被覆することができ,中心部分をなす絶縁性樹脂層22と導体回路6との密着性を向上させることができる。
【0037】
また,埋込用樹脂は粗化液に溶解する性質を有する。そのため,導体回路6の表面に埋込用樹脂1の一部が付着した場合にも,粗化処理の際に,埋込用樹脂1が絶縁層2の中の樹脂フィラーと共に溶解して,導体回路6の表面が露出する。そのため,無電解銅めっき及び電解銅めっきを行うことによって,露出した導体回路6の表面に確実にバイアホール用の導体層4が形成される。それ故,導体回路6とバイアホール20を被覆する導体層4との電気接続信頼性が向上する。
【0038】
なお,本例においては,埋込用樹脂のスクリーン印刷,指触乾燥をした後に,絶縁性樹脂V1による導体回路の表面処理を行ったが,埋込用樹脂のスクリーン印刷をした後に,絶縁性樹脂V1による導体回路の表面処理,埋込用樹脂の指触乾燥をしてもよい。
【0039】
実施形態例2
本例においては,図10に示すごとく,導体回路6と埋込用樹脂1との間に一定の間隙100を設けている点が,上記実施形態例1と相違する。
導体回路6と埋込用樹脂1との間に形成される間隙100は,0〜200μmであり,両者の間は凹状に窪んでいる。この間隙100の内部には,絶縁性樹脂が塗布工程の際に入り込む。また,間隙100に絶縁性樹脂が入り込んだ場合にも,間隙100付近の絶縁層2の表面は平坦を維持することが出来る。
【0040】
一方,間隙100が200μmを越える場合には,導体回路6の間に埋込用樹脂未充填部が幅広の窪みとなって発生し,これにより,平坦な絶縁層を形成することができない場合がある。
その他は,上記実施形態例1と同様である。
本例においても,実施形態例1と同様の効果を得ることが出来る。
【0041】
実施形態例3
本例においては,図11に示すごとく,導体回路の間101の間隔が200μm以上である場合には埋込用樹脂1を埋め込み,間隔が200μm未満の導体回路の間102には埋込用樹脂を埋め込まない。
200μm以上の間隔を有する導体回路6の間101に埋込用樹脂1を埋め込むことにより,表面が平坦な絶縁層2を形成することができる。一方,間隔が200μm未満の導体回路の間102であっても,埋込用樹脂を埋め込んでもよいが,埋め込まない場合にも絶縁層2を平坦に形成することができる。
【0042】
実施形態例4
本例においては,図12,図13に示すごとく,外層回路である導体回路40の間に永久レジスト膜51を設けている点,導体回路40の形成を,セミアディティブ法の代わりに,フルアディティブ法により行っている点が,上記実施形態例1と異なる。
【0043】
即ち,図13に示すごとく,絶縁層2の表面及びバイアホール20の内壁を粗化表面29とした後,永久レジスト膜51を形成する。その後,無電解銅めっき及び電解銅めっきを行い,絶縁層2の表面には導体回路40を,バイアホールの内壁には導体層4を形成する。
その他は,実施形態例1と同様である。
【0044】
本例においても,導体回路6の間に埋込用樹脂1を埋め込んだ後に絶縁層2を形成しているため,実施形態例1と同様に絶縁層2の表面を平坦に形成することができる。また,その他の点においても,実施形態例1と同様の効果を得ることが出来る。
【0045】
【発明の効果】
本発明によれば,表面が平坦な絶縁層を形成することができるプリント配線板の製造方法を提供することができる。
【図面の簡単な説明】
【図1】実施形態例1における,プリント配線板の断面図。
【図2】実施形態例1のプリント配線板の製造方法における,導体回路を形成した基板の断面図。
【図3】図2に続く,メッシュ部が導体回路の間よりも狭いスクリーンを用いて,埋込用樹脂を導体回路の間に埋め込む方法を示すための,基板の断面図。
【図4】メッシュ部が導体回路の間と同程度のスクリーンを用いて,埋込用樹脂を導体回路の間に埋め込む方法を示すための,基板の断面図。
【図5】図3に続く,導体回路及び埋込用樹脂の表面を絶縁層により被覆した基板の断面図。
【図6】図5に続く,バイアホールを形成した基板の断面図。
【図7】図6に続く,絶縁層に対して粗化処理を行った基板の断面図。
【図8】図7に続く,セミアディティブ法による導体回路及び導体層の形成方法を示すための,基板の断面図。
【図9】図8に続く,クイックエッチングを行った後の基板の断面図。
【図10】実施形態例2における,プリント配線板の断面図。
【図11】実施形態例3における,プリント配線板の断面図。
【図12】実施形態例4における,プリント配線板の断面図。
【図13】実施形態例4における,フルアディティブ法による導体回路及び導体層の形成方法を示すための,基板の断面図。
【図14】従来例における,プリント配線板の製造方法を示す説明図。
【符号の説明】
1...埋込用樹脂,
10...プリント配線板,
2...絶縁層,
20...バイアホール,
21,22,23...絶縁性樹脂層,
4...導体層,
40,6...導体回路,
41...無電解銅めっき層,
42...電解銅めっき層,
5...レジスト膜,
51...永久レジスト膜,
7...基板,
8...スクリーン,
80...メッシュ部,
[0001]
【Technical field】
The present invention relates to a method for manufacturing a printed wiring board capable of forming an insulating layer having a flat surface.
[0002]
[Prior art]
Conventionally, as a printed wiring board, for example, as shown in FIG. 14, there is one in which a conductor circuit 92 is formed on the surface of a substrate 91 and these are covered with an insulating layer 93.
The insulating layer 93 is covered by a roll coater coating method. This is because the insulating resin is applied to the surface of the substrate 91 by applying an insulating resin to a pair of rolls and rolling them while applying a load while contacting the both sides of the substrate 91 on which the conductor circuit 92 is formed. It is a method of copying.
[0003]
After applying the insulating resin, the solvent in the insulating resin is volatilized and the insulating resin is dried. The degree of drying is such that the insulating resin does not adhere when the insulating resin coating surface is touched with a finger. As a result, an insulating layer 93 made of an insulating resin is formed on the surface of the substrate 91.
[0004]
[Problems to be solved]
However, in the conventional printed wiring board, the surface of the insulating layer 93 is uneven in proportion to the thickness of the conductor circuit 92 as shown in FIG. This unevenness causes a problem that when a conductor circuit is formed on the surface of the insulating layer 93, an exposure fogging occurs in the case of the semi-additive method, and a polishing residue after plating occurs in the case of the full additive method. Bring.
[0005]
In view of the conventional problems, the present invention is intended to provide a method for manufacturing a printed wiring board capable of forming an insulating layer having a flat surface.
[0006]
[Means for solving problems]
The invention of claim 1, a conductor circuit is formed on the surface of the substrate, then, a method for manufacturing a printed wiring board covering the insulating layer on the surface of the substrate including the conductor circuit,
After forming the blackening layer to the conductor circuit surface, the surface of the substrate, between adjacent said conductor circuit, a write-free process to fill the potting,
Applying a first insulating resin as a surface treatment material for protecting the blackening layer to the entire surface of the embedding resin and the conductor circuit to form a first insulating resin layer ;
Applying a second insulating resin obtained by adding a silica filler to the component of the first insulating resin to the surface of the first insulating resin layer to form a second insulating resin layer ;
Applying a third insulating resin obtained by adding an epoxy resin filler to the component of the first insulating resin to the surface of the second insulating resin layer to form a third insulating resin layer; ,
The printed wiring board manufacturing method characterized by including .
[0007]
The effect of this invention is demonstrated.
In the present invention, an embedding resin is provided between adjacent conductor circuits. Between adjacent conductor circuits is recessed lower than the surface of the conductor circuit. Therefore, by embedding the embedding resin between the concave conductor circuits, the surface of the embedding resin is close to the height of the surface of the conductor circuit, and the height between the two is approximated. Therefore, an insulating layer having a flat surface can be formed by applying an insulating resin to these surfaces.
[0008]
In the present invention, the surface of the insulating layer can be flattened even when the insulating resin is applied by the roll coater method.
The present invention can be applied to all methods for manufacturing a printed wiring board having a conductor circuit, including a semi-additive method and a full additive method.
[0009]
Next, the embedding resin is preferably embedded by screen printing. Thereby, embedding resin can be easily embedded.
[0010]
According to a second aspect of the present invention, the embedding resin is embedded by screen printing, and the screen printing uses a screen having a mesh portion narrower than between adjacent conductor circuits. preferable. Here, the mesh portion means a printable portion through which the embedding resin passes.
Thereby, the embedding resin that has passed through the mesh portion wraps outside the mesh portion between the conductor circuits, and the surface of the embedding resin becomes flat. Therefore, a flatter insulating layer can be formed by coating the surface of the flat embedding resin with an insulating resin.
This also prevents the embedding resin from adhering to the surface near the end of the conductor circuit. For this reason, after that, a surface treatment material for improving the adhesion between the conductor circuit and the insulating resin is applied to the conductor circuit, so that the surface treatment material uniformly covers the entire surface of the conductor circuit. Therefore, the adhesion between the insulating resin and the conductor circuit is reliably improved.
[0011]
It is preferable to embed an embedding resin between adjacent conductor circuits having an interval of 200 μm or more. As a result, an insulating layer having sufficient surface flatness can be formed only by an insulating resin applied thereafter without embedding a resin for embedding if the interval is between conductor circuits of less than 200 μm. Because.
[0012]
Further, when the interval between adjacent conductor circuits is 10 mm or less, embedding resin is preferably embedded. By embedding embedding resin between conductor circuits having an interval of 10 mm or less, even if the embedding resin is not embedded between conductor circuits having an interval exceeding 10 mm, a flat insulating layer is formed on the entire surface. it can.
[0013]
The embedding resin is preferably embedded to a height of at least 90% of the height of the conductor circuit. Thereby, the surface of the insulating layer can be made flatter. On the other hand, in the case where it is buried only to a height of less than 90%, the surface of the insulating layer may undulate.
The embedding resin is preferably embedded to a height of 110% or less of the height of the conductor circuit. Thereby, the surface of the insulating layer can be made flatter.
[0014]
Further, it is preferable that the embedding resin embedded between the adjacent conductor circuits has a flat surface. Thereby, when the insulating resin is applied to the surfaces of the flat embedding resin and the conductor circuit, the surface of the insulating layer can be made flatter.
[0015]
Further, after embedding the embedding resin, it is preferable to dry the embedding resin and polish the surface to make the surface flat, and then apply the insulating resin. Thereby, the surface of the embedding resin can be flattened, and further, the surface of the insulating resin layer can be further flattened.
[0016]
Next, as described in claim 3, after forming the insulating layer, a via hole is formed in the insulating layer, and then the inner wall of the via hole and the surface of the insulating layer are immersed in a roughening solution. Then, a metal plating process is performed to form a conductor layer on the inner wall of the via hole and a conductor circuit on the surface of the insulating layer, and the embedding resin is dissolved in the roughening solution. It preferably has properties. As a result, even when a part of the embedding resin adheres to the surface of the conductor circuit, the embedding resin is dissolved together with the soluble component in the insulating resin during the roughening treatment, so that the conductor The surface of the circuit is exposed. Therefore, by performing the metal plating process, a via hole conductor layer is reliably formed on the surface of the exposed conductor circuit. Therefore, the reliability of electrical connection with the conductor layer for the via hole is improved.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
Embodiment 1
The manufacturing method of the printed wiring board concerning the embodiment of this invention is demonstrated using FIGS.
As shown in FIG. 1, the printed wiring board 10 manufactured according to this example is provided with a conductor circuit 6 as an inner layer circuit on the surface of a substrate 7 and covering the surface with an insulating layer 2. A via hole 20 is opened in the insulating layer 2 toward the surface of the conductor circuit 6. Inside the via hole 20, a conductor layer 4 that is electrically connected to the conductor circuit 6 is provided.
A conductor circuit 40 as an outer layer circuit is provided on the surface of the insulating layer 2.
[0018]
Next, an outline of a method for manufacturing the printed wiring board will be described. First, the conductor circuit 6 to be an inner layer circuit is formed on the surface of the substrate 7 (FIG. 2). Next, the embedding resin 1 is embedded between the adjacent conductor circuits 6 on the surface of the substrate 7 (FIG. 3). Next, the insulating layer 2 is formed on the entire surface of the embedding resin 1 and the conductor circuit 6 (FIG. 5).
[0019]
Next, a via hole 20 is formed in the insulating layer 2 (FIG. 6). Next, the conductor layer 4 is formed on the inner wall of the via hole 20 and the conductor circuit 40 is formed on the surface of the insulating layer 2 by the semi-additive method (FIGS. 8, 9, and 1). Thereby, the printed wiring board 10 is obtained.
[0020]
Next, this will be described in detail.
First, as a starting material, a copper clad laminate is prepared by laminating a copper foil having a thickness of 30 to 40 μm on the surface of a resin substrate. Next, the copper foil is etched into a pattern to form a conductor circuit 6 serving as an inner layer circuit on the surface of the substrate 7 as shown in FIG.
Next, the substrate 7 is blackened, and a needle-like blackened layer having a thickness of 0.2 to 3 μm is formed on the entire surface of the conductor circuit 6 (not shown).
[0021]
Further, three types of photosensitive resins V1, V2, V3 having photosensitivity and an embedding resin are prepared as follows.
As will be described later, the insulating resin V1 is a surface treatment material for protecting the blackened layer and improving the adhesion between the conductor circuit and the insulating resin layer. Such an insulating resin V1 is prepared by uniformly kneading a mixture of a bisphenol A type epoxy resin and an imidazole curing agent with three rolls and adding a predetermined amount of solvent to the kneaded product.
[0022]
The insulating resin V2 is a material for forming the central portion of the insulating layer 2. The insulating resin V2 is prepared by uniformly kneading a component obtained by adding a silica filler to the component of the insulating resin V1 with three rolls and adding a predetermined amount of solvent to the kneaded product.
[0023]
The insulating resin V3 is a material for improving the adhesion between the insulating layer and the conductor circuit to be formed on the surface thereof. This insulating resin V3 is obtained by uniformly kneading a component of the insulating resin V1 to which an epoxy resin filler is added instead of silica with three rolls, and adding a predetermined amount of solvent to the kneaded product. Prepare.
[0024]
The embedding resin is a resin having a property of being dissolved in the roughening solution. Such embedding resin has the same composition as that of the insulating resin V2.
In addition to the above, as the embedding resin, for example, a novolac type epoxy resin or the like can be used.
[0025]
Next, as shown in FIG. 3, by embedding the embedding resin 1 between adjacent conductor circuits 6 on the surface of the substrate 7 by screen printing and drying it by touch, the embedding resin 1 is half-finished. Harden. The finger touch drying means drying in which the solvent is removed until the embedding resin does not adhere to the finger when the embedding resin is touched with the finger.
The thickness of the embedding resin 1 in a dry state of touch is 30 to 40 μm, which is substantially the same as the thickness of the conductor circuit 6. The screen 8 used in screen printing includes a mesh portion 80 that is narrower than between adjacent conductor circuits 6 and a mask portion 81 that covers the conductor circuits 6.
[0026]
A gap A of 0.3 to 0.5 mm is provided between the end of the conductor circuit 6 and the end of the mesh portion 80.
On the other hand, as shown in FIG. 4, when the gap A is less than 0.3 mm, the embedding resin 1 may adhere to the surface near the end of the conductor circuit 6 due to screen misalignment or the like. The surface of the embedding resin 1 may be flat. However, also in this case, the surface of the embedding resin 1 can be polished by means such as a belt sander, so that the embedding resin 1 attached to the surface near the end of the conductor circuit 6 can be removed. The surface of the embedding resin 1 can be flattened.
On the other hand, when the gap A exceeds 0.5 mm, the filling resin unfilled portion is generated as a wide depression between the conductor circuits 6, thereby forming a flat insulating layer. You may not be able to.
[0027]
Next, the substrate 7 after the blackening treatment is gently dipped into the pre-dip tank filled with the insulating resin V1. The dip conditions are 70 to 80 ° C. and 5 to 15 minutes. Next, the substrate 7 is gently pulled up, and then the insulating resin V1 attached to the surface is dried by touch. As a result, as shown in FIG. 5, a thin insulating resin layer 21 covering the conductor circuit 6 is formed on the surface of the substrate 7.
[0028]
Next, the insulating resin V2 is applied to the substrate 7 using a roll coater. Next, the insulating resin V2 is semi-cured by performing touch drying at 80 ° C. for 40 minutes. Thereby, the insulating resin layer 22 having a thickness of 30 to 80 μm is formed on the surface of the insulating resin layer 21.
[0029]
Next, the insulating resin V3 is applied to the substrate 7 on which the insulating resin layer 22 is formed using a roll coater. Thereafter, the applied insulating resin V3 is semi-cured by performing finger touch drying at 80 ° C. for 40 minutes. Thereby, an insulating resin layer 23 having a thickness of 20 to 50 μm is formed on the surface of the insulating resin 22.
[0030]
As described above, the insulating layer 2 composed of the insulating resin layers 21, 22, and 23 is formed on the entire surface of the embedding resin 1 and the conductor circuit 6.
The insulating resin V1, which is a surface treatment material, has a low solids weight ratio of 10%, and thus has a high fluidity, and uniformly covers and protects the blackened layer on the surface of the conductor circuit 6. In this state, by applying the insulating resins V2 and V3 in the next process using a roll coater, the influence of the roll coming into contact with the surface of the conductor circuit 6 is reduced. Further, since the insulating resin layer 21 has a surface roughness of 0.3 to 0.5 μm, the adhesion strength between the conductor circuit and the insulating resin layer 22 is improved.
[0031]
Next, as shown in FIG. 6, a via hole 20 is formed in the insulating layer 2 by performing exposure and development according to a general photolithography technique. At this time, a part of the upper surface of the conductor circuit 6 is exposed from the insulating layer 2.
Next, after the exposure and development, a photo / thermosetting process is performed to fully cure the embedding resin 1 and the insulating layer 2.
[0032]
Next, the resin filler in the insulating layer 2 is selectively dissolved by treating the substrate 7 with a roughening solution such as chromic acid. As a result, a roughened surface 29 is formed on the surface of the insulating layer 2 and the inner wall of the via hole 20 as shown in FIG. The embedding resin 1 present on the surface of the conductor circuit 6 is also dissolved and removed.
[0033]
Next, as shown in FIG. 8, after applying a catalyst nucleus to the surface of the insulating layer 2 and the inner wall of the via hole 20, an electroless copper plating layer 41 is formed. Next, a resist film 5 is formed on the surface of the insulating layer 2 where no conductor circuit is formed.
Next, an electrolytic copper plating layer 42 is formed on the inner wall of the via hole 20 and the conductor circuit forming portion on the surface of the electroless copper plating layer 41.
[0034]
Next, the resist film 5 is removed, and then quick etching is performed to remove the electroless plating film 41 formed in the portion where the conductor circuit is not formed. Thus, as shown in FIGS. 9 and 1, the inner wall of the via hole 20 is covered with the conductor layer 4 including the electroless copper plating layer 41 and the electrolytic copper plating layer 42, and the surface of the insulating layer 2 is covered with the electroless copper. A conductor circuit 40 including the plating layer 41 and the electrolytic copper plating layer 42 is formed.
Thus, the printed wiring board 10 is obtained.
[0035]
Next, the function and effect of this example will be described.
In this example, as shown in FIG. 3, the embedding resin 1 is provided between the adjacent conductor circuits 6. The space between adjacent conductor circuits 6 is recessed lower than the surface of the conductor circuit 6. Therefore, by embedding the embedding resin 1 between the concave conductor circuits 6, the surface of the embedding resin 1 becomes close to the height of the surface of the conductor circuit 6, and the heights of both are approximated. Become. Therefore, an insulating layer 2 having a flat surface can be formed by applying an insulating resin to these surfaces.
[0036]
The embedding resin is embedded between the adjacent conductor circuits 6 by screen printing. Therefore, the embedding resin can be easily embedded.
Further, as shown in FIG. 3, the screen 8 used in screen printing has a mesh portion 80 that is narrower than between adjacent conductor circuits 6. For this reason, the embedding resin 1 that has passed through the mesh portion 80 wraps outside the mesh portion 80 between the conductor circuits 6, and the surface of the insulating layer 2 can be made flatter. Further, the embedding resin does not adhere to the surface near the end of the conductor circuit 6. Therefore, the entire surface of the conductor circuit 6 can be covered with the thin insulating resin layer 21, and the adhesion between the insulating resin layer 22 forming the central portion and the conductor circuit 6 can be improved.
[0037]
The embedding resin has a property of dissolving in the roughening solution. For this reason, even when a part of the embedding resin 1 adheres to the surface of the conductor circuit 6, the embedding resin 1 is dissolved together with the resin filler in the insulating layer 2 during the roughening treatment, and the conductor The surface of the circuit 6 is exposed. Therefore, by performing electroless copper plating and electrolytic copper plating, the via hole conductor layer 4 is reliably formed on the exposed surface of the conductor circuit 6. Therefore, the electrical connection reliability between the conductor circuit 6 and the conductor layer 4 covering the via hole 20 is improved.
[0038]
In this example, the surface treatment of the conductor circuit with the insulating resin V1 was performed after screen printing of the embedding resin and touch-drying. The conductor circuit may be surface-treated with the resin V1 and the embedding resin may be dried by touching the resin.
[0039]
Embodiment 2
In this example, as shown in FIG. 10, the point that a fixed gap 100 is provided between the conductor circuit 6 and the embedding resin 1 is different from the first embodiment.
A gap 100 formed between the conductor circuit 6 and the embedding resin 1 is 0 to 200 μm, and a recess is recessed between the two. Insulating resin enters the gap 100 during the coating process. Even when an insulating resin enters the gap 100, the surface of the insulating layer 2 near the gap 100 can be kept flat.
[0040]
On the other hand, when the gap 100 exceeds 200 μm, the filling resin unfilled portion is generated as a wide depression between the conductor circuits 6, and thus a flat insulating layer may not be formed. is there.
Others are the same as in the first embodiment.
Also in this example, the same effects as those of the first embodiment can be obtained.
[0041]
Embodiment 3
In this example, as shown in FIG. 11, the embedding resin 1 is embedded when the interval between the conductor circuits 101 is 200 μm or more, and the embedding resin 1 is embedded between the conductor circuits 102 with the interval less than 200 μm. Do not embed.
By embedding the embedding resin 1 in the space 101 between the conductor circuits 6 having an interval of 200 μm or more, the insulating layer 2 having a flat surface can be formed. On the other hand, the embedding resin may be embedded even between the conductor circuits 102 having a distance of less than 200 μm, but the insulating layer 2 can be formed flat even when not embedded.
[0042]
Embodiment 4
In this example, as shown in FIGS. 12 and 13, the permanent resist film 51 is provided between the conductor circuits 40 which are outer layer circuits, and the formation of the conductor circuit 40 is performed in a fully additive manner instead of the semi-additive method. This is different from the first embodiment in that it is performed by the method.
[0043]
That is, as shown in FIG. 13, after making the surface of the insulating layer 2 and the inner wall of the via hole 20 into the roughened surface 29, the permanent resist film 51 is formed. Thereafter, electroless copper plating and electrolytic copper plating are performed to form the conductor circuit 40 on the surface of the insulating layer 2 and the conductor layer 4 on the inner wall of the via hole.
Others are the same as in the first embodiment.
[0044]
Also in this example, since the insulating layer 2 is formed after the embedding resin 1 is embedded between the conductor circuits 6, the surface of the insulating layer 2 can be formed flat as in the first embodiment. . In other respects, the same effects as those of the first embodiment can be obtained.
[0045]
【The invention's effect】
ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the printed wiring board which can form the insulating layer with the flat surface can be provided.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a printed wiring board according to Embodiment 1;
2 is a cross-sectional view of a substrate on which a conductor circuit is formed in the method for manufacturing a printed wiring board according to Embodiment 1. FIG.
3 is a cross-sectional view of a substrate for illustrating a method of embedding an embedding resin between conductor circuits using a screen having a mesh portion narrower than that between conductor circuits, following FIG. 2;
FIG. 4 is a cross-sectional view of a substrate for illustrating a method of embedding an embedding resin between conductor circuits by using a screen having a mesh portion equivalent to that between conductor circuits.
FIG. 5 is a cross-sectional view of the substrate in which the surface of the conductor circuit and the embedding resin is covered with an insulating layer, following FIG. 3;
6 is a cross-sectional view of a substrate on which a via hole is formed, following FIG. 5;
7 is a cross-sectional view of the substrate after the roughening process is performed on the insulating layer, following FIG. 6;
FIG. 8 is a cross-sectional view of a substrate for illustrating a method for forming a conductor circuit and a conductor layer by a semi-additive method following FIG. 7;
FIG. 9 is a cross-sectional view of the substrate after the quick etching, continued from FIG. 8;
10 is a cross-sectional view of a printed wiring board in Embodiment 2. FIG.
11 is a cross-sectional view of a printed wiring board according to Embodiment 3. FIG.
12 is a cross-sectional view of a printed wiring board according to Embodiment 4. FIG.
FIG. 13 is a cross-sectional view of a substrate for illustrating a method for forming a conductor circuit and a conductor layer by a full additive method in Embodiment 4.
FIG. 14 is an explanatory view showing a method for manufacturing a printed wiring board in a conventional example.
[Explanation of symbols]
1. . . Embedding resin,
10. . . Printed wiring board,
2. . . Insulation layer,
20. . . Via hole,
21, 22, 23. . . Insulating resin layer,
4). . . Conductor layer,
40,6. . . Conductor circuit,
41. . . Electroless copper plating layer,
42. . . Electrolytic copper plating layer,
5). . . Resist film,
51. . . Permanent resist film,
7). . . substrate,
8). . . screen,
80. . . Mesh part,

Claims (3)

基板の表面に導体回路を形成し,次いで,該導体回路を含めて上記基板の表面に絶縁層を被覆するプリント配線板の製造方法であって
上記導体回路表面へ黒化層を形成した後に,上記基板の表面における,隣接する上記導体回路の間に,埋込用樹脂を埋め込む工程と,
該埋込用樹脂及び上記導体回路の表面全体に,上記黒化層を保護する表面処理用材料の第1の絶縁性樹脂を塗布して第1の絶縁性樹脂層を形成する工程と
上記第1の絶縁性樹脂の成分にシリカフィラーを添加した第2の絶縁性樹脂を,上記第1の絶縁性樹脂層の表面に塗布して第2の絶縁性樹脂層を形成する工程と
上記第1の絶縁性樹脂の成分にエポキシ樹脂フィラーを添加した第3の絶縁性樹脂を,上記第2の絶縁性樹脂層の表面に塗布して第3の絶縁性樹脂層を形成する工程と
を含むことを特徴とするプリント配線板の製造方法。
The conductor circuit is formed on the surface of the substrate, then, a method for manufacturing a printed wiring board covering the insulating layer on the surface of the substrate including the conductor circuit,
After forming the blackening layer to the conductor circuit surface, the surface of the substrate, between adjacent said conductor circuit, a write-free process to fill the potting,
Applying a first insulating resin as a surface treatment material for protecting the blackening layer to the entire surface of the embedding resin and the conductor circuit to form a first insulating resin layer ;
Applying a second insulating resin obtained by adding a silica filler to the component of the first insulating resin to the surface of the first insulating resin layer to form a second insulating resin layer ;
Applying a third insulating resin obtained by adding an epoxy resin filler to the component of the first insulating resin to the surface of the second insulating resin layer to form a third insulating resin layer; ,
The printed wiring board manufacturing method characterized by including this.
上記埋込用樹脂の埋め込みは,スクリーン印刷により行い,かつ,当該スクリーン印刷は,隣接する導体回路の間よりも狭いメッシュ部を有するスクリーンを用いることを特徴とする請求項1に記載のプリント配線板の製造方法。2. The printed wiring according to claim 1 , wherein the embedding resin is embedded by screen printing, and the screen printing uses a screen having a mesh portion narrower than between adjacent conductor circuits. A manufacturing method of a board. 上記絶縁層を形成した後,該絶縁層にバイアホールを形成し,次いで,該バイアホールの内壁及び絶縁層の表面を粗化液に浸漬することにより粗化し,次いで,金属めっき処理を行って上記バイアホールの内壁には導体層を,また上記絶縁層の表面には導体回路を形成するに当たり,上記埋込用樹脂は粗化液に溶解する性質を有することを特徴とする請求項1又は2に記載のプリント配線板の製造方法。After forming the insulating layer, a via hole is formed in the insulating layer, and then the inner wall of the via hole and the surface of the insulating layer are roughened by immersing in a roughening solution, and then metal plating is performed. the conductor layer on the inner wall of the via hole, also in forming a conductor circuit on a surface of the insulating layer, according to claim 1, wherein the potting compound is characterized by having a property of dissolving the roughening solution, or The manufacturing method of the printed wiring board of 2 .
JP24114396A 1996-08-22 1996-08-22 Method for manufacturing printed wiring board Expired - Fee Related JP3861338B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24114396A JP3861338B2 (en) 1996-08-22 1996-08-22 Method for manufacturing printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24114396A JP3861338B2 (en) 1996-08-22 1996-08-22 Method for manufacturing printed wiring board

Publications (2)

Publication Number Publication Date
JPH1065317A JPH1065317A (en) 1998-03-06
JP3861338B2 true JP3861338B2 (en) 2006-12-20

Family

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Publication number Priority date Publication date Assignee Title
JP4969072B2 (en) * 2005-08-31 2012-07-04 オンセミコンダクター・トレーディング・リミテッド Circuit device and manufacturing method thereof
JP5876226B2 (en) * 2010-07-09 2016-03-02 大日本印刷株式会社 Solar cell current collector sheet and solar cell module using the same

Also Published As

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