JP3774352B2 - Liquid crystal display - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a liquid crystal display device, and more particularly to the structure of a high-definition, high-quality TFT active matrix liquid crystal display device.
[0002]
[Prior art]
2. Description of the Related Art An active matrix liquid crystal display device using a thin film transistor (hereinafter referred to as TFT) is known as a display device for image information and character information of OA equipment and the like. In this type of liquid crystal display device, cost reduction, high definition, and high image quality are important issues.
[0003]
Japanese Patent Laid-Open No. 8-167722 (first prior art) discloses a prior art of a circuit-embedded technology in which a peripheral drive circuit for driving a TFT active matrix is also composed of TFTs and is integrated on the same substrate for cost reduction. It is described in. By incorporating the drive circuit, the number of connection terminals for external connection can be drastically reduced. Therefore, compared with the conventional method of mounting a drive LSI chip, the pixel pitch is finer and higher definition. A display device can be realized at low cost.
[0004]
On the other hand, when the pixel pitch becomes finer, the pixel aperture ratio (ratio of the area through which light is transmitted in the unit pixel) decreases, and the problem that light utilization efficiency decreases becomes obvious. In order to solve this problem, various techniques for increasing the aperture ratio have been proposed. As one example, Japanese Patent Laid-Open No. 9-22028 (second prior art) discloses that a photosensitive resist or other organic film is disposed between a pixel electrode for driving a liquid crystal and a signal wiring or a scanning wiring. A method of obtaining a high aperture ratio by overlapping a pixel electrode and a wiring electrode is disclosed.
[0005]
In this prior art, the parasitic capacitance between the pixel electrode and the wiring electrode formed when the pixel electrode and the wiring electrode are overlapped is reduced by forming an organic film having a dielectric constant of 2.7 with a thickness of 2 to 3 μm. is doing.
[0006]
[Problems to be solved by the invention]
Although overlapping the pixel electrode and the wiring electrode as in the second prior art is a very effective method for improving the pixel aperture ratio, the parasitic capacitance between the wiring and the pixel electrode is reduced. There is a disadvantage of becoming larger. In particular, when a large parasitic capacitance is formed between a signal wiring for supplying a video signal and a pixel electrode, vertical image shadowing called vertical smear occurs due to signal crosstalk, and image quality deteriorates. In the second prior art, the parasitic capacitance is reduced by forming the dielectric film formed between the pixel electrode and the wiring electrode as an organic film having a dielectric constant of 2.7 and a thickness of 2 to 3 μm.
[0007]
However, the above prior art has the following problems. First, when an ITO electrode serving as a pixel electrode is formed on an organic film such as a resist whose heat resistance is inferior to that of an inorganic film, wrinkles may occur on the surface of the organic film and the light transmittance may be reduced. This occurs because the heat resistance of the organic film is not sufficient. In order to prevent this, if the heat resistance of the organic film is improved, the dielectric constant of the film increases, and the effect of reducing the desired parasitic capacitance decreases.
[0008]
Further, the value of dielectric constant 2.7 is not a sufficiently small value for reducing parasitic capacitance, and actually a film having a smaller dielectric constant is desired. However, in general, an organic material has a dielectric constant of 2.5 or less. It is difficult to obtain such a film, and if the dielectric constant is forcibly reduced, the heat resistance is lowered and the above-described problems occur.
[0009]
Further, in the liquid crystal display device having the pixel structure formed by the second prior art, when the peripheral drive circuit formed by TFT is built on the same substrate as in the first prior art, the image quality is particularly improved. The effect will increase.
[0010]
TFTs using polycrystalline silicon as a semiconductor active layer are generally used for peripheral drive circuits integrated on a glass substrate, but such polycrystalline silicon TFTs have inferior carrier mobility to single crystal silicon. In addition, since it is difficult to reduce the gate length of the drive circuit element and the film thickness of the gate oxide film as much as a transistor used in a driver LSI manufactured using a silicon wafer, current drive capability is not sufficient. For this reason, in comparison with an external circuit type liquid crystal display device in which a driver LSI is provided outside the liquid crystal panel, in the liquid crystal display device with a built-in drive circuit, in particular, the parasitic capacitance between the pixel electrode and the wiring electrode, which is a load capacitance as viewed from the drive circuit Need to be small.
[0011]
For this purpose, the value of dielectric constant 2.7 cannot be said to be sufficiently small, and a material having a smaller dielectric constant is required.
[0012]
An object of the present invention is to provide a liquid crystal display device having a configuration capable of solving the above-described problems and sufficiently reducing the parasitic capacitance between a pixel electrode and a wiring electrode.
[0013]
[Means for Solving the Problems]
In order to achieve the above object, in the present invention, a plurality of thin film transistors formed in the vicinity of a point where a plurality of signal electrodes and a plurality of scanning electrodes intersect, and the plurality of signal electrodes connected to each of the plurality of thin film transistors, In a liquid crystal display device having a pixel electrode insulated and separated by an insulating layer and driving a liquid crystal layer by a voltage applied to the pixel electrode, a part of the pixel electrode and a part of the plurality of signal electrodes are overlapped, The insulating layer that insulates and separates the pixel electrode from the plurality of signal electrodes is configured to include at least one porous insulating film mainly composed of silicon oxide.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
The present invention provides a liquid crystal display device having a pair of substrates, at least one of which is transparent, and a liquid crystal layer sandwiched between the substrates, wherein at least one of the pair of substrates has an insulating main surface, A plurality of scan electrodes formed on the main surface of the substrate, a plurality of signal electrodes formed to intersect the plurality of scan electrodes, and a point near the intersection of the plurality of signal electrodes and the plurality of scan electrodes A plurality of thin film transistors, a plurality of signal electrodes connected to each of the plurality of thin film transistors and a pixel electrode insulated and separated by an insulating layer, and a function of driving the liquid crystal layer by a voltage applied to the pixel electrode In the liquid crystal display device further comprising: a part of the pixel electrode and a part of the plurality of signal electrodes are overlapped to insulate and separate the pixel electrode and the plurality of signal electrodes The edge layer, which is constituted to include a porous insulating film composed mainly of silicon oxide of at least one layer.
[0015]
At this time, the porous insulating film is mainly composed of silicon oxide and has a relative dielectric constant of 2.5 or less, or is composed mainly of silicon oxide and has a density of 0.05 g / cm. ^Three 0.3 g / cm ^Three It was as follows. As a more desirable configuration, the insulating layer that insulates and separates the pixel electrode and the plurality of signal electrodes has a multilayer structure including at least one silicon oxide film or silicon nitride film and a porous insulating film. Furthermore, it is preferable that the porous insulating film is composed mainly of silicon oxide and has a porosity of 25% to 75%. Here, the porosity means the volume ratio of voids in the film.
[0016]
According to the present invention, since the dielectric film interposed between the pixel electrode and the signal wiring electrode is a porous film insulating film mainly composed of silicon oxide, the relative dielectric constant can be drastically reduced as compared with the conventional case. Parasitic capacitance can be greatly reduced. In particular, the density of the porous insulating film is 0.05 g / cm. ^Three 0.3 g / cm ^Three By making it below, the relative dielectric constant can be made 2.5 or less.
[0017]
Furthermore, in the present invention, the insulating layer that insulates and separates the pixel electrode and the plurality of signal electrodes has a multilayer structure including at least one silicon oxide film or silicon nitride film and a porous insulating film, and serves as a pixel electrode. The ITO electrode and the porous film were prevented from contacting directly. With such a configuration, when etching ITO, strong acid such as hydrobromic acid that is an etching solution of ITO penetrates into the porous film and destroys the porous film by capillary pressure, or It can be prevented from becoming a source of contamination in a later process.
[0018]
Other features of the present invention will be apparent from the following embodiments. Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0019]
(Embodiment 1)
1 and 2 are a cross-sectional view and a plan view of a unit pixel according to the liquid crystal display device in the first embodiment of the present invention. FIG. 1 shows a cross section taken along line AA ′ in FIG.
[0020]
In the liquid crystal display device of the present embodiment, the whole is formed on a non-alkali glass substrate 1 having a strain point of about 670 ° C. _Three N _Four Film 200 and 120 nm thick SiO ₂ It is formed on the buffer insulating film 23 made of the film 2. The buffer insulating film 23 serves to prevent diffusion of impurities such as Na from the glass substrate 1. An intrinsic polycrystalline Si (hereinafter referred to as poly-Si) film 30 having a film thickness of 50 nm is formed on the buffer insulating film 23, and the intrinsic poly-Si film 30 is in contact with the pair of high resistance N-type poly-Si films 33. Further, each of the pair of high resistance N-type poly-Si films 33 is in contact with the low resistance N-type poly-Si film 31 serving as a source and a drain. The high-resistance N-type poly-Si film 33 functions as an LDD (Lightly Doped Drain) layer, has a function of relaxing a horizontal electric field in the vicinity of the drain in the poly-Si layer, and suppressing the generation of hot carriers. On the intrinsic poly-Si film 30, SiO ₂ A scanning wiring electrode 10 made of Mo is formed through a gate insulating film 20 made of.
[0021]
Furthermore, in the present liquid crystal display device, SiO is covered so as to cover all of the above members. ₂ An interlayer insulating film 21 is formed, and the signal wiring electrode 12 and the source electrode 11 made of a three-layer metal film of Mo / Al / Mo are connected to the N-type low through a contact through hole provided in the interlayer insulating film 21. The resistor is connected to the poly-Si layer. The lower Mo film is provided to reduce the contact resistance between the low-resistance poly-Si film and Al, and the upper Mo film is provided to reduce the contact resistance between the source electrode and the pixel electrode. Further, a common electrode 15 made of Mo is formed on a part of the polycrystalline silicon film via a gate insulating film 20 to constitute a charge storage capacitor Cst. In this embodiment, these TFTs and the entire capacitor element are made of SiO 2 having a film thickness of 2 μm. ₂ Is covered with a porous insulating film 230 containing as a main component.
[0022]
Further, a pixel electrode 13 made of indium-tin oxide (ITO) is connected to the source electrode 11 of the TFT of the present liquid crystal display device through a contact through hole provided in the interlayer insulating film 21 and the porous insulating film 230. Yes. As shown in FIG. 2, in the liquid crystal display device of this embodiment, the end of the pixel electrode 13 and the signal wiring electrode 12 are arranged so as to overlap each other. The porous insulating film 230 has a relative dielectric constant of 2.3 with a volume fraction of voids in the film of about 40%.
[0023]
According to the present embodiment, the aperture ratio can be improved by overlapping the pixel electrode 13 and the signal wiring electrode 12 with the insulating layer 230 interposed therebetween. Further, in the structure in which the aperture ratio is improved as described above, the insulating film 230 between the signal wiring electrode 12 and the pixel electrode 13 has a volume fraction of voids in the film of about 40% and a relative dielectric constant of 2.3. SiO ₂ By using a porous film containing as a main component, the parasitic capacitance between the signal wiring electrode 12 and the pixel electrode 13 can be effectively reduced. For example, in the configuration of the above example, the parasitic capacitance per unit length between the pixel electrode 13 and the signal wiring electrode 12 is about 0.01 fF / μm, and when the pixel pitch is 200 μm, one pixel and one signal The parasitic capacitance value between the wiring electrodes can be a sufficiently small value of about 2 fF.
[0024]
(Embodiment 2)
FIG. 3 is a sectional view of a unit pixel of the liquid crystal display device according to the second embodiment of the present invention. Since the planar pattern of this embodiment is almost the same as that shown in FIG. 2, it is not shown here. In the present embodiment, the insulating layer separating the pixel electrode 13 and the signal wiring electrode 12 is made of SiO. ₂ Porous insulating film 230 containing Si as a main component and Si _Three N _Four The protective insulating film 231 is made of a two-layer structure.
[0025]
The adhesion of ITO is improved by interposing a normal non-porous insulating film between the pixel electrode 13 made of ITO and the porous insulating film 230 as in the present embodiment. Further, since the porous insulating film 230 is not exposed to the etching solution during the etching process of ITO, damage to the porous insulating film by the etching solution, specifically, the etching solution penetrates into the porous film. It is possible to prevent the membrane from being broken by the generated capillary pressure.
[0026]
The insulating film between the porous insulating film and the ITO electrode is Si _Three N _Four Not only normal SiO ₂ A similar effect can be obtained with a film or a SiOxNy film.
[0027]
(Embodiment 3)
In the above two embodiments, the porous insulating film is used to insulate and separate between the pixel electrode and the signal wiring electrode of the liquid crystal display device. The feature of the porous insulating film having a low dielectric constant is that Even if it is used for an insulating film between a signal wiring electrode and a scanning wiring electrode of a liquid crystal display device, it can be utilized.
[0028]
FIG. 4 is a cross-sectional view of a unit pixel of a liquid crystal display device according to a third embodiment of the present invention. The planar pattern of this embodiment is almost the same as that shown in FIG. In the present embodiment, SiO 2 is used as an interlayer insulating film between the scanning wiring electrode 10 and the common electrode 15 and the signal wiring electrode 12. ₂ This is characterized in that a porous insulating film 230 containing as a main component is used.
[0029]
According to the configuration of the present embodiment, since the capacitance formed between the signal wiring electrode 12 and the scanning wiring electrode 10 can be reduced, the load capacitance viewed from the drive circuit can be reduced. Such a low load capacity can reduce the power consumption of the drive circuit. This feature is particularly effective for constructing a liquid crystal display device with very low power consumption by combining with a reflective liquid crystal display device that does not use a backlight.
[0030]
(Embodiment 4)
5 and 6 are a cross-sectional view and a plan view of a unit pixel of a liquid crystal display device according to a fourth embodiment of the present invention. FIG. 5 is a cross-sectional view taken along the line DD ′ in FIG. This embodiment is characterized in that an inverted staggered TFT is used as a drive element.
[0031]
In this embodiment, a scanning electrode wiring 10 made of Cr is formed on an alkali-free glass substrate 1 having a strain point of about 670 ° C., and Si is covered so as to cover it. _Three N _Four A gate insulating film 24 made of is formed. A pattern of substantially intrinsic hydrogenated amorphous silicon 300 is formed on the scanning wiring electrode 10 via the gate insulating film 24, and a pair of n is formed on the substantially intrinsic hydrogenated amorphous silicon 300. A hydrogenated amorphous silicon 310 doped in the mold is formed. The pair of n-type doped hydrogenated amorphous silicon 310 is in contact with the signal wiring electrode 12 and the source electrode 11 made of a laminated film of three layers of Mo, Al, and Mo, respectively. On the other part of the scanning wiring electrode 10, a capacitor electrode 16 composed of a laminated film of three layers of Mo, Al, and Mo is formed via a gate insulating film 24 to form a storage capacitor.
[0032]
Furthermore, in this embodiment, the Si and the entire capacitive element are covered with Si. _Three N _Four A protective insulating film 231 is formed, and SiO 2 is further formed on the protective insulating film 231. ₂ A porous insulating film 230 containing as a main component is formed. The pixel electrode 13 made of ITO is formed on the porous insulating film 230 so that the end thereof overlaps the signal wiring electrode 12, and the through hole opened in the protective insulating film 231 and the porous insulating film 230. The TFT is connected to the source electrode 11 and the capacitor electrode 16 of the TFT.
[0033]
In the present embodiment, the parasitic capacitance between the pixel electrode 13 and the signal wiring electrode 12 can be reduced while overlapping the pixel electrode 13 and the signal wiring electrode 12 in the same manner as in the first embodiment. A liquid crystal display device having good image quality without talk can be realized.
[0034]
In this embodiment, an inversely staggered TFT is used. In an inversely staggered TFT, an intrinsic hydrogenated amorphous silicon film surface formed between a pair of n-type hydrogenated amorphous silicon films is used. The interface (referred to as a back channel) property between the protective insulating film and the protective insulating film has a strong influence on the off characteristics of the TFT. For this reason, it is not desirable to directly form a substance that easily adsorbs moisture, such as a porous insulating film, on the TFT. Therefore, in this embodiment, Si is interposed between the porous film and the TFT. _Three N _Four A protective insulating film 231 made of is provided. Thus, a stable TFT with a small off-current can be formed, and a liquid crystal display device with good image quality can be realized.
[0035]
(Embodiment 5)
7 and 8 are a sectional view and a plan view of a unit pixel of a liquid crystal display device according to a fifth embodiment of the present invention. FIG. 7 is a cross-sectional view taken along the line EE ′ in FIG.
[0036]
In the liquid crystal display device of this embodiment, the whole is formed on a non-alkali glass substrate 1 having a strain point of about 670 ° C. _Three N _Four Film 200 and 120 nm thick SiO ₂ It is formed on the buffer insulating film made of the film 2. An intrinsic polycrystalline Si (hereinafter referred to as poly-Si) film 30 having a thickness of 50 nm is formed on the buffer insulating film, and the intrinsic poly-Si film 30 is in contact with the pair of high-resistance N-type poly-Si films 33. Further, each of the pair of high resistance N-type poly-Si films 33 is in contact with the low resistance N-type poly-Si film 31 serving as a source and a drain. On the intrinsic poly-Si film 30, SiO ₂ A scanning wiring electrode 10 made of Mo is formed through a gate insulating film 20 made of.
[0037]
Furthermore, in the present embodiment, SiO is covered so as to cover all the members. ₂ An interlayer insulating film 21 is formed, and the signal wiring electrode 12 and the source electrode 11 made of a three-layer metal film of Mo / Al / Mo are connected to the N-type low through a contact through hole provided in the interlayer insulating film 21. The resistor is connected to the poly-Si layer. The TFT as a whole is 2μm thick SiO ₂ Porous insulating film 230 containing Si as a main component and Si with a thickness of 50 nm _Three N _Four It is covered with a protective insulating film 231 made of.
[0038]
A common electrode 17 made of ITO is formed on the protective insulating film 231 over almost the entire surface of the image display portion excluding the contact portion TH. A 300 nm-thickness SiO film is formed on the common electrode 17. ₂ A capacitor insulating film 25 is formed, and a pixel electrode 13 made of ITO is formed on the capacitor insulating film 25 so that the end thereof overlaps the signal wiring electrode 12. The capacitor insulating film 25, the protective insulating film 231, and the porous insulating film 230 are connected to the TFT source electrode 11 through through-holes, and the common electrode 17, the capacitor insulating film 25, and the pixel electrode 13 form a storage capacitor. Forming.
[0039]
In the present embodiment, not only the pixel electrode 13 and the signal wiring electrode 12 are overlapped, but also the storage capacitor is configured by two ITO electrodes and an insulating layer sandwiched between them, so that the aperture ratio associated with the capacitor formation is reduced. There is no decrease, and the aperture ratio can be extremely increased. According to this embodiment, an aperture ratio of 85% was obtained at a pixel pitch of 200 μm.
[0040]
Normally, when the common electrode 17 is formed over almost the entire surface of the display portion, the capacitance between the common electrode and the scanning wiring electrode 10 or the signal wiring electrode 12 increases, the capacitive load of the common electrode 17 increases, and a lateral smear is called. It is known that image shadowing occurs in the horizontal direction. In the present embodiment, in order to solve this problem, SiO 2 between the signal wiring electrode 12 and the common electrode 17 is used. ₂ By disposing a porous insulating film containing as a main component, the parasitic capacitance formed between the common electrode and the wiring could be reduced, and as a result, the aperture ratio could be expanded without degrading the image quality. A high-quality and bright LCD device has been realized.
[0041]
Furthermore, according to the configuration of the present embodiment, since the aperture ratio does not decrease even if the storage capacitance value is increased, the capacitance value can be increased, thereby compensating for the leakage current of the TFT. It is possible to suppress image quality defects such as contrast reduction and image burn-in. This feature is more desirable because it means that the margin of variation in off-current is increased in a liquid crystal display device using TFTs formed on a polycrystalline silicon film formed by a laser recrystallization method with relatively large TFT characteristic variations. It is.
[0042]
(Embodiment 6)
9 and 10 are a plan view and a plan view of a unit pixel of a liquid crystal display device according to Embodiment 6 of the present invention. 9 is a cross-sectional view taken along the line FF ′ in FIG.
[0043]
The configuration of this embodiment is substantially the same as that of the fifth embodiment. In other words, 2 μm thick SiO 2 on the TFT ₂ Porous insulating film 230 containing Si as a main component and Si with a thickness of 50 nm _Three N _Four The common electrode 17 made of ITO is formed over the entire surface of the image display portion excluding the contact portion TH, and the film thickness is formed on the common electrode 17. 300 nm SiO ₂ A capacitive insulating film 25 is formed, and a pixel electrode 13 made of ITO is formed on the capacitive insulating film 25 so that an end thereof overlaps the signal wiring electrode 12. The common electrode 17, the capacitor insulating film 25, and the pixel electrode 13 form a storage capacitor that is connected to the TFT source electrode 11 through a through hole provided in the film 231 and the porous insulating film 230.
[0044]
Due to these characteristic configurations, this embodiment has the same effects as the fifth embodiment. In addition, in the present embodiment, the pixel electrode 13 formed on the capacitive insulating film 25 has a comb-like planar pattern, and the gap between the comb-like pixel electrodes and the common electrode under the capacitive insulating film A voltage for driving the liquid crystal layer is applied to the liquid crystal layer, and the liquid crystal layer is driven by a fringe electric field generated between these electrodes.
[0045]
When the liquid crystal layer is driven by an electric field in a direction substantially along the substrate surface as in this embodiment, the liquid crystal molecules do not stand up with respect to the substrate surface when the electric field is applied, and are transmitted by rotating within the substrate surface. Since the image can be displayed by controlling the polarization direction of the light to be transmitted, the viewing angle dependence of the contrast due to the birefringence of the liquid crystal molecules can be substantially eliminated, and a high-quality liquid crystal display device with a wide viewing angle can be obtained. can get.
[0046]
(Embodiment 7)
FIG. 11 shows an equivalent circuit of the entire liquid crystal display device according to the present embodiment in which the peripheral drive circuit is integrated on the same substrate together with the TFT active matrix. For example, the scanning wiring electrode 10 of Y1 to Yend, the signal wiring electrode 12 of X1R, X1G, and X1B to XendB, and the TFT provided for each pixel have the configuration of the embodiment shown in FIGS. A TFT active matrix 50, and a vertical scanning circuit 51 and a horizontal scanning circuit 52 for driving the TFT active matrix 50.
[0047]
The vertical scanning circuit 51 includes a shift register circuit SRV driven by a clock signal CLKV and a level shifter DRV to which a row selection voltage VG is supplied, and outputs a row selection pulse to the scanning wiring electrode 10.
[0048]
The horizontal scanning circuit 52 includes a shift register circuit SRH driven by a clock signal CLKH, a latch circuit L1 for latching 6-bit digitized image data DATA, and a digital circuit for decoding the latched digital data into analog data. The analog converter circuit DAC is composed of a line memory LM for temporarily storing the output from the DAC for one row, and an analog switch SW for supplying the image data stored in the line memory LM to the signal wiring electrode 12. Note that a reference voltage signal weighted corresponding to each bit is supplied to the DAC.
[0049]
By using the structure of the present invention as the TFT active matrix 50, the parasitic capacitance between the pixel electrode and the signal wiring electrode 12 can be reduced. This means that when viewed from the horizontal scanning circuit 52, the load capacity to be driven by the output transistor is reduced, and the signal wiring electrode 12 can be driven even if the drive capability of the output transistor is not so large.
[0050]
Usually, in a liquid crystal driving LSI using single crystal silicon, an analog amplifier is formed after an analog switch in order to increase the driving capability of the output stage. The output voltage of the analog amplifier has an offset if the characteristics of the paired transistors do not match, and if this varies from output terminal to output terminal, display unevenness often becomes a problem. Such a problem also applies to the polycrystalline silicon TFT as in this embodiment. However, since variations in individual TFTs in polycrystalline silicon TFTs are so large that they are not comparable to those in single crystals, it is actually very difficult to construct an analog amplifier that suppresses variations in output voltage.
[0051]
Therefore, in the case where the driving circuit is configured by the polycrystalline silicon TFT, it can be one solution to configure the analog amplifier so as not to enter the output stage. However, in such a case, the current drive capability of the circuit cannot be increased so much that it is necessary to significantly reduce the load capacity. Therefore, according to the configuration of the present invention, it is possible to reduce the capacitance of the signal wiring electrode, so that it is possible to drive without using an analog amplifier that causes such display unevenness. Therefore, the configuration of the present embodiment is suitable for a liquid crystal display device with a built-in driving circuit constituted by polycrystalline silicon TFTs.
[0052]
(Embodiment 8)
FIG. 12 is a schematic view showing an example of a cross-sectional structure of the liquid crystal cell of the liquid crystal display device according to the present invention. The scanning wiring electrodes 10 and the signal wiring electrodes 12 are formed in a matrix on the lower glass substrate 1 with the liquid crystal layer 506 as a reference, and the pixel electrodes 13 made of ITO are formed through TFTs formed in the vicinity of the intersections. To drive. A counter electrode 510 made of ITO, a color filter 507, a color filter protective film 511, and a light blocking film 512 for forming a light blocking black matrix pattern are formed on the counter glass substrate 508 facing the liquid crystal layer 506.
[0053]
The polarizing plates 505 are formed on the outer surfaces of the pair of glass substrates 1 and 508, respectively. The liquid crystal layer 506 is sealed between a lower alignment film ORI1 that sets the orientation of liquid crystal molecules and an upper alignment film ORI2, and is sealed by a sealing material SL (not shown). The lower alignment film ORI1 is formed on the porous insulating film 230 on the glass substrate 1 side. On the inner surface of the counter glass substrate 508, a light shielding film 512, a color filter 507, a color filter protective film 511, a counter electrode 510, and an upper alignment film ORI2 are sequentially stacked.
[0054]
This liquid crystal display device is assembled by separately forming layers on the glass substrate 1 side and the counter glass substrate 508 side, and then overlaying the upper and lower glass substrates 1 and 508 and enclosing the liquid crystal 506 therebetween. A TFT-driven color liquid crystal display device is configured by adjusting the transmission of light from the backlight BL at the pixel electrode 14 portion. By using the structure of the present invention described above, a high-quality TFT-type transmissive liquid crystal display device can be realized.
[0055]
The element structure of the present invention can be applied not only to a transmissive liquid crystal display device but also to a reflective liquid crystal display device. For example, in FIG. 11, a reflective metal electrode having a high reflectance such as Al is used for the pixel electrode 13 instead of ITO, and the polarizing plate 505 and the backlight BL at the bottom of the glass substrate 1 are removed, thereby applying the present invention. Type liquid crystal display device can be realized.
[0056]
(Embodiment 9)
The manufacturing process according to the present invention will be described below with reference to FIGS. 13 to 19, taking the embodiment shown in FIG. 4 as an example.
[0057]
In the manufacturing process of this example, first, after cleaning an alkali-free glass substrate 1 having a thickness of 700 μm, a width of 750 mm, and a width of 950 mm and having a strain point of about 670 ° C., SiH _Four And NH _Three And N ₂ Si film having a film thickness of 50 nm is formed by plasma CVD using a mixed gas of _Three N _Four A film 200 is formed. The forming temperature is 350 ° C. Subsequently, tetraethoxysilane and O ₂ 120 nm thick SiO 2 by plasma CVD using a mixed gas of ₂ A film 100 is formed. Si _Three N _Four , SiO ₂ In both cases, the formation temperature is 350 ° C.
[0058]
Next, SiO ₂ SiH on the film 100 _Four A substantially intrinsic hydrogenated amorphous silicon film 300 is formed to a thickness of 50 nm by plasma CVD using a mixed gas of Ar. The film formation temperature was 380 ° C., and the hydrogen amount immediately after film formation was about 5 at%. Further, the substrate is annealed at 450 ° C. for about 30 minutes to release hydrogen in the hydrogenated amorphous silicon film 300. The amount of hydrogen after annealing was about 1 at% (FIG. 13).
[0059]
Next, an excimer laser beam LA having a wavelength of 308 nm is applied to the amorphous silicon film at a fluence of 400 mJ / cm while holding the substrate at 350 ° C. ² The amorphous silicon film is melted and recrystallized to obtain a substantially intrinsic polycrystalline silicon film 30 (FIG. 14).
[0060]
Next, a predetermined resist pattern is formed on the polycrystalline silicon film 30 by a normal photolithography method, and CF _Four And O ₂ The polycrystalline silicon film 30 is processed into a predetermined shape by the reactive ion etching method using the mixed gas.
[0061]
Next, a 100 nm thick SiO 2 film is formed by plasma CVD using a mixed gas of tetraethoxysilane and oxygen. ₂ To obtain the gate insulating film 20. Tetraethoxysilane and O ₂ The mixing ratio is 1:50, and the forming temperature is 380 ° C.
[0062]
Next, after a 200 nm Mo film is formed by sputtering, a predetermined resist pattern is formed on the Mo film by a normal photolithography method. _Four And O ₂ The Mo film is processed into a predetermined shape by a reactive ion etching method using a mixed gas of No. 1 to obtain the scanning wiring electrode 10 (FIG. 15).
[0063]
Next, P ion is accelerated by an ion implantation method with an acceleration voltage of 70 KeV and a dose of 1E13 (cm ^-2 ), And after forming a predetermined resist pattern, P ions are accelerating by an ion implantation method with an acceleration voltage of 70 KeV and a dose of 1E15 (cm ^-2 ) To form the source, drain region 31 and LDD region 33 of the N-type TFT (FIG. 16).
[0064]
Next, after forming a predetermined resist pattern, B ions are implanted at an acceleration voltage of 40 KeV and a dose of 1E15 by ion implantation to form source and drain regions of a P-type TFT (not shown).
[0065]
Next, a SiO film having a thickness of 500 nm is formed by a plasma CVD method using a mixed gas of tetraethoxysilane and oxygen. ₂ To obtain an interlayer insulating film 21. Tetraethoxysilane and O ₂ The mixing ratio is 1: 5, and the formation temperature is 350 ° C.
[0066]
Next, the substrate is annealed at 550 ° C. for 5 minutes to activate the implanted P and B impurities, and the resistances of the TFT source, drain, and LDD regions are set to predetermined values. As the impurity activation method, a rapid thermal annealing (RTA) method using a lamp can be used in addition to a normal heat treatment.
[0067]
Next, after forming a predetermined resist pattern, CHF _Three A contact through hole is formed in the interlayer insulating film by a reactive ion etching method using a metal. Subsequently, after sputtering, Mo is deposited in a thickness of 50 nm, an Al—Si alloy is deposited in a thickness of 500 nm, and Mo is deposited in a thickness of 50 nm, and a predetermined resist pattern is formed. _Three And Cl ₂ The signal wiring electrode 12 and the source electrode 11 are obtained by batch etching by the reactive ion etching method using a mixed gas of (FIG. 17).
[0068]
Next, a liquid triethoxysilane in which silica fine particles are dispersed is coated on the substrate by a spin coating method to form a spin-on glass (SOG) film having a thickness of about 2.5 μm, which is baked at 300 ° C. for 10 minutes. By doing so, porous SiO 2 μm thick ₂ A film 230 was formed. The relative dielectric constant of the porous film 230 is about 2.3 (FIG. 18).
[0069]
In addition to this, for example, diphenyldimethylsilane (Si (C ₆ H _Five ) ₂ (OCH _Three ) ₂ And SiO at a temperature of 150 ° C. by plasma CVD using a mixed gas of Ar and Ar ₂ After film formation, O at 400 ° C ₂ It can also be obtained by performing plasma treatment. However, O ₂ Since the film was hygroscopic after the plasma treatment, a stable porous silica film without moisture absorption could be obtained by performing hexamethyldisilazane (HMDS) treatment at 250 ° C. for 15 minutes.
[0070]
In addition to this, tetraethoxysilane is wet-gelled with an alkali catalyst, applied onto a substrate, and H in the film produced by hydrolysis of tetraethoxysilane. ₂ After replacing O with ethanol, CO ₂ A porous membrane can also be obtained by removing ethanol in the membrane by a supercritical fluid drying method using a method such as the above. However, CO ₂ Since supercritical fluid processing using a liquid crystal requires an ultra-high pressure vessel, it is not very suitable for processing a glass substrate for a liquid crystal display device having a size close to 1 m. It is desirable to form by a coating method or a dry process.
[0071]
In the present invention, the method for forming the porous insulating film is not limited to the above example, and other forming methods can be used as long as the porous insulating film having the relative dielectric constant as described above is formed. May be used.
[0072]
Finally, SiH _Four And NH _Three And N ₂ Si film with a film thickness of 50 nm by plasma CVD using a mixed gas of _Three N _Four After the film 231 is formed, a predetermined resist pattern is formed on Si. _Three N _Four CF formed on the film _Four By reactive ion etching using Si, _Three N _Four Contact through holes are formed in the film 231 and the porous silica film 230, and then an ITO film is formed to 140 nm by sputtering, and processed into a predetermined shape using hydrobromic acid (HBr) to complete an active matrix substrate. (FIG. 19).
[0073]
【The invention's effect】
As described above, according to the present invention, since the parasitic capacitance between the pixel electrode and the signal electrode wiring can be reduced, the aperture ratio can be improved without increasing the parasitic capacitance. A liquid crystal display device can be realized.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a pixel of a liquid crystal display device according to a first embodiment of the present invention.
FIG. 2 is a pixel plan view of the liquid crystal display device according to the first embodiment of the present invention.
FIG. 3 is a cross-sectional view of a pixel of a liquid crystal display device according to a second embodiment of the present invention.
FIG. 4 is a cross-sectional view of a pixel of a liquid crystal display device according to a third embodiment of the present invention.
FIG. 5 is a cross-sectional view of a pixel of a liquid crystal display device according to a fourth embodiment of the present invention.
FIG. 6 is a pixel plan view of a liquid crystal display device according to a fourth embodiment of the present invention.
FIG. 7 is a cross-sectional view of a pixel of a liquid crystal display device according to a fifth embodiment of the present invention.
FIG. 8 is a pixel plan view of a liquid crystal display device according to a fifth embodiment of the present invention.
FIG. 9 is a cross-sectional view of a pixel of a liquid crystal display device according to a sixth embodiment of the present invention.
FIG. 10 is a pixel plan view of a liquid crystal display device according to a sixth embodiment of the present invention.
FIG. 11 is an overall configuration diagram of a drive circuit built-in type liquid crystal display device according to a seventh embodiment of the present invention;
FIG. 12 is a cell cross-sectional view of a liquid crystal display device according to an eighth embodiment of the present invention.
FIG. 13 is a cross-sectional view showing one manufacturing process of the liquid crystal display device of the second embodiment of the present invention.
FIG. 14 is a cross-sectional view showing one manufacturing process of a liquid crystal display device according to a second embodiment of the present invention.
FIG. 15 is a cross-sectional view showing one manufacturing process of the liquid crystal display device of the second embodiment of the present invention.
FIG. 16 is a cross-sectional view showing one manufacturing process of the liquid crystal display device of the second embodiment of the present invention.
FIG. 17 is a cross-sectional view showing one manufacturing process of the liquid crystal display device of the second embodiment of the present invention.
FIG. 18 is a cross-sectional view showing one manufacturing process of the liquid crystal display device of the second embodiment of the present invention.
FIG. 19 is a cross-sectional view showing one manufacturing process of the liquid crystal display device of the second embodiment of the present invention.
[Explanation of symbols]
1 ... Glass substrate, 2 ... Si _Three N _Four Buffer film, 10 ... Scanning wiring electrode, 11 ... Source electrode, 12 ... Signal wiring electrode, 13 ... Pixel electrode, 15 ... Capacitance electrode, 17 ... Common electrode, 20 ... Gate insulating film, 21 ... Interlayer insulating layer, 23 ... Protective insulating film, 24 ... Si _Three N _Four Film (gate insulating film), 25 ... capacitor insulating film, 30 ... intrinsic poly-Si film, 31 ... low resistance n-type poly-Si layer, 33 ... high resistance n-type poly-Si layer, 50 ... TFT active matrix, 51 ... Vertical scanning circuit, 52 ... Horizontal scanning circuit, 200 ... SiO ₂ Buffer film, 230 ... porous insulating film, 231 ... protective insulating film, 300 ... intrinsic hydrogenated amorphous Si film, Cst ... storage capacity.

Claims (6)

A liquid crystal display device having a pair of substrates at least one of which is transparent and a liquid crystal layer sandwiched between the pair of substrates,
At least one main surface of the pair of substrates is insulative,
A plurality of scan electrodes formed on the insulating main surface;
A plurality of signal electrodes formed so as to intersect the plurality of scanning electrodes;
A plurality of thin film transistors formed in the vicinity of intersections of the plurality of signal electrodes and the plurality of scanning electrodes;
A plurality of signal electrodes connected to each of the plurality of thin film transistors and a pixel electrode insulated and separated by an insulating layer;
In the liquid crystal display device that drives the liquid crystal layer by a voltage applied to the pixel electrode,
An insulating layer that insulates and separates the pixel electrode and the plurality of signal electrodes is formed on the porous insulating film formed on the plurality of signal electrodes and the plurality of book film transistors, and on the porous insulating film. A liquid crystal display device comprising: a silicon nitride film or a silicon oxide film . A liquid crystal display device having a pair of substrates at least one of which is transparent and a liquid crystal layer sandwiched between the pair of substrates,
At least one main surface of the pair of substrates is insulative,
A plurality of scan electrodes formed on the insulating main surface;
A plurality of signal electrodes formed so as to intersect the plurality of scanning electrodes;
A plurality of thin film transistors formed in the vicinity of intersections of the plurality of signal electrodes and the plurality of scanning electrodes;
A transparent common electrode formed on an upper layer of the plurality of thin film transistors and the plurality of signal electrodes, wherein the plurality of thin film transistors and the plurality of signal electrodes are insulated and separated by an insulating layer;
A pixel electrode connected to each of the thin film transistors and insulated and separated by the common electrode and a second insulating layer;
In the liquid crystal display device that drives the liquid crystal layer by a voltage applied to the pixel electrode, the insulating layer that insulates and separates the plurality of thin film transistors and the plurality of signal electrodes from the common electrode includes the plurality of signal electrodes and the plurality of the plurality of signal electrodes. A liquid crystal display device comprising: a porous insulating film formed on a book film transistor; and a silicon nitride film or a silicon oxide film formed on the porous insulating film . A liquid crystal display device having a pair of substrates at least one of which is transparent and a liquid crystal layer sandwiched between the pair of substrates,
One substrate of the pair of substrates has at least a main surface insulating, and a plurality of scan electrodes formed on the insulating main surface;
A plurality of signal electrodes formed so as to intersect the plurality of scanning electrodes;
A plurality of thin film transistors formed in the vicinity of intersections of the plurality of signal electrodes and the plurality of scanning electrodes;
An active matrix that is connected to each of the thin film transistors and includes a plurality of signal electrodes and pixel electrodes insulated and separated by an insulating layer;
A drive circuit configured to supply a video signal to the active matrix using a thin film transistor on the one substrate;
In the liquid crystal display device that drives the liquid crystal layer by a voltage applied to the pixel electrode,
The drive circuit includes a shift register circuit driven by a clock signal, a latch circuit for latching a video signal, a digital-analog converter circuit, a line memory, and the signal electrode directly connected to the video signal stored in the line memory. And an analog switch for supplying to
An insulating layer that insulates and separates the pixel electrode and the plurality of signal electrodes is formed on the porous insulating film formed on the plurality of signal electrodes and the plurality of book film transistors, and on the porous insulating film. A liquid crystal display device comprising: a silicon nitride film or a silicon oxide film . The liquid crystal display device according to any one of claims 1 to 3,
The porous insulating film is characterized in that the main component is silicon oxide, and the porosity is 25% or more and 75% or less. The liquid crystal display device according to any one of claims 1 to 3,
2. The liquid crystal display device according to claim 1, wherein the porous insulating film is mainly composed of silicon oxide and has a relative dielectric constant of 2.5 or less. In the liquid crystal display device according to claim 1, wherein the porous insulating film is a main component silicon oxide, its density 0.05 g / cm ³ or more 0.3 g / cm ³ or less A liquid crystal display device characterized by the above.

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