JP3767769B2 - Mounting method of semiconductor chip - Google Patents

Mounting method of semiconductor chip Download PDF

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Publication number
JP3767769B2
JP3767769B2 JP36936197A JP36936197A JP3767769B2 JP 3767769 B2 JP3767769 B2 JP 3767769B2 JP 36936197 A JP36936197 A JP 36936197A JP 36936197 A JP36936197 A JP 36936197A JP 3767769 B2 JP3767769 B2 JP 3767769B2
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Japan
Prior art keywords
resin
semiconductor chip
circuit board
hole
curing
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Expired - Fee Related
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JP36936197A
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JPH11195674A (en
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文一 原園
真喜雄 須藤
治 穂積
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Panasonic Corp
Panasonic Holdings Corp
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Panasonic Corp
Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83102—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus using surface energy, e.g. capillary forces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives

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  • Wire Bonding (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、樹脂回路基板に突起電極を有する半導体チップをフェイスダウン方式で実装する半導体チップの実装方法に関するものである。
【０００２】
【従来の技術】
従来、この種の実装方法として、図３に示したような方法が採用されていた。即ち、図３(ａ)において、１は樹脂回路基板であり、例えばガラスエポキシ基材等からなる多層配線基板で、両面に導体パターン２が形成され、また両面導体間を接続するスルーホール３が形成されている。４は導体パターンのうち、半導体チップを接続するための端子電極である。
【０００３】
次に、図３(ｂ)において、５は半導体チップであり、外部接続端子として複数の突起電極６が設けられている。そして、樹脂回路基板１に実装する際は、導電性接着剤７を塗着した突起電極６を、樹脂回路基板１の端子電極４に接触させ、加熱硬化する。
【０００４】
さらに、装着した半導体チップ５の信頼性を高めるために、図３(ｃ)に示したように、樹脂回路基板１と半導体チップ５との間の間隙部に封止樹脂８を注入する。この封止樹脂８としては、作業性をよくするために、高い流動性を有する樹脂が用いられる。なお９は樹脂注入ノズルである。
【０００５】
【発明が解決しようとする課題】
しかしながら、上記のような従来の実装方法では、次のような問題がある。
【０００６】
(1) 封止樹脂８として、高い流動性を有する樹脂を用いるため、半導体チップ５の実装エリアにあるスルーホール３を通って封止樹脂８が樹脂回路基板１の裏面に流れ出し、裏面に形成された導体パターン２を覆ったり、汚したりして、品質の低下を招いていた。
【０００７】
(2) また、樹脂回路基板１は、端子電極４に高さのばらつきがあったり、反りやうねりが生じ、さらには、半導体チップと樹脂回路基板との間に熱膨張率の差があるため、半導体チップ５の突起電極６と樹脂回路基板１の端子電極４とを接続する導電性接着剤７にクラックが発生し、導通不良が起こると言った問題があった。
【０００８】
本発明は、このような従来技術の問題点を解決するもので、封止樹脂がスルーホールを通って樹脂回路基板の裏面へ流出するのをなくし、かつ半導体チップの突起電極と樹脂回路基板の端子電極との信頼性の高い接続を得るようにした半導体チップの実装方法を提供することを目的とする。
【０００９】
【課題を解決するための手段】
上記の目的を達成するために、本発明の半導体チップの実装方法は、半導体チップの装着エリアにスルーホールを有する樹脂回路基板に、突起電極を有する半導体チップを平面実装するに際し、前記樹脂回路基板のスルーホール上又はその近傍に低流動性の絶縁性樹脂を塗布する工程と、導電性接着剤を塗着した前記半導体チップの突起電極を前記樹脂回路基板の端子電極に位置合わせするとともに塗布した前記絶縁性樹脂上に半導体チップの底面を押接して、前記突起電極と端子電極を接触させ、かつ前記絶縁性樹脂を前記スルーホール内に埋め込む工程と、前記導電性接着剤と前記絶縁性樹脂とを同時に加熱硬化する工程と、前記半導体チップの底面と樹脂回路基板との間の間隙部に封止樹脂を注入して硬化する工程とからなることを特徴とするものである。
【００１０】
この方法によれば、低流動性の絶縁性樹脂が半導体チップの装着エリアにあるスルーホール内に埋め込まれるため、封止樹脂が基板裏面へ流れ出ることがなくなり、また、絶縁性樹脂と導電性接着剤とを同時に硬化させることで、絶縁性樹脂の硬化収縮力により半導体チップの突起電極と樹脂回路基板の端子電極との間に圧縮力が生じ、信頼性の高い接続を得ることができる。さらに、絶縁性樹脂の硬化圧縮力を利用した接続を行うことで、絶縁性樹脂と導電性接着剤の硬化時間を大幅に短縮することが可能となる。
【００１１】
上記本発明の半導体チップの実装方法において、低流動性の絶縁性樹脂に替えて、紫外線硬化型樹脂を使用し、塗布した紫外線硬化型樹脂を半導体チップの底面で押接してスルーホール内に埋め込むと同時に、樹脂回路基板の裏面から紫外線を照射すると、スルーホール内に埋め込まれた紫外線硬化型樹脂は極めて短時間に硬化して流動性をなくするので、比較的流動性の高いものでも回路基板裏面への流出を防止することができる。なお、紫外線硬化型樹脂の場合は、紫外線とともに加熱によっても硬化することができる樹脂が好適である。
【００１２】
【発明の実施の形態】
以下、本発明の実施の形態について、図面を参照しながら詳細に説明する。
図１は、本発明の一実施の形態における半導体チップの実装方法を示したものである。図１(ａ)において、１は樹脂回路基板であり、例えばガラスエポキシ基材等からなる多層配線基板で、両面に導体パターン２が形成され、また両面導体間を接続するスルーホール３が形成されている。４は導体パターンのうち、半導体チップを接続するための端子電極である。
【００１３】
ここでまず、半導体チップの装着エリアにあるスルーホール上又はその近傍に低流動性の絶縁性樹脂１１を塗布する。１２は樹脂注入ノズルである。絶縁性樹脂１１は、樹脂成分として、エポキシ樹脂、アクリル系樹脂等が用いられ、それにフィラー、例えば２０μｍ以下の粒径を有する二酸化珪素が混入されている。フィラーは、半導体チップの配線面と回路基板との間に挾み込まれることにより、樹脂の硬化収縮時に加わる応力を緩和し、配線回路を破壊から守る役目を果たす。絶縁性樹脂１１の流動特性は、樹脂回路基板１に形成されたスルーホール３から基板裏面に流出しない程度の低流動性(高粘度)を有するものである。なお、この絶縁性樹脂１１は、封止樹脂と同系統の樹脂であることが好ましい。樹脂回路基板１への塗布方法としては、ディスペンスあるいは印刷が適用できる。
【００１４】
次に、図１(ｂ)に示したように、半導体チップ５の外部接続端子としての突起電極６に導電性接着剤７を塗着し、その突起電極６を樹脂回路基板の端子電極４に位置合わせするとともに、塗布した絶縁性樹脂１１上に半導体チップの下面を押し付けるようにして、突起電極６と端子電極４とを接触させる。このとき、絶縁性樹脂１１の一部がスルーホール３内に埋め込まれることになる。
【００１５】
次いで、絶縁性樹脂１１と導電性接着剤７とを同時に加熱硬化させる。この硬化により絶縁性樹脂１１は収縮し、樹脂回路基板１と半導体チップ５とは強く引き合う。その結果、突起電極６と端子電極４との間に圧縮力が作用し、確実な電気的接続を得ることができる。
【００１６】
さらに、図１(ｃ)に示したように、樹脂回路基板１と半導体チップ５との間の、絶縁性樹脂１１部分以外の間隙部に、樹脂注入ノズル９を用いて封止樹脂８を注入する。この封止樹脂８としては、作業性をよくするために、従来と同じ高い流動性を有する樹脂が用いられる。注入された封止樹脂８は加熱硬化され、半導体チップ５の素子形成面及び樹脂回路基板１との接続部を確実に保護することができる。
【００１７】
図２は、本発明の他の実施の形態を示したもので、スルーホール内に埋め込む樹脂として、紫外線硬化型樹脂を用いるものである。図２（ａ）に示したように、樹脂注入ノズル１２により紫外線硬化型樹脂１４を塗布し、図２（ｂ）のように半導体チップ５の下面で押接すると、紫外線硬化型樹脂１４の一部がスルーホール３内に入る。そこで、同時に樹脂回路基板１の裏面から紫外線を照射すると、スルーホール３内に埋め込まれた紫外線硬化型樹脂１４は短時間で硬化する。したがって、紫外線硬化型樹脂１４が樹脂回路基板１の裏面へ流れ出ることはない。
【００１８】
塗布する紫外線硬化型樹脂１４が少量の場合、樹脂回路基板１の裏面からの紫外線照射で、光の拡散効果により樹脂回路基板１の表面側の紫外線硬化型樹脂１４も硬化する。さらには、紫外線硬化型樹脂１４が、紫外線とともに加熱によっても硬化する特性を持たせた樹脂であれば、導電性接着剤７の加熱硬化時に紫外線硬化型樹脂１４も加熱され、完全に硬化することができる。
【００１９】
【発明の効果】
以上説明したように、本発明によれば、樹脂回路基板に半導体チップを実装するに際し、予め半導体チップの装着エリアに低流動性の絶縁性樹脂、あるいは紫外線硬化型樹脂を塗布することにより、その樹脂でスルーホール内を埋めるので、後で高流動性の封止樹脂を注入しても封止樹脂がスルーホールを通って樹脂回路基板の裏面に流れ出ることはなく、したがって、裏面に形成された導体パターンを覆ったり、汚したりして品質の低下を招くことはない。
【００２０】
また、半導体チップの突起電極と樹脂回路基板の端子電極とを接続する導電性接着剤と絶縁性樹脂とを同時に硬化させることで、絶縁性樹脂の硬化収縮力により突起電極と端子電極とが圧接され、信頼性の高い接合を得ることができる。
【００２１】
さらに、絶縁性樹脂の硬化圧縮力を利用した接続を行うことで、絶縁性樹脂と導電性接着剤の硬化時間を大幅に短縮することができる等の効果を奏するものである。
【図面の簡単な説明】
【図１】本発明の一実施の形態における半導体チップの実装方法を示す工程断面図
【図２】本発明の他の実施の形態における半導体チップの実装方法を示す工程断面図
【図３】従来例における半導体チップの実装方法を示す工程断面図
【符号の説明】
１ 樹脂回路基板
２ 導体パターン
３ スルーホール
４ 端子電極
５ 半導体チップ
６ 突起電極
７ 導電性接着剤
８ 封止樹脂
１１ 絶縁性樹脂
１４ 紫外線硬化型樹脂
１５ 紫外線[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor chip mounting method for mounting a semiconductor chip having a protruding electrode on a resin circuit board by a face-down method.
[0002]
[Prior art]
Conventionally, as this kind of mounting method, a method as shown in FIG. 3 has been adopted. That is, in FIG. 3 (a), reference numeral 1 denotes a resin circuit board, which is a multilayer wiring board made of, for example, a glass epoxy base material. Is formed. 4 is a terminal electrode for connecting a semiconductor chip among conductor patterns.
[0003]
Next, in FIG. 3B, 5 is a semiconductor chip, and a plurality of protruding electrodes 6 are provided as external connection terminals. Then, when mounting on the resin circuit board 1, the protruding electrode 6 coated with the conductive adhesive 7 is brought into contact with the terminal electrode 4 of the resin circuit board 1 and is cured by heating.
[0004]
Further, in order to increase the reliability of the mounted semiconductor chip 5, as shown in FIG. 3C, the sealing resin 8 is injected into the gap between the resin circuit board 1 and the semiconductor chip 5. As the sealing resin 8, a resin having high fluidity is used in order to improve workability. Reference numeral 9 denotes a resin injection nozzle.
[0005]
[Problems to be solved by the invention]
However, the conventional mounting method as described above has the following problems.
[0006]
(1) Since a resin having high fluidity is used as the sealing resin 8, the sealing resin 8 flows out to the back surface of the resin circuit board 1 through the through hole 3 in the mounting area of the semiconductor chip 5, and is formed on the back surface. The covered conductor pattern 2 was covered or soiled, resulting in a deterioration in quality.
[0007]
(2) Further, the resin circuit board 1 has a variation in the height of the terminal electrode 4, warpage and undulation, and furthermore, there is a difference in thermal expansion coefficient between the semiconductor chip and the resin circuit board. The conductive adhesive 7 that connects the protruding electrode 6 of the semiconductor chip 5 and the terminal electrode 4 of the resin circuit board 1 has a problem that a crack occurs and a conduction failure occurs.
[0008]
The present invention solves such a problem of the prior art, eliminates the sealing resin from flowing out to the back surface of the resin circuit board through the through-hole, and the protruding electrodes of the semiconductor chip and the resin circuit board. It is an object of the present invention to provide a semiconductor chip mounting method capable of obtaining a highly reliable connection with a terminal electrode.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, a semiconductor chip mounting method according to the present invention provides a method for mounting a semiconductor chip having a protruding electrode on a resin circuit board having a through hole in a mounting area of the semiconductor chip. A step of applying a low-fluidity insulating resin on or near the through-holes, and aligning and applying the protruding electrodes of the semiconductor chip coated with a conductive adhesive to the terminal electrodes of the resin circuit board said presses against the bottom surface of the semiconductor chip on the insulating resin, the protruding electrodes and the terminal electrodes are contacted, and the insulating resin burying into the through hole, the said conductive adhesive insulating resin And a step of injecting a sealing resin into a gap between the bottom surface of the semiconductor chip and the resin circuit board and curing. It is an.
[0010]
According to this method, since the low fluid insulating resin is embedded in the through hole in the mounting area of the semiconductor chip, the sealing resin does not flow out to the back surface of the substrate, and the insulating resin and the conductive adhesive By simultaneously curing the agent, a compressive force is generated between the protruding electrode of the semiconductor chip and the terminal electrode of the resin circuit board due to the curing shrinkage force of the insulating resin, and a highly reliable connection can be obtained. Furthermore, by making a connection using the curing compression force of the insulating resin, it is possible to significantly shorten the curing time of the insulating resin and the conductive adhesive.
[0011]
In the semiconductor chip mounting method of the present invention, an ultraviolet curable resin is used in place of the low-fluid insulating resin, and the applied ultraviolet curable resin is pressed against the bottom surface of the semiconductor chip and embedded in the through hole. At the same time, when UV light is irradiated from the back side of the resin circuit board, the UV curable resin embedded in the through hole cures in a very short time and loses its fluidity. Outflow to the back surface can be prevented. In the case of an ultraviolet curable resin, a resin that can be cured by heating together with ultraviolet rays is preferable.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 shows a semiconductor chip mounting method according to an embodiment of the present invention. In FIG. 1 (a), reference numeral 1 denotes a resin circuit board, which is a multilayer wiring board made of, for example, a glass epoxy base material. ing. 4 is a terminal electrode for connecting a semiconductor chip among conductor patterns.
[0013]
Here, first, the low fluid insulating resin 11 is applied on or near the through hole in the mounting area of the semiconductor chip. Reference numeral 12 denotes a resin injection nozzle. The insulating resin 11 uses an epoxy resin, an acrylic resin, or the like as a resin component, and a filler, for example, silicon dioxide having a particle size of 20 μm or less is mixed therein. The filler serves to protect the wiring circuit from destruction by relaxing the stress applied during the curing shrinkage of the resin by being sandwiched between the wiring surface of the semiconductor chip and the circuit board. The flow characteristics of the insulating resin 11 are low fluidity (high viscosity) that does not flow out from the through hole 3 formed in the resin circuit board 1 to the back surface of the board. The insulating resin 11 is preferably a resin of the same system as the sealing resin. As a method for applying the resin circuit board 1, dispensing or printing can be applied.
[0014]
Next, as shown in FIG. 1B, a conductive adhesive 7 is applied to the protruding electrodes 6 as external connection terminals of the semiconductor chip 5, and the protruding electrodes 6 are applied to the terminal electrodes 4 of the resin circuit board. At the same time, the protruding electrode 6 and the terminal electrode 4 are brought into contact with each other so that the lower surface of the semiconductor chip is pressed onto the applied insulating resin 11. At this time, a part of the insulating resin 11 is embedded in the through hole 3.
[0015]
Next, the insulating resin 11 and the conductive adhesive 7 are heated and cured simultaneously. By this curing, the insulating resin 11 contracts, and the resin circuit board 1 and the semiconductor chip 5 attract each other strongly. As a result, a compressive force acts between the protruding electrode 6 and the terminal electrode 4, and a reliable electrical connection can be obtained.
[0016]
Further, as shown in FIG. 1C, the sealing resin 8 is injected into the gap portion between the resin circuit board 1 and the semiconductor chip 5 other than the insulating resin 11 portion by using the resin injection nozzle 9. To do. As this sealing resin 8, in order to improve workability, a resin having the same high fluidity as the conventional one is used. The injected sealing resin 8 is cured by heating, so that the element formation surface of the semiconductor chip 5 and the connection portion with the resin circuit board 1 can be reliably protected.
[0017]
FIG. 2 shows another embodiment of the present invention, in which an ultraviolet curable resin is used as the resin embedded in the through hole. As shown in FIG. 2A, when the ultraviolet curable resin 14 is applied by the resin injection nozzle 12 and pressed against the lower surface of the semiconductor chip 5 as shown in FIG. The part enters the through hole 3. Therefore, when ultraviolet rays are simultaneously irradiated from the back surface of the resin circuit board 1, the ultraviolet curable resin 14 embedded in the through hole 3 is cured in a short time. Therefore, the ultraviolet curable resin 14 does not flow out to the back surface of the resin circuit board 1.
[0018]
When the amount of the ultraviolet curable resin 14 to be applied is small, the ultraviolet curable resin 14 on the front surface side of the resin circuit board 1 is also cured by the light diffusion effect by the ultraviolet irradiation from the back surface of the resin circuit board 1. Further, if the ultraviolet curable resin 14 is a resin that has a property of being cured by heating together with ultraviolet rays, the ultraviolet curable resin 14 is also heated and completely cured when the conductive adhesive 7 is heated and cured. Can do.
[0019]
【The invention's effect】
As described above, according to the present invention, when a semiconductor chip is mounted on a resin circuit board, a low fluid insulating resin or an ultraviolet curable resin is applied in advance to the mounting area of the semiconductor chip. Since the inside of the through hole is filled with resin, even if a high-fluidity sealing resin is injected later, the sealing resin does not flow through the through hole to the back surface of the resin circuit board. The conductor pattern is not covered or soiled, and the quality is not deteriorated.
[0020]
Further, by simultaneously curing the conductive adhesive and the insulating resin that connect the protruding electrode of the semiconductor chip and the terminal electrode of the resin circuit board, the protruding electrode and the terminal electrode are pressed against each other by the curing shrinkage force of the insulating resin. Thus, a highly reliable joint can be obtained.
[0021]
Furthermore, the effect of being able to significantly shorten the curing time of the insulating resin and the conductive adhesive is achieved by performing the connection using the curing compression force of the insulating resin.
[Brief description of the drawings]
FIG. 1 is a process cross-sectional view illustrating a semiconductor chip mounting method according to an embodiment of the present invention. FIG. 2 is a process cross-sectional view illustrating a semiconductor chip mounting method according to another embodiment of the present invention. Cross-sectional process chart showing how to mount a semiconductor chip in an example
DESCRIPTION OF SYMBOLS 1 Resin circuit board 2 Conductor pattern 3 Through hole 4 Terminal electrode 5 Semiconductor chip 6 Protruding electrode 7 Conductive adhesive 8 Sealing resin 11 Insulating resin 14 UV curable resin 15 Ultraviolet

Claims (2)

半導体チップの装着エリアにスルーホールを有する樹脂回路基板に、突起電極を有する半導体チップを平面実装するに際し、
前記樹脂回路基板のスルーホール上又はその近傍に低流動性の絶縁性樹脂を塗布する工程と、
導電性接着剤を塗着した前記半導体チップの突起電極を前記樹脂回路基板の端子電極に位置合わせするとともに塗布した前記絶縁性樹脂上に半導体チップの底面を押接して、前記突起電極と端子電極を接触させ、かつ前記絶縁性樹脂を前記スルーホール内に埋め込む工程と、
前記導電性接着剤と前記絶縁性樹脂とを同時に加熱硬化する工程と、
前記半導体チップの底面と樹脂回路基板との間の間隙部に封止樹脂を注入して硬化する工程と
からなることを特徴とする半導体チップの実装方法。When planarly mounting a semiconductor chip having a protruding electrode on a resin circuit board having a through hole in the mounting area of the semiconductor chip,
Applying a low fluid insulating resin on or near the through hole of the resin circuit board; and
The protruding electrode of the semiconductor chip coated with a conductive adhesive is aligned with the terminal electrode of the resin circuit board and the bottom surface of the semiconductor chip is pressed against the coated insulating resin so that the protruding electrode and the terminal electrode contacting the and burying the insulating resin into the through hole,
A step of heating and curing the said insulating resin and the conductive adhesive at the same time,
A method of mounting a semiconductor chip, comprising: injecting a sealing resin into a gap between the bottom surface of the semiconductor chip and a resin circuit board and curing the resin. 半導体チップの装着エリアにスルーホールを有する樹脂回路基板に、突起電極を有する半導体チップを平面実装するに際し、
前記樹脂回路基板のスルーホール上又はその近傍に紫外線硬化型樹脂を塗布する工程と、
導電性接着剤を塗着した前記半導体チップの突起電極を前記樹脂回路基板の端子電極に位置合わせするとともに塗布した前記紫外線硬化型樹脂上に半導体チップの底面を押接して、前記突起電極と端子電極を接触させ、かつ前記紫外線硬化型樹脂を前記スルーホール内に埋め込み、同時に前記樹脂回路基板の裏面から紫外線を照射して前記スルーホール内に埋め込まれた前記紫外線硬化型樹脂を硬化する工程と、
前記導電性接着剤と前記紫外線硬化型樹脂とを同時に加熱硬化する工程と、
前記半導体チップの底面と樹脂回路基板との間の間隙部に封止樹脂を注入して硬化する工程と
からなることを特徴とする半導体チップの実装方法。When planarly mounting a semiconductor chip having a protruding electrode on a resin circuit board having a through hole in the mounting area of the semiconductor chip,
Applying an ultraviolet curable resin on or near the through hole of the resin circuit board; and
The protruding electrode of the semiconductor chip to which the conductive adhesive is applied is aligned with the terminal electrode of the resin circuit board and the bottom surface of the semiconductor chip is pressed against the applied ultraviolet curable resin so that the protruding electrode and the terminal a step of curing by contacting the electrodes, and the ultraviolet curing resin buried in the through hole, the ultraviolet curable resin embedded in the through hole by irradiating ultraviolet rays from the back surface of the resin circuit board at the same time ,
A step of heat curing and the ultraviolet curable resin and the conductive adhesive at the same time,
A method of mounting a semiconductor chip, comprising: injecting a sealing resin into a gap between the bottom surface of the semiconductor chip and a resin circuit board and curing the resin.
JP36936197A 1997-12-27 1997-12-27 Mounting method of semiconductor chip Expired - Fee Related JP3767769B2 (en)

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JP3767769B2 true JP3767769B2 (en) 2006-04-19

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