JP2001007488A - Method and structure for mounting semiconductor device - Google Patents
Method and structure for mounting semiconductor deviceInfo
- Publication number
- JP2001007488A JP2001007488A JP11171216A JP17121699A JP2001007488A JP 2001007488 A JP2001007488 A JP 2001007488A JP 11171216 A JP11171216 A JP 11171216A JP 17121699 A JP17121699 A JP 17121699A JP 2001007488 A JP2001007488 A JP 2001007488A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- connection
- circuit board
- resin
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体装置を回路
基板に実装する際の構造と実装方法に関するものであ
る。The present invention relates to a structure and a mounting method for mounting a semiconductor device on a circuit board.
【０００２】[0002]
【従来の技術】ベアチップ実装の例としては図４を示
す。この実装方法（特公平６−３０２６４９）では半導
体装置１の底面の外周側に設けた突起電極２には、回路
基板７の接続パット部６との間に導電性ペースト３を介
在させ、半導体装置１と回路基板７とを位置決めして搭
載し、加熱して接続を行う。次に、接続力を高め、接続
部の信頼性を高めるために、上記導電性ペースト３より
も内側及び外側にエポキシ系などの有機系材料からなる
封止樹脂８を注入した後、熱処理を行い、封止樹脂８を
硬化する。その後に、電気的な接続の確認が行われると
いう方法を採用している。2. Description of the Related Art FIG. 4 shows an example of bare chip mounting. In this mounting method (Japanese Patent Publication No. 6-302649), the conductive paste 3 is interposed between the projecting electrode 2 provided on the outer peripheral side of the bottom surface of the semiconductor device 1 and the connection pad portion 6 of the circuit board 7, 1 and the circuit board 7 are positioned and mounted, and heated to make connection. Next, a sealing resin 8 made of an organic material such as epoxy is injected into the inside and outside of the conductive paste 3 in order to increase the connection strength and the reliability of the connection portion, and then heat-treated. Then, the sealing resin 8 is cured. Thereafter, a method of confirming the electrical connection is employed.
【０００３】また、図５にはＡＣＦ（異方性導伝フィル
ム）により接続した例を示す。本接続方法は回路基板７
上にＡＣＦ９を張りつけ、半導体装置１と回路基板７と
を対向させて位置合わせを行い、荷重、熱を加えＡＣＦ
９を硬化させて接続をするという比較的簡単な工程で接
続を行っている。この方法では、半導体装置１と回路基
板７間に接続するのに十分な密着力を得られるという長
所を有している。[0005] FIG. 5 shows an example of connection by an ACF (anisotropic conductive film). This connection method is the circuit board 7
The semiconductor device 1 and the circuit board 7 are positioned so as to be opposed to each other, and an ACF 9 is applied thereto.
The connection is made in a relatively simple process of curing and making connection. This method has an advantage that a sufficient adhesive force can be obtained for connection between the semiconductor device 1 and the circuit board 7.
【０００４】図６，図７は「特開平１０−２７０８３
３」公報に示された従来の装置を示す断面図であり、図
において、半導体装置１の突起電極２と回路基板７の接
続パット５とは導電性ペースト３を介して接続されてい
る。半導体装置１と回路基板７の間には、中央部の第一
の樹脂４と、周辺部の第二の樹脂５とが配されている。FIGS. 6 and 7 show “Japanese Patent Laid-Open No. 10-27083”.
FIG. 3 is a cross-sectional view showing a conventional device disclosed in Japanese Patent Application Laid-open No. 3-305, in which a projecting electrode 2 of a semiconductor device 1 and a connection pad 5 of a circuit board 7 are connected via a conductive paste 3. Between the semiconductor device 1 and the circuit board 7, a first resin 4 in a central portion and a second resin 5 in a peripheral portion are arranged.
【０００５】[0005]
【発明が解決しようとする課題】図４に示す方法では突
起電極２上に転写される導電性ペースト３の量が少量に
なるために、半導体装置１の突起電極２と回路基板７の
接続パット６間に接着強度が大きく、しかも信頼性の高
い接続を得るのが困難である。そのため、突起電極２上
に導電性ペースト３を転写し、回路基板７に搭載した段
階で接続の良否を確認することは難しく、接続の良否の
確認は搭載後に半導体装置１と回路基板７間に封止樹脂
８を注入し、接続力を強化した後に行う必要がある。従
って、封止樹脂８の硬化後に接続の良否を確認し、接続
不良の場合にチップを除去し、再ボンディングすること
は非常に困難であるという課題を有している。In the method shown in FIG. 4, since the amount of the conductive paste 3 transferred onto the bump electrode 2 is small, the connection pad between the bump electrode 2 of the semiconductor device 1 and the circuit board 7 is small. It is difficult to obtain a high-reliability connection having high adhesive strength between the six. Therefore, it is difficult to confirm the connection quality at the stage when the conductive paste 3 is transferred onto the projecting electrode 2 and mounted on the circuit board 7, and the connection quality is checked between the semiconductor device 1 and the circuit board 7 after mounting. It is necessary to inject the sealing resin 8 and enhance the connection force. Therefore, there is a problem that it is very difficult to check the quality of the connection after the curing of the sealing resin 8 and to remove the chip and re-bond in the case of a poor connection.
【０００６】また、図５に示す方法では、突起電極２と
回路基板７との接続とＡＣＦ９の硬化が同時に行われる
ために、接続後のリペアーは不可能である。Further, in the method shown in FIG. 5, the connection between the protruding electrode 2 and the circuit board 7 and the curing of the ACF 9 are simultaneously performed, so that the repair after the connection is impossible.
【０００７】図６，図７の方法では第一の樹脂４が半硬
化時の場合、半導体装置１を除去することは可能である
が、回路基板７上の接続パット６上には導電性ペースト
３がこびり付き、再度、半導体装置１をボンディングす
る場合、接続パット６上の導電性ペースト３を完全に除
去する必要がある。現実には有機溶剤等にてこの導電性
ペースト３を除去することになるが、回路基板７の絶縁
層を侵食し、完全除去は非常に困難であるという欠点を
有していた。In the method shown in FIGS. 6 and 7, when the first resin 4 is in a semi-cured state, the semiconductor device 1 can be removed. When the semiconductor device 1 is bonded again, the conductive paste 3 on the connection pad 6 needs to be completely removed. Actually, the conductive paste 3 is removed with an organic solvent or the like, but it has a disadvantage that the insulating layer of the circuit board 7 is eroded and complete removal is very difficult.
【０００８】すなわち図４，図５に示す実装方法は、共
に接続工程の途中に電気的な接続の良否を確認すること
ができなく、また図６，図７の実装方法についても接続
不良チップを除去することが非常に困難である。In other words, the mounting methods shown in FIGS. 4 and 5 cannot confirm the quality of the electrical connection during the connection process, and the mounting methods shown in FIGS. Very difficult to remove.
【０００９】そこで、本発明の目的は、これらの課題を
解決するため、半導体装置と回路基板との接続を行った
後のリペアー性に優れており、しかも容易に、信頼性が
高く接続が容易な実装構造及び実装方法を提供すること
にある。Accordingly, an object of the present invention is to solve these problems, to provide excellent repairability after connection between a semiconductor device and a circuit board, and to provide easy, reliable and easy connection. To provide a simple mounting structure and a mounting method.
【００１０】[0010]
【課題を解決するための手段】請求項１の発明によれ
ば、半導体装置の突起電極に対向するところの回路基板
の接続パットより内側の部分に熱可塑性の第一の樹脂を
位置させ、かつ半導体装置と回路基板間にはフィラーを
含む熱硬化性の第二の樹脂を介在させた。According to the first aspect of the present invention, a first thermoplastic resin is located at a portion inside a connection pad of a circuit board facing a protruding electrode of a semiconductor device, and A thermosetting second resin containing a filler was interposed between the semiconductor device and the circuit board.
【００１１】請求項２の発明によれば、突起電極と接続
パットの間に、異方性導電ペーストを介在させた。According to the second aspect of the present invention, the anisotropic conductive paste is interposed between the protruding electrode and the connection pad.
【００１２】請求項３の発明によれば、第一の樹脂をシ
ート形状とした。According to the third aspect of the present invention, the first resin has a sheet shape.
【００１３】請求項４の発明によれば、接続パットより
内側の部分に熱可塑性の第一の樹脂を設けた後、半導体
装置の接続確認を行ってから半導体装置と回路基板間に
フィラーを含む熱硬化性の第二の樹脂を設けた。According to the fourth aspect of the present invention, after the thermoplastic first resin is provided in a portion inside the connection pad, the connection of the semiconductor device is checked, and then the filler is included between the semiconductor device and the circuit board. A thermosetting second resin was provided.
【００１４】請求項５の発明によれば、半導体装置の接
続確認の結果、接続不良と判定した場合は、第一の樹脂
を暖めることで半導体装置を除去して、新たな半導体装
置と入れ換えるようにした。According to the fifth aspect of the present invention, if it is determined that the connection of the semiconductor device is defective as a result of the connection check, the semiconductor device is removed by warming the first resin and replaced with a new semiconductor device. I made it.
【００１５】請求項６の発明によれば、接続パットより
内側の部分に熱可塑性の第一の樹脂を設けた後、半導体
装置の接続確認を行ってから突起電極と接続パッドの間
に、異方性導電ペーストを設け、ついで半導体装置と回
路基板間にフィラーを含む熱硬化性の第二の樹脂を設け
た。According to the sixth aspect of the present invention, after the thermoplastic first resin is provided in a portion inside the connection pad, the connection of the semiconductor device is confirmed, and then the difference between the protrusion electrode and the connection pad is established. An isotropic conductive paste was provided, and a thermosetting second resin containing a filler was provided between the semiconductor device and the circuit board.
【００１６】請求項７の発明によれば、半導体装置の接
続確認の結果、接続不良と判定した場合は、第一の樹脂
を暖めることで、しかも異方性導電ペーストが仮硬化の
状態で、半導体装置を除去して新たな半導体装置と入れ
換えるようにした。According to the seventh aspect of the present invention, when the connection of the semiconductor device is confirmed to be defective as a result of the connection confirmation, the first resin is heated and the anisotropic conductive paste is temporarily cured. The semiconductor device was removed and replaced with a new semiconductor device.
【００１７】[0017]
【発明の実施の形態】実施の形態１．以下本発明による
実施の形態１を図面に基づいて説明する。図１は半導体
装置の実装構造の断面図を示す概略図であり、１は半導
体装置、２は突起電極である。この突起電極２は半導体
装置１の表面側から突出する如く設けられるもので、半
導体装置１の底面側の外周に沿うように複数個配置され
る。４は第一の樹脂であり、５は接続部分の信頼性の向
上を目的として充填する第二の樹脂、６は接続パッドで
あり、上記突起電極２に対応する如く、上記回路基板７
の表面外周に沿って複数個配置される。上記第一の樹脂
４は接続パッド６で囲まれる部分のほぼ中央側、すなわ
ち、上記接続パッド６よりも一定間隔隔てて内側の半導
体装置１と回路基板７との間に、四角形に配置されて、
半導体装置１と回路基板７とを接合し、第二の樹脂５は
回路基板７の内，外周に沿って形成され、上記第一の樹
脂４の外側に位置される。以上のように構成された半導
体装置の実装構造とその方法について図面を用いて説明
する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a schematic view showing a sectional view of a mounting structure of a semiconductor device, wherein 1 is a semiconductor device, and 2 is a protruding electrode. The projecting electrodes 2 are provided so as to protrude from the front surface side of the semiconductor device 1, and are arranged in plural numbers along the outer periphery on the bottom surface side of the semiconductor device 1. Reference numeral 4 denotes a first resin, reference numeral 5 denotes a second resin filled for the purpose of improving the reliability of a connection portion, and reference numeral 6 denotes a connection pad.
Are arranged along the outer periphery of the surface. The first resin 4 is disposed in a substantially rectangular shape at a substantially central side of a portion surrounded by the connection pad 6, that is, between the semiconductor device 1 and the circuit board 7 inside the connection pad 6 at a fixed interval. ,
The semiconductor device 1 and the circuit board 7 are joined, and the second resin 5 is formed along the inner and outer circumferences of the circuit board 7 and is located outside the first resin 4. The mounting structure and method of the semiconductor device configured as described above will be described with reference to the drawings.
【００１８】回路基板７上に第一の樹脂４を例えば、四
角形で、かつ所定のサイズ及び量で接続パット６の内側
に配置する。サイズの目安としては接続パット６にかか
らないように接続パッド６より幾分離れる程度が望まし
い。また、量の目安としては突起電極２の高さ程度の厚
みが望ましい。第一の樹脂４は半導体装置１と回路基板
７との接合強度を上げるために充填するもので、一例と
して低粘度のエポキシ樹脂を使用し、これは熱で硬化
し、硬化時の収縮量は「０」に近いため、フィラーを多
く含むものが採用される。突起電極２は、半円柱状に近
いが、スタッドバンプでもかまぼこ状バンプでも適用で
きる。The first resin 4 is disposed on the circuit board 7 in a rectangular shape, for example, in a predetermined size and quantity inside the connection pad 6. As a standard of the size, it is desirable that the connection pad 6 is separated from the connection pad 6 so as not to cover the connection pad 6. Further, as a guide of the amount, a thickness about the height of the protruding electrode 2 is desirable. The first resin 4 is filled to increase the bonding strength between the semiconductor device 1 and the circuit board 7. For example, a low-viscosity epoxy resin is used. Since it is close to "0", a material containing a large amount of filler is employed. The protruding electrode 2 is nearly semi-cylindrical, but can be applied to either a stud bump or a semi-cylindrical bump.
【００１９】以上のように突起電極２を有する半導体装
置１と第一の樹脂４を配した回路基板７とを相対させ、
所定の位置に位置決めし、フェースダウンで搭載した
後、荷重と熱を加えて熱可塑性の第一の樹脂４を仮硬化
させ半導体装置１と回路基板７を接続する。この段階で
接続の良否を目視または電気的に確認を行う。ここで不
良を確認した場合には、半導体装置１を除去し、再度接
続を行う。なお、上記目視の確認とはＸ線にてパッケー
ジを透過して、回路基板７上の接続パット６と突起電極
２の位置ずれを確認するもので、上記電気的な確認と
は、テストピンを当てて、導通をチェックするＡＳＳＹ
テスト、機能的に動くかどうかチェックするファンクシ
ョンテストがある。As described above, the semiconductor device 1 having the protruding electrodes 2 is opposed to the circuit board 7 on which the first resin 4 is disposed.
After being positioned at a predetermined position and mounted face-down, a load and heat are applied to temporarily cure the thermoplastic first resin 4 to connect the semiconductor device 1 and the circuit board 7. At this stage, the quality of the connection is visually or electrically confirmed. If a defect is confirmed here, the semiconductor device 1 is removed and the connection is made again. Note that the visual check is to check the positional shift between the connection pad 6 and the projecting electrode 2 on the circuit board 7 by transmitting the package with X-rays. Assy to hit and check continuity
There is a test, a function test to check whether it works functionally.
【００２０】上記確認の結果、良品の場合は、接合信頼
性を向上させるため、フィラーを含む熱硬化性の第二の
樹脂５を半導体装置１と回路基板７間に充填する。第二
の樹脂５の充填方法は、半導体装置（チップ）搭載時に
回路基板７にあらかじめディスペンサーで塗布する
マスクを使って印刷塗布する均一厚に塗布した第二の
樹脂５にチップを付けて突起電極２に転写する方法があ
る。As a result of the above confirmation, in the case of a non-defective product, a thermosetting second resin 5 containing a filler is filled between the semiconductor device 1 and the circuit board 7 in order to improve bonding reliability. The method of filling the second resin 5 is as follows. When the semiconductor device (chip) is mounted, the chip is attached to the second resin 5 applied to the circuit board 7 in a uniform thickness by using a mask which is previously applied by a dispenser. 2, there is a method of transferring.
【００２１】また、このようにして製作された半導体装
置の実装構造のリペアー方法の一例を挙げる。目視又は
電気的チェックで接続不良を確認した半導体装置の実装
体は加熱されたリペアーツールを用いて半導体装置１に
モーメントをかけることにより、回路基板７からの半導
体装置１の除去が可能である。この場合、リペアー方法
は、半導体装置（チップ）上面に熱風を当てて間接的に
第一の樹脂４を暖め、その時、チップ寸法より少し大き
な囲いをしてその中に熱風を入れて樹脂を柔らかくす
る。第一の樹脂４のガラス転移温度を超える温度になる
と、第一の樹脂４自体が柔らかくなるので、囲いを取り
除いて、チップをそのまま引き剥がす。大抵、温度は２
００℃以下で、囲いは回路基板７に密着させず、少し浮
かして熱風が逃げるようにする。An example of a method of repairing the mounting structure of the semiconductor device manufactured as described above will be described. By applying a moment to the semiconductor device 1 using a heated repair tool, the semiconductor device 1 can be removed from the circuit board 7 with respect to the mounted body of the semiconductor device for which a connection failure has been visually or electrically checked. In this case, in the repair method, the first resin 4 is heated indirectly by irradiating hot air to the upper surface of the semiconductor device (chip), and at that time, the resin is softened by enclosing the enclosure slightly larger than the chip size and injecting hot air therein. I do. When the temperature exceeds the glass transition temperature of the first resin 4, the first resin 4 itself becomes soft. Therefore, the enclosure is removed and the chip is peeled off as it is. Usually the temperature is 2
At a temperature of not more than 00 ° C., the enclosure is not brought into close contact with the circuit board 7 and is slightly floated so that hot air escapes.
【００２２】回路基板７側に残された第一の樹脂４は熱
可塑性であるため、再度、半導体装置１をボンディング
する時に利用するため、有機溶剤等による硬化樹脂の除
去作業が不要である。Since the first resin 4 left on the circuit board 7 is thermoplastic, it is used when bonding the semiconductor device 1 again, so that it is not necessary to remove the cured resin with an organic solvent or the like.
【００２３】本発明の半導体装置の実装構造は、上記し
た方法により従来の接続法では困難であった半導体装置
のリペアーを可能とし、極めて安定で信頼性が高い接続
方法を安価で可能とした実装体である。The mounting structure of the semiconductor device according to the present invention enables the repair of the semiconductor device which has been difficult by the conventional connection method by the above-mentioned method, and realizes an extremely stable and highly reliable connection method at a low cost. Body.
【００２４】実施の形態２．以下本発明による実施の形
態２を図面に基づいて説明する。図２は半導体装置の実
装構造の断面図を示す概略図であり、図１と同じものは
同一符号を用いている。同図において、１は半導体装
置、２は突起電極であり、１０は上記突起電極２と接続
パッド６との間に介在された異方性導電ペーストであ
る。４は第一の樹脂であり、５は接続部分の信頼性の向
上を目的として充填する第二の樹脂である。以上のよう
に構成された半導体装置の実装構造とその方法について
図面を用いて説明する。Embodiment 2 FIG. Hereinafter, a second embodiment of the present invention will be described with reference to the drawings. FIG. 2 is a schematic view showing a cross-sectional view of the mounting structure of the semiconductor device, and the same components as those in FIG. In the figure, 1 is a semiconductor device, 2 is a protruding electrode, and 10 is an anisotropic conductive paste interposed between the protruding electrode 2 and the connection pad 6. Reference numeral 4 denotes a first resin, and reference numeral 5 denotes a second resin to be filled for the purpose of improving the reliability of a connection portion. The mounting structure and method of the semiconductor device configured as described above will be described with reference to the drawings.
【００２５】回路基板７上に第一の樹脂４を所定のサイ
ズ及び量で接続パット６の内側に配置する。サイズの目
安としては接続パット６にかからない程度が望ましい。
また、量の目安としては突起電極２の高さ程度の厚みが
望ましい。The first resin 4 is arranged on the circuit board 7 in a predetermined size and quantity inside the connection pad 6. As a standard of the size, it is desirable that the size does not cover the connection pad 6.
Further, as a guide of the amount, a thickness about the height of the protruding electrode 2 is desirable.
【００２６】突起電極２に異方性導電ペースト１０を転
写する、或いは回路基板７の接合パット部６に異方性導
伝ペースト１０をプリコートする。プリコートする場合
の量の目安としては、突起電極２の高さ程度の厚みが望
ましい。異方性導電ペースト１０の具体名は、例えば新
日鉄化学の「ＮＥＸ２５１」、東芝ケミカルの「ＸＡＰ
０１１０」がある。The anisotropic conductive paste 10 is transferred to the protruding electrodes 2, or the anisotropic conductive paste 10 is pre-coated on the bonding pads 6 of the circuit board 7. As a guide for the amount of pre-coating, a thickness about the height of the bump electrode 2 is desirable. Specific names of the anisotropic conductive paste 10 are, for example, “NEX251” of Nippon Steel Chemical and “XAP” of Toshiba Chemical.
0110 ”.
【００２７】以上のようにして得た突起電極２を有する
半導体装置１と第一の樹脂４を配した回路基板７とを相
対させ、所定の位置に位置決めし、フェースダウンで搭
載した後、荷重と熱を加えて熱可塑性の第一の樹脂４及
び異方性導電ペースト１０を仮硬化させ半導体装置１と
回路基板７を接続する。この段階で接続の良否を目視ま
たは電気的に確認を行う。ここで不良を確認した場合に
は、半導体装置１を除去し、再度接続を行う。The semiconductor device 1 having the protruding electrodes 2 obtained as described above is opposed to the circuit board 7 on which the first resin 4 is disposed, and is positioned at a predetermined position. Then, the first resin 4 and the anisotropic conductive paste 10 are temporarily cured by applying heat to connect the semiconductor device 1 and the circuit board 7. At this stage, the quality of the connection is visually or electrically confirmed. If a defect is confirmed here, the semiconductor device 1 is removed and the connection is made again.
【００２８】良品の場合は、接合信頼性を向上させるた
め、フィラーを含む熱硬化性の第二の樹脂５を半導体装
置１と回路基板７間に充填する。In the case of a non-defective product, a thermosetting second resin 5 containing a filler is filled between the semiconductor device 1 and the circuit board 7 in order to improve bonding reliability.
【００２９】また、このようにして製作された半導体装
置の実装構造のリペアー方法の一例を挙げる。目視又は
電気的チェックで接続不良を確認した半導体装置の実装
構造は、加熱されたリペアーツールを用いて半導体装置
にモーメントをかけることにより、半導体装置の除去が
可能である。An example of a method of repairing the mounting structure of the semiconductor device manufactured as described above will be described. The mounting structure of the semiconductor device, whose connection failure has been confirmed visually or by an electrical check, can be removed by applying a moment to the semiconductor device using a heated repair tool.
【００３０】回路基板７側に残された第一の樹脂４は熱
可塑性であるため、再度、半導体装置をボンディングす
る時に利用するため、有機溶剤等による硬化樹脂の除去
作業が不要である。Since the first resin 4 left on the circuit board 7 is thermoplastic and is used again when bonding the semiconductor device, it is not necessary to remove the cured resin with an organic solvent or the like.
【００３１】接続パット上に残された異方性導電ペース
ト１０は仮硬化状態であるため、有機溶剤を用いて容易
に除去することが可能である。Since the anisotropic conductive paste 10 left on the connection pad is in a temporarily cured state, it can be easily removed using an organic solvent.
【００３２】本発明の半導体装置の実装構造及び実装方
法は、上記した方法により従来の接続法では困難であっ
た半導体装置のリペアーを可能とし、極めて安定で信頼
性が高い接続方法を安価で可能とした実装構造である。The mounting structure and mounting method of the semiconductor device according to the present invention enable repair of the semiconductor device, which has been difficult by the conventional connection method, by the above-described method, and enable an extremely stable and highly reliable connection method at a low cost. This is the mounting structure.
【００３３】実施の形態３．本実施の形態３において
は、第一の樹脂４の存在範囲が制御しやすく、かつリペ
アーが容易であるためにシート状の第一の樹脂４を用い
る。Embodiment 3 In the third embodiment, the sheet-shaped first resin 4 is used because the existing range of the first resin 4 is easily controlled and the repair is easy.
【００３４】本発明の半導体装置の実装構造は、第一の
樹脂４の量及び位置の制御が容易であり、作業性が向上
し製造コストを低減できる。In the semiconductor device mounting structure of the present invention, the amount and position of the first resin 4 can be easily controlled, workability can be improved, and manufacturing costs can be reduced.
【００３５】実施の形態４．以下、本実施の形態４を図
面に基づいて説明する。図３は複数の半導体装置の実装
構造の断面図を示す概略図であり、図１，図２と同じも
のは同一の符号を用いている。同図において、１は半導
体装置、２は突起電極である。４は第一の樹脂であり、
５は接続部分の信頼性の向上を目的として充填する第二
の樹脂である。以上のように構成された複数の半導体装
置の実装構造（ＭＣＭ:マルチチップモジュール）とそ
の方法についても適用できる。このように、半導体装置
１ａを大型の回路基板７に直接取付け、半導体装置１ｂ
を回路基板７に第一の樹脂４及び第二の樹脂５及び異方
性導電ペースト１０を用いて回路基板７に取付け、半導
体装置１ｃを第一の樹脂４，第二の樹脂５を用いて回路
基板７に取付けるようにして、実装方法を異ならせて複
数の半導体装置１ａ，１ｂ，１ｃを一枚の回路基板７に
取付けるようにしても良い。Embodiment 4 FIG. Hereinafter, the fourth embodiment will be described with reference to the drawings. FIG. 3 is a schematic view showing a cross-sectional view of a mounting structure of a plurality of semiconductor devices, and the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals. In FIG. 1, reference numeral 1 denotes a semiconductor device, and 2 denotes a protruding electrode. 4 is a first resin,
Reference numeral 5 denotes a second resin to be filled for the purpose of improving the reliability of the connection portion. The mounting structure (MCM: multi-chip module) of a plurality of semiconductor devices configured as described above and the method thereof are also applicable. Thus, the semiconductor device 1a is directly attached to the large circuit board 7, and the semiconductor device 1b
Is mounted on the circuit board 7 using the first resin 4 and the second resin 5 and the anisotropic conductive paste 10, and the semiconductor device 1 c is mounted on the circuit board 7 using the first resin 4 and the second resin 5. A plurality of semiconductor devices 1a, 1b, and 1c may be mounted on one circuit board 7 by mounting them on the circuit board 7 with different mounting methods.
【００３６】[0036]
【発明の効果】請求項１の発明によれば、接続パットよ
り内側の部分に熱可塑性の第一の樹脂を位置させ、かつ
半導体装置と回路基板間にはフィラーを含む熱硬化性の
第二の樹脂を介在させたので、半導体装置のリペアーを
容易に行え、しかも第二の樹脂の接着力で信頼性の高い
接続を得ることができると共に、接続部での熱応力の緩
和が図れる。According to the first aspect of the present invention, the thermoplastic first resin is located at a portion inside the connection pad, and the thermosetting second resin containing a filler is provided between the semiconductor device and the circuit board. Since the resin is interposed, the semiconductor device can be easily repaired, a highly reliable connection can be obtained by the adhesive force of the second resin, and the thermal stress at the connection portion can be reduced.
【００３７】請求項２の発明によれば、突起電極と接続
パットの間に、異方性導電ペーストを介在させたので、
突起電極と接続パッドとの電気的接続の信頼性を高め得
ると共に、この異方性導電ペーストにより回路基板の反
りやうねりを吸収でき、信頼性の高い実装構造が得られ
る。According to the second aspect of the present invention, since the anisotropic conductive paste is interposed between the protruding electrode and the connection pad,
The reliability of the electrical connection between the protruding electrodes and the connection pads can be improved, and the anisotropic conductive paste can absorb the warpage and undulation of the circuit board, and a highly reliable mounting structure can be obtained.
【００３８】請求項３の発明によれば、第一の樹脂をシ
ート形状としたので、第一の樹脂の回路基板への量及び
位置の制御が容易となる。According to the third aspect of the present invention, since the first resin is formed in a sheet shape, it is easy to control the amount and position of the first resin on the circuit board.
【００３９】請求項４の発明によれば、接続パットより
内側の部分に熱可塑性の第一の樹脂を設けた後、半導体
装置の接続確認を行ってから半導体装置と回路基板間に
フィラーを含む熱硬化性の第二の樹脂を設けたので、リ
ペアー時に基板に残された樹脂は再使用可能で、除去作
業が不要となり、リペアー作業が迅速に行える。According to the fourth aspect of the present invention, after the thermoplastic first resin is provided in a portion inside the connection pad, the connection of the semiconductor device is checked, and then the filler is included between the semiconductor device and the circuit board. Since the thermosetting second resin is provided, the resin remaining on the substrate at the time of repair can be reused, and the removal operation is not required, and the repair operation can be performed quickly.
【００４０】請求項５の発明によれば、半導体装置の接
続確認の結果、接続不良と判定した場合は、第一の樹脂
を暖めることで半導体装置を除去して、新たな半導体装
置と入れ換えるようにしたので、リペアーの作業が容易
となる。According to the fifth aspect of the present invention, if the connection of the semiconductor device is confirmed to be defective as a result of the connection confirmation, the semiconductor device is removed by warming the first resin and replaced with a new semiconductor device. The repair work becomes easy.
【００４１】請求項６の発明によれば、接続パットより
内側の部分に熱可塑性の第一の樹脂を設けた後、半導体
装置の接続確認を行ってから突起電極と接続パッドの間
に、異方性導電ペーストを設け、ついで半導体装置と回
路基板間にフィラーを含む熱硬化性の第二の樹脂を設け
たので、半導体装置を容易に取り外せるので、リペアー
の作業を迅速に進めることができ、しかも異方性導電ペ
ーストにより信頼性の高い実装構造が得られる。According to the sixth aspect of the present invention, after the thermoplastic first resin is provided in a portion inside the connection pad, the connection of the semiconductor device is confirmed, and then the difference between the bump electrode and the connection pad is established. Since the isotropic conductive paste is provided, and then the thermosetting second resin containing the filler is provided between the semiconductor device and the circuit board, the semiconductor device can be easily removed, so that the repair work can be promptly performed, Moreover, a highly reliable mounting structure can be obtained by the anisotropic conductive paste.
【００４２】請求項７の発明によれば、半導体装置の接
続確認の結果、接続不良と判定した場合は、第一の樹脂
を暖めることで、しかも異方性伝導ペーストが仮硬化の
状態で、半導体装置を除去して新たな半導体装置と入れ
換えるようにしたので、リペアーの作業が容易となる。According to the seventh aspect of the present invention, when the connection of the semiconductor device is determined to be defective as a result of the connection confirmation, the first resin is heated and the anisotropic conductive paste is temporarily cured. Since the semiconductor device is removed and replaced with a new semiconductor device, repair work becomes easy.
【図１】 本発明の実施の形態１を説明するための半導
体装置の実装構造及びその実装方法を示す断面図であ
る。FIG. 1 is a cross-sectional view illustrating a mounting structure of a semiconductor device and a mounting method thereof for describing Embodiment 1 of the present invention;
【図２】 本発明の実施の形態２を説明するための半導
体装置の実装構造及びその実装方法を示す断面図であ
る。FIG. 2 is a cross-sectional view showing a mounting structure of a semiconductor device and a mounting method for explaining a second embodiment of the present invention;
【図３】 本発明の実施形態４を説明するための半導体
装置の実装構造を示す断面図である。FIG. 3 is a cross-sectional view illustrating a mounting structure of a semiconductor device for describing Embodiment 4 of the present invention.
【図４】 従来の実装構造（ペースト転写方式）を説明
する断面図である。FIG. 4 is a cross-sectional view illustrating a conventional mounting structure (paste transfer method).
【図５】 従来の実装構造（ＡＣＦ接続方式）を説明す
る断面図である。FIG. 5 is a cross-sectional view illustrating a conventional mounting structure (ACF connection method).
【図６】 従来の実装構造（導伝性ペースト転写方式）
を説明する断面図である。FIG. 6: Conventional mounting structure (conductive paste transfer method)
It is sectional drawing explaining.
【図７】 従来の実装構造（導伝性ペースト転写方式）
を説明する断面図である。FIG. 7: Conventional mounting structure (conductive paste transfer method)
It is sectional drawing explaining.
１ 半導体装置、２ 突起電極、３ 導電性ペースト、
４ 第一の樹脂 ５ 第二の樹脂、６ 接続パット、７ 回路基板、８
封止樹脂 ９ ＡＣＦ（異方性導伝フィルム）、１０ 異方性導電
ペースト。1 semiconductor device, 2 projecting electrodes, 3 conductive paste,
4 first resin 5 second resin, 6 connection pad, 7 circuit board, 8
Sealing resin 9 ACF (anisotropic conductive film), 10 anisotropic conductive paste.
Claims (7)
に対応する接続パットを有する回路基板に実装する半導
体装置の実装構造において、上記回路基板の接続パット
より内側の部分に熱可塑性の第一の樹脂を位置させ、か
つ半導体装置と回路基板間の外側の部分にはフィラーを
含む熱硬化性の第二の樹脂を介在させたことを特徴とす
る半導体装置の実装構造。In a semiconductor device mounting structure for mounting a semiconductor device having a protruding electrode on a circuit board having a connection pad corresponding to the protruding electrode, a portion of the circuit board inside the connection pad is made of a thermoplastic first material. Characterized in that a thermosetting second resin containing a filler is interposed in an outer portion between the semiconductor device and the circuit board.
方性導電ペーストを介在させたことを特徴とする請求項
１に記載の半導体装置の実装構造。2. The mounting structure for a semiconductor device according to claim 1, wherein an anisotropic conductive paste is interposed between said protruding electrode and said connection pad.
徴とする請求項１，２のいずれかに記載の半導体装置の
実装構造。3. The mounting structure for a semiconductor device according to claim 1, wherein the first resin has a sheet shape.
に対応する接続パットを有する回路基板に実装する半導
体装置の実装方法において、上記接続パットより内側の
部分に熱可塑性の第一の樹脂を設けた後、上記半導体装
置の接続確認を行ってから、半導体装置と回路基板間の
外側の部分にフィラーを含む熱硬化性の第二の樹脂を設
けたことを特徴とする半導体装置の実装方法。4. A method of mounting a semiconductor device having a protruding electrode on a circuit board having a connection pad corresponding to the protruding electrode, wherein a first thermoplastic resin is applied to a portion inside the connection pad. After the provision, the connection of the semiconductor device is checked, and then a thermosetting second resin containing a filler is provided on an outer portion between the semiconductor device and the circuit board, the method for mounting a semiconductor device. .
不良と判定した場合は、上記第一の樹脂を暖めることで
半導体装置を除去して、新たな半導体装置と入れ換える
ようにした請求項４に記載の半導体装置の実装方法。5. The semiconductor device according to claim 4, wherein, as a result of the connection confirmation of the semiconductor device, if the connection is determined to be defective, the semiconductor device is removed by heating the first resin and replaced with a new semiconductor device. 3. The method for mounting a semiconductor device according to claim 1.
に対応する接続パットを有する回路基板に実装する半導
体装置の実装方法において、上記接続パットより内側の
部分に熱可塑性の第一の樹脂を設けた後、上記半導体装
置の接続確認を行ってから該突起電極と該接続パッドの
間に、異方性導電ペーストを設け、ついで半導体装置と
回路基板間にフィラーを含む熱硬化性の第二の樹脂を設
けたことを特徴とする半導体装置の実装方法。6. A semiconductor device mounting method for mounting a semiconductor device having a protruding electrode on a circuit board having a connection pad corresponding to the protruding electrode, wherein a first thermoplastic resin is applied to a portion inside the connection pad. After the connection, the connection of the semiconductor device is confirmed, and then an anisotropic conductive paste is provided between the bump electrode and the connection pad. Then, a thermosetting second paste containing a filler is provided between the semiconductor device and the circuit board. A method for mounting a semiconductor device, comprising the steps of:
不良と判定した場合は、上記第一の樹脂を暖めること
で、しかも上記異方性導電ペーストが仮硬化の状態で、
半導体装置を除去して新たな半導体装置と入れ換えるよ
うにした請求項６に記載の半導体装置の実装方法。7. As a result of checking the connection of the semiconductor device, if it is determined that the connection is defective, the first resin is heated, and the anisotropic conductive paste is temporarily cured.
7. The method according to claim 6, wherein the semiconductor device is removed and replaced with a new semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11171216A JP2001007488A (en) | 1999-06-17 | 1999-06-17 | Method and structure for mounting semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11171216A JP2001007488A (en) | 1999-06-17 | 1999-06-17 | Method and structure for mounting semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2001007488A true JP2001007488A (en) | 2001-01-12 |
Family
ID=15919201
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11171216A Pending JP2001007488A (en) | 1999-06-17 | 1999-06-17 | Method and structure for mounting semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2001007488A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006032625A (en) * | 2004-07-15 | 2006-02-02 | Fujitsu Ltd | Semiconductor device and method for manufacturing the same |
| JP2007124458A (en) * | 2005-10-31 | 2007-05-17 | Nec Tokin Corp | Coil antenna |
| EP2373135A1 (en) | 2010-03-30 | 2011-10-05 | Fujitsu Limited | Printed Circuit Board and Method of Fabricating Printed Circuit Board |
| CN102209435A (en) * | 2010-03-30 | 2011-10-05 | 富士通株式会社 | Printed circuit board unit, electronic device and method of fabricating printed circuit board |
-
1999
- 1999-06-17 JP JP11171216A patent/JP2001007488A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006032625A (en) * | 2004-07-15 | 2006-02-02 | Fujitsu Ltd | Semiconductor device and method for manufacturing the same |
| JP4688443B2 (en) * | 2004-07-15 | 2011-05-25 | 富士通セミコンダクター株式会社 | Manufacturing method of semiconductor device |
| JP2007124458A (en) * | 2005-10-31 | 2007-05-17 | Nec Tokin Corp | Coil antenna |
| JP4693113B2 (en) * | 2005-10-31 | 2011-06-01 | Ｎｅｃトーキン株式会社 | Coil antenna |
| EP2373135A1 (en) | 2010-03-30 | 2011-10-05 | Fujitsu Limited | Printed Circuit Board and Method of Fabricating Printed Circuit Board |
| CN102209435A (en) * | 2010-03-30 | 2011-10-05 | 富士通株式会社 | Printed circuit board unit, electronic device and method of fabricating printed circuit board |
| KR101199614B1 (en) * | 2010-03-30 | 2012-11-09 | 후지쯔 가부시끼가이샤 | Printed circuit board unit, electronic device, and method of fabricating printed circuit board unit |
| KR101201599B1 (en) | 2010-03-30 | 2012-11-14 | 후지쯔 가부시끼가이샤 | Printed circuit board and method of fabricating printed circuit board |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2924830B2 (en) | Semiconductor device and manufacturing method thereof | |
| US5739053A (en) | Process for bonding a semiconductor to a circuit substrate including a solder bump transferring step | |
| JP3326382B2 (en) | Method for manufacturing semiconductor device | |
| US6966964B2 (en) | Method and apparatus for manufacturing semiconductor device | |
| KR100748558B1 (en) | Chip size package and method of fabricating the same | |
| JP3205686B2 (en) | Semiconductor device for mounting and its mounting method | |
| JPH05218137A (en) | Manufacture of semiconductor device | |
| JP3520208B2 (en) | Method of mounting semiconductor element on circuit board and semiconductor device | |
| JP2001007488A (en) | Method and structure for mounting semiconductor device | |
| JP3532450B2 (en) | Mounting structure of BGA type semiconductor package and mounting method thereof | |
| JP2000286302A (en) | Method and device for assembling semiconductor chip | |
| JP3539528B2 (en) | Semiconductor device and manufacturing method thereof | |
| KR100614564B1 (en) | A junction method of a chip bump and a substrate pad using underfill resin and supersonic | |
| JP2000058597A (en) | Method of mounting electronic component | |
| JP2957955B2 (en) | Semiconductor device and manufacturing method thereof | |
| JP4016557B2 (en) | Electronic component mounting structure and mounting method | |
| JPH11340278A (en) | Resin sheet for mounting semiconductor device, flip chip mounting method and circuit board | |
| JPH11330318A (en) | Manufacture of semiconductor device mounting body | |
| JP2001313315A (en) | Semiconductor device for mounting and its mounting method | |
| JPH02280349A (en) | Bump forming and connecting method | |
| JP2001332584A (en) | Semiconductor device and method of manufacturing the same, and substrate and semiconductor chip | |
| JPH11260860A (en) | Method for mounting chip parts on printed wiring board | |
| JPH0567639A (en) | Method of packaging semiconductor element | |
| JPH02101753A (en) | Semiconductor chip attached structure | |
| JPH11340280A (en) | Mounting method for semiconductor ic |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20040615 |