JP3744079B2 - Wiring circuit board structure having contact electrode and method for forming the same - Google Patents

Wiring circuit board structure having contact electrode and method for forming the same Download PDF

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JP3744079B2
JP3744079B2 JP28410696A JP28410696A JP3744079B2 JP 3744079 B2 JP3744079 B2 JP 3744079B2 JP 28410696 A JP28410696 A JP 28410696A JP 28410696 A JP28410696 A JP 28410696A JP 3744079 B2 JP3744079 B2 JP 3744079B2
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contact electrode
forming
plating resist
layer
insulating resin
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JPH10135368A (en
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達広 岡野
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Toppan Inc
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Toppan Inc
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Description

【0001】
【発明の属する技術分野】
本発明は、半導体装置や配線回路基板の導通検査をするために用いられる検査治具基板に関するものである。
【0002】
【従来の技術】
従来、半導体装置や配線回路基板の導通検査には、ウェハプローブや布線検査で知られるように被検査体の電極部に針状の検査電極を接触させ導通テストを行っていた。また、比較的配線密度の低い配線回路基板では電極を有する検査用の配線回路基板を形成し、異方性導電シートを介して被検査体である配線回路基板との接触を採り、導通テストを行っている。
【0003】
【発明が解決しようとする課題】
従来のウェハプローブや布線検査による半導体装置や配線回路基板の導通検査の方法では、針状の検査電極を接触させるため、被検査体に検査痕を残し、さらには被検査体に電極の貫通のような重大な損傷を与える可能性がある。また、配線密度の増加や高集積化によって、検査用のプローブの形成が困難であった。検査基板を用いる方法では、異方性導電シートの導通ピッチの関係などから200μmピッチ程度の被検査体には対応できるが、それ以上の微細ピッチの検査には対応することが出来ない等の問題を有していた。
【0004】
本発明はこのような問題点に着目してなされたもので、被検査体に検査痕を付けることなく、高密度の配線パターンの検査ができる接触電極を有する配線回路基板構造及びその形成方法を提供することにある。
【0005】
【課題を解決するための手段】
本発明において上記課題を解決するため、請求項1においては、配線回路に接続された接触電極であって、前記接触電極内部に絶縁樹脂が埋め込まれており、且つ、前記接触電極先端部が平滑であることを特徴とする接触電極を有する配線回路基板構造としたものである。
上記の構造を採ることによって今まで対応することが出来なかった微細ピッチにも対応することができ、さらに接触電極内部に絶縁樹脂を埋め込み、且つ接触電極先端部を平滑にすることで、検査時の被検査体への損傷を防止することができる。
【0006】
また、請求項2においては、下記の一連の工程からなる接触電極を有する配線回路基板構造の形成方法としたものである。
(a)ベース基板上にめっきレジスト層を形成する工程。
(b)前記めっきレジスト層に開口部を形成する工程。
(c)前記開口部を含むめっきレジスト層に導体層を形成する工程。
(d)前記導体層をパターニングして接触電極及び配線パターンを形成する工程。
(e)絶縁樹脂を塗布し、前記接触電極内部に絶縁樹脂を埋め込んだ絶縁樹脂層を形成する工程。
(f)必要に応じて、配線パターン及び絶縁樹脂層の形成工程を必要回数繰り返し、多層配線回路を形成する工程。
(g)ベース基板及びめっきレジスト層を除去する工程。
これらの工程によって電極高さが均一で、電極内部に絶縁樹脂が埋め込まれ、且つ電極先端部が平滑な接触電極を有する配線回路基板を形成することができる。さらに、ビルドアップ方式で多層配線回路が形成できるため、配線の引き回しが容易になり、検査測定器等への配線の取り出しが容易な検査治具が得られる。
【0007】
さらにまた、請求項3では、下記の一連の工程からなる接触電極を有する配線回路基板構造の形成方法としたものである。
(a)ベース基板上に2層のめっきレジスト層を形成する工程
(b)前記2層のめっきレジスト層に開口部を形成する工程。
(c)前記開口部を含む2層のめっきレジスト層に導体層を形成する工程。
(d)前記導体層をパターニングして接触電極及び配線パターンを形成する工程。
(e)絶縁樹脂を塗布し、前記接触電極内部に絶縁樹脂を埋め込んだ絶縁樹脂層を形成する工程。
(f)必要に応じて、配線パターン及び絶縁樹脂層の形成工程を必要回数繰り返し、多層配線回路を形成する工程。
(g)ベース基板及び2層のめっきレジスト層の内1層のめっきレジスト層を除去する工程。
請求項3では、(a)の工程で2層のめっきレジスト層を形成し、最後の(g)の工程でベース基板及び2層のめっきレジスト層の内1層のめっきレジスト層を除去することによって、1層のめっきレジスト層を配線回路側に残すようにしたもので、配線回路の接触電極側及び接触電極の一部に保護層が形成され、検査治具としての耐久性を持たせることができる。
【0008】
【発明の実施の形態】
本発明の接触電極を有する配線回路基板の構造は、接触電極内部に絶縁樹脂が埋め込まれており、且つ先端部が平滑である接触電極が配線回路に接続されている。その形成法は、ベース基板上にめっきレジスト層を形成し、めっきレジスト層に開口部を形成する。その後、開口部を含むめっきレジスト層に導体層を形成し、パターニング処理して接触電極及び配線パターンを形成する。さらに、絶縁樹脂を塗布し、接触電極内部に絶縁樹脂を埋め込んだ絶縁樹脂層を形成する。必要に応じて、配線パターン及び絶縁樹脂層の形成工程を必要回数繰り返すことにより多層配線回路を作製する。最後に、ベース基板ならびにめっきレジスト層を除去することで、接触電極を有する配線回路基板構造の検査治具が得られる。
ここで、多層配線回路が必要でない場合は、上記の絶縁樹脂層形成した時点でさらに絶縁樹脂層で基板としての強度補強をして検査治具基板とすることもある。
【0009】
以下、接触電極を有する配線回路基板構造及びその形成方法について述べる。
まず、ベース基板上にめっきレジスト層を形成する(図1(a)及び図2(a)参照)。ベース基板は、平滑性が高くエッチング等の工程によって除去できる材質が望ましい。具体的には、銅板や鉄・ニッケル合金板0.2〜1.0mm厚が良い。めっきレジスト層は図1(a)に示す1層構成と図2(a)に示す2層構成では使用するレジスト材質は若干異なってくる。基本的には導体層形成時のめっき液耐性があり、最後のめっきレジスト層除去工程で容易に除去できるめっきレジスト層を選択する必要がある。
【0010】
図1(a)に示すような1層構成のめっきレジスト層の場合開口部3の形成方法によって選択する必要がある。開口部3をフォトリソグラフィー法を用いて形成する場合はめっき耐性のある感光性樹脂が使用でき、一般的には均一な膜厚のレジスト層が得られるドライフィルムがプロセスの容易性の点からも好都合である。開口部3をレーザ加工にて形成する場合はめっきレジスト層2としては広い範囲の樹脂が使用できるが後工程のメッキレジスト層を除去する工程を考慮するとフォトリソグラフィー法にて使用される感光性樹脂を使用するのが好ましい。
【0011】
図2(a)に示すような2層構成のめっきレジスト層の場合めっき第1レジスト層と第2めっきレジスト層では接触電極形成工程での役目は同じであるが、ベース基板11と第1めっきレジスト層12aを除去した後の第2めっきレジスト層は配線回路と接触電極に対しては保護層の役目をするため、耐性を重視して選択する必要がある。
以上の点から第1めっきレジスト層は導体層15形成時のめっき液耐性があり、最後の第1めっきレジスト層除去工程で除去容易な感光性樹脂が適しており、層形成時の膜厚均一性を考慮するとドライフィルムが好都合である。第2めっきレジスト層はめっき液耐性があれば良く、最終的にはそのまま保護層として残るので、適用できるレジスト材質は広い範囲で選択でき、熱硬化型のエポキシ樹脂やポリイミド樹脂が使用できる。
【0012】
次に、めっきレジスト層に開口部を形成する(図1(b)及び図2(b)参照)。
開口部の形成法としてはフォトリソグラフィー法、ドリル加工等の物理加工法、ドライプロセス法、レーザ加工法等があるが、加工精度、形状制御性、加工効率等から判断した場合フォトリソグラフィー法、レーザ加工法が一般的である。図1(b)に示す1層構成のめっきレジスト層の場合開口部の形成法としてはフォトリソグラフィー法、レーザ加工法いずれでも可能である。
図1(b)に示す2層構成のめっきレジスト層の場合開口部の形成法としては第1めっきレジスト層と第2めっきレジスト層の材質が各々異なるため加工法が限定され、レーザ加工法が最も適している。
レーザ加工には、エキシマレーザ加工あるいは短パルスの炭酸ガスレーザ加工などが使用できる。これらのレーザは形成する接触電極の大きさによって選択することが望ましい。接触電極径が100〜200μmの場合には炭酸ガスレーザ加工が良いが、100μm以下の場合にはエキシマレーザ加工が適している。レーザ加工を用いた場合には、光学系にマスクを入れることにより様々な形の開口部3を形成できるため、これによって電極形状を変えることが出来る。
【0013】
次に、開口部3を含むめっきレジスト層に導体層4を形成する(図1(c)参照)。導体層4の形成方法は、最初にスパッタリング法または蒸着法または無電解めっき法等により薄膜導体層を形成し、その後電解めっき法により所定の厚みの導体層4形成する。
【0014】
次に、導体層4をパターニング処理して配線パターン4a及び接触電極4a’を形成する(図1(d)参照)。パターニング処理は一般的なフォトエッチング工程にて行う。また、パターンの精度によってはセミアディティブ法を用いても良い。セミアディティブ法は、開口部を含むめっきレジスト層全面に薄膜導体層を形成し、さらにめっきレジストパターンを形成し、レジストパターン以外の部分に電解めっきにて導体層を形成して、レジストパターンを除去して、レジストパターンが除去された部分の薄膜導体層をソフトエッチングによって除去することによって配線パターン4a及び接触電極4a’を形成する方法である。
【0015】
次に、熱硬化型のエポキシ樹脂やポリイミド樹脂をスクリーン印刷やスピンコートによって塗布し、絶縁樹脂を接触電極の内部に埋め込んだ絶縁樹脂層5を形成し、レーザ加工にてビアホール6を形成する(図1(e)参照)。ここで、接触電極内部に絶縁樹脂を埋め込むのは、接触電極が被測定基板電極に接触した際に僅かでも基板の凹凸を吸収できるようにしたものである。絶縁樹脂としては、ゴムフィラーを上記樹脂に分散することによって改善することができる。また、ドライフィルムタイプの永久レジストを用いても良い。
【0016】
必要に応じて、配線パターン及び絶縁樹脂層の形成工程を必要回数繰り返し、多層配線回路を形成する。ここでは第2配線パターン7、第2絶縁樹脂層8、第3配線パターン9をそれぞれ形成し、3層の配線回路を作製する(図1(f)参照)。
【0017】
最後に、ベース基板及びめっきレジスト層を除去して、本発明の接触電極を有する配線回路基板構造を作製することができる(図1(g)及び図2(g)参照)。
【0018】
【実施例】
以下、本発明の実施例について図を用いて詳細に説明する。
<実施例1>
0.2mm厚のCu板からなるベース基板1上にめっきレジスト(PMER:東京応化工業(株)製)をスピンコーターによってコーティングし、加熱硬化してめっきレジスト層2を形成した(図1(a)参照)。
【0019】
次に、めっきレジスト層2をエキシマレーザ加工機を用いて50μmφの開口部3を形成した(図1(b)参照)。エキシマレーザ加工機の加工条件はエネルギ密度1.0J/cm2 であった。
【0020】
次に、開口部3を含むめっきレジスト層2にスパッタリングにより銅をスパッタし、膜厚3500Åの薄膜導体層を形成した。さらに電解銅めっきによって薄膜導体層上に3〜10μmの導体層4を形成した(図1(c)参照)。
【0021】
次に、導体層4上にポジ型感光性レジスト(OFPR:東京応化工業(株)製)を塗布して感光性樹脂層を形成し、パターン露光、現像処理してレジストパターンを形成した。レジストパターン以外の部分をエッチングして接触電極4a’及び配線パターン4aを形成した(図1(d)参照)。
【0022】
次に、熱硬化型のエポキシ樹脂をスクリーン印刷によってコーティングし、接触電極4a’にエポキシ樹脂を埋め込んだ30μm厚の絶縁樹脂層5を形成した。さらに、エキシマレーザ加工によりビアホール6を形成した(図1(e)参照)。
【0023】
次に、無電解銅めっきにより薄膜導体層を、さらに電解銅めっきにより導体層を形成しパターニング処理して第2配線パターン7を形成した。熱硬化型のエポキシ樹脂をスクリーン印刷し、加熱硬化してて30μm厚の第2絶縁樹脂層8を形成した。同様にして、薄膜導体層、導体層を形成し、パターニング処理して第3配線パターン9を形成した(図1(f)参照)。
【0024】
最後に、エッチングによってベース基板1を除去した後5wt%の水酸化ナトリウム溶液に浸せきし、めっきレジスト層2aを除去し、本発明の接触電極を有する配線回路基板構造を得ることができた(図1(g)参照)。
【0025】
<実施例2>
2mm厚のCu板からなるベース基板11上にドライフィルム(日立化成工業(株)製)をラミネーターによってラミネートして全面露光、加熱乾燥して第1めっきレジスト層12を形成した。さらに加熱硬化型のエポキシ樹脂をロールコータにて塗布し、加熱硬化して第2めっきレジスト層13を形成した(図2(a)参照)。
【0026】
次に、エキシマレーザ加工機を用いて第1めっきレジスト層12及び第2めっきレジスト層13に50μmφの開口部14を形成した(図2(b)参照)。エキシマレーザ加工機の加工条件はエネルギ密度1.0J/cm2 であった。
【0027】
次に、実施例1と同様な工程で導体層15を形成した(図2(c)参照)。
【0028】
次に、実施例1と同様な工程で接触電極15a’及び配線パターン15aを形成した(図2(d)参照)。
【0029】
次に、実施例1と同様な工程で絶縁樹脂層16及びビアホール17を形成した(図2(e)参照)。
【0030】
次に、実施例1と同様な工程で第2配線パターン18及び第2絶縁樹脂層19及び第3配線パターン20をそれぞれ形成した(図2(f)参照)。
【0031】
最後に、エッチングによってベース基板11を除去した後5wt%の水酸化ナトリウム溶液に浸せきし、第1めっきレジスト層12aを除去し、本発明の接触電極を有する配線回路基板構造を得ることができた(図2(g)参照)。
【0032】
【発明の効果】
本発明の接触電極を有する配線回路基板構造を用いることにより、被検査基板との接触時に被検査基板を損傷させることなく導通をとることができる。
また、接触電極高さが均一であるため接触精度を上げることができる。
さらに、本発明の接触電極の形成法によると微細ピッチ接触電極にしても形状、高さが均一にできるため、微細ピッチの被検査体にも対応することができる。さらに、接触電極の形成法によっては配線回路の接触電極側及び接触電極の一部に保護層を形成できるので検査治具としての耐久性を持たせることができる。さらにまた、接触電極の形状も比較的自由に設定できるため、従来よりも基板設計の自由度を向上することができる。
【図面の簡単な説明】
【図1】(a)〜(g)は本発明の実施例1における接触電極を有する配線回路基板構造及び製造方法を示す構造断面図である。
【図2】(a)〜(g)は本発明の実施例2における接触電極を有する配線回路基板構造及び製造方法を示す構造断面図である。
【符号の説明】
1、11……ベース基板
2……めっきレジスト層
2a……開口部を有するめっきレジスト層
3、14……開口部
4、15……導体層
4a、15a……配線パターン
4a’、15a’……接触電極
5、16……絶縁樹脂層
6、17……ビアホール
7、18……第2配線パターン
8、19……第2絶縁樹脂層
9、20……第3配線パターン
12……第1めっきレジスト層
12a……開口部を有する第1めっきレジスト層
13……第2めっきレジスト層
13a……開口部を有する第2めっきレジスト層
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an inspection jig substrate used for conducting a continuity inspection of a semiconductor device or a printed circuit board.
[0002]
[Prior art]
Conventionally, in a continuity test of a semiconductor device or a printed circuit board, a needle-like test electrode is brought into contact with an electrode portion of an object to be inspected as is known from a wafer probe or a wiring test, and a continuity test is performed. In addition, a wiring circuit board for inspection having electrodes is formed on a wiring circuit board having a relatively low wiring density, and contact with the wiring circuit board, which is an object to be inspected, is conducted through an anisotropic conductive sheet to conduct a continuity test. Is going.
[0003]
[Problems to be solved by the invention]
In the conventional method for inspecting the continuity of a semiconductor device or a printed circuit board by using a wafer probe or a wiring inspection, since the needle-shaped inspection electrode is brought into contact with the inspection object, an inspection mark is left on the inspection object, and further, the electrode penetrates the inspection object May cause serious damage. Further, it has been difficult to form a probe for inspection due to an increase in wiring density and high integration. The method using an inspection substrate can cope with an object to be inspected with a pitch of about 200 μm due to the relation of the conduction pitch of the anisotropic conductive sheet, but cannot cope with inspection of a fine pitch beyond that. Had.
[0004]
The present invention has been made paying attention to such problems, and a printed circuit board structure having a contact electrode capable of inspecting a high-density wiring pattern without making an inspection mark on an object to be inspected and a method for forming the same It is to provide.
[0005]
[Means for Solving the Problems]
In order to solve the above-described problems in the present invention, in claim 1, the contact electrode is connected to a wiring circuit, an insulating resin is embedded in the contact electrode, and the tip of the contact electrode is smooth. This is a printed circuit board structure having a contact electrode.
By adopting the above structure, it is possible to cope with fine pitches that could not be dealt with until now, and furthermore, by embedding insulating resin inside the contact electrode and smoothing the tip of the contact electrode, at the time of inspection Damage to the object to be inspected can be prevented.
[0006]
According to a second aspect of the present invention, there is provided a method for forming a printed circuit board structure having a contact electrode comprising the following series of steps.
(A) A step of forming a plating resist layer on the base substrate.
(B) A step of forming an opening in the plating resist layer.
(C) The process of forming a conductor layer in the plating resist layer containing the said opening part.
(D) A step of patterning the conductor layer to form a contact electrode and a wiring pattern.
(E) A step of applying an insulating resin to form an insulating resin layer in which the insulating resin is embedded in the contact electrode.
(F) A step of forming a multilayer wiring circuit by repeating the steps of forming the wiring pattern and the insulating resin layer as many times as necessary.
(G) A step of removing the base substrate and the plating resist layer.
By these steps, it is possible to form a printed circuit board having a contact electrode with a uniform electrode height, an insulating resin embedded in the electrode, and a smooth electrode tip. Furthermore, since a multilayer wiring circuit can be formed by a build-up method, wiring can be easily routed, and an inspection jig can be obtained in which wiring can be easily taken out to an inspection measuring instrument or the like.
[0007]
Furthermore, according to a third aspect of the present invention, there is provided a method for forming a printed circuit board structure having a contact electrode comprising the following series of steps.
(A) Step of forming two plating resist layers on the base substrate (b) Step of forming openings in the two plating resist layers.
(C) A step of forming a conductor layer on the two plating resist layers including the opening.
(D) A step of patterning the conductor layer to form a contact electrode and a wiring pattern.
(E) A step of applying an insulating resin to form an insulating resin layer in which the insulating resin is embedded in the contact electrode.
(F) A step of forming a multilayer wiring circuit by repeating the steps of forming the wiring pattern and the insulating resin layer as many times as necessary.
(G) A step of removing one plating resist layer of the base substrate and the two plating resist layers.
According to a third aspect of the present invention, two plating resist layers are formed in the step (a), and one plating resist layer of the base substrate and the two plating resist layers is removed in the last step (g). In this way, one plating resist layer is left on the wiring circuit side, and a protective layer is formed on the contact electrode side of the wiring circuit and a part of the contact electrode, so that it has durability as an inspection jig. Can do.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
In the structure of the printed circuit board having the contact electrode according to the present invention, the contact electrode is embedded in the contact electrode, and the contact electrode having a smooth tip is connected to the wiring circuit. In the formation method, a plating resist layer is formed on a base substrate, and an opening is formed in the plating resist layer. Thereafter, a conductor layer is formed on the plating resist layer including the opening, and a patterning process is performed to form a contact electrode and a wiring pattern. Further, an insulating resin is applied to form an insulating resin layer in which the insulating resin is embedded inside the contact electrode. If necessary, a multilayer wiring circuit is produced by repeating the wiring pattern and insulating resin layer forming steps as many times as necessary. Finally, by removing the base substrate and the plating resist layer, an inspection jig for a printed circuit board structure having contact electrodes can be obtained.
Here, when a multilayer wiring circuit is not necessary, the strength of the substrate may be further reinforced by the insulating resin layer when the insulating resin layer is formed, so that an inspection jig substrate may be obtained.
[0009]
Hereinafter, a printed circuit board structure having contact electrodes and a method for forming the same will be described.
First, a plating resist layer is formed on the base substrate (see FIGS. 1A and 2A). The base substrate is preferably made of a material that has high smoothness and can be removed by a process such as etching. Specifically, a copper plate or an iron / nickel alloy plate having a thickness of 0.2 to 1.0 mm is preferable. The resist material used for the plating resist layer is slightly different between the one-layer structure shown in FIG. 1A and the two-layer structure shown in FIG. Basically, it is necessary to select a plating resist layer that is resistant to the plating solution when forming the conductor layer and can be easily removed in the final plating resist layer removal step.
[0010]
In the case of a plating resist layer having a single layer structure as shown in FIG. In the case where the opening 3 is formed using a photolithography method, a photosensitive resin having plating resistance can be used. In general, a dry film from which a resist layer having a uniform film thickness can be obtained also from the viewpoint of ease of process. Convenient. When the opening 3 is formed by laser processing, a wide range of resins can be used as the plating resist layer 2, but a photosensitive resin used in the photolithography method in consideration of the step of removing the plating resist layer in the subsequent step. Is preferably used.
[0011]
In the case of a two-layered plating resist layer as shown in FIG. 2 (a), the plating resist layer and the second plating resist layer have the same role in the contact electrode forming step, but the base substrate 11 and the first plating layer are the same. The second plating resist layer after removing the resist layer 12a serves as a protective layer for the wiring circuit and the contact electrode, and therefore needs to be selected with an emphasis on resistance.
In view of the above, the first plating resist layer is resistant to the plating solution when the conductor layer 15 is formed, and a photosensitive resin that is easy to remove in the final first plating resist layer removal step is suitable. Considering the properties, a dry film is convenient. The second plating resist layer only needs to have resistance to the plating solution and eventually remains as a protective layer as it is. Therefore, the applicable resist material can be selected in a wide range, and a thermosetting epoxy resin or polyimide resin can be used.
[0012]
Next, an opening is formed in the plating resist layer (see FIGS. 1B and 2B).
There are photolithography method, physical processing method such as drilling, dry process method, laser processing method, etc. as the method of forming the opening, but photolithography method, laser when judging from processing accuracy, shape controllability, processing efficiency, etc. Processing methods are common. In the case of the single-layered plating resist layer shown in FIG. 1B, the opening can be formed by either photolithography or laser processing.
In the case of the two-layered plating resist layer shown in FIG. 1 (b), the method of forming the opening is limited because the materials of the first plating resist layer and the second plating resist layer are different, and the laser processing method is limited. Most suitable.
For laser processing, excimer laser processing, short pulse carbon dioxide laser processing, or the like can be used. These lasers are preferably selected according to the size of the contact electrode to be formed. Carbon dioxide laser processing is good when the contact electrode diameter is 100 to 200 μm, but excimer laser processing is suitable when the contact electrode diameter is 100 μm or less. When laser processing is used, various shapes of the opening 3 can be formed by inserting a mask in the optical system, whereby the electrode shape can be changed.
[0013]
Next, the conductor layer 4 is formed on the plating resist layer including the opening 3 (see FIG. 1C). The conductor layer 4 is formed by first forming a thin film conductor layer by sputtering, vapor deposition, electroless plating, or the like, and then forming a conductor layer 4 having a predetermined thickness by electrolytic plating.
[0014]
Next, the conductor layer 4 is patterned to form a wiring pattern 4a and a contact electrode 4a ′ (see FIG. 1D). The patterning process is performed by a general photoetching process. Further, depending on the accuracy of the pattern, a semi-additive method may be used. In the semi-additive method, a thin-film conductor layer is formed on the entire surface of the plating resist layer including the opening, a plating resist pattern is further formed, and a conductor layer is formed by electrolytic plating on portions other than the resist pattern to remove the resist pattern. Then, the wiring pattern 4a and the contact electrode 4a ′ are formed by removing the thin-film conductor layer in the portion where the resist pattern is removed by soft etching.
[0015]
Next, a thermosetting epoxy resin or polyimide resin is applied by screen printing or spin coating to form the insulating resin layer 5 in which the insulating resin is embedded in the contact electrode, and the via hole 6 is formed by laser processing ( (Refer FIG.1 (e)). Here, the reason why the insulating resin is embedded in the contact electrode is that the unevenness of the substrate can be absorbed even when the contact electrode comes into contact with the substrate electrode to be measured. The insulating resin can be improved by dispersing a rubber filler in the resin. Also, a dry film type permanent resist may be used.
[0016]
If necessary, the formation process of the wiring pattern and the insulating resin layer is repeated as many times as necessary to form a multilayer wiring circuit. Here, the second wiring pattern 7, the second insulating resin layer 8, and the third wiring pattern 9 are formed to produce a three-layer wiring circuit (see FIG. 1 (f)).
[0017]
Finally, the base substrate and the plating resist layer are removed, and the printed circuit board structure having the contact electrode of the present invention can be manufactured (see FIGS. 1 (g) and 2 (g)).
[0018]
【Example】
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
<Example 1>
A plating resist (PMER: manufactured by Tokyo Ohka Kogyo Co., Ltd.) was coated on a base substrate 1 made of a 0.2 mm thick Cu plate by a spin coater, and heat-cured to form a plating resist layer 2 (FIG. 1A )reference).
[0019]
Next, an opening 3 having a diameter of 50 μm was formed in the plating resist layer 2 using an excimer laser processing machine (see FIG. 1B). The processing condition of the excimer laser processing machine was an energy density of 1.0 J / cm 2 .
[0020]
Next, copper was sputtered onto the plating resist layer 2 including the opening 3 by sputtering to form a thin film conductor layer having a thickness of 3500 mm. Further, a conductor layer 4 of 3 to 10 μm was formed on the thin film conductor layer by electrolytic copper plating (see FIG. 1C).
[0021]
Next, a positive photosensitive resist (OFPR: manufactured by Tokyo Ohka Kogyo Co., Ltd.) was applied onto the conductor layer 4 to form a photosensitive resin layer, and pattern exposure and development processing were performed to form a resist pattern. The portions other than the resist pattern were etched to form the contact electrode 4a ′ and the wiring pattern 4a (see FIG. 1D).
[0022]
Next, a thermosetting epoxy resin was coated by screen printing to form an insulating resin layer 5 having a thickness of 30 μm in which the epoxy resin was embedded in the contact electrode 4a ′. Furthermore, a via hole 6 was formed by excimer laser processing (see FIG. 1E).
[0023]
Next, a thin film conductor layer was formed by electroless copper plating, and a conductor layer was further formed by electrolytic copper plating, followed by patterning to form a second wiring pattern 7. A thermosetting epoxy resin was screen-printed and heat-cured to form a second insulating resin layer 8 having a thickness of 30 μm. Similarly, a thin film conductor layer and a conductor layer were formed, and a third wiring pattern 9 was formed by patterning (see FIG. 1F).
[0024]
Finally, after removing the base substrate 1 by etching, it was immersed in a 5 wt% sodium hydroxide solution to remove the plating resist layer 2a, and a wired circuit board structure having a contact electrode of the present invention could be obtained (FIG. 1 (g)).
[0025]
<Example 2>
A dry film (manufactured by Hitachi Chemical Co., Ltd.) was laminated on a base substrate 11 made of a 2 mm thick Cu plate using a laminator, and the entire surface was exposed and dried by heating to form a first plating resist layer 12. Further, a thermosetting epoxy resin was applied with a roll coater and heat-cured to form a second plating resist layer 13 (see FIG. 2A).
[0026]
Next, an opening 14 of 50 μmφ was formed in the first plating resist layer 12 and the second plating resist layer 13 using an excimer laser processing machine (see FIG. 2B). The processing condition of the excimer laser processing machine was an energy density of 1.0 J / cm 2 .
[0027]
Next, a conductor layer 15 was formed by the same process as in Example 1 (see FIG. 2C).
[0028]
Next, the contact electrode 15a ′ and the wiring pattern 15a were formed by the same process as in Example 1 (see FIG. 2D).
[0029]
Next, an insulating resin layer 16 and a via hole 17 were formed by the same process as in Example 1 (see FIG. 2E).
[0030]
Next, the second wiring pattern 18, the second insulating resin layer 19, and the third wiring pattern 20 were formed by the same process as in Example 1 (see FIG. 2F).
[0031]
Finally, after removing the base substrate 11 by etching, it was immersed in a 5 wt% sodium hydroxide solution to remove the first plating resist layer 12a, and a wired circuit board structure having a contact electrode of the present invention could be obtained. (See FIG. 2 (g)).
[0032]
【The invention's effect】
By using the printed circuit board structure having the contact electrode of the present invention, conduction can be achieved without damaging the board to be inspected when contacting the board to be inspected.
Further, since the contact electrode height is uniform, the contact accuracy can be increased.
Furthermore, according to the contact electrode forming method of the present invention, the fine pitch contact electrode can be made uniform in shape and height, and therefore can be applied to an object to be inspected with a fine pitch. Further, depending on the method of forming the contact electrode, a protective layer can be formed on the contact electrode side of the wiring circuit and a part of the contact electrode, so that durability as an inspection jig can be provided. Furthermore, since the shape of the contact electrode can be set relatively freely, the degree of freedom in designing the substrate can be improved as compared with the conventional case.
[Brief description of the drawings]
FIGS. 1A to 1G are structural cross-sectional views showing a printed circuit board structure having a contact electrode and a manufacturing method in Example 1 of the present invention.
FIGS. 2A to 2G are structural cross-sectional views showing a printed circuit board structure having a contact electrode and a manufacturing method in Example 2 of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1, 11 ... Base substrate 2 ... Plating resist layer 2a ... Plating resist layer 3 with opening part 14, 14 ... Opening part 4, 15 ... Conductive layer 4a, 15a ... Wiring pattern 4a ', 15a' ... ... contact electrodes 5 and 16 ... insulating resin layers 6 and 17 ... via holes 7 and 18 ... second wiring patterns 8 and 19 ... second insulating resin layers 9 and 20 ... third wiring pattern 12 ... first Plating resist layer 12a... First plating resist layer 13 having opening... Second plating resist layer 13a... Second plating resist layer having opening

Claims (3)

配線回路に接続された接触電極であって、前記接触電極内部に絶縁樹脂が埋め込まれており、且つ、前記接触電極先端部が平滑であることを特徴とする接触電極を有する配線回路基板構造。A wiring circuit board structure having a contact electrode connected to a wiring circuit, wherein an insulating resin is embedded in the contact electrode, and a tip of the contact electrode is smooth. 下記の一連の工程からなる接触電極を有する配線回路基板構造の形成方法。
(a)ベース基板上にめっきレジスト層を形成する工程
(b)前記めっきレジスト層に開口部を形成する工程。
(c)前記開口部を含むめっきレジスト層に導体層を形成する工程。
(d)前記導体層をパターニングして接触電極及び配線パターンを形成する工程。
(e)絶縁樹脂を塗布し、前記接触電極内部に絶縁樹脂を埋め込んだ絶縁樹脂層を形成する工程。
(f)必要に応じて、配線パターン及び絶縁樹脂層の形成工程を必要回数繰り返し、多層配線回路を形成する工程。
(g)ベース基板及びめっきレジスト層を除去する工程。
A method for forming a printed circuit board structure having a contact electrode comprising the following series of steps.
(A) A step of forming a plating resist layer on the base substrate (b) A step of forming an opening in the plating resist layer.
(C) The process of forming a conductor layer in the plating resist layer containing the said opening part.
(D) A step of patterning the conductor layer to form a contact electrode and a wiring pattern.
(E) The process of apply | coating insulating resin and forming the insulating resin layer which embedded the insulating resin inside the said contact electrode.
(F) A step of forming a multilayer wiring circuit by repeating the steps of forming the wiring pattern and the insulating resin layer as many times as necessary.
(G) A step of removing the base substrate and the plating resist layer.
下記の一連の工程からなる接触電極を有する配線回路基板構造の形成方法。
(a)ベース基板上に2層のめっきレジスト層を形成する工程
(b)前記2層のめっきレジスト層に開口部を形成する工程。
(c)前記開口部を含む2層のめっきレジスト層に導体層を形成する工程。
(d)前記導体層をパターニングして接触電極及び配線パターンを形成する工程。
(e)絶縁樹脂を塗布し、前記接触電極内部に絶縁樹脂を埋め込んだ絶縁樹脂層を形成する工程。
(f)必要に応じて、配線パターン及び絶縁樹脂層の形成工程を必要回数繰り返し、多層配線回路を形成する工程。
(g)ベース基板及び2層のめっきレジスト層の内1層のめっきレジスト層を除去する工程。
A method for forming a printed circuit board structure having a contact electrode comprising the following series of steps.
(A) Step of forming two plating resist layers on the base substrate (b) Step of forming openings in the two plating resist layers.
(C) A step of forming a conductor layer on the two plating resist layers including the opening.
(D) A step of patterning the conductor layer to form a contact electrode and a wiring pattern.
(E) The process of apply | coating insulating resin and forming the insulating resin layer which embedded the insulating resin inside the said contact electrode.
(F) A step of forming a multilayer wiring circuit by repeating the steps of forming the wiring pattern and the insulating resin layer as many times as necessary.
(G) A step of removing one plating resist layer of the base substrate and the two plating resist layers.
JP28410696A 1996-10-25 1996-10-25 Wiring circuit board structure having contact electrode and method for forming the same Expired - Fee Related JP3744079B2 (en)

Priority Applications (1)

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Application Number Priority Date Filing Date Title
JP28410696A JP3744079B2 (en) 1996-10-25 1996-10-25 Wiring circuit board structure having contact electrode and method for forming the same

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JP3744079B2 true JP3744079B2 (en) 2006-02-08

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