JP3730003B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP3730003B2
JP3730003B2 JP02206498A JP2206498A JP3730003B2 JP 3730003 B2 JP3730003 B2 JP 3730003B2 JP 02206498 A JP02206498 A JP 02206498A JP 2206498 A JP2206498 A JP 2206498A JP 3730003 B2 JP3730003 B2 JP 3730003B2
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JP
Japan
Prior art keywords
power supply
line
circuit
ground
substrate bias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP02206498A
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English (en)
Japanese (ja)
Other versions
JPH10294429A5 (enExample
JPH10294429A (ja
Inventor
磨 高 之 播
村 健 一 中
田 正 美 増
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP02206498A priority Critical patent/JP3730003B2/ja
Priority to US09/025,662 priority patent/US6060946A/en
Publication of JPH10294429A publication Critical patent/JPH10294429A/ja
Publication of JPH10294429A5 publication Critical patent/JPH10294429A5/ja
Application granted granted Critical
Publication of JP3730003B2 publication Critical patent/JP3730003B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00346Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Dram (AREA)
JP02206498A 1997-02-18 1998-02-03 半導体装置 Expired - Fee Related JP3730003B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP02206498A JP3730003B2 (ja) 1997-02-18 1998-02-03 半導体装置
US09/025,662 US6060946A (en) 1997-02-18 1998-02-18 Semiconductor device having improved immunity to power supply voltage fluctuations

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP3397197 1997-02-18
JP9-33971 1997-02-18
JP02206498A JP3730003B2 (ja) 1997-02-18 1998-02-03 半導体装置

Publications (3)

Publication Number Publication Date
JPH10294429A JPH10294429A (ja) 1998-11-04
JPH10294429A5 JPH10294429A5 (enExample) 2005-04-28
JP3730003B2 true JP3730003B2 (ja) 2005-12-21

Family

ID=26359221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP02206498A Expired - Fee Related JP3730003B2 (ja) 1997-02-18 1998-02-03 半導体装置

Country Status (2)

Country Link
US (1) US6060946A (enExample)
JP (1) JP3730003B2 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4408500B2 (ja) 1999-11-18 2010-02-03 株式会社ルネサステクノロジ 半導体集積回路
US6731154B2 (en) * 2002-05-01 2004-05-04 International Business Machines Corporation Global voltage buffer for voltage islands
US7369741B2 (en) * 2003-11-17 2008-05-06 Fiber Optics Network Solutions Corp. Storage adapter with dust cap posts
KR100907009B1 (ko) * 2007-11-12 2009-07-08 주식회사 하이닉스반도체 반도체 집적 회로
JP5175597B2 (ja) * 2007-11-12 2013-04-03 エスケーハイニックス株式会社 半導体集積回路
US8502590B2 (en) 2009-12-14 2013-08-06 The Boeing Company System and method of controlling devices operating within different voltage ranges
TWI727204B (zh) * 2018-09-13 2021-05-11 瑞昱半導體股份有限公司 管線化類比數位轉換器

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5481178A (en) * 1993-03-23 1996-01-02 Linear Technology Corporation Control circuit and method for maintaining high efficiency over broad current ranges in a switching regulator circuit
US5399920A (en) * 1993-11-09 1995-03-21 Texas Instruments Incorporated CMOS driver which uses a higher voltage to compensate for threshold loss of the pull-up NFET
JP3625851B2 (ja) * 1993-12-28 2005-03-02 沖電気工業株式会社 レベルシフタ回路
US5736869A (en) * 1996-05-16 1998-04-07 Lsi Logic Corporation Output driver with level shifting and voltage protection

Also Published As

Publication number Publication date
US6060946A (en) 2000-05-09
JPH10294429A (ja) 1998-11-04

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