JP3676771B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a semiconductor device, and in particular, a part of a semiconductor layer is removed by etching to form a mesa part, and an embedded semiconductor layer is formed on the part removed by etching on both sides of the mesa part. The present invention relates to a method for manufacturing a semiconductor device in which epitaxial crystal growth is performed using a metal vapor phase growth (MOVPE) method.
[0002]
[Prior art]
In general, a semiconductor laser used as a light source for optical communication is required to have high efficiency and high output. This embedded semiconductor laser capable of obtaining high efficiency and high output has, for example, the cross-sectional shape shown in FIG.
[0003]
A mesa portion 2 having a trapezoidal shape is formed at the center of the upper surface of the n-type substrate 1 made of n-type InP, and current block portions 3 are formed outside the mesa portion 2 on the upper surface of the n-type substrate 1, respectively. Has been.
[0004]
In the mesa portion 2, a first clad layer 4 made of n-type InP in contact with the n-type substrate 1 is formed. An active layer 5 having a multiple quantum well structure made of non-doped InGaAs, non-doped InGaAsP, or a combination thereof is formed on the upper side of the first clad layer 4. The clad layer 6 is formed.
[0005]
The current block portion 3 in contact with the side surface 7 of the mesa portion 2 and the upper surface 8 of the n-type substrate 1 includes a p-type current block layer 9 formed of p-type InP positioned on the lower side and an n-type InP positioned on the upper side. And an n-type current blocking layer 10 formed by
[0006]
A third clad layer 12 made of p-type InP is formed on the upper surface of the mesa unit 2 and the upper surface of each current block unit 3 so as to cover these upper surfaces in common. Note that the upper end 11 of the p-type current blocking layer 9 is in contact with the third cladding layer 12. A contact layer 13 made of InGaAsP or InGaAs is formed on the upper side of the third cladding layer 12. A p-electrode 14 is attached to the upper surface of the contact layer 13.
Further, an n electrode 15 is attached to the lower side of the n-type substrate 1.
[0007]
A method of manufacturing a semiconductor laser having the mesa portion 2 in which the both side surfaces 7 are sandwiched by the current block portion 3 will be described with reference to FIGS. 7 (a), (b), (c), and (d).
[0008]
As shown in FIG. 7A, an n-type first cladding layer 4 is formed on the upper surface of an n-type substrate 1 made of n-type InP by using a metal organic chemical vapor deposition (MOVPE) method. On the upper surface of the n-type first cladding layer 4, an active layer 5 having a multiple quantum well structure made of non-doped InGaAs, non-doped InGaAsP, or a combination thereof is formed. A p-type second cladding layer 6 is formed on the active layer 5.
[0009]
Next, on the upper side of the p-type second cladding layer 6, SiO 2 ₂ Alternatively, a layer serving as a mask made of SiNx is formed. Further, the mask layer is formed by etching the formed layer to be a mask into a stripe shape using a photolithography technique. The width W of the mask 16 formed by this etching is set to be slightly wider than the width of the upper surface of the mesa portion 2 to be formed.
[0010]
Next, for example, a mixed solution of hydrochloric acid, hydrogen peroxide solution, and water is used as an etchant, and etching is selectively performed at a place other than the mask 16 from above, as shown in FIG. A mesa portion 2 having a trapezoidal shape is formed.
[0011]
In general, when etching is performed on a semiconductor layer, the semiconductor layer is etched in the depth method and also in the lateral (side) direction. Therefore, as shown in FIG. 7B, since the mask 16 is not etched, the semiconductor layer below the tip portion is etched in the lateral (side) direction at the tip portion in the width direction of the mask 16. The front end portion in the width direction of the mask 16 remains as a ridge 17.
[0012]
As shown in FIG. 7D, the relationship between the length s of the flange 17 and the etching depth d is the ratio of the etching rate Vd in the depth direction to the etching rate Vs in the lateral (side) direction (Vs / Vd). This speed ratio (Vs / Vd) is substantially determined by the characteristics of the etching solution.
[0013]
Next, as shown in FIG. 7 (c), the mask 16 with the ridges 17 formed on both sides is left and surrounded by the side surface 7 of the mesa unit 2 and the exposed upper surface 8 of the n-type substrate 1. A p-type current blocking layer 9 is formed on the previously etched portion by using the metal organic chemical vapor deposition (MOVPE) method described above. Further, an n-type current blocking layer 10 is formed on the upper side of the p-type current blocking layer 9 by using a metal organic chemical vapor deposition (MOVPE) method. The p-type current block layer 9 and the n-type current block layer 10 constitute a current block unit 3.
[0014]
Thereafter, the semiconductor layer is immersed in another etching that corrodes only the mask 16 to remove the mask 16, and then the third layer made of p-type InP that covers the upper surface of the mesa portion 2 and the upper surfaces of the current blocking layers 3 on both sides in common. The clad layer 12 is formed. Further, a contact layer 13 made of InGaAsP or InGaAs is formed on the upper surface of the third cladding layer 12, and finally a p-electrode 14 is attached to the upper surface of the contact layer 13, and an n-electrode is formed on the lower side of the n-type substrate 1. 15 is installed.
[0015]
In the manufacturing method of the semiconductor laser having the mesa portion 2 in which the both side surfaces 7 are sandwiched by the current block portion 3 shown in FIG. 7, in order to obtain the cross-sectional shape according to the specification in the current block portion 3, In the state where 17 is left, it is put into practical use that the current block portion 3 is epitaxially grown on the etched portion by metal organic vapor phase epitaxy (MOVPE).
[0016]
In this case, the length s of the ridges 17 of the mask 16 and the etching depth d greatly affect the characteristics of the manufactured semiconductor laser. For example, as shown in FIG. 8A, when the length s of the ridge 17 of the mask 16 is excessively short, the n-type current block layer 10 on the upper side of the current block portion 3 bulges upward in the vicinity of the ridge 17, It lacks flatness. Moreover, the thickness of the p-type current block layer 9 below the current block portion 3 in the direction of the mesa side surface 7 increases, current loss increases, and the efficiency of the manufactured semiconductor laser decreases.
[0017]
Further, as shown in FIG. 8B, if the length s of the ridges 17 of the mask 16 is excessively long, crystals cannot be grown on the lower side of the ridges 17, and a space 18 is generated, or the current blocking portion 3. The p-type current blocking layer 9 on the lower side of the p-type current blocking layer 9 is not sufficiently grown on the side surface 7 of the mesa portion 2, and the thickness of the portion facing the side surface 7 of the p-type current blocking layer 9 is reduced. There is a problem that the voltage that can be applied between the p-electrode 14 and the n-electrode 15 decreases, and a high output cannot be obtained as a semiconductor laser.
[0018]
Further, as shown in FIG. 8 (c), when the etching depth d (the height of the mesa portion 2) is small, the thickness of the portion of the p-type current blocking layer 9 facing the n-type substrate 1 becomes thin, and the The voltage decreases, the voltage that can be applied between the p-electrode 14 and the n-electrode 15 decreases, and there is a problem that a high output cannot be obtained as a semiconductor laser.
[0019]
In particular, in a high-power semiconductor laser, it is necessary to make the current block portion 3 sufficiently thick in order to suppress reactive current even during high-current driving.
[0020]
As described above, the relationship between the etching depth d and the length s of the flange 17 of the mask 16 greatly depends on the shape of the current block portion 3 on both sides of the mask portion 2. (For example, refer to Patent Document 1).
[0021]
[Patent Document 1]
JP-A-7-162078
[0022]
[Problems to be solved by the invention]
Therefore, in order to realize a high-power and high-efficiency semiconductor laser, it is necessary to independently set the etching depth d and the length s of the ridges 17 of the mask 16 to optimum values.
[0023]
However, as described above, the rate ratio (Vs / Vd) between the etching rate Vd in the depth direction and the etching rate Vs in the lateral (side) direction is substantially determined by the characteristics of the etching solution. Therefore, when the etching time is set in order to obtain the optimum etching depth d, the optimum length s of the flange 17 cannot be obtained. On the contrary, when the etching time is set to obtain the optimum length s of the flange 17, the optimum etching depth d cannot be obtained.
[0024]
In order to eliminate such inconvenience, an etching solution having a speed ratio (Vs / Vd) at which the target etching depth d and the length s of the flange 17 of the mask 16 can be obtained at the same time may be employed. It is very difficult and very complicated to develop or select an etching solution having the target speed ratio (Vs / Vd).
[0025]
The present invention has been made in view of such circumstances, and can control the etching depth and the length of the mask ridge to the target etching depth and the length of the mask ridge, respectively, thereby improving the dimensional accuracy of each part. An object of the present invention is to provide a method of manufacturing a semiconductor device that can improve yield and can obtain high-efficiency and high-output characteristics.
[0026]
[Means for Solving the Problems]
The present invention forms a mesa portion by removing a part of a semiconductor layer by etching, and uses a metal organic vapor phase epitaxy (MOVPE) method to form an embedded semiconductor layer in the portion removed by etching on both sides of the mesa portion. And is applied to a method of manufacturing a semiconductor device for epitaxial crystal growth.
[0027]
In order to solve the above problem, in the method of manufacturing a semiconductor device of the present invention, the step of removing a part of the semiconductor layer by etching forms a mask corresponding to the top shape of the mesa portion on the top surface of the semiconductor layer. A step of performing a first etching with a first etchant on a portion of the semiconductor layer exposed from the mask, and immersing the etched semiconductor layer in a second etchant that corrodes only the mask. The step of removing the wrinkle portion of the mask formed by the first etching and the second etching with the third etching solution are performed on the portion of the semiconductor layer exposed from the mask from which the wrinkle portion has been removed. Including the step of.
[0028]
In the semiconductor device manufacturing method configured as described above, as a result, the semiconductor layer is etched in two steps. The total etching depth d is the depth d obtained by the first etching. ₁ And depth d by the second etching ₂ And the total etching depth (d ₁ + D ₂ = D). Further, since the mask wrinkle formed by the first etching is removed before the second etching is performed, the length s of the mask wrinkle remaining when the second etching is finished is the second time. The length s of the ridge formed by etching ₂ (S = s) ₂ ).
[0029]
Therefore, first, the second etching time t in which the target ridge length s is obtained. ₂ And this time t ₂ Only when the second etching is performed, the depth d by etching ₂ To decide. Then, the etching depth d when the second etching is performed from the target etching depth d. ₂ The value obtained by subtracting (dd ₂ ) The etching depth d of the first etching ₁ (= D−d ₂ ) So that the first etching time t ₁ To decide.
[0030]
Therefore, by etching the semiconductor layer in two steps, the total etching depth d and the mask ridge length s can be reliably set to the target etching depth and the mask ridge length, respectively.
[0031]
In another invention, the step of removing a part of the semiconductor layer by etching includes a step of forming a layer serving as a mask on the upper surface of the semiconductor layer, and a mesa portion with a photoresist on the upper surface of the layer serving as the mask. Forming a mask corresponding to the shape of the upper surface and then removing portions other than the pattern in the layer serving as a mask to form a mask; and a portion of the semiconductor layer exposed from the mask with the photoresist remaining on the mask First etching with the first etching solution, and immersing the etched semiconductor layer in a second etching solution that corrodes only the mask, so that the mask formed by the first etching is removed. Removing the portion of the semiconductor layer, removing the photoresist remaining on the upper surface of the mask using a solvent, It has been a step of performing a second round of etching in the third etching liquid to the exposed portions of the mask.
[0032]
Also in the manufacturing method of the semiconductor device configured as described above, the semiconductor layer is etched in two steps, and the second etching is performed after removing the mask portion formed by the first etching. Therefore, like the above-described method for manufacturing a semiconductor device, the total etching depth d and the mask ridge length s can be reliably set to the target etching depth and the mask ridge length, respectively. .
[0033]
Further, in the present invention, the first etching is performed with the photoresist remaining on the mask, and the substrate is immersed in a second etching solution that corrodes only the mask while the photoresist remains on the mask. The mask portion formed by the second etching is removed.
[0034]
In this case, since no photoresist is attached to the lower surface of the ridge portion of the mask formed by the first etching, the ridge portion is corroded from below. That is, the portion facing the upper surface of the mesa portion to which the photoresist of the mask is attached reliably remains, and only the ridge portion of the mask can be reliably removed. Thereafter, the photoresist remaining on the upper surface of the mask may be removed with a solvent.
[0035]
Therefore, the etching accuracy of the second etching performed thereafter can be improved.
[0036]
Furthermore, in another invention, in the semiconductor device manufacturing method described above, the first etching solution and the third etching solution are set to the same etching solution.
[0037]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
1, 2 and 3 are process diagrams showing a method of manufacturing a semiconductor device according to the first embodiment of the present invention. The same parts as those in the method of manufacturing the semiconductor laser as the semiconductor device shown in FIG. 6 and the conventional semiconductor device shown in FIG. In the first embodiment, the semiconductor laser shown in FIG. 6 will be described as an example of the semiconductor device to be manufactured.
[0038]
As shown in FIG. 1A, a first cladding layer 4 made of n-type InP is formed on the upper surface of an n-type substrate 1 made of n-type InP by using a metal organic chemical vapor deposition (MOVPE) method. Form. On the upper surface of the n-type first cladding layer 4, an active layer 5 having a multiple quantum well structure made of non-doped InGaAs, non-doped InGaAsP, or a combination thereof is formed. A second cladding layer 6 made of p-type InP is formed on the active layer 5.
[0039]
Next, as shown in FIG. 1B, an SiO 2 layer is formed on the upper side of the p-type second cladding layer 6. ₂ Alternatively, a layer 16a serving as a mask made of SiNx is formed. A shape corresponding to the shape of the upper surface of the mesa portion 2 is formed on the upper surface of the layer 16a serving as a mask with a photoresist 19 (FIG. 1C). The width W of the photoresist 19 is set to be slightly wider than the width of the upper surface of the mesa portion 2 to be formed.
[0040]
Then, by transferring the pattern of the photoresist 19 to the layer 16a serving as a mask, portions other than the pattern of the photoresist 19 in the layer 16a serving as a mask are removed to remove the mask 16 as shown in FIG. Form. Specifically, the exposed portion of the layer 16a serving as a mask is removed by immersion in an etching solution such as hydrofluoric acid (HF).
[0041]
Next, for example, a mixed solution of hydrochloric acid, hydrogen peroxide solution, and water is used as the first etching solution, and a place other than the mask 16 is selectively selected for a time t from above. ₁ Only the first etching is performed to form a mesa portion 2a having a trapezoidal shape as shown in FIG. This time t ₁ As a result of the first etching step, the second cladding layer 6, the active layer 5 and the first cladding layer 4 have a depth d. ₁ Only etched. Furthermore, the second cladding layer 6, the active layer 5, and the first cladding layer 4 are also etched in the lateral (side) direction by this first etching step, and as a result, the front end portion of the mask 16 in the width direction. Length s ₁ 庇 17a is formed.
[0042]
Next, for example, SiO such as hydrofluoric acid (HF) described above. ₂ Alternatively, the semiconductor element (semiconductor layer) shown in FIG. 2E is immersed in a second etching solution made of hydrofluoric acid (HF) or the like that corrodes only the mask 16 made of SiNx, and the first etching is performed. A length s is formed at the front end of the formed mask 16 in the width direction. ₁ The cocoon 17a is removed (FIG. 2 (f)). Specifically, as described above, since the photoresist 19 is not attached to the lower surface of the ridges 17a of the mask 16 formed by the first etching, the ridges 17a are exposed to the second etching solution from the lower side. Corroded by
[0043]
Next, as shown in FIG. 2G, the photoresist 19 remaining on the upper surface of the mask 16 is removed using a solvent such as acetone.
[0044]
Next, the same mixed solution of hydrochloric acid, hydrogen peroxide, and water as the first etching solution is used as the third etching solution, and a place other than the mask 16 is selectively selected for a time t from above. ₂ Only the second etching is performed to form a final mesa portion 2 having a trapezoidal shape as shown in FIG. This time t ₂ In the second etching step, the first cladding layer 4 and the n-type substrate 1 have a depth d. ₂ Only etched. Further, by the second etching process, the second cladding layer 6, the active layer 5, the first cladding layer 4 and the n-type substrate 1 are also etched in the lateral (side) direction. New length s at the tip in the width direction ₂ 庇 17 is formed.
[0045]
Then, the etching depth d formed by this first etching is d. ₁ And the etching depth d formed by the second etching. ₂ And the value (d ₁ + D ₂ ) Is the final target etching depth d (= d ₁ + D ₂ ) Further, the length s of the flange 17 formed at the front end portion in the width direction of the mask 16 formed by the second etching. ₂ Is the final target length 庇 (= s ₂ )
[0046]
Next, as shown in FIG. 3 (i), the mask 16 with the ridges 17 formed on both sides is left and surrounded by the side surface 7 of the mesa portion 2 and the exposed upper surface 8 of the n-type substrate 1. A p-type current blocking layer 9 is formed in the portion etched twice before using the metal organic chemical vapor deposition (MOVPE) method. Further, an n-type current blocking layer 10 is formed on the upper side of the p-type current blocking layer 9 by using a metal organic chemical vapor deposition (MOVPE) method. The p-type current block layer 9 and the n-type current block layer 10 constitute a current block unit 3.
[0047]
Thereafter, the mask 16 is removed by immersing the semiconductor layer in the second etching solution made of hydrofluoric acid (HF) or the like, which corrodes only the mask 16 (FIG. 3 (j)). Thereafter, a third cladding layer 12 made of p-type InP is formed to cover the upper surface of the mesa unit 2 and the upper surfaces of the current blocking layers 3 on both sides in common. Further, a contact layer 13 made of InGaAsP or InGaAs is formed on the upper surface of the third cladding layer 12 (FIG. 3 (k)).
[0048]
Finally, as shown in FIG. 3 (m), a p-electrode 14 is attached to the upper surface of the contact layer 13 and an n-electrode 15 is attached to the lower side of the n-type substrate 1. The manufacturing process ends.
[0049]
In the method of manufacturing the semiconductor device configured as described above, as shown in FIG. 4A, the depth d is obtained in the depth direction by the first etching process. ₁ Only the length s is etched at the front end portion of the mask 16 in the width direction. ₁ 庇 17a is formed. This length s ₁ As shown in FIG. 4B, the ridges 17a are removed before the second etching process. Then, as shown in FIG. 4C, the depth d is obtained in the depth direction by the second etching process. ₂ Is further etched, and a new length s is applied to the front end portion of the mask 16 in the width direction. ₂ 庇 17 is formed.
[0050]
Thus, as a result, the final etching depth d is the depth d obtained by the first etching. ₁ And depth d by the second etching ₂ And the total etching depth (d ₁ + D ₂ = D). Further, the length s of the ridge 17 of the final mask 16 is the length s of the ridge formed by the second etching. ₂ (S = s) ₂ ).
[0051]
Therefore, as described above, first, the second etching time t in which the length s of the target ridge 17 is obtained is obtained. ₂ And this time t ₂ Only when the second etching is performed, the depth d by etching ₂ To decide. Then, the etching depth d when the second etching is performed from the target etching depth d. ₂ The value obtained by subtracting (dd ₂ ) Is the etching depth d of the first etching. ₁ (= D−d ₂ ) So that the first etching time t ₁ To decide.
[0052]
Therefore, the total etching depth d and the length s of the ridge 17 of the mask 16 can be reliably set to the target etching depth and the length of the ridge of the mask, respectively.
[0053]
Therefore, since the desired length s of the flange 17 is obtained, the thickness of the portion facing the side surface 7 of the mesa portion 2 of the p-type current blocking layer 9 and the thickness of the portion facing the upper surface 8 of the n-type substrate 1 are extremely large. Therefore, it is possible to obtain stable output characteristics as a semiconductor laser.
[0054]
For example, the first etching time t ₁ = 10 minutes, second etching time t ₂ By setting = 8 minutes, the etching depth (mesa height) d = 2.5 μm, and the length s = 1.0 μm of the flange 17 of the mask 16 were obtained.
[0055]
Furthermore, the final etching depth d can be arbitrarily set while the length s of the ridges 17 of the mask 16 is maintained at an optimum value. Therefore, by setting the etching depth d (the height of the mesa portion 2) to be large, the current block portion 3 can be made sufficiently thick, and the reactive current can be suppressed even during high current driving. An output semiconductor laser can be obtained.
[0056]
Further, in the first embodiment method, as shown in FIG. 2E, the first etching is performed with the photoresist 19 left on the upper surface of the mask 16, and the first etching is performed. The ridges 17a of the mask 16 formed in (1) are removed with a second etching solution made of hydrofluoric acid (HF) or the like that corrodes only the mask 16. In this case, the portion of the mask 16 facing the top surface of the mesa portion 2 to which the photoresist 19 is adhered remains reliably, and only the ridge 17a portion of the mask 16 can be reliably removed.
[0057]
In general, when a semiconductor layer is etched and a portion removed by etching is subjected to buried growth using a metal organic chemical vapor deposition (MOVPE) method, the etching surface needs to be kept clean. . Therefore, when the semiconductor layer is etched, leaving the photoresist 19 on the surface of the mask 16 may contaminate the etched surface, so that such a process has not been conventionally performed.
[0058]
However, this time, by performing the etching process for the semiconductor layer in two steps, the final etching surface is cleaned even if the photoresist 19 is left on the surface of the mask 16 in the first etching. It becomes possible to keep it.
[0059]
Therefore, by carrying out the etching process for the semiconductor layer in two steps, it is possible to surely remove the overhang 17a of the mask 16 in the middle, and the height of the mesa portion 2 indicated by the etching depth d. In addition, the length s of the ridges 17 of the mask 16 can be stably adjusted to an optimum relationship.
[0060]
Furthermore, even when an etching solution having a large lateral (side) etching rate Vs is used as each etching solution used in the first and second etching steps, a sufficient etching depth d is secured, The desired length s of the ridges 17 of the mask 16 can be obtained.
[0061]
(Second Embodiment)
FIG. 5 is a process diagram showing a method of manufacturing a semiconductor device according to the second embodiment of the present invention. The same parts as those in the method of manufacturing the semiconductor device according to the first embodiment shown in FIG. 1 to FIG.
[0062]
In the method of manufacturing the semiconductor device according to the second embodiment, each process from the removal of portions other than the pattern of the photoresist 19 in the layer 16a serving as a mask to form the mask 16 is illustrated in FIGS. Since it is the same as each process shown by d), description is abbreviate | omitted.
[0063]
FIG. 5D shows a state where the mask 16 is formed. In the method of manufacturing the semiconductor device according to the second embodiment, FIG. ₁ ), The photoresist 19 remaining on the upper surface of the mask 16 is removed using a solvent such as acetone.
[0064]
In a state where the photoresist 19 is removed from the upper surface of the mask 16, a place other than the mask 16 is selectively selected from above at the time t under the same condition shown in FIG. ₁ Only the first etching is performed, and FIG. ₁ ), A mesa portion 2a having a trapezoidal shape is formed. As a result, the depth d ₁ Only etched. Further, the length s is applied to the front end of the mask 16 in the width direction. ₁ 庇 17a is formed.
[0065]
In this state, the second etchant that corrodes only the mask 16 is changed to FIG. ₁ ) Is immersed in the semiconductor element (semiconductor layer) and the length s is applied to the front end portion in the width direction of the mask 16 formed by the first etching. ₁ 庇 17a is removed (FIG. 5 (f ₁ ). In this case, since the photoresist 19 is not formed on the upper surface of the mask 16, the mask 16 is sequentially etched from the upper surface over the entire width. However, since the ridges 17a of the mask 16 are etched from the upper surface and the lower surface, the etching rate of the ridges 17a of the mask 16 is twice as fast as the portion facing the mesa portion 2a.
[0066]
Therefore, if the etching is stopped when the ridges 17a of the mask 16 are completely etched, the ridges 17a of the mask 16 are removed, and the portion of the mask 16 in contact with the mesa portion 2a remains thin.
[0067]
With the wrinkles 17a of the mask 16 removed, a time t is used using a third etching solution shown in FIG. ₂ Only the second etching is performed, and FIG. ₁ ), The final mesa portion 2 having a trapezoidal shape is formed. As a result, the depth d is reduced by the second etching. ₂ Only etched. Further, the length s is applied to the front end of the mask 16 in the width direction. ₂ 庇 17 is formed.
[0068]
Thereafter, each process from the formation of the current block unit 3 to the attachment of the final p-electrode 14 and n-electrode 15 is the same as the processes of FIGS. 3I to 3M in the manufacturing method of the first embodiment. Since it is the same, description is abbreviate | omitted.
[0069]
Also in the method of manufacturing the semiconductor device according to the second embodiment configured as described above, the final etching depth d is the depth d obtained by the first etching. ₁ And depth d by the second etching ₂ And the total etching depth (d ₁ + D ₂ = D). Further, the length s of the ridges 17 of the final mask 16 is the length s of the ridges formed by the second etching. ₂ (S = s) ₂ ).
[0070]
Therefore, it is possible to obtain substantially the same operational effects as the manufacturing method of the first embodiment described above.
[0071]
The present invention is not limited to the above-described embodiments. As a semiconductor device to which the manufacturing method of each embodiment is applied, a semiconductor laser has been described. However, if a semiconductor device has a mesa portion formed therein and has embedded semiconductor layers on both sides of the mesa portion, the semiconductor laser Needless to say, it is not limited to the above.
[0072]
In each embodiment, the first etching solution used in the first etching step and the third etching solution used in the second etching step are composed of the same etching solution. Etching solutions different from each other may be used as the third etching solution.
[0073]
Furthermore, bromide methanol, hydrobromic acid, and saturated bromine water etchants may be used as the first and third etchants.
[0074]
【The invention's effect】
As described above, in the method of manufacturing a semiconductor device according to the present invention, when a portion of the semiconductor layer other than the mask is etched by providing a mask in the semiconductor layer, the etching depth is reduced by performing etching twice. And mask wrinkle length can be controlled to the target etching depth and mask wrinkle length respectively, the dimensional accuracy of each part can be improved, the yield can be improved, and high efficiency and high output characteristics can be obtained A device can be realized.
[Brief description of the drawings]
FIG. 1 is a process diagram showing a method of manufacturing a semiconductor device according to a first embodiment of the present invention.
FIG. 2 is a process diagram illustrating a method for manufacturing a semiconductor device according to the first embodiment.
FIG. 3 is a process chart showing the method of manufacturing the semiconductor device according to the first embodiment.
FIG. 4 is a view showing a method for determining an etching depth and a mask ridge length in the semiconductor device manufacturing method according to the first embodiment;
FIG. 5 is a process chart showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention.
FIG. 6 is a schematic cross-sectional view showing a schematic configuration of a semiconductor laser as a general semiconductor device.
FIG. 7 is a process diagram showing a conventional method of manufacturing a semiconductor device.
FIG. 8 is a view for explaining problems of a conventional method for manufacturing a semiconductor device;
[Explanation of symbols]
1 ... n-type substrate
2 ... Mesa
3. Current blocking layer
4 ... 1st clad layer
5 ... Active layer
6 ... second clad layer
7 ... Side
8. Top surface
9 ... p-type current blocking layer
10: n-type current blocking layer
12 ... Third cladding layer
13 ... Contact layer
14 ... p electrode
15 ... n electrode
16 ... Mask
16a ... Mask layer
17, 17a ... 庇
19 ... Photoresist

Claims (3)

A portion of the semiconductor layer is removed by etching to form a mesa portion, and an embedded semiconductor layer is epitaxially crystallized by metal organic vapor phase epitaxy (MOVPE) in the portion removed by the etching on both sides of the mesa portion. In a manufacturing method of a semiconductor device to be grown,
The step of removing a part of the semiconductor layer by etching includes:
Forming a mask corresponding to the upper surface shape of the mesa portion on the upper surface of the semiconductor layer;
Performing a first etching with a first etchant on a portion of the semiconductor layer exposed from the mask;
Immersing the etched semiconductor layer in a second etchant that corrodes only the mask to remove the ridge portion of the mask formed by the first etching;
And a step of performing a second etching with a third etching solution on the portion of the semiconductor layer exposed from the mask from which the ridge portion has been removed. A portion of the semiconductor layer is removed by etching to form a mesa portion, and an embedded semiconductor layer is epitaxially crystallized by metal organic vapor phase epitaxy (MOVPE) in the portion removed by the etching on both sides of the mesa portion. In a manufacturing method of a semiconductor device to be grown,
The step of removing a part of the semiconductor layer by etching includes:
Forming a layer serving as a mask on the upper surface of the semiconductor layer;
Forming a mask corresponding to the upper surface shape of the mesa portion with a photoresist on the upper surface of the layer to be the mask, and then removing a portion other than the pattern in the layer to be the mask to form a mask;
Performing a first etching with a first etchant on a portion of the semiconductor layer exposed from the mask in a state where the photoresist remains on the mask;
Immersing the etched semiconductor layer in a second etchant that corrodes only the mask to remove the ridge portion of the mask formed by the first etching;
Removing the photoresist remaining on the upper surface of the mask using a solvent;
And a step of performing a second etching with a third etching solution on the portion of the semiconductor layer exposed from the mask from which the ridge portion has been removed. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the first etching solution and the third etching solution are the same etching solution.

Images