JPH08139411A - Manufacture of semiconductor laser - Google Patents

Abstract

PURPOSE: To make it unnecessary to consider the width of an etching mask, facilitate manufacturing, prevent an SiO2 mask from dropping out from a wafer, and enable high precision and large output, when a stripe is formed by wet etching. CONSTITUTION: After one or more semiconductor layers 4, 5, 5a, 6 are formed on a semiconductor substrate 1, and an N-type InP contact layer 7 is formed on the surface, the layer 7 is patterned to form a specified width by photolithography etching. In order to cover the N-type InP layer 7 after patterning, an SiO2 mask layer 8 having a specified width is patternd and formed. After that, a current constriction part of a mesa structure is formed by etching the semiconductor layers 4, 5, 5a, 6 with wet etching.

Description

Detailed Description of the Invention

[0001]

The present invention relates to an erbium dope
The present invention relates to a method for manufacturing a high-power semiconductor laser used for a fiber amplifier (EDFA) or the like.

[0002]

2. Description of the Related Art In the embedding step for forming a current constriction structure in the manufacture of a BH type semiconductor laser, the stripe cross-section has an inverted mesa shape (inverse trapezoidal shape). The reproducibility of the position of the p reverse junction is poor. Since a current flows in a region other than the active layer region depending on the position of the np reverse bias junction, the current injection efficiency and the light output are reduced. Therefore, in order to solve such a problem, the following semiconductor laser is manufactured.

FIG. 10 is a sectional view showing a conventional semiconductor laser. In this semiconductor laser, InP or Ga is used.
Substrate convex portions 11a are provided in stripes on the upper surface side of an n-type substrate 11 made of a semiconductor such as As.
1a on the active layer 14 and p-type InP on the active layer 14
A layer (cladding layer) 15 is formed. Further, the current block layers 18a and 18 made of p-type InP are provided so as to extend from both sides of the substrate convex portion 11a onto the flat portion of the substrate 11.
b is provided and these current blocks 18a and 18
Current blocking layers 17a and 17b made of n-type InP are provided on b. The upper surface position of the p-type InP layer (cladding layer) 15 and the current blocking layers 17a and 1
The position of the upper surface of 7b is the same and forms a single plane. A p-type InP layer (cladding layer) 19 and ap ⁺ -type InGaAsP ohmic contact layer 20 are sequentially stacked on this plane, and thus a conventional semiconductor laser is formed.

In the semiconductor laser configured as described above, when a p-type electrode is attached to the front surface side and an n-type electrode is attached to the back surface side and a forward voltage is applied between the two, a driving current is applied to the active layer 14. The light is injected to induce recombination of electrons and holes in the active layer 14 to generate light.

Next, a method of manufacturing the above-mentioned semiconductor laser will be described. First, as shown in FIG. 7, an active layer 14, a p-type InP layer (cladding layer) 15 and an n-type InGaAs (P) layer 16 are formed on an n-type substrate 11 made of a semiconductor such as InP.
A wafer is manufactured by sequentially laminating. Then, after forming a SiO ₂ film on the surface of the wafer by a CVD process,
SiO _{2 in the} <011> direction by photolithographic etching
Form a striped pattern of the film. Using this stripe-shaped pattern as a mask 12, an etchant (HBr: H ₂ O ₂ : H ₂ O = HBr: H ₂ O ₂ : H ₂ O
5: 1: 25) and use mask 1 as shown in FIG.
The lower layer of 2 is convexly etched. Then, as shown in FIG. 9, current blocking layers 18a and 18b made of p-type InP and current blocking layers 17a and 17b made of n-type InP are sequentially laminated on the substrate 11 on the side surface of the convex portion of the convex wafer. , The same height as the lower surface of the mask 12.
Then, the mask 12 and the n-type InPGaAs (or In
The GaAsP) cap layer 16 is selectively etched with a selective etching solution (sulfuric acid and an aqueous peroxide solution; H ₂ SO ₄ : H ₂ O ₂ : H ₂ O = 3:
1: 1 or 1: 1: 10) to remove the p-type InP layer (cladding layer) 19 and p ⁺ InGa on the surface of the wafer.
An ohmic contact layer 20 of AsP (or p ⁺ InGaAs) is sequentially laminated. In this way, the semiconductor laser shown in FIG. 10 is completed.

[0006]

However, the above-mentioned conventional semiconductor laser has the following problems. That is, when wet etching as described above is performed, the SiO ₂ layer serving as a mask and InGaAs (or InGaAs
P) The mask may be displaced due to poor adhesion to the cap layer, and high-precision etching cannot be performed. Also, the reaction of wet etching proceeds isotropically,
Crystals in layers that do not require etching will also be etched. Therefore, for example, when the active layer width is 1.5 μm, it is necessary to increase the width of the SiO ₂ mask in advance, for example, by setting the mask width to 5 μm. Therefore, if the etching amount is not properly controlled, the stripe width of the lower layer crystal of the mask is gradually reduced by etching, and the contact area between the mask and the crystal surface of the lower layer in contact with the mask is reduced, so that the mask is removed. I'll let go.

This is because wet etching is isotropic etching, so that even if a mask is used during etching, it is not etched into the same shape as the pattern having the mask width. Therefore, the semiconductor film below the mask peripheral portion is also etched, and the stripe width of the crystal layer below the mask becomes smaller than the mask width.

Therefore, when etching is performed for a long time, the contact area between the mask and the crystal layer below the mask becomes small,
Sometimes the mask may come off, in which case
The necessary crystal layer will also be etched.

The present invention has been made in view of the above problems, and when the stripes are formed by wet etching, it is not necessary to consider the width of the etching mask, and therefore the manufacturing can be easily performed. An object of the present invention is to provide a semiconductor laser manufacturing method capable of preventing the SiO ₂ mask from being detached from a wafer and manufacturing a semiconductor laser with high accuracy and high output.

[0010]

A method of manufacturing a semiconductor laser according to the present invention comprises a step of forming one or more semiconductor layers on a semiconductor substrate, and a step of forming an InP layer and then photolithographically etching the same. Width patterning, patterning a mask layer of a predetermined width so as to cover the patterned InP layer, and etching the semiconductor layer by wet etching to form a mesa structure. Characterize. In
When the semiconductor substrate is p-type, the P layer can be n-type or i-type, and depending on the other conductivity type of the semiconductor substrate,
It can be p-type or i-type.

[0011]

The present inventor has conducted various experimental studies to develop a semiconductor laser that can be easily manufactured without detaching the etching mask. As a result, as an original wafer, for example, on an n-type InP semiconductor substrate, an n-type InP buffer layer and an active layer (specifically, n-type InGaAsP OCL, M
QW active layer, p-type InGaAsP OCL), p-type In
P layer (cladding layer) and n-type InGaAs (or InG
(aAsP) layer is sequentially formed, and then an InP layer is formed as a contact layer on these semiconductor layers, and the InP layer is covered with a SiO ₂ etching mask to form a layer under the contact layer even if wet etching is performed. It has been found that the stripe width of each layer can be kept constant. OCL is Optic
It is an alConfinement Layer (optical confinement layer).

That is, in the method of the present invention, the n-type InP cap layer formed on the uppermost layer of the original wafer is patterned by photolithographic etching to obtain In of a predetermined width.
A P contact layer is formed, the InP contact layer is covered with a SiO ₂ mask having a predetermined width, and then etching is performed. This prevents the InP contact layer under the SiO ₂ mask from being side-etched, and prevents the stripe width from becoming excessively narrow when the lower crystal layer is isotropically etched. As a result, the semiconductor layer below the InP contact layer has an inverted mesa shape.
The O ₂ mask is in close contact with the InP contact layer and is not detached.

[0013]

Next, an embodiment of the present invention will be described with reference to the accompanying drawings. 1 to 6 are sectional views showing a method of manufacturing a semiconductor laser according to an embodiment of the present invention in the order of steps.

First, as shown in FIG. 1, an n-type InP buffer layer and an active layer 4 (specifically, n-type InGaAsP OCL, MQW active layer, p
Type InGaAsP OCL), p type InP layer (cladding layer) 5, p type InGaAs (or InGaAsP) cap layer 6 and p type InP contact layer 7a are sequentially laminated. In this way, the original wafer of the semiconductor laser is obtained.

Next, as shown in FIG. 2, the uppermost InP contact layer 7a of the original wafer is patterned by photolithography to form an InP contact layer 7 having a predetermined width.

Then, as shown in FIG. 3, after forming an oxide film of SiO ₂ on the entire surface of this original wafer, a SiO ₂ mask 8 covering the InP contact layer 7 is formed in the <011> direction by photolithography etching. Form a pattern.

Next, as shown in FIG. 4, the ratio of the components is, for example, HBr: H ₂ O ₂ : H ₂ O = 5: 1: 25,
Wet etching is performed on each layer in a portion not covered with the SiO ₂ mask 8 using an etchant that is non-selective for InP, InGaAs, and InGaAsP and isotropic with respect to the crystal plane. In this case, since the InP contact layer 7 is protected by the SiO ₂ mask 8,
No side etching. Therefore, SiO ₂
The stripe width of the lower InP contact layer 7 of the mask 8 is fixed and the detachment of the SiO ₂ mask 8 due to the reduction of the contact area between the InP contact layer 7 and the SiO ₂ mask 8 can be prevented.

By performing the etching as described above, the upper portion 5a of the p-type InP layer (cladding layer) 5 is formed into an inverted mesa shape.

Next, as shown in FIG. 5, the current blocking layers 2a and 2b made of p-type InP and the n-type InP are formed on the substrate 1 on both sides of the substrate convex portion 1a of the original wafer formed as described above. The current blocking layers 3a and 3b are sequentially formed, and the current blocking layers 3a and 3b are grown to the position of the SiO ₂ mask 8.

Thereafter, as shown in FIG. 6, after removing the SiO ₂ mask 8, the InP contact layer 7 and the InGaAs (P) cap 6, the p-type InP cladding layer 9 and the p-type InP cladding layer 9 are formed.
^{The +} type InGaAsP cap layer 10 is sequentially formed. In this way, a semiconductor laser having a current constriction structure is completed.

[0021]

As described above, according to the present invention,
Since the contact layer is covered with the etching mask of SiO ₂ , when the stripe is formed by wet etching, it is not necessary to consider the width of the etching mask, so that the manufacturing can be performed easily.
Etching does not proceed beyond the InP width at the junction surface between the mask and the mask, and therefore, desorption of SiO ₂ can be prevented. As a result, it is possible to manufacture a semiconductor laser capable of high output with high accuracy by preventing the SiO ₂ mask from detaching from the wafer.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a step in a method of manufacturing a semiconductor laser according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing the next step of FIG. 1 in the method of manufacturing a semiconductor laser according to the embodiment of the present invention.

FIG. 3 is a cross-sectional view showing the next step of FIG. 2 in the method of manufacturing a semiconductor laser according to the embodiment of the present invention.

FIG. 4 is a cross-sectional view showing the next step of FIG. 3 in the method for manufacturing a semiconductor laser according to the embodiment of the present invention.

FIG. 5 is a cross-sectional view showing the next step of FIG. 4 in the method of manufacturing a semiconductor laser according to the embodiment of the present invention.

FIG. 6 is a cross-sectional view showing the next step of FIG. 5 in the method of manufacturing a semiconductor laser according to the embodiment of the present invention.

FIG. 7 is a cross-sectional view showing a wafer for manufacturing a conventional semiconductor laser.

FIG. 8 is a cross-sectional view showing etching of a lower portion of a mask by wet etching.

FIG. 9 is a cross-sectional view showing a method for manufacturing a conventional semiconductor laser.

FIG. 10 is a cross-sectional view showing a conventional semiconductor laser.

[Explanation of symbols]

1, 11; n-type substrate 1a, 11a; n-type substrate convex portion 2a, 2b; current block layer 3a, 3b made of p-type InP; current block layer made of n-type InP 4, 14; active layer 5, 5a, 15; p-type InP layer (cladding layer) 6, 16; n-type InGaAs (P) cap layer 7, 7a; InP contact layer 8; SiO ₂ mask 9, 19; p-type InP clad layer 10; p ⁺ -type InGaAsP cap Layer 12; Masks 17a and 17b; Current blocking layer made of n-type InP 18a, 18b; Current blocking layer made of p-type InP 20; p ⁺ -type InGaAsP ohmic contact layer

Claims (1)

[Claims] 1. A step of forming one or more semiconductor layers on a semiconductor substrate, a step of further forming an InP layer and then patterning the same to a predetermined width by photolithography, and a step of covering the patterned InP layer. A method of manufacturing a semiconductor laser, comprising: a step of patterning a mask layer having a predetermined width; and a step of etching the semiconductor layer by wet etching to form a mesa structure.