JP3660650B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP3660650B2
JP3660650B2 JP2002172628A JP2002172628A JP3660650B2 JP 3660650 B2 JP3660650 B2 JP 3660650B2 JP 2002172628 A JP2002172628 A JP 2002172628A JP 2002172628 A JP2002172628 A JP 2002172628A JP 3660650 B2 JP3660650 B2 JP 3660650B2
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JP
Japan
Prior art keywords
dram
memory
region
area
wafer
Prior art date
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Expired - Lifetime
Application number
JP2002172628A
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English (en)
Japanese (ja)
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JP2004022641A5 (enExample
JP2004022641A (ja
Inventor
一郎 水島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
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Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2002172628A priority Critical patent/JP3660650B2/ja
Priority to US10/459,532 priority patent/US20040016951A1/en
Publication of JP2004022641A publication Critical patent/JP2004022641A/ja
Priority to US11/081,581 priority patent/US20050162966A1/en
Publication of JP2004022641A5 publication Critical patent/JP2004022641A5/ja
Application granted granted Critical
Publication of JP3660650B2 publication Critical patent/JP3660650B2/ja
Priority to US11/319,534 priority patent/US20060097287A1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/50—Peripheral circuit region structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/482—Bit lines

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP2002172628A 2002-06-13 2002-06-13 半導体装置の製造方法 Expired - Lifetime JP3660650B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2002172628A JP3660650B2 (ja) 2002-06-13 2002-06-13 半導体装置の製造方法
US10/459,532 US20040016951A1 (en) 2002-06-13 2003-06-12 Semiconductor device and manufacturing method thereof
US11/081,581 US20050162966A1 (en) 2002-06-13 2005-03-17 Semiconductor device and manufacturing method thereof
US11/319,534 US20060097287A1 (en) 2002-06-13 2005-12-29 Semiconductor device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002172628A JP3660650B2 (ja) 2002-06-13 2002-06-13 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2004022641A JP2004022641A (ja) 2004-01-22
JP2004022641A5 JP2004022641A5 (enExample) 2005-03-17
JP3660650B2 true JP3660650B2 (ja) 2005-06-15

Family

ID=30767640

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002172628A Expired - Lifetime JP3660650B2 (ja) 2002-06-13 2002-06-13 半導体装置の製造方法

Country Status (2)

Country Link
US (3) US20040016951A1 (enExample)
JP (1) JP3660650B2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007136067A1 (ja) 2006-05-23 2007-11-29 Shiseido Company Ltd. 皮膚外用剤

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7232718B2 (en) * 2003-09-17 2007-06-19 Nanya Technology Corp. Method for forming a deep trench capacitor buried plate
KR100532509B1 (ko) * 2004-03-26 2005-11-30 삼성전자주식회사 ＳｉＧｅ를 이용한 트렌치 커패시터 및 그 형성방법
US7229877B2 (en) * 2004-11-17 2007-06-12 International Business Machines Corporation Trench capacitor with hybrid surface orientation substrate
JP2006294751A (ja) * 2005-04-07 2006-10-26 Toshiba Corp 半導体集積回路及びその製造方法
TWI362723B (en) * 2007-07-30 2012-04-21 Nanya Technology Corp Volatile memory and manufacturing method thereof
US9368502B2 (en) 2011-10-17 2016-06-14 GlogalFoundries, Inc. Replacement gate multigate transistor for embedded DRAM
US9935633B2 (en) * 2015-06-30 2018-04-03 Semiconductor Energy Laboratory Co., Ltd. Logic circuit, semiconductor device, electronic component, and electronic device
DE102015009701A1 (de) 2015-07-30 2016-01-28 Daimler Ag Ausgleichsschaltung für eine Batterie oder Batteriemanagementsysteme
KR102293120B1 (ko) * 2017-07-21 2021-08-26 삼성전자주식회사 반도체 소자

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970001894B1 (en) * 1991-09-13 1997-02-18 Nippon Electric Kk Semiconductor memory device
US5292677A (en) * 1992-09-18 1994-03-08 Micron Technology, Inc. Reduced mask CMOS process for fabricating stacked capacitor multi-megabit dynamic random access memories utilizing single etch stop layer for contacts
US5593972A (en) * 1993-01-26 1997-01-14 The Wistar Institute Genetic immunization
JP3368002B2 (ja) * 1993-08-31 2003-01-20 三菱電機株式会社 半導体記憶装置
US5914510A (en) * 1996-12-13 1999-06-22 Kabushiki Kaisha Toshiba Semiconductor memory device and method of manufacturing the same
US5930618A (en) * 1997-08-04 1999-07-27 United Microelectronics Corp. Method of Making High-K Dielectrics for embedded DRAMS
US6229161B1 (en) * 1998-06-05 2001-05-08 Stanford University Semiconductor capacitively-coupled NDR device and its applications in high-density high-speed memories and in power switches
US6559055B2 (en) * 2000-08-15 2003-05-06 Mosel Vitelic, Inc. Dummy structures that protect circuit elements during polishing
DE50105476D1 (de) * 2001-09-18 2005-04-07 Abbott Lab Vascular Entpr Ltd Stent
JP4322453B2 (ja) * 2001-09-27 2009-09-02 株式会社東芝 半導体装置およびその製造方法
US7073139B2 (en) * 2003-06-03 2006-07-04 International Business Machines Corporation Method for determining cell body and biasing plate contact locations for embedded dram in SOI

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007136067A1 (ja) 2006-05-23 2007-11-29 Shiseido Company Ltd. 皮膚外用剤

Also Published As

Publication number Publication date
US20060097287A1 (en) 2006-05-11
JP2004022641A (ja) 2004-01-22
US20040016951A1 (en) 2004-01-29
US20050162966A1 (en) 2005-07-28

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