JP3615010B2 - 論理回路 - Google Patents

論理回路 Download PDF

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Publication number
JP3615010B2
JP3615010B2 JP03385397A JP3385397A JP3615010B2 JP 3615010 B2 JP3615010 B2 JP 3615010B2 JP 03385397 A JP03385397 A JP 03385397A JP 3385397 A JP3385397 A JP 3385397A JP 3615010 B2 JP3615010 B2 JP 3615010B2
Authority
JP
Japan
Prior art keywords
transistor
turned
level
input
output signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP03385397A
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English (en)
Japanese (ja)
Other versions
JPH10233678A5 (enExample
JPH10233678A (ja
Inventor
久和 外囿
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP03385397A priority Critical patent/JP3615010B2/ja
Priority to US08/926,450 priority patent/US6011411A/en
Publication of JPH10233678A publication Critical patent/JPH10233678A/ja
Publication of JPH10233678A5 publication Critical patent/JPH10233678A5/ja
Application granted granted Critical
Publication of JP3615010B2 publication Critical patent/JP3615010B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
JP03385397A 1997-02-18 1997-02-18 論理回路 Expired - Fee Related JP3615010B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP03385397A JP3615010B2 (ja) 1997-02-18 1997-02-18 論理回路
US08/926,450 US6011411A (en) 1997-02-18 1997-09-10 CMOS logic circuit with reduced circuit area

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP03385397A JP3615010B2 (ja) 1997-02-18 1997-02-18 論理回路

Publications (3)

Publication Number Publication Date
JPH10233678A JPH10233678A (ja) 1998-09-02
JPH10233678A5 JPH10233678A5 (enExample) 2004-12-24
JP3615010B2 true JP3615010B2 (ja) 2005-01-26

Family

ID=12398075

Family Applications (1)

Application Number Title Priority Date Filing Date
JP03385397A Expired - Fee Related JP3615010B2 (ja) 1997-02-18 1997-02-18 論理回路

Country Status (2)

Country Link
US (1) US6011411A (enExample)
JP (1) JP3615010B2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6252426B1 (en) * 2000-03-07 2001-06-26 Honeywell International Inc. High speed logic family
DE10143236C1 (de) * 2001-09-04 2003-03-06 Infineon Technologies Ag Schaltkreis-Anordnung und Logik-Gatter
KR100674087B1 (ko) * 2004-11-22 2007-01-24 한국전자통신연구원 Ｎｒｚ 신호의 비대칭 왜곡을 이용한 클럭 신호 생성 장치 및 그를 이용한 광송수신 시스템
JP4562515B2 (ja) * 2004-12-22 2010-10-13 ルネサスエレクトロニクス株式会社 論理回路及びワードドライバ回路
CN101547004B (zh) * 2009-05-12 2011-06-15 威盛电子股份有限公司 与门电路
JP2011222105A (ja) * 2010-04-14 2011-11-04 Elpida Memory Inc 半導体装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4541067A (en) * 1982-05-10 1985-09-10 American Microsystems, Inc. Combinational logic structure using PASS transistors
US4559609A (en) * 1983-02-07 1985-12-17 At&T Bell Laboratories Full adder using transmission gates
US4710649A (en) * 1986-04-11 1987-12-01 Raytheon Company Transmission-gate structured logic circuits

Also Published As

Publication number Publication date
US6011411A (en) 2000-01-04
JPH10233678A (ja) 1998-09-02

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