JP3613103B2 - Semiconductor wafer and heterobipolar transistor using the same - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor wafer used for ultra-high-speed LSI (Large Scale Integrated Circuit), ultra-high-speed, large-capacity optical communication, and a hetero-bipolar transistor using the semiconductor wafer, and more particularly to a hetero-bipolar transistor having a high current gain and the fabrication thereof The present invention relates to an epitaxial wafer.
[0002]
[Prior art]
Hetero bipolar transistors (hereinafter referred to as HBTs) are characterized by high efficiency, low distortion, and a single power supply, and are therefore attracting attention as output amplifiers used in digital mobile phones such as code division multiple access. Has been.
[0003]
The HBT is manufactured by using an epitaxial wafer composed of three parts of an emitter, a base, and a collector. In particular, in the case of a gallium arsenide (GaAs) HBT, the collector layer is generally composed of n-type GaAs, the base layer is composed of p-type GaAs, and the emitter layer is composed of n-type AlGaAs or InGaP.
[0004]
FIG. 3 shows the structure of a general GaAs-based HBT.
This GaAs-based HBT 1 is formed on a semi-insulating substrate 10 made of GaAs, a subcollector layer 11 made of an n ⁺ -GaAs layer, a collector layer 12 made of an n ⁻ -GaAs layer, a base layer 13 made of a p ⁺ -GaAs layer, emitter layer ¹⁴ made of n-AlGaAs layer or n-InGaP layer, n - ballast layer ¹⁵ made of -GaAs layer, n + contact layer ¹⁶ made of -GaAs layer, n + -InGaAs made in layer non-alloy layer 17 in this order The collector electrode 18 is formed on the subcollector layer 11, the base electrode 19 is formed on the base layer 13, and the emitter electrode 20 is formed on the non-alloy layer 17.
[0005]
The subcollector layer 11 is doped with silica (Si) as an n-type impurity, and the carrier concentration is usually as high as 3 × 10 ¹⁸ cm ⁻³ or more, and the collector layer 12 is doped with silica (Si) as an n-type impurity. The carrier concentration is usually as low as 5 × 10 ¹⁶ cm ⁻³ or less. Carbon (C) or beryllium (Be)) is added to the base layer 13 as a p-type acceptor impurity, and the carrier concentration is usually as high as 1 × 10 ¹⁹ cm ⁻³ or more.
[0006]
Generally, in the GaAs HBT 1, it is important to improve the reliability by increasing the current gain (collector current / base current) β. This current gain β is greatly influenced by the carrier concentration of the subcollector layer 11, the resistance value of the base layer 13, the crystallinity of the epitaxial layer, and the like.
[0007]
[Problems to be solved by the invention]
However, the GaAs-based HBT 1 described above has a drawback that the current gain β decreases as the carrier concentration of the subcollector layer 11 increases.
FIG. 4 is a diagram showing the relationship between the carrier concentration of the subcollector layer 11 of the GaAs-based HBT 1 and the current gain β. As is clear from this figure, when the carrier concentration of the subcollector layer 11 is 3 × 10 ¹⁸ cm ^−3, the current gain β is 151, but as the carrier concentration of the subcollector layer 11 increases, the current gain β is When the carrier concentration of the subcollector layer 11 decreases to 5 × 10 ¹⁸ cm ^−3, the current gain β decreases to 104.
[0008]
Although various carrier concentrations of the subcollector layer 11 can be considered in designing the semiconductor device, the fluctuation of the current gain β corresponding to the carrier concentration has a problem that it becomes a great obstacle in circuit design.
[0009]
Accordingly, it is an object of the present invention to provide a semiconductor wafer and a heterobipolar transistor using the same that can suppress a decrease in current gain and improve reliability even when the carrier concentration of a subcollector layer is increased.
[0010]
[Means for Solving the Problems]
In order to achieve the above object, the present invention comprises an n-type subcollector layer, an n-type collector layer, a p-type base layer, and an n-type emitter layer formed on a substrate,
The n-type subcollector layer is selected from carbon (C), magnesium (Mg), zinc (Zn), manganese (Mn), beryllium (Be), chromium (Cr), copper (Cu), iron (Fe), etc. that is doped with impurities serving as one acceptor even without least it is to provide a GaAs semiconductor wafer according to claim. Further, the present invention provides the GaAs-based semiconductor wafer, wherein 5 × 10 ¹⁷ cm ⁻³ or more of an impurity serving as an acceptor is added.
[0011]
Further, the present invention is connected for realizing the above objects, the n-type subcollector layer formed on the substrate, n-type collector layer, p-type base layer, and an n-type emitter layer, the n-type subcollector layer Collector electrode, a base electrode connected to the p-type base layer, and an emitter electrode connected to the n-type emitter layer, wherein the n-type sub-collector layer comprises carbon (C), magnesium (Mg), zinc (Zn), manganese (Mn), beryllium (be), chromium (Cr), copper (Cu), that even without least selected from iron (Fe) or the like impurity serving as one acceptor is added A characteristic GaAs-based heterobipolar transistor is provided. Furthermore, the GaAs heterobipolar transistor is characterized in that the acceptor impurity is added in an amount of 5 × 10 ¹⁷ cm ⁻³ or more.
[0012]
According to the above configuration, complex defects existing in the high concentration sub-collector layer propagate and become recombination centers in the base layer and the emitter layer, thereby increasing the base current and, consequently, reducing the current gain. By adding an acceptor impurity such as carbon (C), the above-described defect generation and defect propagation can be suppressed, current gain can be prevented from being lowered, and the reliability of the semiconductor device can be improved. .
[0013]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows the structure of an embodiment of a semiconductor wafer for producing a GaAs-based HBT of the present invention.
This semiconductor wafer is an epitaxial wafer 3 for producing a GaAs-based HBT, and an n ⁺ -GaAs layer (3 × 10 ¹⁸ cm ^{−3 to} 5 × 10 ¹⁸ cm ⁻³ ) on a semi-insulating substrate 30 made of GaAs. A sub-collector layer 31 having a thickness of 500 nm, a collector layer 32 having a thickness of 500 nm made of an n ⁻ -GaAs layer (2 × 10 ¹⁶ cm ⁻³ ), and a p ⁺ -GaAs layer (4 × 10 ¹⁹ cm ⁻³ ). A base layer 33 having a thickness of 75 nm, an emitter layer 34 having a thickness of 70 nm made of an n-Al _0.3 GaAs layer (3 × 10 ¹⁷ cm ⁻³ ), and an n-Al _0.3-0 GaAs layer (3 × 10 ¹⁷ cm made of ^-3) emitter layer having a thickness of 30nm 35, n-GaAs layer (3 × ¹⁰ 17 ^{cm -3)} emitter cap layer ³⁶ having a thickness of 200nm made of, n + -GaAs layer ( × ¹⁰ 18 ^cm made of ^-3) Thickness 100nm emitter cap layer ³⁷ of, n + -In ₀ → _0.5 GaAs layer (3 × ¹⁰ 19 ^{cm -3)} emitter cap thickness 40nm made in layer 38, n ^A 40 nm thick emitter cap layer 39 made of a ⁺ -In _0.5 GaAs layer (3 × 10 ¹⁹ cm ⁻³ ) is formed in this order.
[0014]
In the subcollector layer 31 formed of the n ⁺ -GaAs layer, which is a characteristic part of the present embodiment, silica (Si) is added as an n-type impurity, and at the same time, carbon (C) is added. . In this case, since carbon (C) serves as an acceptor, it is necessary to add silica (Si) in the same amount as the added carbon (C) concentration in order to obtain a predetermined carrier concentration.
[0015]
A plurality of epitaxial wafers 3 having such a configuration are produced by changing the carbon (C) concentration of the subcollector layer 31, and a GaAs-based HBT is produced using each of them to measure the current gain β. The relationship between the carbon (C) concentration and the current gain β was investigated.
[0016]
As the epitaxial growth method, a metal organic vapor phase epitaxy (hereinafter referred to as MOVPE method) under reduced pressure was used. Then, by flowing CBr ₄ gas during the growth of the subcollector layer 31, the concentration of carbon (C) is 0, 3 × 10 ¹⁷ cm ⁻³ , 5 × 10 ¹⁷ cm ⁻³ , 10 × 10 ¹⁷ cm ^{−. 3} and 20 × 10 ¹⁷ cm ⁻³ . Furthermore, the addition amount of silica (Si) was adjusted so that the free electron concentration of the subcollector layer 31 was 5 × 10 ¹⁸ cm ^{−3 in} which a decrease in the current gain β apparent in FIG. 4 was observed.
[0017]
In addition, carbon (C) was added by flowing CBr ₄ gas during the growth of the base layer 33 so that the free hole concentration was adjusted to 4 × 10 ¹⁹ cm ⁻³ . Then, a large electrode HBT having an emitter size of 50 μm × 50 μm was produced on the semi-insulating substrate 30. Au was used as the material for the emitter electrode and the base electrode, and AuGe / Ni / Au was used as the material for the collector electrode. Only the collector layer 32 was alloyed (500 ° C. × 3 min).
[0018]
Gummel plots were measured for each GaAs HBT produced in this manner using a parameter analyzer (HP4145B), and current gain β was measured when the collector current density was 1 kA / cm ² .
FIG. 2 is a diagram showing the carbon (C) concentration dependence of the subcollector layer 31 of the current gain β in the GaAs-based HBT.
[0019]
As is clear from this figure, when the carbon (C) concentration in the subcollector layer 31 becomes 5 × 10 ¹⁷ cm ⁻³ , the current gain β rapidly increases to 137, indicating the carbon (C) in the subcollector layer 31. ) When the concentration becomes 10 × 10 ¹⁷ cm ⁻³ , the current gain β increases to 151, and when the carbon (C) concentration of the subcollector layer 31 becomes 20 × 10 ¹⁷ cm ⁻³ , the current gain β is almost 152. It became constant. Thus, the current gain β of the GaAs HBT of the present embodiment is obtained when the carrier concentration of the subcollector layer 11 of the conventional GaAs HBT1 is increased even if the carrier concentration of the subcollector layer 31 is increased. It can be seen that there is a significant improvement compared to.
[0020]
Although the cause of the decrease in the current gain β when the carrier concentration of the subcollector layer 11 of the conventional GaAs-based HBT 1 is increased has not been clarified, the n ⁺ -GaAs layer having a high concentration exceeding 1 × 10 ¹⁸ cm ⁻³ It is known that there exists a level that seems to be caused by complex defects (Si—V _Ga ). This defect density increases with increasing silica (Si) addition concentration. Then, it is presumed that these defects propagate and become recombination centers in the base layer 13 and the emitter layer 14 to increase the base current and, as a result, decrease the current gain β.
[0021]
Although the detailed function is unknown in the GaAs-based HBT of this embodiment, by adding an acceptor impurity such as carbon (C), the above-described defect generation and defect propagation can be suppressed, and the current gain β is increased. It is estimated to be effective. When the same experiment as the above-described experiment was performed by adding magnesium (Mg), which is an acceptor impurity, instead of carbon (C), the same effect was obtained, and the above reason was estimated. Is done.
[0022]
Further, when a GaAs-based HBT in which the emitter layers 34 and 35 were formed by n-InGaP layers instead of n-AlGaAs layers was manufactured and the same experiment as described above was performed, the same effect could be obtained. . Further, it is considered that the same effect can be obtained even if a p-type impurity having a lower concentration is added to the n-type subcollector layer 31. Therefore, as impurities added to the subcollector layer 31, in addition to carbon (C) and magnesium (Mg), zinc (Zn), manganese (Mn), beryllium (Be), chromium (Cr), copper (Cu) Acceptor impurities such as iron (Fe) are also applicable.
[0023]
Generally, the subcollector layer is originally formed for the purpose of reducing the contact resistance between the collector layer and the collector electrode, but the resistance value is an important parameter in circuit design. Although there is a method of adjusting the resistance value by the thickness of the subcollector layer, in this case, the process condition such as isolation between elements must be changed, so that the method of adjusting the resistance value by the carrier concentration is optimal. According to the present invention, it is possible to change the design of a semiconductor device only by changing the carrier concentration.
[0024]
【The invention's effect】
As described above, according to the present invention, even if the carrier concentration of the subcollector layer is increased, the current gain can be prevented from being lowered, and the reliability of the semiconductor device can be improved.
[Brief description of the drawings]
FIG. 1 is an explanatory view showing the structure of an embodiment of a semiconductor wafer for producing a GaAs-based HBT of the present invention.
2 is a graph showing the carbon (C) concentration dependence of the current collector of the current gain in a GaAs HBT fabricated with the semiconductor wafer of FIG.
FIG. 3 is an explanatory diagram showing a structure of a general GaAs-based HBT.
4 is a diagram showing the relationship between the carrier concentration and current gain of the subcollector layer of the GaAs-based HBT of FIG.
[Explanation of symbols]
1 GaAs HBT
3 epitaxial wafer 10 semi-insulating substrate 11 subcollector layer 12 collector layer 13 base layer 14 emitter layer 15 ballast layer 16 contact layer 17 non-alloy layer 18 collector electrode 19 base electrode 20 emitter electrode 30 semi-insulating substrate 31 subcollector layer 32 collector layer 33 Base layer 34 Emitter layer 35 Emitter layer 36 Emitter cap layer 37 Emitter cap layer 38 Emitter cap layer 39 Emitter cap layer

Claims (4)

An n-type subcollector layer formed on the substrate, an n-type collector layer, a p-type base layer, and an n-type emitter layer;
The n-type subcollector layer is selected from carbon (C), magnesium (Mg), zinc (Zn), manganese (Mn), beryllium (Be), chromium (Cr), copper (Cu), iron (Fe), etc. GaAs-based semiconductor wafer, characterized by being added impurity serving as one acceptor even without least been. 2. The GaAs semiconductor wafer according to claim 1, wherein the acceptor impurity is added in an amount of 5 × 10 ¹⁷ cm ⁻³ or more . An n-type subcollector layer, an n-type collector layer, a p-type base layer, and an n-type emitter layer formed on the substrate;
A collector electrode connected to the n-type subcollector layer, a base electrode connected to the p-type base layer, and an emitter electrode connected to the n-type emitter layer;
The n-type subcollector layer is selected from carbon (C), magnesium (Mg), zinc (Zn), manganese (Mn), beryllium (Be), chromium (Cr), copper (Cu), iron (Fe), etc. GaAs heterojunction bipolar transistor, characterized in that it is added impurity serving as one acceptor even without least been. 4. The GaAs heterobipolar transistor according to claim 3, wherein the acceptor impurity is added in an amount of 5 × 10 ¹⁷ cm ⁻³ or more .

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