JP2001176880A - Semiconductor wafer and hetero bipolar transistor using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor wafer and a heterobipolar transistor, using the wafer capable of suppressing degradation of current gain and enhancing reliability, even when carrier concentration is enhanced in a sub-collector layer. SOLUTION: A sub-collector layer 31, a base layer 33 and emitter layers 34, 35 are formed on a substrate 30. Carbon (C) which is not less than 5×1017 cm-3 is added. Lowering of current gain can be eliminated, and reliability can be improved in GaAs HBT.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ultra-high-speed LSI (L
arge Scale Integratedcirc
The present invention relates to a semiconductor wafer used for ultra-high-speed, large-capacity optical communication and the like and a hetero bipolar transistor using the same, and particularly to a hetero bipolar transistor having a high current gain and an epitaxial wafer for producing the same.

[0002]

2. Description of the Related Art Hetero bipolar transistors (hereinafter referred to as "hetero bipolar transistors").
HBT) has the features of high efficiency, low distortion, and the ability to use a single power supply.
Division Multiple Access)
Has been attracting attention as an output amplifier used in digital mobile phones.

An HBT is manufactured using an epitaxial wafer composed of three parts, an emitter, a base, and a collector. In particular, in the case of a gallium arsenide (GaAs) -based HBT, generally, the collector layer is composed of n-type GaAs, the base layer is composed of p-type GaAs, and the emitter layer is composed of n-type AlGaAs or InGaP.

FIG. 3 shows a structure of a general GaAs HBT.
Is shown. This GaAs-based HBT 1 is a half
On the insulating substrate 10, n⁺-Sub-collection made of GaAs layer
Layer 11, n^-A collector layer 12 composed of a GaAs layer, p
⁺Base layer 13 composed of a GaAs layer, n-AlGaAs
Layer or n-InGaP emitter layer 14, n
^-Ballast layer 15 made of GaAs layer, n⁺-GaAs
Contact layer 16, n⁺-InGaAs layer
The non-alloy layer 17 is formed in this order,
A collector electrode 18 is provided on the layer 11 and a base electrode 13 is provided on the base layer 13.
The electrode 19 is formed on the non-alloy layer 17 by the emitter electrode 20.
Are formed respectively.

The subcollector layer 11 is doped with silica (Si) as an n-type impurity and has a carrier concentration of usually 3
× high as 10 ¹⁸ cm ^-3 or higher, the collector layer 12, silica (Si) is added as an n-type impurity, the carrier concentration is usually 5 × 10 ¹⁶ cm ^-3 or less and low. The base layer 13
Carbon (C) or beryllium (Be)) is added as a p-type acceptor impurity, and the carrier concentration is usually 1 ×.
It is as high as 10 ¹⁹ cm ^-3 or more.

Generally, in a GaAs-based HBT 1,
It is important to improve the reliability by increasing the current gain (collector current / base current) β. This current gain β is
It is greatly affected by the carrier concentration of the subcollector layer 11, the resistance value of the base layer 13, the crystallinity of the epitaxial layer, and the like.

[0007]

However, the above-mentioned Ga
The As-based HBT 1 has a disadvantage that the current gain β decreases as the carrier concentration of the subcollector layer 11 increases. FIG. 4 shows a subcollector layer 1 of a GaAs-based HBT 1.
FIG. 3 is a diagram showing a relationship between a carrier concentration of 1 and a current gain β. As is apparent from this figure, when the carrier concentration of the subcollector layer 11 is 3 × 10 ¹⁸ cm ^−3, the current gain β is 1
However, when the carrier concentration of the subcollector layer 11 is 5 × 10 ¹⁸ cm ^−3, the current gain β decreases to 104 when the carrier concentration of the subcollector layer 11 is 5 × 10 ¹⁸ cm ⁻³ . .

In the design of a semiconductor device, the subcollector layer 1
Although the carrier concentration of 1 may be variously considered, the fluctuation of the current gain β in accordance with the carrier concentration has a problem that it greatly hinders the circuit design.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a semiconductor wafer capable of suppressing a decrease in current gain and improving reliability even when the carrier concentration of the subcollector layer is increased, and a heterobipolar transistor using the same. It is in.

[0010]

In order to achieve the above object, the present invention comprises a subcollector layer, a collector layer, a base layer, and an emitter layer formed on a substrate, wherein the subcollector layer comprises carbon (C). C), magnesium (M
g), zinc (Zn), manganese (Mn), beryllium (Be), chromium (Cr), copper (Cu), iron (Fe), etc., at least one acceptor of at least 5 × 10 ¹⁷ cm ^−3. A semiconductor wafer characterized by adding an impurity to the semiconductor wafer.

In order to achieve the above object, the present invention provides a sub-collector layer, a collector layer,
A base layer, an emitter layer, a collector electrode connected to the sub-collector layer, a base electrode connected to the base layer, and an emitter electrode connected to the emitter layer, wherein the sub-collector layer includes carbon ( C),
Magnesium (Mg), zinc (Zn), manganese (M
n), beryllium (Be), chromium (Cr), copper (C
u), an impurity serving as at least one acceptor of at least 5 × 10 ¹⁷ cm ⁻³ selected from iron (Fe) and the like is provided.

According to the above structure, the complex defect existing in the high-concentration subcollector layer propagates and becomes a recombination center in the base layer and the emitter layer, thereby increasing the base current and, as a result, increasing the current gain. However, by adding an acceptor impurity such as carbon (C), the above-described defect generation and defect propagation can be suppressed, a decrease in current gain can be prevented, and the reliability of the semiconductor device can be improved. be able to.

[0013]

FIG. 1 shows a GaAs-based HB according to the present invention.
1 shows the structure of an embodiment of a semiconductor wafer for making T
You. This semiconductor wafer was used to fabricate a GaAs-based HBT.
Epitaxial wafer 3 and a half of GaAs
On the insulating substrate 30, n⁺-GaAs layer (3 × 10¹⁸cm
^-3~ 5 × 10¹⁸cm^-3) With a thickness of 500 nm
Lector layer 31, n^--GaAs layer (2 × 10¹⁶cm^-3)
A collector layer 32 having a thickness of 500 nm ⁺-GaA
s layer (4 × 10¹⁹cm^-375) thick base
Layer 33, n-Al_0.3GaAs layer (3 × 10¹⁷cm^-3)
70 nm-thick emitter layer 34 of n-Al_0.3-0
GaAs layer (3 × 10¹⁷cm^-3) With a thickness of 30 nm
The emitter layer 35 and the n-GaAs layer (3 × 10¹⁷cm^-3)
200 nm thick emitter cap layer 36, n⁺
-GaAs layer (5 × 10¹⁸cm^-3) Thickness 100n
m emitter cap layer 37, n⁺-In₀→_0.5Ga
As layer (3 × 10¹⁹cm ^-3) Consisting of 40 nm thick Emi
Cutter cap layer 38, n⁺-In_0.5GaAs layer (3 ×
10¹⁹cm^-3) 40nm thick emitter cap
The layer 39 is formed in this order.

The characteristic part of this embodiment is n ⁺ -G
The sub-collector layer 31 made of an aAs layer is doped with carbon (C) at the same time as silica (Si) is added as an n-type impurity. In this case, since carbon (C) serves as an acceptor, it is necessary to add the same amount of silica (Si) as the added carbon (C) concentration in order to obtain a predetermined carrier concentration.

The epitaxial wafer 3 having such a configuration
Are manufactured by changing the carbon (C) concentration of the sub-collector layer 31, a GaAs-based HBT is manufactured using each of them, and the current gain β is measured, and the carbon (C) concentration and the current of the sub-collector layer 31 are measured. The relationship with the gain β was examined.

As the epitaxial growth method, under reduced pressure
Metalorganic vapor phase epitaxy (Metal Organic V)
apor Phase Epitaxy, hereafter MOV
PE method). Then, the sub-collector layer 31
During the growth of CBr_FourBy flowing gas, carbon
(C) having a concentration of 0, 3 × 10¹⁷cm^-3, 5 × 10¹⁷cm
^-3, 10 × 10¹⁷cm^-3, 20 × 10¹⁷cm^-3Will be
Was added. Furthermore, the free electrons of the subcollector layer 31
As for the concentration, the decrease of the current gain β was evident in FIG.
5 × 10¹⁸cm^-3Addition of silica (Si) so that
The amount was adjusted.

During the growth of the base layer 33, CBr ₄
By flowing gas, carbon (C) was added, and the free hole concentration was adjusted to be 4 × 10 ¹⁹ cm ⁻³ . Then, the emitter size is 50 μm × 50 on the semi-insulating substrate 30.
A μm large electrode HBT was produced. Au was used as the material of the emitter electrode and the base electrode, and AuGe / Ni / Au was used as the material of the collector electrode. Then, alloy processing is performed only on the collector layer 32 (500 ° C. × 3 m
in).

Each of the GaAs-based HBTs thus manufactured
, A Gummel plot was measured using a parameter analyzer (HP4145B), and a current gain β when the collector current density was 1 kA / cm ² was measured. FIG. 2 is a graph showing the dependence of the current gain β on the carbon (C) concentration of the subcollector layer 31 in the GaAs-based HBT.

As is apparent from FIG. ³ , when the carbon (C) concentration of the subcollector layer 31 becomes 5 × 10 ¹⁷ cm ⁻³ , the current gain β sharply increases to 137, and the current gain β of the subcollector layer 31 increases. Carbon (C) concentration of 10 × 10 ¹⁷ cm
^-3 , the current gain β increased to 151, and when the carbon (C) concentration of the subcollector layer 31 became 20 × 10 ¹⁷ cm ^-3 , the current gain β became almost constant at 152. As described above, the current gain β of the GaAs HBT of the present embodiment is
It can be seen that even when the carrier concentration of the subcollector layer 31 is increased, the current gain β is greatly improved as compared with the conventional case where the carrier concentration of the subcollector layer 11 of the GaAs-based HBT 1 is increased.

When the carrier concentration of the subcollector layer 11 of the conventional GaAs-based HBT 1 is increased, the cause of the decrease in the current gain β has not been clarified, but is 1 × 10 ¹⁸ cm ^−3.
It is known that in a high concentration n ⁺ -GaAs layer having a concentration higher than the above, there exists a level which is considered to be caused by a composite defect (Si-V _Ga ). This defect density increases with an increase in the concentration of silica (Si) added. Then, it is presumed that these defects propagate and become recombination centers in the base layer 13 and the emitter layer 14 and increase the base current, thereby decreasing the current gain β.

The detailed function of the GaAs-based HBT of this embodiment is unknown, but by adding an acceptor impurity such as carbon (C), the above-described defect generation and defect propagation can be suppressed, and the current gain can be reduced. It is estimated to be effective in increasing β. When the same experiment as described above was performed by adding magnesium (Mg) as an acceptor impurity instead of carbon (C), the same effect could be obtained. Is done.

The emitter layers 34 and 35 are made of n-AlG
GaAs formed of n-InGaP layer instead of aAs layer
When an s-based HBT was manufactured and an experiment similar to the above-described experiment was performed, a similar effect was obtained. It is also considered that the same effect can be obtained by adding a p-type impurity having a lower concentration to the n-type sub-collector layer 31. Therefore, as impurities to be added to the subcollector layer 31, in addition to carbon (C) and magnesium (Mg), zinc (Zn), manganese (Mn), beryllium (B
e), acceptor impurities such as chromium (Cr), copper (Cu), and iron (Fe) are also applicable.

In general, the sub-collector layer is originally formed for the purpose of reducing the contact resistance between the collector layer and the collector electrode, and the resistance value is an important parameter in circuit design. There is also a method of adjusting the resistance value by the thickness of the subcollector layer. In such a case, however, it is necessary to change process conditions such as isolation between elements. Therefore, a method of adjusting the resistance value by the carrier concentration is optimal. According to the present invention, it is possible to change the design of a semiconductor device only by changing the carrier concentration, which has a great effect on improving the development speed of a semiconductor device.

[0024]

As described above, according to the present invention, even if the carrier concentration of the subcollector layer is increased, a decrease in current gain can be prevented, and the reliability of the semiconductor device can be improved.

[Brief description of the drawings]

FIG. 1 is an explanatory view showing a structure of an embodiment of a semiconductor wafer for producing a GaAs-based HBT of the present invention.

FIG. 2 is a GaAs-based HB manufactured using the semiconductor wafer of FIG.
Carbon (C) in the sub-collector layer of the current gain at T
It is a figure which shows concentration dependency.

FIG. 3 is an explanatory view showing a structure of a general GaAs-based HBT.

4 is a diagram showing a relationship between a carrier concentration of a subcollector layer of the GaAs-based HBT of FIG. 3 and a current gain.

[Explanation of symbols]

 Reference Signs List 1 GaAs-based HBT 3 epitaxial wafer 10 semi-insulating substrate 11 sub-collector layer 12 collector layer 13 base layer 14 emitter layer 15 ballast layer 16 contact layer 17 non-alloy layer 18 collector electrode 19 base electrode 20 emitter electrode 30 semi-insulating substrate 31 sub-collector layer 32 collector layer 33 base layer 34 emitter layer 35 emitter layer 36 emitter cap layer 37 emitter cap layer 38 emitter cap layer 39 emitter cap layer

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Shinjiro Fujio 5-1-1 Hidaka-cho, Hitachi City, Ibaraki Prefecture F-term in the Hidaka Plant of Hitachi Cable, Ltd. (reference) 5F003 BA92 BC01 BF06 BM06 BM03 BP32

Claims (4)

[Claims] 1. A semiconductor device comprising a subcollector layer, a collector layer, a base layer, and an emitter layer formed on a substrate, wherein the subcollector layer includes carbon (C), magnesium (Mg), zinc (Zn), manganese ( Mn), beryllium (Be), chromium (Cr), copper (Cu), iron (Fe)
At least one of 5 × 10 ¹⁷ cm ^-3 or more selected from
A semiconductor wafer to which an impurity serving as one acceptor is added. 2. The semiconductor wafer according to claim 1, wherein the sub-collector layer is added with a susceptor such as Si substantially in the same amount as the acceptor. 3. A sub-collector layer, a collector layer, a base layer, and an emitter layer formed on a substrate, a collector electrode connected to the sub-collector layer, a base electrode connected to the base layer, and the emitter. An emitter electrode connected to the sub-collector layer, wherein the sub-collector layer is made of carbon (C), magnesium (Mg), zinc (Zn), manganese (Mn), beryllium (Be), chromium (Cr), copper (Cu) , Iron (Fe)
At least one of 5 × 10 ¹⁷ cm ^-3 or more selected from
A heterobipolar transistor to which an impurity serving as one acceptor is added. 4. The hetero-bipolar transistor according to claim 3, wherein the sub-collector layer is doped with a susceptor such as Si substantially in the same amount as the acceptor.