JP3596899B2 - Low expansion metal foil and laminate for printed circuit - Google Patents
Low expansion metal foil and laminate for printed circuit Download PDFInfo
- Publication number
- JP3596899B2 JP3596899B2 JP1965593A JP1965593A JP3596899B2 JP 3596899 B2 JP3596899 B2 JP 3596899B2 JP 1965593 A JP1965593 A JP 1965593A JP 1965593 A JP1965593 A JP 1965593A JP 3596899 B2 JP3596899 B2 JP 3596899B2
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- Prior art keywords
- metal foil
- low
- printed circuit
- expansion
- laminate
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- Manufacturing Of Printed Wiring (AREA)
Description
【0001】
【産業上の利用分野】
本発明は、パッケージ形態がCLCC(Celamic Leaded Chip Carrier )、TSOP(Thin Small Outline Package)等におけるような熱膨張率の小さい半導体装置を実装するに適するとともに、スルーホール信頼性にも優れたプリント回路用積層板およびそれに用いる低膨張金属箔に関する。
【0002】
【従来の技術】
近年の技術革新は目覚ましく、電子機器のダウンサイジングは止まるところを知らない。それは、実装の高密度化、半導体の高集積化及び半導体パッケージの小形化の技術によるものであり、半導体チップサイズに比してパッケージサイズの小さいCLCC、TSOP等の半導体装置が多用され始めている。ところが、従来、産業用機器のプリント回路用基板として用いられてきた銅張積層板、すなわち、ガラスクロス等の基材に、エポキシ樹脂等の熱硬化性樹脂を含浸・乾燥したプリプレグと銅箔とを加熱加圧一体に成形してなる銅張積層板は、必ずしもCLCC、TSOP等の半導体装置の実装に適したものとは言えない。
【0003】
CLCCはパッケージ材質がセラミックであり、実装に用いられるガラス基材エポキシ積層板とは熱膨張率が大きく異なるうえに、熱応力を吸収するリードを持たない。TSOPはパッケージ材質がエポキシ封止材であっても、シリコンチップに対してのエポキシ封止材の量が少なく、全体の熱膨張率は従来のパッケージに比べて非常に小さいうえにリードも大変短い。そのため両者ともガラス基材エポキシ積層板上に実装した場合、熱膨張率不整合によって半田クラック不良が多発する欠点がある。
【0004】
そこで面方向(XY方向)の熱膨張率の小さい積層板として、アラミド基材エポキシ積層板が使用されることがある。しかし、アラミド布積層板は機械加工が非常に難しいうえに高価で実用に適さない。またアラミドペーパー布積層板は面方向の熱膨張率が 6〜8ppm/Kと非常に低く抑えられている反面、厚み方向(Z方向)の熱膨張率が 130〜300ppm/Kと非常に大きく、基板のスルーホール信頼性に問題があった。
【0005】
また、セラミックス複合基板と呼ばれるものがある。これにはガラス・エポキシ積層板の一部にセラミックス層を設けたもの、セラミックス基板の表面にガラス・エポキシプリプレグを配したものなどが知られている。その特性は非常に優れたものであるが、前者は、溶射法でセラミックスを基板或いは銅箔の表面に吹付け加工して製造されるため溶射工法上の問題から生産性に限度がありまたその設備は非常に高価なものである。後者は、セラミックス基板そのものに加工するものであるためサイズが限定されて、量産が難しく低コストでの供給は困難であるという欠点がある。
【0006】
本発明は、上記の事情に鑑みてなされたもので、熱膨張率が小さく、実装品に半田クラックの発生がなく、スルーホール信頼性に優れ、しかも低コストであってCLCC、TSOP等の半導体装置の実装に最適な、低膨張金属箔およびプリント回路用積層板を提供しようとするものである。
【0007】
【課題を解決するための手段】
本発明者は、上記の目的を達成しようと鋭意研究を重ねた結果、金属箔に特定のポリイミド系バインダーに無機質充填剤を混合した低膨張率層を設けたことによって、上記の目的が達成できることを見いだし、本発明を完成したものである。
【0008】
即ち、本発明は、
絶縁層の少なくとも片面に金属箔を設けたプリント回路用積層板において、前記の金属箔として、該絶縁層に接する側の面を粗面化した金属箔の粗面に、縮合環化型ポリイミド系バインダーに無機質充填剤を混合してなる低膨張率層を設けた低膨張金属箔を用いたことを特徴とするプリント回路用積層板およびそれに用いる低膨張金属箔である。
【0009】
以下、本発明を詳細に説明する。
【0010】
本発明のプリント回路用積層板の絶縁層としては、基材に熱硬化性樹脂を含浸・乾燥させてプリプレグを絶縁層とする。ここで用いる基材には、ガラスクロス、ガラスペーパー等熱硬化性樹脂積層板に用いられるものが全て使用できる。これらの基材の他に合成繊維(アラミド、フッ素樹脂、ポリイミド樹脂)等からなる織布や不織布、金属繊維からなる織布やマット類等も挙げられ、それらは単独又は混合して使用することができる。
【0011】
本発明で基材に含浸させるのに用いる熱硬化性樹脂は、溶媒を加えて基材に含浸しやすいように粘度調整を行ったものを使用する。具体的な熱硬化性樹脂としてはエポキシ樹脂、ポリイミド樹脂およびこれらの変性樹脂等が好ましく使用されるが、特にこれらに限定されるものではない。溶媒を加えた熱硬化性樹脂ワニスには本発明の目的に反しない限度において、着色剤、補強剤、高熱伝導性あるいは低誘電率の充填剤を配合することができる。高熱伝導性の充填剤としては、水酸化アルミニウム、シリカ等が挙げられ、また低誘電率の充填剤としてフッ素樹脂粉末、中空ガラスビーズ等が挙げられる。また、必要に応じてタルク、炭酸カルシウム等を適宜配合することができる。こうして得たワニスを、上述した基材に含浸・乾燥してプリプレグをつくり、このプリプレグを絶縁層として使用してプリント回路用積層板を製造することができる。
【0012】
本発明の低膨張金属箔は、プリント回路用に用いられている少なくとも片面を粗面化した金属箔の粗面に、縮合環化型ポリイミド系バインダーに無機質充填剤を混合した低膨張率層を設けたものである。ここでの金属箔としては銅箔、アルミニウム箔等が使用される。また、ここで用いる縮合環化型ポリイミド系バインダーとしては、酸成分の酸無水物とジアミン成分のジアミンを縮合反応させて得られるポリイミドを広く使用できる。通常、これらの前駆体であるポリアミック酸樹脂の状態で処理し、加熱等を行って環化させるが、このポリアミック酸樹脂に無機質充填剤を混合させる。ここで用いる無機質充填剤としては、低膨張率のものが使用され、特に限定されるものではないが、例えばシリカ、アルミナ等が好ましく、これらは単独又は混合して使用することができる。
【0013】
低膨張率層を作成する方法は、特に制限はないが工業的生産に適した手法として、溶媒に溶解された無機質充填剤を混合したポリアミック酸樹脂溶液を、連続的に金属箔に滴下或いはスプレーにより塗工し、その先に設けたスキージ或いはナイフコーターで塗工量をコントロールし、乾燥炉で焼成イミド化する方法が適している。
【0014】
こうして製造した低膨張金属箔は、プリプレグと組み合わせて加熱加圧一体に成形して低膨張性のプリント回路用積層板を製造することができる。このプリント回路用積層板は、CLCC、TSOP等の面方向の熱膨張率の小さい半導体装置を実装する回路板として好適に使用できる。
【0015】
【作用】
本発明のプリント回路用積層板は、積層板表面に縮合環化型ポリイミド系バインダーに無機質充填剤を混合した低膨張金属箔を用いたことによって低膨張率の層が絶縁層部分の膨張を抑えて、回路基板全体の面方向熱膨張率を小さくすることができる。また厚さ方向でも低膨張率層の部分が加わることにより、全体として熱膨張率を小さくすることができた。低膨張金属箔による低膨張化は、多層板を製造する場合に、より大きな効果を発揮することができる。すなわち、層数が増加するごとに基板全体に対する低膨張率層の割合が増加してゆき、面方向と厚さ方向ともに、より低膨張化が達成される。
【0016】
本発明のプリント回路用積層板は、25〜125 ℃の温度範囲における熱膨張率を面方向で15〜20 ppm/K、厚み方向で30〜40 ppm/Kと調整したことによって、CLCC、TSOP等の半導体装置と面方向の熱膨張率を整合させ、またスルーホール信頼性を向上させることができた。
【0017】
【実施例】
本発明を実施例によって具体的に説明するが、本発明はこれらの実施例によって限定されるものではない。
【0018】
実施例
厚さ18μm の電解銅箔の粗面に、ビフェニルテトラカルボン酸無水物とパラフェニレンジアミンから誘導されたポリアミック酸のN−メチル−2−ピロリドン溶液にシリカ粉末を混合した溶液を塗布・乾燥し、厚さ 0.10mm の低膨張率層を設け、低膨張銅箔を製造した。厚さ 0.18mm のガラスクロスに耐熱エポキシ樹脂ワニスを含浸・乾燥し、半硬化状態として得たプリプレグを 3枚、両面に上記低膨張銅箔を重ねてステンレス板間に挟み、加熱加圧一体に成形して厚さ 0.8mmの低膨張のプリント回路用積層板を製造した。
【0019】
比較例1
繊維平面配向の 0.1mm厚のパラ系芳香族ポリアミドペーパー基材 テクノーラ(帝人社製、商品名)に、耐熱エポキシ樹脂ワニスを含浸・乾燥してプリプレグをつくり、このプリプレグ 8枚を重ね、その両面に厚さ18μm の電解銅箔を配置してステンレス板間に挟み、加熱プレスによって一体に積層成形し、厚さ 0.8mmのアラミドペーパーエポキシプリント回路用積層板を製造した。
【0020】
比較例2
厚さ 0.8mm汎用ガラス基材エポキシプリント回路用積層板(FR−4グレード)を用意した。
【0021】
実施例および比較例1〜2で製造したプリント回路用積層板について、熱膨張率、TSOPの接続安定性、スルーホール信頼性を試験したのでその結果を表1に示した。本発明は各特性のバランスに優れており、本発明の効果が確認された。
【0022】
【表1】
【0023】
【発明の効果】
以上の説明および表1から明らかなように、本発明のプリント回路用積層板および低膨張率金属箔は、熱膨張率が小さく、半田クラックの発生がなく低コストで、スルーホール信頼性にも優れたもので、CLCC、TSOP等の半導体装置の実装に最適なものである。[0001]
[Industrial applications]
INDUSTRIAL APPLICABILITY The present invention is suitable for mounting a semiconductor device having a small coefficient of thermal expansion such as a package of a ceramic led chip carrier (CLCC) or a thin small outline package (TSOP), and a printed circuit excellent in through-hole reliability. And a low-expansion metal foil used therefor.
[0002]
[Prior art]
Technological innovation in recent years has been remarkable, and downsizing of electronic devices has never stopped. This is due to the technology of high-density mounting, high integration of semiconductors, and miniaturization of semiconductor packages. Semiconductor devices such as CLCC and TSOP, which have smaller package sizes than semiconductor chip sizes, have begun to be used frequently. However, conventionally, copper-clad laminates that have been used as printed circuit boards for industrial equipment, that is, prepregs and copper foils in which a base material such as glass cloth is impregnated with a thermosetting resin such as an epoxy resin and dried. Is not necessarily suitable for mounting semiconductor devices such as CLCC and TSOP.
[0003]
CLCC has a package material of ceramic, has a significantly different coefficient of thermal expansion from a glass-based epoxy laminate used for mounting, and does not have a lead for absorbing thermal stress. Even if the package material is epoxy encapsulant, TSOP has a small amount of epoxy encapsulant for the silicon chip, the overall coefficient of thermal expansion is very small compared to the conventional package, and the leads are very short. . Therefore, when both are mounted on a glass-based epoxy laminated board, there is a defect that solder cracking failure frequently occurs due to thermal expansion coefficient mismatch.
[0004]
Therefore, an aramid-based epoxy laminate may be used as a laminate having a small coefficient of thermal expansion in the plane direction (XY directions). However, aramid fabric laminates are very difficult to machine and expensive and unsuitable for practical use. Aramid paper cloth laminates have a very low coefficient of thermal expansion in the plane direction of 6 to 8 ppm / K, but have a very large coefficient of thermal expansion in the thickness direction (Z direction) of 130 to 300 ppm / K. There was a problem with the reliability of the through hole of the substrate.
[0005]
There is a so-called ceramic composite substrate. There are known a glass-epoxy laminate having a ceramic layer provided on a part thereof, and a ceramic substrate having a glass-epoxy prepreg disposed on a surface thereof. Although its properties are very good, the former has a limited productivity due to problems in the thermal spraying method because it is manufactured by spraying ceramics onto the surface of the substrate or copper foil by thermal spraying. The equipment is very expensive. The latter is disadvantageous in that it is processed into the ceramic substrate itself, so that its size is limited, mass production is difficult, and supply at low cost is difficult.
[0006]
The present invention has been made in view of the above circumstances, has a low coefficient of thermal expansion, has no occurrence of solder cracks in a mounted product, has excellent through-hole reliability, and is low-cost, and can be used for semiconductors such as CLCC and TSOP. An object of the present invention is to provide a low-expansion metal foil and a laminate for a printed circuit, which are most suitable for mounting the device.
[0007]
[Means for Solving the Problems]
The present inventors have conducted intensive studies to achieve the above object, and as a result, it has been found that the above object can be achieved by providing a metal foil with a low expansion coefficient layer in which an inorganic filler is mixed with a specific polyimide binder. The present invention has been completed.
[0008]
That is, the present invention
In a printed circuit laminate in which a metal foil is provided on at least one surface of an insulating layer, as the metal foil, a condensed cyclized polyimide-based polyimide film is formed on the roughened surface of the metal foil whose surface in contact with the insulating layer is roughened. A laminated board for a printed circuit and a low-expansion metal foil used therefor, characterized by using a low-expansion metal foil provided with a low-expansion coefficient layer formed by mixing an inorganic filler into a binder.
[0009]
Hereinafter, the present invention will be described in detail.
[0010]
As the insulating layer of the laminate for a printed circuit according to the present invention, a prepreg is used as an insulating layer by impregnating and drying a base material with a thermosetting resin. As the base material used here, all materials used for thermosetting resin laminates such as glass cloth and glass paper can be used. In addition to these substrates, woven fabrics and nonwoven fabrics made of synthetic fibers (aramid, fluororesin, polyimide resin) and the like, woven fabrics and mats made of metal fibers, and the like can be used alone or in combination. Can be.
[0011]
The thermosetting resin used for impregnating the base material in the present invention is a resin whose viscosity has been adjusted so that the base material can be easily impregnated by adding a solvent. As specific thermosetting resins, epoxy resins, polyimide resins, modified resins thereof and the like are preferably used, but are not particularly limited to these. The thermosetting resin varnish to which the solvent has been added may contain a colorant, a reinforcing agent, and a filler having a high thermal conductivity or a low dielectric constant, as long as the object of the present invention is not adversely affected. Examples of the filler having a high thermal conductivity include aluminum hydroxide and silica, and examples of the filler having a low dielectric constant include a fluororesin powder and hollow glass beads. In addition, talc, calcium carbonate, and the like can be appropriately added as needed. The varnish thus obtained is impregnated into the above-described substrate and dried to form a prepreg, and the prepreg can be used as an insulating layer to produce a printed circuit laminate.
[0012]
The low expansion metal foil of the present invention has a low expansion coefficient layer in which an inorganic filler is mixed with a condensed cyclized type polyimide binder on a rough surface of a metal foil having at least one surface roughened, which is used for a printed circuit. It is provided. Here, a copper foil, an aluminum foil or the like is used as the metal foil. Further, as the condensed cyclized polyimide binder used here, a polyimide obtained by subjecting an acid anhydride of an acid component and a diamine of a diamine component to a condensation reaction can be widely used. Usually, treatment is performed in the state of a polyamic acid resin which is a precursor thereof, and cyclization is performed by heating or the like. An inorganic filler is mixed with the polyamic acid resin. The inorganic filler used here has a low expansion coefficient , and is not particularly limited. For example, silica, alumina and the like are preferable, and these can be used alone or as a mixture.
[0013]
The method of forming the low expansion coefficient layer is not particularly limited, but as a method suitable for industrial production, a polyamic acid resin solution mixed with an inorganic filler dissolved in a solvent is continuously dropped or sprayed on a metal foil. In this method, the amount of coating is controlled by a squeegee or a knife coater provided in advance, and the imidization is performed by firing in a drying furnace.
[0014]
The low-expansion metal foil thus manufactured can be combined with a prepreg and integrally molded by heating and pressing to produce a low-expansion printed circuit laminate. This printed circuit board can be suitably used as a circuit board for mounting a semiconductor device having a small coefficient of thermal expansion in the plane direction such as CLCC and TSOP.
[0015]
[Action]
The laminated board for a printed circuit of the present invention uses a low-expansion metal foil in which an inorganic filler is mixed with a condensed cyclized polyimide binder on the surface of the laminated board, so that the low-expansion layer suppresses expansion of the insulating layer portion. Thus, the coefficient of thermal expansion in the surface direction of the entire circuit board can be reduced. Further, the addition of the low expansion coefficient layer also in the thickness direction could reduce the thermal expansion coefficient as a whole. Reducing the expansion with the low expansion metal foil can exert a greater effect when manufacturing a multilayer board. That is, as the number of layers increases, the ratio of the low expansion coefficient layer to the entire substrate increases, and lower expansion can be achieved in both the surface direction and the thickness direction.
[0016]
The printed circuit laminate of the present invention has a coefficient of thermal expansion in the temperature range of 25 to 125 ° C. of 15 to 20 ppm / K in the plane direction and 30 to 40 ppm / K in the thickness direction, so that CLCC and TSOP can be obtained. The thermal expansion coefficient in the plane direction is matched with that of the semiconductor device, and the reliability of the through hole can be improved.
[0017]
【Example】
EXAMPLES The present invention will be specifically described with reference to examples, but the present invention is not limited to these examples.
[0018]
EXAMPLE A solution obtained by mixing silica powder with an N-methyl-2-pyrrolidone solution of a polyamic acid derived from biphenyltetracarboxylic anhydride and paraphenylenediamine was applied to the roughened surface of an electrolytic copper foil having a thickness of 18 μm and dried. Then, a low expansion coefficient layer having a thickness of 0.10 mm was provided to produce a low expansion copper foil. 0.18mm thick glass cloth impregnated with heat-resistant epoxy resin varnish, dried, three prepregs obtained in a semi-cured state, the above low expansion copper foil laminated on both sides, sandwiched between stainless steel plates, heat and pressure integrated To produce a 0.8 mm thick low expansion laminate for printed circuits.
[0019]
Comparative Example 1
A prepreg is prepared by impregnating and drying a heat-resistant epoxy resin varnish on a 0.1 mm thick para-aromatic polyamide paper base Technora (trade name, manufactured by Teijin Limited) with a fiber plane orientation, and stacking eight prepregs. An 18 μm-thick electrolytic copper foil was placed on both sides, sandwiched between stainless steel plates, and integrally laminated and formed by a heat press to produce a 0.8-mm-thick aramid paper epoxy printed circuit laminate.
[0020]
Comparative Example 2
A laminated board (FR-4 grade) for a 0.8 mm thick general-purpose glass substrate epoxy printed circuit was prepared.
[0021]
The thermal expansion coefficient, TSOP connection stability, and through-hole reliability of the printed circuit laminates manufactured in Examples and Comparative Examples 1 and 2 were tested. The results are shown in Table 1. The present invention was excellent in the balance of each property, and the effect of the present invention was confirmed.
[0022]
[Table 1]
[0023]
【The invention's effect】
As apparent from the above description and Table 1, the printed circuit board and the low expansion coefficient metal foil of the present invention have a low coefficient of thermal expansion, no solder cracks, low cost, and high through-hole reliability. It is excellent and is most suitable for mounting semiconductor devices such as CLCC and TSOP.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1965593A JP3596899B2 (en) | 1993-01-12 | 1993-01-12 | Low expansion metal foil and laminate for printed circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1965593A JP3596899B2 (en) | 1993-01-12 | 1993-01-12 | Low expansion metal foil and laminate for printed circuit |
Publications (2)
Publication Number | Publication Date |
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JPH06216483A JPH06216483A (en) | 1994-08-05 |
JP3596899B2 true JP3596899B2 (en) | 2004-12-02 |
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JP1965593A Expired - Fee Related JP3596899B2 (en) | 1993-01-12 | 1993-01-12 | Low expansion metal foil and laminate for printed circuit |
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JP (1) | JP3596899B2 (en) |
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US6117616A (en) * | 1995-04-17 | 2000-09-12 | Nitto Denko Corporation | Circuit-forming substrate and circuit substrate |
CN117457504B (en) * | 2023-12-22 | 2024-03-08 | 成都万士达瓷业有限公司 | Production method for copper-clad ceramic packaging surface |
-
1993
- 1993-01-12 JP JP1965593A patent/JP3596899B2/en not_active Expired - Fee Related
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JPH06216483A (en) | 1994-08-05 |
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