JP3596388B2 - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JP3596388B2
JP3596388B2 JP33312499A JP33312499A JP3596388B2 JP 3596388 B2 JP3596388 B2 JP 3596388B2 JP 33312499 A JP33312499 A JP 33312499A JP 33312499 A JP33312499 A JP 33312499A JP 3596388 B2 JP3596388 B2 JP 3596388B2
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heat
radiating
semiconductor
chips
member
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JP33312499A
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Japanese (ja)
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JP2001156219A5 (en )
JP2001156219A (en )
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好美 中瀬
豊 福田
和仁 野村
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株式会社デンソー
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    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device, with which heat radiation is improved and a dispersion in positions of packaged semiconductor chips is suppressed, concerning the semiconductor device having a configuration sandwiching both sides of a semiconductor chip with heat radiating members. SOLUTION: A projecting part 6 of a first heat radiating member 3 is bonded with the main electrodes of Si chips 1a and 1b on one side 5a through a solder 2 and the Si chips 1a and 1b are fitted and bonded to a recessed part 8 of a second heat radiating member 4 through the solder 2. Besides, in the state of engaging a spacer 13 to a protruding part 7a of the first heat radiating member 3, protruding parts 7a and 7b formed on the first and second heat radiating members 3 and 4 and protruded on the side of the Si chips 1a and 1b are fitted and caulked to hoes 12a and 12b formed on a lead frame 9.

Description

【0001】 [0001]
【発明の属する技術分野】 BACKGROUND OF THE INVENTION
本発明は、半導体チップの上下から放熱する構成を有する半導体装置に関する。 The present invention relates to a semiconductor device having a structure for radiating from the top and bottom of the semiconductor chip.
【0002】 [0002]
【従来の技術】 BACKGROUND OF THE INVENTION
半導体チップの上下から放熱を行っている半導体装置には、例えば、特開平4−27145号公報に記載の発明がある。 The semiconductor device has to radiate the heat from the top and bottom of the semiconductor chip, for example, there is the invention described in JP-A-4-27145. 図11は、この公報に記載の半導体装置の概略断面図である。 Figure 11 is a schematic cross-sectional view of a semiconductor device according to this publication. 図11に示すように、半導体チップJ1が下面放熱板J2に直接接着されており、下面および上面放熱板J2、J3が、これらの放熱板J2、J3に複数配列された結合ピンJ4により接合されている。 As shown in FIG. 11, the semiconductor chip J1 is bonded directly to the lower surface radiating plate J2, lower and upper surfaces radiator plate J2, J3 is joined by the coupling pin J4 which are arrayed in these radiating plate J2, J3 ing. また、半導体チップJ1とリードフレームJ5とがワイヤボンドにより形成されたワイヤJ6により電気的に接続されている。 Moreover, it is electrically connected by wire J6 of the semiconductor chip J1 and the lead frame J5 is formed by wire bonding. そして、これらの部材J1〜J6が樹脂J7により封止されている。 Then, these members J1~J6 is sealed by a resin J7.
【0003】 [0003]
上記、従来公報に記載の半導体装置では、半導体チップJ1の上下両側から放熱を行うようにしているものの、半導体チップJ1の上面と上面放熱板J3とが直接接着されていない。 Above, in the semiconductor device according to the prior art publication, although to carry out the heat radiation from the upper and lower sides of the semiconductor chip J1, the upper surfaces radiating plate J3 semiconductor chip J1 is not bonded directly. そのため、半導体チップJ1の上面から直接、上面放熱板J3に熱が伝わるのではなく、モールド樹脂J7を介して伝わることになり、半導体チップJ1の上面からの放熱性が良くない。 Therefore, directly from the upper surface of the semiconductor chip J1, rather than heat is transferred to the upper surface radiating plate J3, it will be transmitted through the molded resin J7, poor heat dissipation from the upper surface of the semiconductor chip J1.
【0004】 [0004]
それに対して、特開昭61−166051号公報に記載の発明では、半導体チップの上下からモールド樹脂を介すことなく放熱を行っている。 In contrast, in the invention described in JP-A-61-166051, and to radiate the heat without passing through the molding resin from the upper and lower semiconductor chips. 図12は、この公報に記載の半導体装置の概略断面図である。 Figure 12 is a schematic cross-sectional view of a semiconductor device according to this publication. 図12に示すように、半導体チップJ11がダイパッドJ12に固着されており、半導体チップJ11の上面に接着剤J13を用いてチップ側放熱板J14が接着されている。 As shown in FIG. 12, the semiconductor chip J11 are secured to the die pad J12, chip-side radiator plate J14 with an adhesive J13 on the upper surface of the semiconductor chip J11 is bonded. また、外部リードJ15と半導体チップJ11とがワイヤボンドにより形成されたワイヤJ16により電気的に接続されている。 Moreover, it is electrically connected by wire J16 to the external lead J15 and the semiconductor chip J11 is formed by wire bonding. また、ダイパッドJ12における半導体チップJ11の搭載面とは反対側の面には、ダイパッド側放熱板J17が接触しており、これらの部材J11〜J17が樹脂J18により封止されている。 Further, the mounting surface of the semiconductor chip J11 in the die pad J12 on the opposite side is in contact with the die pad side radiator plate J17, these members J11~J17 is sealed by a resin J18.
【0005】 [0005]
【発明が解決しようとする課題】 [Problems that the Invention is to Solve
この後述の公報に記載の半導体装置は、前者公報に記載の半導体装置と比較して、半導体チップの上側に対しても放熱部材をモールド樹脂を介すことなく接触させているため放熱性が向上している。 The semiconductor device described in Japanese of the later is different from the semiconductor device according to the former publication, also improves heat dissipation since the contacting without the heat dissipation member via any mold resin with respect to the upper semiconductor chip are doing. しかし、この後述の公報に記載の半導体装置では放熱板を接着剤J13のみでチップに対して固定しているため、半導体チップを搭載する際に位置ずれ、即ち、半導体チップの搭載位置のばらつきが起こり易いという問題がある。 However, because securing the heat sink in the semiconductor device according to the chip in only adhesive J13 Publication of this later, misalignment when mounting the semiconductor chip, i.e., variations in mounting position of the semiconductor chip there is a problem that is likely to occur.
【0006】 [0006]
そのため、例えば、放熱板を電極として兼用し、特に半導体チップとしてパワー素子を用いる場合には、半導体チップの搭載位置がずれることにより、半導体チップの絶縁すべき領域において通電してしまう等の不具合がある。 Therefore, for example, when shared with the heat radiating plate as electrodes, using a power device as in particular a semiconductor chip, by mounting position of the semiconductor chip is shifted, a defect such as would be energized in the insulating region to be of the semiconductor chip is there.
【0007】 [0007]
本発明は、上記問題点に鑑み、半導体チップの両面を放熱部材で挟んでなる構成を有する半導体装置において、放熱性を改善し、半導体チップの搭載位置のばらつきを抑えた半導体装置を提供することを目的とする。 In view of the above problems, a semiconductor device having a structure formed by interposing the both sides of the semiconductor chip in the heat radiating member, improving heat dissipation, to provide a semiconductor device with less variation in the mounting position of the semiconductor chip With the goal.
【0008】 [0008]
【課題を解決するための手段】 In order to solve the problems]
上記目的を達成するため、請求項1に記載の発明では、半導体チップ(1a、1b)と、半導体チップ(1a、1b)の両面を挟むように熱伝導性を有する接合部材(2)を介して接合した一対の放熱部材(3、4)と、 半導体チップ(1a)における第1の放熱部材(3)と対向する面には制御電極が形成されており、制御電極と電気的に接続されるリードフレーム(9)とを備え、一対の放熱部材(3、4)は第1の放熱部材(3)と、半導体チップ(1a、1b)と対向する面に凹部(8)を形成した第2の放熱部材(4)とよりなり、この凹部(8)内に半導体チップ(1a、1b)を嵌め合わしていることを特徴としている。 To achieve the above object, the invention described in claim 1, through the semiconductor chip (1a, 1b), the semiconductor chip (1a, 1b) joined member having thermal conductivity so as to sandwich both sides of the (2) a pair of heat radiation members (3, 4) joined Te, the first heat radiating member (3) and a surface facing the semiconductor chip (1a) is formed with a control electrode, is electrically connected to the control electrode and a lead frame (9) that, a pair of heat radiation members (3, 4) is first formed with the first heat radiating member (3), the semiconductor chip (1a, 1b) and recesses (8) on opposite sides and becomes more and 2 of the heat radiating member (4), it is characterized in that put together fit the semiconductor chip (1a, 1b) in the recess (8) in the.
【0009】 [0009]
本発明では、熱伝導性を有する接合部材(2)を介して、一対の放熱部材(3、4)を半導体チップ(1a、1b)の両面と接合しているため、放熱性を改善することができる。 In the present invention, since via a bonding member (2) having a thermal conductivity is bonded pair of radiating member (3, 4) a semiconductor chip (1a, 1b) and both sides of, to improve the heat dissipation can. また、第2の放熱部材(4)の凹部(8)に半導体チップ(1a、1b)を嵌め合わせるため、半導体チップ(1a、1b)の平面方向において、第2の放熱部材(4)と半導体チップ(1a、1b)との相対位置を固定することができ、半導体チップ(1a、1b)の搭載位置のばらつきを抑えた半導体装置を提供することができる。 The second heat radiating member (4) of the recess (8) in the semiconductor chip (1a, 1b) for fitting the, in the plane direction of the semiconductor chip (1a, 1b), and a second heat radiating member (4) Semiconductor chips (1a, 1b) can be fixed relative position between, it is possible to provide a semiconductor device with less variation in the mounting position of the semiconductor chip (1a, 1b). さらに、本発明の様に半導体チップ(1a)に制御電極が形成されていても、凸部(6)の形状を調節することにより、第1の放熱部材(3)と制御電極とが接触しない様にすることができる。 Furthermore, even when the control electrode on the semiconductor chip (1a) has been formed as in the present invention, by adjusting the shape of the convex portion (6), a first heat radiating member (3) and the control electrode is not in contact it can be like.
【0010】 [0010]
請求項2に記載の発明では、請求項1に記載の発明において、第1の放熱部材(3)における半導体チップ(1a、1b)と対向する部位に、半導体チップ(1a、1b)側に突出した凸部(6)を形成し、この凸部(6)を半導体チップ(1a、1b)と接合部材(2)を介して接合することを特徴としている。 In the invention according to claim 2, protruding in the invention described in claim 1, at a site opposite to the semiconductor chip (1a, 1b) of the first heat radiating member (3), the semiconductor chip (1a, 1b) on the side and convex portions to form a (6), and characterized in that the projection (6) a semiconductor chip (1a, 1b) and through a joining member (2) joined.
【0011】 [0011]
本発明によれば、第2の放熱部材(4)の凹部(8)により半導体チップ(1a、1b)の位置決めを行った状態で、第1の放熱部材(3)に凸部(6)を形成しているため、凸部(6)の形状を調節することにより、第1の放熱部材(3)を半導体チップ(1a、1b)の所望の領域のみと適切に接合させることができる。 According to the present invention, the second heat radiating member (4) of the recess (8) by a semiconductor chip (1a, 1b) in a state in which the positioning was performed, the convex portion to the first heat radiating member (3) to (6) due to the formation, by adjusting the shape of the convex portion (6), it is possible to only a desired region and suitably joined in the first heat radiating member (3) semiconductor chips (1a, 1b).
【0014】 [0014]
請求項3に記載の発明では、 請求項1又は2に記載の発明において、一対の放熱部材(3、4)における半導体チップ(1a、1b)との対向面の少なくとも一方には突起部(7a、7b)を形成し、リードフレーム(9)に形成した穴(12a、12b)と突起部(7a、7b)とを嵌め合わせることにより、一対の放熱部材(3、4)の少なくとも一方をリードフレーム(9)に固定することを特徴としている。 In the invention described in claim 3, in the invention of claim 1 or 2, projections in at least one of the opposing surfaces of the semiconductor chip (1a, 1b) in a pair of heat radiation members (3, 4) (7a , 7b) is formed, holes formed in the lead frame (9) (12a, 12b) and projections (7a, 7b) and by fitting the at least one lead of the pair of heat radiation members (3,4) It is characterized in that fixed to the frame (9).
【0015】 [0015]
本発明によれば、リードフレーム(9)に対して一対の放熱部材(3、4)の少なくとも一方を固定して位置決めでき、放熱部材(3、4)の位置決め精度を向上させることができるため、半導体チップ(1a、1b)の平面方向における搭載位置のばらつきを、さらに抑えた半導体装置を提供することができる。 According to the present invention, it is possible to improve at least one possible positioning and fixing, positioning accuracy of the heat dissipation member (3, 4) of the lead frame (9) a pair of heat radiation members relative to (3,4) a semiconductor chip (1a, 1b) a variation in the mounting position in the plane direction, it is possible to provide a more subdued semiconductor device. 特に、一対の放熱部材(3、4)の両方をリードフレーム(9)に対して固定する場合は、このばらつきを確実に抑えることができる。 In particular, when fixing the both of the pair of heat radiation members (3, 4) to the lead frame (9) can suppress this variation reliably.
【0016】 [0016]
なお、この固定は、かしめにより行っても良いし、その他、半田などにより固定しても良い。 It should be noted that this fixed, may be performed by caulking, other, it may be fixed by soldering or the like.
【0017】 [0017]
請求項4に記載の発明では、 請求項1又は2に記載の発明において、一対の放熱部材(3、4)における半導体チップ(1a、1b)との対向面の少なくとも一方に突起部(7a、7b)を形成し、当該放熱部材(3、4)とリードフレーム(9)との間にスペーサ(13)を介在した状態で、リードフレーム(9)に形成した穴(12a、12b)と突起部(7a、7b)とを嵌め合わせて固定し、スペーサ(13)によって当該放熱部材(3、4)と半導体チップ(1a、1b)との、半導体チップ(1a、1b)の厚み方向における位置決めをしていることを特徴としている。 The invention according to claim 4, in the invention described in claim 1 or 2, projections in at least one of the opposing surfaces of the semiconductor chip (1a, 1b) in a pair of heat radiation members (3, 4) (7a, 7b) is formed, projections with the heat radiating member (3, 4) while interposing a spacer (13) between the lead frame (9), the holes formed in the lead frame (9) (12a, 12b) and parts (7a, 7b) fixed by fitting a spacer of the heat radiating member by (13) and (3,4) and the semiconductor chip (1a, 1b), the positioning in the thickness direction of the semiconductor chip (1a, 1b) It is characterized in that it is a.
【0018】 [0018]
これにより、半導体チップ(1a、1b)の平面方向に加えて厚み方向にも位置を固定できるため、半導体チップ(1a、1b)の搭載位置のばらつきを、より確実に抑えた半導体装置を提供することができる。 Accordingly, it is possible to fix the position on the thickness direction in addition to the planar direction of the semiconductor chip (1a, 1b), the semiconductor chip (1a, 1b) a variation in the mounting position of, to provide a semiconductor device which suppresses more reliably be able to.
【0019】 [0019]
請求項5に記載の発明では、半導体チップ(1a、1b)と、半導体チップ(1a、1b)の両面を挟むように熱伝導性を有する接合部材(2)を介して接合した一対の放熱部材(3、4)とを設け、一対の放熱部材(3、4)は、半導体チップ(1a、1b)と対向する部位に、半導体チップ(1a、1b)側に突出した凸部(6)を形成した第1の放熱部材(3)と、第2の放熱部材(4)とよりなり、この凸部(6)が、接合部材(2)を介して半導体チップ(1a、1b)に接合し、半導体チップ(1a)における第1の放熱部材(3)と対向する面に形成した制御電極と電気的に接続するリードフレーム(9)を設け、一対の放熱部材(3、4)における半導体チップ(1a、1b)との対向面の少なくとも一方には突起部(7a In the invention described in claim 5, the semiconductor chip (1a, 1b), a pair of heat radiation members joined via the joining member (2) having thermal conductivity so as to sandwich the both sides of the semiconductor chip (1a, 1b) (3, 4) are provided on a substrate, a pair of heat radiation members (3, 4), the semiconductor chip (1a, 1b) in a portion facing the semiconductor chip (1a, 1b) protruding portion protruding side (6) a first heat radiation member formed (3), become more and second heat radiating members (4), the projection (6) is bonded to the semiconductor chip (1a, 1b) via a bonding member (2) , provided a lead frame (9) which connects the first heat radiation member (3) and the opposing electrically a control electrode formed on the surface of the semiconductor chip (1a), the semiconductor chip in the pair of heat radiation members (3,4) (1a, 1b) and protrusions on at least one of the opposing surfaces of (7a 7b)を形成していることを特徴としている。 It is characterized by forming the 7b).
【0020】 [0020]
さらに、リードフレーム(9)に形成した穴(12a、12b)と、突起部(7a、7b)とを嵌め合わせて固定することにより、一対の放熱部材(3、4)の少なくとも一方をリードフレーム(9)に固定し、一対の放熱部材(3、4)とリードフレーム(9)との間に生じる隙間にスペーサ(13)を介在し、このスペーサ(13)によって一対の放熱部材(3、4)と半導体チップ(1a、1b)との、半導体チップ(1a、1b)の厚み方向における位置決めをすることを特徴としている。 Moreover, a hole formed in the lead frame (9) (12a, 12b), at least one of the lead frame protrusions (7a, 7b) by fixing by fitting a pair of heat radiation members (3,4) (9) fixed, a spacer (13) to the gap formed between the pair of the heat radiating member and the (3,4) and lead frame (9), a pair of heat radiation members (3 by the spacer (13), 4) a semiconductor chip (1a, 1b) and the is characterized in that the positioning in the thickness direction of the semiconductor chip (1a, 1b).
【0021】 [0021]
本発明の様に、第1の放熱部材(3)に形成した凸部(6)を半導体チップ(1a、1b)に接合するようにすると、半導体チップ(1a、1b)に接続されるリードフレーム(9)と一対の放熱部材(3、4)との間には、凸部(6)の段差によって隙間が生じるが、この隙間にスペーサ(13)を介在させてリードフレームに形成した穴(12a、12b)と一対の放熱部材(3、4)の突起部(7a、7b)とを嵌め合わせて固定することにより、半導体チップ(1a、1b)の平面方向にも厚み方向にも、半導体チップ(1a、1b)と一対の放熱部材(3、4)との相対位置のばらつきを抑えた半導体装置を提供することができる。 As in the present invention, when adapted to the joint projection portion formed on the first heat radiation member (3) to (6) in the semiconductor chip (1a, 1b), a lead frame connected to the semiconductor chip (1a, 1b) (9) and between the pair of heat radiation members (3, 4), but the gap by the step of the projections (6) occurs by interposing a spacer (13) to the gap hole formed in the lead frame ( 12a, protrusions 12b) and a pair of heat radiation members (3, 4) (7a, by fixing by fitting the 7b) and a semiconductor chip (1a, also in the thickness direction in the plane direction of 1b), the semiconductor it is possible to provide a semiconductor device with less variation in the relative positions of the chip (1a, 1b) and a pair of heat radiation members (3, 4).
【0022】 [0022]
請求項6に記載の発明では、 請求項1ないし5のいずれか1つに記載の発明において、一対の放熱部材(3、4)として、半導体チップ(1a、1b)に線膨張率が近似した金属を用いることを特徴としている。 The invention according to claim 6, in the invention described in any one of claims 1 to 5, as a pair of heat radiation members (3, 4), the linear expansion coefficient approximate to the semiconductor chip (1a, 1b) It is characterized by the use of metal.
【0023】 [0023]
これにより、半導体チップ(1a、1b)と各々の放熱部材(3、4)との線膨張率が異なることに起因する熱応力の発生を抑制することができ、接合部材(2)に対する歪みの集中を防止することができる。 Thus, the semiconductor chip (1a, 1b) and generating a resulting heat stresses in linear expansion coefficient different from that of the respective heat dissipating members (3, 4) can be the suppressed, the joining member to strain of (2) it is possible to prevent the concentration.
【0024】 [0024]
請求項7に記載の発明では、 請求項1ないし6のいずれか1つに記載の発明において、一対の放熱部材(3、4)として、銅の内部において、インバーおよびモリブデンのうちの少なくとも1つが、部分的に複数配置されているものを用いることを特徴としている。 In the invention described in claim 7, in the invention described in any one of claims 1 to 6, as a pair of heat radiation members (3,4), inside of the copper, at least one of Invar and molybdenum It is characterized by the use of what is partially plurality placement.
【0025】 [0025]
本発明によれば、銅の内部にインバーやモリブデンを配置した金属は、半導体チップ(1a、1b)と線膨張率が近似しているため、 請求項6に記載の発明と同様の効果を発揮することができる。 According to the present invention, metal arranged invar or molybdenum inside the copper, semiconductor chips (1a, 1b) and for linear expansion coefficient is approximate, the same effects as the invention of claim 6 can do. また、インバーやモリブデンは銅と比較すると放熱性が劣るが、銅の内部に部分的に配置することにより、放熱性も十分に確保することができる。 Moreover, Invar, molybdenum is inferior heat dissipation when compared with copper, by partially disposed within the copper, it is possible to sufficiently ensure heat radiation property.
【0026】 [0026]
請求項8に記載の発明では、 請求項1ないし7のいずれか1つに記載の発明において、一対の放熱部材(3、4)の各々の面のうち、半導体チップ(1a、1b)と対向する面とは反対側の面が露出した状態で、一対の放熱部材(3、4)および半導体チップ(1a、1b)を樹脂封止していることを特徴としている。 Facing in the invention according to claim 8, in the invention described in any one of claims 1 to 7, of the respective surfaces of a pair of heat radiation members (3,4), the semiconductor chip (1a, 1b) and while the surface which is exposed surface opposite to, and characterized in that a pair of heat radiation members (3, 4) and the semiconductor chip (1a, 1b) of the resin sealing.
【0027】 [0027]
これにより、一対の放熱部材(3、4)を構成する第1の放熱部材(3)と第2の放熱部材(4)との絶縁を確実に行うことができる。 Thus, it is possible to reliably insulate the first heat radiating member (3) and the second heat radiating member forming a pair of heat radiation members (3, 4) (4). また、露出した面を冷却することにより、的確に放熱を行うことができる。 Further, by cooling the exposed surface, it can be performed accurately heat dissipation.
【0028】 [0028]
請求項9に記載の発明では、 請求項1ないし8のいずれか1つに記載の発明において、一対の放熱部材(3、4)が、半導体チップ(1a、1b)の電極として用いられることを特徴としている。 The invention according to claim 9, in the invention according to any one of claims 1 to 8, a pair of heat radiation members (3, 4), to be used as an electrode of the semiconductor chip (1a, 1b) It is characterized.
【0029】 [0029]
一対の放熱部材(3、4)を電極として利用し、各々の放熱部材(3、4)の間の電位差が大きい場合には、各々の放熱部材(3、4)と半導体チップ(1a、1b)との相対位置がずれることにより、絶縁されるべき部分が通電してしまう恐れがある。 Using a pair of heat radiation members (3, 4) as an electrode, if the potential difference between each of the heat radiating member (3, 4) is large, each of the heat radiating member (3, 4) and the semiconductor chip (1a, 1b by the relative position shifts of), there is a possibility that part to be insulated will be energized. しかし、本発明では、半導体チップ(1a、1b)と各々の放熱部材(3、4)との相対位置のばらつきが抑えられているため、各々の放熱部材(3、4)を電極として用いても好適である。 However, in the present invention, a semiconductor chip (1a, 1b) and for variation in the relative position between each of the heat radiating member (3, 4) is suppressed, with each of the heat radiating member (3, 4) as an electrode it is also suitable.
【0030】 [0030]
なお、上記各手段の括弧内の符号は、後述する実施形態に記載の具体的手段との対応関係を示すものである。 The reference numerals in parentheses of each means described above, shows the correspondence with specific means described in embodiments described later.
【0031】 [0031]
【発明の実施の形態】 DETAILED DESCRIPTION OF THE INVENTION
(第1実施形態) (First Embodiment)
図1は、第1実施形態の半導体装置を上面から見た模式図であり、図2(a)は、図1におけるB−B断面を模式的に示す図であり、図2(b)は、図1におけるD−D断面を模式的に示す図である。 Figure 1 is a schematic view of the semiconductor device of the first embodiment from above, FIG. 2 (a) is a view showing a section B-B in FIG. 1 schematically, and FIG. 2 (b) is a diagram showing the D-D cross section in FIG. 1 schematically. 図1および図2に示すように、平面的に配置された2つの半導体チップとしてのSiチップ1a、1bに対して、それらのSiチップ1a、1bの両面を挟む様にして、熱伝導性を有する接合部材2を介して一対の放熱部材である第1および第2の放熱部材3、4が接合されている。 As shown in FIGS. 1 and 2, Si chips 1a as two semiconductor chips which are planarly disposed, relative 1b, those Si chips 1a, in the manner to sandwich the both sides 1b, the thermal conductivity of the first and second heat radiating members 3 and 4 are a pair of heat radiating member via a joint member 2 having is bonded.
【0032】 [0032]
Siチップ1aのワイヤボンドされている側の面である一面5aに対しては、第1の放熱部材3が接合されており、Siチップ1a、1bにおける一面5aの反対側の面である他面5bに対しては、第2の放熱部材4が接合されている。 Si against one surface 5a is the surface on the side that is wire bond chip 1a, and the first heat radiating member 3 is joined, Si chips 1a, the other surface is a surface opposite to the one surface 5a of 1b for 5b, the second heat radiating member 4 is joined. この第2の放熱部材4は、図1においては、一部、他の部材と重なっている部分を二点鎖線で示してある。 The second heat radiating member 4, in FIG. 1, a part is shown the portion which overlaps with the other members by a two-dot chain line. また、Siチップ1a、1bは、図1において他の部材と重なっている部分を一点鎖線で示してある。 Further, Si chips 1a, 1b is shown a portion which overlaps with the other members by a one-dot chain line in FIG. 1.
【0033】 [0033]
ここで、Siチップ1a、1bとしては、本例では、図1においてワイヤボンドされているSiチップがIGBT(Insulated Gate Bipolar Transistor)チップ1aであり、もう一方のSiチップがフライホイールダイオードチップ1bである。 Here, Si chips 1a, as is 1b, in this example, a Si chip IGBT (Insulated Gate Bipolar Transistor) chips 1a are bonded by wire 1, the other Si chip flywheel diode chips 1b is there. IGBTチップ1aにおいては、それぞれ、第1の放熱部材3がエミッタ端子、第2の放熱部材4がコレクタ端子となっている。 In the IGBT chip 1a, respectively, the first heat radiation member 3 is the emitter terminal, the second heat radiating member 4 has a collector terminal. また、IGBTチップ1aにおける第1の放熱部材3と対向する面には、外部との電気的な信号の授受を行うための制御電極(図示せず)がゲートとして形成されており、インナーリード10とワイヤボンドされている。 Further, the surface facing the first heat radiating member 3 in the IGBT chip 1a, the control electrode for exchanging electrical signals with the outside (not shown) is formed as a gate, the inner lead 10 and is wire-bonded.
【0034】 [0034]
IGBTチップ1aの等価回路は、例えば図3に示すようにコレクタC、エミッタE、ゲートG、電流検出用端子Is、感温のためのダイオード端子であるアノードAおよびカソードKからなる。 Equivalent circuit of the IGBT chip 1a is for example a collector C, as shown in FIG. 3, consisting of the emitter E, the gate G, the current detection terminal Is, the anode A and cathode K is a diode terminal for temperature sensitive.
【0035】 [0035]
図1および図2に示すように、第1の放熱部材3は平面形状は略矩形であり、その対角から相反する方向へ短冊状に伸びている短冊部3a、3bが2個所設けられている。 As shown in FIGS. 1 and 2, the first heat radiating member 3 is a plan shape is substantially rectangular, strip portion 3a extending from the diagonal to the strip in opposite direction, and 3b are provided at two positions there. 一方、厚み方向には、各々のSiチップ1a、1bの一面5a側の主電極と対向する部位に、Siチップ1a、1b側に突出した凸部6が形成されている。 On the other hand, the thickness direction, each of the Si chips 1a, the main electrode opposite to the site of the one surface 5a side of the 1b, Si chips 1a, the convex portion 6 which protrudes 1b side. そして、凸部6の先端は平面あるいはSiチップ1a、1bとの接合に支障を来さない程度に平面であり、この平面部の形状は対向するSiチップ1a、1bの主電極の平面形状に対応している。 The tip plane or Si chips 1a of the convex portion 6, a plane so as not hindrance for bonding the 1b, Si chips 1a The shape of the flat portion is opposed to the planar shape of the main electrode 1b It is compatible.
【0036】 [0036]
また、第1の放熱部材3のSiチップ1a、1bとの対向面における各々の短冊部3a、3b、および矩形部の各辺のうち短冊部3a、3bが伸びている方向に平行な辺の内側の計3個所において、Siチップ1a、1b側に突出した突起部7aが形成されている。 Further, Si chips 1a of the first heat radiating member 3, and 1b each strip portion 3a in the opposed surface, 3b, and the strip portion 3a of each side of the rectangular portion, 3b is a side parallel to the direction in which elongation inside the total of three locations, Si chips 1a, the protrusion 7a is protruding 1b side are formed.
【0037】 [0037]
第2の放熱部材4は、平面形状は第1の放熱部材3とほぼ同じである。 The second heat radiating member 4, the planar shape is approximately the same as the first heat radiating member 3. ただし、第2の放熱部材4における2つの短冊部4a、4bは、第1の放熱部材3の各々の短冊部3a、3bと異なる位置に設けられている。 However, two of the strip portions 4a of the second heat radiating member 4, 4b, the first heat radiating member 3 of each of the strip portions 3a, is provided in the 3b position different. 一方、厚み方向には、Siチップ1a、1bと対向する部分においてSiチップ1a、1bが嵌まるような凹部8が形成されている。 On the other hand, the thickness direction, Si chips 1a, Si chip 1a in 1b and the opposing portion, the concave portion 8 as 1b is fits is formed. この凹部8の深さは、例えば、0.1〜0.3mm程度にすることができる。 The depth of the recess 8, for example, can be about 0.1 to 0.3 mm.
【0038】 [0038]
また、第2の放熱部材4のSiチップ1a、1bとの対向面における各々の短冊部4a、4b、および矩形部の各辺のうち短冊部4a、4bが伸びている方向に平行な辺の内側の計3個所において、Siチップ1a、1b側に突出した突起部7bが形成されている。 Further, Si chips 1a of the second heat radiating member 4, and 1b each strip portion 4a of the opposed surfaces, 4b, and the strip portion 4a of each side of the rectangular portion, 4b is a side parallel to the direction in which elongation inside the total of three locations, Si chips 1a, the protrusion 7b is protruding 1b side are formed. ただし、これらの第2の放熱部材4に形成された突起部7bは第1の放熱部材3に形成された突起部7aと上面方向から見た場合に重ならないような位置にある。 However, the protrusion 7b which is formed in the second heat radiating member 4, these in overlapping not such a position when viewed from the projection portion 7a and the upper surface direction formed in the first heat radiating member 3.
【0039】 [0039]
また、第1および第2の放熱部材3、4は、例えばCu(銅)等を用いている。 The first and second heat radiating member 3, 4 using, for example, Cu (copper) or the like. 接合部材2としては、高熱伝導接着部材を用いており、その様な部材としては、例えば半田やろう材などがある。 As the bonding member 2, and with high thermal conductivity adhesive member, as such member, for example, a solder bastard material.
【0040】 [0040]
そして、各々のSiチップ1a、1bの他面5b側が、第2の放熱部材4に形成された凹部8内に接合部材2を介して嵌め合わされて接合され、各々のSiチップ1a、1bの一面5a側の主電極には、接合部材2を介して第1の放熱部材3に形成された凸部6が接合されている。 Each of the Si chips 1a, the other surface 5b side is 1b, the one surface of the second heat radiating member 4 via a bonding member 2 formed recess 8 fitted are together and joined, each of Si chips 1a, 1b a main electrode of 5a side, the convex portion 6 formed on the first heat radiation member 3 via a bonding member 2 are joined.
【0041】 [0041]
また、Siチップ1a、1bの制御電極とリードフレーム9のインナーリード10とがワイヤボンドによって形成されたワイヤ11によって電気的に接続されている。 Moreover, are electrically connected by a Si chip 1a, the wires 11 and the inner leads 10 of the control electrode and the lead frame 9 is formed by a wire bonding 1b. リードフレーム9は図1においては、一部、他の部材と重なっている部分が点線で示されている。 Lead frame 9 in FIG. 1, a portion, a portion which overlaps with the other member is indicated by a dotted line.
【0042】 [0042]
また、リードフレーム9においては、後述のように、第1および第2の放熱部材3、4の突起部7a、7bと嵌め合わせるための穴12a、12bを有する固定部9a、9bが6個所に設けられている。 Further, the lead frame 9, as described below, the protrusion portion 7a of the first and second heat radiating member 3, 4, holes 12a for mating with 7b, the fixing portion 9a with 12b, 9b within 6 positions It is provided. ここで、ワイヤ11としては、Al(アルミニウム)やAu(金)等を用いることができ、リードフレーム9としては、例えばCuやCu合金または42合金等を用いることができる。 Here, the wire 11, can be used Al (aluminum) or Au (gold) or the like, as the lead frame 9 may be, for example, Cu or Cu alloy or 42 alloy.
【0043】 [0043]
そして、図2(b)に示すように、第2の放熱部材4に形成された突起部7bとリードフレーム9の固定部9bに形成された穴12bとが嵌め合わされてかしめられている。 Then, as shown in FIG. 2 (b), a second blind hole 12b formed in the fixed portion 9b of the protruding portion 7b formed member 4 and the lead frame 9 is caulked fitted. また、第1の放熱部材3に形成された突起部7aの全てには、第1の放熱部材3とリードフレーム9の固定部9aとの間にスペーサ13が介在されており、この状態で、この固定部9aに形成された穴12aと、第1の放熱部材3に形成された突起部7aとが嵌め合わされてかしめられている。 Further, all of the projections 7a formed in the first heat radiating member 3, spacer 13 is interposed between the fixed portion 9a of the first heat radiating member 3 and the lead frame 9, in this state, a hole 12a formed in the fixed portion 9a, a projecting portion 7a formed on the first heat radiation member 3 is caulked fitted.
【0044】 [0044]
ここで、スペーサ13は、例えばCu等からなる円柱や角柱の金属であって、突起部7aが貫通するための穴を有するものである。 Here, the spacer 13 is, for example, a metal cylindrical or prismatic made of Cu or the like, and have a hole for the protruding portion 7a passes. また、このスペーサ13はSiチップ1a、1bと第1の放熱部材3との、Siチップ1a、1bの厚み方向における位置決めを行うためのものである。 Further, the spacer 13 is for performing Si chips 1a, the 1b and the first heat radiating member 3, Si chips 1a, the positioning in the thickness direction of 1b. このスペーサ13の大きさは、例えば、角柱の場合には、断面が一辺2mmの正方形で厚みが0.6mm程度のものにすることができる。 The size of the spacer 13, for example, in the case of prismatic in cross section and a thickness one side of a square 2mm can be of the order of 0.6 mm.
【0045】 [0045]
そして、図1および図2に示すように、第1および第2の放熱部材3、4の各々の面のうちSiチップ1a、1bと対向する面とは反対側の面が露出した状態で、上述のように固定された各々のSiチップ1a、1bと各々の放熱部材3、4とが樹脂14により封止されている。 Then, as shown in FIGS. 1 and 2, in the state Si chips 1a of each of the surfaces of the first and second heat radiating member 3, 4, and 1b and the surface opposed to the surface on the opposite side is exposed, Si chips 1a each fixed as described above, and the heat radiating member 3, 4 1b and each are sealed with a resin 14. 図1において、この樹脂14の外枠が破線で示されている。 In Figure 1, the outer frame of the resin 14 is shown in broken lines. ここで、第1および第2の放熱部材3、4における各々の短冊部3a、3b、4a、4bのうち、インナーリード10が形成された方向とは反対の方向に設けられている短冊部3a、4aが樹脂14の外部に出ており、この外部に出た短冊部3a、4aがSiチップ1a、1bの外部電極となっている。 Here, each of the strip portions 3a in the first and second heat radiating member 3, 4, 3b, 4a, of the 4b, the strip portions 3a provided in a direction opposite to the direction in which the inner lead 10 is formed , 4a are out to the outside of the resin 14, the strip portion 3a comes into the outside, 4a becomes the external electrodes of the Si chips 1a, 1b.
【0046】 [0046]
次に、上記半導体装置の製造方法について述べる。 Next, the process for producing the above semiconductor device. 初めに、上述の図1および図2に示すような、リードフレーム9、第1および第2の放熱部材3、4を用意する。 First, as shown in FIGS. 1 and 2 described above, the lead frame 9, providing a first and second heat radiation members 3 and 4. リードフレーム9は、例えばパンチング等により所望の形状に加工する。 Lead frame 9 is processed for example into a desired shape by punching or the like.
【0047】 [0047]
図4は、第1および第2の放熱部材3、4の形成方法の模式図である。 Figure 4 is a schematic diagram of a method of forming the first and second heat radiation members 3 and 4. 図4(a)に示すように、Cu等よりなるリール形状の部材15から、プレス加工用のパンチ16とダイ17を用いて、パンチ16を矢印Fの方向に動かしてプレス加工することにより第1および第2の放熱部材3、4を切り出し、第1の放熱部材3に対しては凸部6を、第2の放熱部材4に対しては凹部8をそれぞれ形成する。 As shown in FIG. 4 (a), first by the reel-shaped member 15 made of Cu or the like, using a punch 16 and a die 17 for press working, pressing by moving the punch 16 in the direction of the arrow F excised first and second heat radiating members 3 and 4, for the first heat radiating member 3 projecting portion 6, with respect to the second heat radiating member 4 to form a recess 8, respectively.
【0048】 [0048]
図4(b)は突起部7a、7bを形成する工程図であるが、この図に示すように、突起部7a、7b形成用のパンチ18と中央に凹部が形成されたダイ19を用いて、パンチ18を矢印Hの方向に動かすことにより、押し出し加工を行い突起部7a、7bを形成する。 FIG. 4 (b) projections 7a, although 7b is a process diagram of forming a, as shown in this figure, the projections 7a, using a punch 18 and a die 19 having a recess formed in the center for 7b formed by moving the punch 18 in the direction of arrow H, the protrusion 7a performs extrusion to form 7b.
【0049】 [0049]
次に、Siチップ1a、1bと上述の様にして加工したリードフレーム9と第1および第2の放熱部材3、4とを組み付ける。 Then, Si chips 1a, assembled 1b and the lead frame 9 which is processed in the manner described above and the first and second heat radiation members 3 and 4. 図5は、この組み付けの際に側面方向から見た各々の部材1a、1b、2〜4、9の構成を模式的に示す図である。 5, each of the members 1a as seen from the side during the assembly, 1b, is a diagram schematically showing the configuration of a 2~4,9. 図5に示すように、第2の放熱部材4の突起部7bにリードフレーム9の固定部9bの穴12bを嵌め合わせてかしめ、各々の凹部8には接合部材としての半田箔2を介してSiチップ1a、1bの他面5b側を嵌め合わせる。 As shown in FIG. 5, caulking by fitting hole 12b of the second heat radiating member 4 of the projecting portion 7b to the fixing portion 9b of the lead frame 9, to each of the recesses 8 through the solder foil 2 as a bonding member Si chips 1a, fitted to the other surface 5b side of the 1b.
【0050】 [0050]
また、各々のSiチップ1a、1bの一面5a上に主電極形状に対応した半田箔2を載せ、第1の放熱部材3の突起部7aにはスペーサ13をかませて、この突起部7aとリードフレーム9の固定部9aの穴12aとを嵌め合わせてかしめる。 Further, each of the Si chips 1a, placing a solder foil 2 corresponding to the main electrode shape on a surface 5a 1b, the the first heat radiating member 3 of the protrusion 7a to bite the spacer 13, and the protrusion 7a caulked fitted a hole 12a of the fixing portion 9a of the lead frame 9. なお、図5は模式図であるため、第1の放熱部材3における凸部6は省略している。 Since FIG. 5 is a schematic diagram, protrusions 6 of the first heat radiating member 3 is omitted.
【0051】 [0051]
ここで、この組み付けの際のかしめ固定について詳しく述べる。 Here, it will be described in detail caulking during this assembly. 図6はかしめ固定の工程を模式的に示す図である。 6 is a view schematically showing a step of caulking. 図6に示すように、第1および第2の放熱部材3、4の突起部7a、7bとリードフレーム9の固定部9a、9bの穴12a、12bとを嵌め合わせた後、パンチ20を矢印Iの方向に動かすことにより穴12a、12bから出た突起部7a、7bをつぶし、第1および第2の放熱部材3、4とリードフレーム9とを固定する。 As shown in FIG. 6, the protrusion portion 7a of the first and second heat radiating member 3, 4, 7b and the fixing portion 9a of the lead frame 9, the holes 12a of 9b, after fitting and 12b, and the punch 20 arrow hole 12a by moving in the direction of I, protrusions 7a exiting from 12b, mashed 7b, to fix the first and second heat radiating member 3, 4 and the lead frame 9.
【0052】 [0052]
続いて、上述の様にかしめ固定したSiチップ1a、1b、各々の放熱部材3、4およびリードフレーム9を、水素炉等に通して半田リフローすることにより、各々の部材1a、1b、3、4を半田付け固定する。 Subsequently, Si chips 1a was caulked as described above, 1b, each of the heat radiating member 3, 4 and the lead frame 9, by solder reflow through a hydrogen furnace or the like, each of the members 1a, 1b, 3, 4 to the soldered. その後、IGBTチップ1aの一面5a側の制御電極とリードフレーム9とのワイヤボンディングを行った後、トランスファーモールドで樹脂14により封止することにより、第1の放熱部材3と第2の放熱部材4との絶縁を行い、本実施形態の半導体装置が完成する。 Then, after performing wire bonding between the control electrode and the lead frame 9 on one surface 5a side of the IGBT chip 1a, by sealing with a resin 14 by transfer molding, a first heat radiating member 3 and the second heat radiating member 4 It performs insulation between the semiconductor device of the present embodiment is completed.
【0053】 [0053]
ところで、本実施形態によれば、第1および第2の放熱部材3、4を接合部材2を介して、Siチップ1a、1bの一面5aおよび他面5bに直接接合させているため放熱性を改善することができる。 Incidentally, according to this embodiment, the first and second heat radiating member 3, 4 via the bonding member 2, Si chips 1a, the heat radiation property because it is directly bonded to one surface 5a and the other surface 5b of the 1b it can be improved. また、前述の、特開昭61−166051号公報に記載の発明では、半導体チップとチップ側の放熱板とが、ポリイミド樹脂やシリコーン樹脂などの樹脂性の接着剤のみで固定されており、この様な接着剤は熱伝導性が悪いため放熱性を阻害するという問題があった。 Further, the foregoing, in the invention described in JP-A-61-166051, the semiconductor chip and the chip side of the heat radiating plate is fixed only by a resin adhesive such as polyimide resin, silicone resin, the adhesive such as has a problem that inhibits heat dissipation due to poor thermal conductivity. しかし、本実施形態では、接合部材2として半田やろう材などの高熱伝導接着部材を用いているため、放熱性を改善することができる。 However, in this embodiment, the use of the highly thermal conductive adhesive member such as solder bastard material as the bonding member 2, it is possible to improve the heat dissipation.
【0054】 [0054]
また、第2の放熱部材4の凹部8にSiチップ1a、1bを嵌め合わせることにより第2の放熱部材4に対してSiチップ1a、1bを固定し、第1および第2の放熱部材3、4の各々の突起部7a、7bとリードフレーム9の固定部9a、9bの穴12a、12bとを嵌め合わせてかしめることにより、各々の放熱部材3、4とリードフレーム9とを固定することができる。 The second heat radiating Si chip 1a in the recess 8 of the member 4, Si chips 1a to the second heat radiating member 4 by fitting the 1b, 1b and the fixed first and second heat radiating member 3, 4 of each of the projections 7a, 7b and the fixing portion 9a of the lead frame 9, the holes 12a of 9b, by caulking fitted and 12b, to fix the respective heat dissipating members 3 and 4 and the lead frame 9 can. その結果、Siチップ1a、1bの平面方向におけるこれらの部材の相対位置を固定することができる。 As a result, it is possible to fix the relative position of these members in the plane direction of the Si chips 1a, 1b.
【0055】 [0055]
また、第1の放熱部材3の突起部7aに対してスペーサ13を介在した状態で、第1の放熱部材3の突起部7aとリードフレーム9の固定部9aの穴12aとを嵌め合わせてかしめているため、Siチップ1a、1bの搭載空間を確保した状態で第1の放熱部材3をリードフレーム9に固定することができ、Siチップ1a、1bの厚み方向にも相対位置を固定できる。 Further, in a state in which a spacer 13 to the first heat radiating member 3 of the protrusion 7a, or by fitting the hole 12a of the first heat radiating member 3 of the protrusion 7a and the fixing portion 9a of the lead frame 9 since the tightening, Si chips 1a, it is possible to the first heat radiating member 3 while securing the mounting space 1b is fixed to the lead frame 9, Si chips 1a, can be fixed also relative positions in the thickness direction of 1b. 従って、Siチップ1a、1bの平面方向にも厚み方向にも各々の部材の相対位置を固定でき、半導体チップの搭載位置のばらつきを抑えた半導体装置を提供することができる。 Therefore, Si chips 1a, both can be fixed relative position of each member in the thickness direction in the planar direction 1b, the it is possible to provide a semiconductor device with less variation in the mounting position of the semiconductor chip.
【0056】 [0056]
また、本実施形態の様に、半導体チップとしてIGBTなどのパワー素子を用いる場合は、以下に示す絶縁に関する問題がある。 Also, as in the present embodiment, when using a power device such as IGBT as a semiconductor chip, there is a problem with insulation below. 図7は、IGBTの一例を示す部分断面図である。 Figure 7 is a partial sectional view showing an example of the IGBT.
【0057】 [0057]
図7に示すように、例えばIGBT(Insulated Gate Bipolar Transistor)等のパワー素子には、その端部においてガードリング21やEQR(同電位リング)22が形成されているが、これらはコレクタ電極23とほぼ同電位となっている。 As shown in FIG. 7, for example, the power devices such as IGBT (Insulated Gate Bipolar Transistor), but the guard ring 21 and EQR (equipotential ring) 22 is formed at its end, which are a collector electrode 23 and it has a substantially the same potential. ガードリング21やEQR22はパワー素子のエミッタ電極24側の面に形成されており、エミッタ電極24の近傍にコレクタ電極23と同電位であるガードリング21やEQR22が存在することになる。 The guard ring 21 and EQR22 is formed on the surface of the emitter electrode 24 side of the power device, so that the guard ring 21 and EQR22 the same potential as the collector electrode 23 in the vicinity of the emitter electrode 24 is present.
【0058】 [0058]
従って、エミッタ電極24とコレクタ電極23間の電位差が、例えば600V程度となるようなパワー素子の場合、ガードリング21やEQR22とエミッタ電極24との電位差が600V程度となる。 Therefore, the potential difference between the emitter electrode 24 and collector electrode 23, for example, in the case of the power device such that about 600V, the potential difference between the guard ring 21 and EQR22 and the emitter electrode 24 is about 600V. そのため、半田付けエリアが周囲部におよぶ、例えば、放熱部材25が図7の白抜き矢印Jに示すように、通常の位置よりもガードリング21やEQR22側にずれる等することにより、半田等の接合部材26や放熱部材25を介して、直接、あるいは放電によりガードリング21やEQR22とエミッタ電極24との間で通電してしまう可能性がある。 Therefore, soldering area extends around part, for example, the heat radiating member 25 as shown in white arrow J in FIG. 7, by such shifts the guard ring 21 and EQR22 side than the normal position, such as solder through the joint member 26 and the heat radiating member 25, directly, or there is a possibility that by energizing between the guard ring 21 and EQR22 and the emitter electrode 24 by the discharge.
【0059】 [0059]
また、通電を妨げるために、ガードリング21やEQR22の上面にポリイミド等からなる保護膜27を被覆しても、その膜の厚さは1〜2μm程度であり、600Vもの絶縁耐圧は確保できない。 Also, to prevent the current, be coated with a protective film 27 made of polyimide or the like on the upper surface of the guard ring 21 and EQR22, the thickness of the film is about 1 to 2 [mu] m, 600V stuff dielectric strength can not be ensured.
【0060】 [0060]
しかし、本実施形態の半導体装置では、上述の様に、Siチップ1a、1b、リードフレーム9、および、第1および第2の放熱部材3、4の相対位置を固定した状態で、第1の放熱部材3に凸部6を設け、この凸部6をSiチップ1a、1bの一面5aの主電極に接合している。 However, in the semiconductor device of this embodiment, as described above, Si chips 1a, 1b, the lead frame 9, and, while fixing the relative positions of the first and second heat radiating member 3, 4, the first the protrusion 6 provided on the heat radiating member 3 is bonded to the convex portion 6 Si chips 1a, the main electrode on one surface 5a of 1b. そのため、凸部6の形状を調節して第1の放熱部材3を主電極のみと接合させることができ、さらに、上述のようなSiチップ1a、1bと第1の放熱部材3との相対位置がずれることに起因する絶縁に関する問題も解決することができる。 Therefore, the first heat radiating member 3 by adjusting the shape of the convex portion 6 can be only joined main electrode, further, the relative position between the Si chip 1a, 1b and the first heat radiation member 3 as described above it is possible to solve the problem related to insulation due to the fact that the displaced.
【0061】 [0061]
なお、本実施形態では、スペーサ13は第1の放熱部材3に形成された突起部7aにかませる例について示したが、例えば、各々の放熱部材3、4に対して突起部7a、7bを形成する際に、図4(b)に示す押し出し加工用のダイ19の凹部を段状にしておく等して、段状の突起部を形成して、スペーサを一体で形成しても良い。 In the present embodiment, although the spacer 13 is shown for example in which bites protruding portion 7a formed on the first heat radiating member 3, for example, projection portions 7a relative to each of the heat radiating member 3, 4 and 7b in forming, by, for example leaving the recess of the die 19 for extrusion shown in FIG. 4 (b) stepwise, to form a stepped projections may be formed integrally with the spacer.
【0062】 [0062]
また、スペーサ13は、第1の放熱部材3の突起部7aに設けることに限定するものではなく、必要であれば第2の放熱部材4の突起部7bに設け、Siチップ1a、1bの厚み方向におけるSiチップ1a、1b、各々の放熱部材3、4およびリードフレーム9の相対位置を決定しても良い。 The spacer 13 is not limited to be provided on the first heat radiating member 3 of the protrusion 7a, it provided the projecting portion 7b of the second heat radiating member 4, if necessary, Si chips 1a, 1b thickness Si chip 1a in the direction, 1b, may determine the relative position of each of the heat radiating member 3, 4 and the lead frame 9.
【0063】 [0063]
また、本実施形態のように、第1および第2の放熱部材3、4の両方をそれぞれリードフレーム9に対してかしめ固定すれば、確実に半導体チップの搭載位置のばらつきを抑えることができるが、第1および第2の放熱部材3、4のうち、どちらか一方のみをかしめ固定し、この放熱部材3、4の位置決め精度を向上させ、半導体チップの搭載位置のばらつきを改善できるのであれば、一方の放熱部材3、4のみかしめ固定しても良い。 Also, as in the present embodiment, when caulking both the first and second heat radiating members 3 and 4 with respect to the lead frame 9, respectively, although it is possible to suppress the variation of the mounting position of reliably semiconductor chip , one of the first and second heat radiating member 3, 4, either only one of riveted, to improve the positioning accuracy of the heat radiating member 3, 4, as long as it can improve the dispersion of the mounting position of the semiconductor chip may be caulked only one of the heat radiating member 3, 4.
【0064】 [0064]
また、各々の放熱部材3、4のうちのSiチップ1a、1bと対向する面が樹脂14から露出しているが、例えば、この露出している部分を冷却部材に接触させるなどして放熱を促すことができる。 Further, Si chips 1a of each of the heat radiating member 3, 4, although 1b which faces are exposed from the resin 14, for example, the heat dissipation and the like contacting a part that this exposed to the cooling member it can prompt.
【0065】 [0065]
また、本実施形態では、半導体チップとしてIGBTチップ1aを用いる例について示しており、上述のような絶縁に関する問題を解決するために、本実施形態の様な半導体チップの搭載位置のばらつきを抑えることができる構成にすると、その効果が特に発揮されるが、各々の放熱部材3、4を電極として使用しない場合も、放熱性を改善したり、半導体チップの搭載位置のばらつきを抑えるためには、本実施形態の構成が好適である。 Further, in the present embodiment shows an example of using the IGBT chip 1a as a semiconductor chip, in order to solve the problems relating to insulation, such as described above, to suppress variations in the mounting positions of such semiconductor chip of this embodiment with the configuration which can, but its effect is particularly exhibited, even when not using each of the heat radiating member 3, 4 as an electrode, or to improve the heat radiation property, in order to suppress the variation in the mounting position of the semiconductor chip, configuration of this embodiment is suitable.
【0066】 [0066]
また、第1の放熱部材3に形成された突起部7aの全て(本例では3個所)にスペーサ13を設ける例について示したが、最低2個所に設ければSiチップ1a、1bの厚み方向における、第1の放熱部材3とSiチップ1a、1bとの相対位置を固定することができる。 Although shown for example (in this example three places) all the first heat radiating member 3 which is formed in the protruding portion 7a is provided a spacer 13, Si chips 1a, 1b thickness direction be provided at least two locations in, it is possible to first heat radiating member 3 and the Si chip 1a, the relative positions of the 1b fixed. また、接合部材2として半田箔を用いる例について示したが、半田ペースト等を用いても良い。 Although shown for example using a solder foil as the bonding member 2 may be used a solder paste or the like. また、半導体チップ1a、1bは1つでも良い。 Further, the semiconductor chip 1a, 1b may be one.
【0067】 [0067]
(第2実施形態) (Second Embodiment)
IGBTチップ1aは電流容量が100A以上のものになるとチップサイズが大きくなり、10〜16mm程度となるものがある。 IGBT chip 1a is chip size is increased when the current capacity is more than 100A, it is made approximately 10~16Mm. この場合、各々の放熱部材3、4としてCuを用いている場合は、Cuの線膨張率がIGBTチップ1aを構成するSiの線膨張率の5〜6倍であるため、冷熱サイクルにおいて接合部材2である半田が熱疲労し、亀裂が発生して熱抵抗が増大し、熱放散性(放熱性)が悪化することが懸念される。 In this case, the case of using Cu as each of the heat radiating member 3, 4, since the linear expansion coefficient of Cu is 5-6 times the linear expansion coefficient of the Si constituting the IGBT chip 1a, the bonding member in thermal cycle a second solder is thermal fatigue, cracking occurs thermal resistance is increased, heat dissipation (heat radiation) is may degrade.
【0068】 [0068]
そこで、この様な不具合を改善するための実施形態が第2実施形態である。 Accordingly, embodiments for improving such problem is the second embodiment. 図8は、第2実施形態の半導体装置の概略断面図である。 Figure 8 is a schematic cross-sectional view of a semiconductor device of the second embodiment. 本実施形態は、第1および第2の放熱部材3、4として用いられる材料が第1実施形態と異なるものである。 The present embodiment is that the materials used as the first and second heat radiation members 3 and 4 differs from the first embodiment. 以下、主として、図2(a)と異なるところについて述べ、同一部分には図8中、同一符号を付して説明を簡略化する。 Hereinafter, mainly describes a difference from FIG. 2 (a), the same portions in FIG. 8, to simplify the description the same reference numerals.
【0069】 [0069]
図8に示すように、第1および第2の放熱部材3、4として、Siチップ1a、1bと線膨張率が近似した金属を用い、その一例としてインバーよりなる部材(以下、インバー部材という)28をCuよりなる部材(以下、Cu部材という)29で挟んだ構成をなすクラッド材(以下、CICという)を用いるものである。 As shown in FIG. 8, as the first and second heat radiating member 3, 4, Si chips 1a, a metal that approximates the 1b and linear expansion coefficient, members made of Invar as an example (hereinafter, referred to as Invar member) 28 made of Cu member (hereinafter, Cu member hereinafter) clad material constituting the structure sandwiched by 29 (hereinafter, referred to as CIC) is to use a. そして、CICのインバー部材28とCu部材29の厚さの比や全体の厚さを調節して、可能な限りSiの線膨張率に近くなるようにしている。 Then, so that by adjusting the thickness ratio and the total thickness of the CIC Invar member 28 and the Cu member 29, becomes close to the coefficient of linear expansion as possible Si. その他の各々の部材や部材の形状等は、上記、第1実施形態に示すものと同様である。 Shape of other respective member or members, said, is the same as that shown in the first embodiment.
【0070】 [0070]
本実施形態によれば、各々の放熱部材3、4の線膨張率がSiチップ1a、1bの線膨張率に近似しているため、Siチップ1a、1bのサイズが大きい場合にも、Siチップ1a、1bと各々の放熱部材3、4との線膨張率が異なることに起因する熱応力の発生を抑制することができ、接合部材2に対する歪みの集中を防止することができる。 According to this embodiment, the linear expansion coefficient of Si chips 1a of each of the heat radiating member 3, 4, since the approximate linear expansion coefficient of 1b, even if Si chip 1a, the size of 1b large, Si chips 1a, it is possible to 1b and each coefficient of linear expansion of the heat radiating member 3, 4 is to suppress the generation of thermal stress due to different, it is possible to prevent the concentration of strain to the bonding member 2. その結果、各々の放熱部材3、4とSiチップ1a、1bとの接合性の低下を防ぐことができるため、放熱性の低下や、各々の放熱部材3、4を電極として用いている場合には電気伝導性の低下も防ぐことができる。 As a result, each of the heat radiating member 3, 4 and Si chip 1a, it is possible to prevent a decrease in bonding between 1b, in the case of using reduction in the heat dissipation and, each of the heat radiating member 3, 4 as an electrode it can can also prevent reduction in electrical conductivity.
【0071】 [0071]
なお、インバーの代わりにMo(モリブデン)を用いても、同様の効果を発揮することができる。 Incidentally, it is possible instead of invar be used Mo (molybdenum), the same effect. また、各々の放熱部材3、4において、Cu部材29の間に挟む材料をインバー部材28あるいはMoよりなる部材(以下、Mo部材という)に統一しなくても、異なっていても良い。 Further, in each of the heat radiating member 3, 4, the material sandwiched between the Cu member 29 Invar member 28 or made of Mo member (hereinafter, Mo referred members) without unified, it may be different. また、特に各々の放熱部材3、4としてクラッド材を用いることに限定するものではなく、Cu−Moの合金など、Siと線膨張率が近似した部材を用いれば良い。 Moreover, not particularly limited to the use of clad material as a heat radiating member 3, 4 each, and alloys of Cu-Mo, Si and linear expansion coefficient may be used member approximated.
【0072】 [0072]
ところで、上記、第2実施形態は、各々の放熱部材3、4として線膨張率がSiに近似した金属を用いる例について示しており、その一例としてCIC等のクラッド材を用いている。 Incidentally, the second embodiment shows an example using a metal linear expansion rate as each of the heat radiating member 3, 4 is similar to Si, it is used clad material CIC such as an example. しかし、インバーやMoはCuと比較して熱伝導性が劣るため、Siチップ1a、1bの厚み方向におけるインバー部材28やMo部材の存在により放熱性が低下するという問題がある。 However, the Invar and Mo for thermal conductivity is poor compared to Cu, Si chips 1a, the heat radiation property due to the presence of Invar member 28 and Mo member in the thickness direction of 1b is lowered. そこで、この問題を改善するための変形例を以下に示す。 Therefore, it shows a modification to improve this problem below.
【0073】 [0073]
本変形例は、CICのインバー部材28を部分的に複数内層させるものである。 This modification is intended for the CIC Invar member 28 partially plurality lining. 図9は、このインバー部材28を部分的に複数内層させたCICの模式的な図であり、(a)はCICをインバー部材28を含む部分において層に対して平行に切断した断面図であり、(b)はCICをインバー部材28を含む部分において層に対して垂直に切断した断面図である。 Figure 9 is a schematic diagram of a CIC that this Invar member 28 partially plurality inner layer, (a) represents be a cross-sectional view taken parallel to the layer in the portion including Invar member 28 CIC is a sectional view taken perpendicularly to the layer in the portion including Invar member 28 (b) is CIC.
【0074】 [0074]
図9に示すように、本変形例では、Cu部材29の内部においてインバー部材28を部分的に複数配置しており、本例では、Cu部材29の内部の4個所に、インバー部材28を配置させている。 As shown in FIG. 9, in this modification, in the interior of the Cu member 29 and the invar element 28 partially plurality placed, in this example, four locations within the Cu member 29, placing the invar member 28 It is made to. これにより、各々の放熱部材3、4の厚み方向においてCu部材29のみからなる部分を設けることができるため、各々の放熱部材3、4の厚み方向における熱伝導性を犠牲にすることはない。 Accordingly, it is possible in the thickness direction of each of the heat radiating member 3, 4 provided with a portion consisting of only Cu member 29, it is not sacrificing thermal conductivity in the thickness direction of each of the heat radiating member 3, 4. 従って、放熱性を確保した上でSiと線膨張率が近似した放熱部材を提供することができる。 Therefore, Si and linear expansion coefficient while securing the heat dissipation can be provided the heat radiation member approximated.
【0075】 [0075]
なお、本変形例では、Cu部材29の内部の4個所にインバー部材28を設けているが、各々の寸法が小さいインバー部材を数多く設ける等して、細かいメッシュ状にしても良い。 In this modification, although Invar member 28 provided at four positions inside the Cu member 29, and the like provided a large number of small Invar member each dimension may be a fine mesh shape. また、インバー部材の代わりにMo部材を用いても良い。 It is also possible to use a Mo element instead of Invar member. また、インバー部材とMo部材とを併用しても良い。 In addition, it may be used in combination with Invar member and Mo member.
【0076】 [0076]
(他の実施形態) (Other embodiments)
図10は、他の実施形態の半導体装置の概略断面図である。 Figure 10 is a schematic cross-sectional view of a semiconductor device of another embodiment. 上記、第1および第2実施形態においては、IGBTチップ1aの一面5a側の制御電極とインナーリード10との電気的な接続をワイヤボンドにより行っているが、図10に示すように、半田等のバンプ形状の接合部材30により行っても良い。 Above, in the first and second embodiments, the electrical connection between the control electrode and the inner lead 10 on one surface 5a side of the IGBT chip 1a is performed by wire bonding, as shown in FIG. 10, Hitoshi Handa it may be performed by the bonding member 30 of the bump shape.
【0077】 [0077]
これにより、第1および第2の放熱部材3、4とSiチップ1a、1bとを半田付けする際に、このインナーリード10と制御電極との接続も一括して行うことができるため、製造工程を短縮することができる。 Thus, the first and second heat radiating member 3, 4 and Si chip 1a, when a and 1b are soldered, it is possible to collectively performed also connected between the inner lead 10 and the control electrode, the manufacturing process it is possible to shorten the.
【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS
【図1】第1実施形態の半導体装置を上面から見た模式図である。 1 is a schematic view of the semiconductor device of the first embodiment from above.
【図2】第1実施形態の半導体装置の概略断面図である。 2 is a schematic cross-sectional view of a semiconductor device of the first embodiment.
【図3】IGBTチップの等価回路を示す図である。 3 is a diagram showing an equivalent circuit of the IGBT chip.
【図4】各々の放熱部材の形成方法の模式図である。 4 is a schematic diagram of a method for forming each of the heat radiating member.
【図5】半導体装置の製造過程において側面方向から見た構成を模式的に示す図である。 5 is a diagram schematically showing the configuration seen from the side in the process of manufacturing the semiconductor device.
【図6】かしめ固定の工程を模式的に示す図である。 6 is a diagram schematically showing the caulking steps.
【図7】IGBTチップの一例を示す部分断面図である。 7 is a partial sectional view illustrating an example of the IGBT chip.
【図8】第2実施形態の半導体装置の概略断面図である。 8 is a schematic cross-sectional view of a semiconductor device of the second embodiment.
【図9】第2実施形態の変形例で用いる放熱部材の模式的な断面図である。 9 is a schematic sectional view of a heat dissipating member used in the modification of the second embodiment.
【図10】他の実施形態の半導体装置の概略断面図である。 10 is a schematic cross-sectional view of a semiconductor device of another embodiment.
【図11】従来公報に記載の半導体装置の概略断面図である。 11 is a schematic cross-sectional view of a semiconductor device according to the prior art publications.
【図12】他の従来公報に記載の半導体装置の概略断面図である。 12 is a schematic cross-sectional view of a semiconductor device according to another conventional publication.
【符号の説明】 DESCRIPTION OF SYMBOLS
1a、1b…半導体チップ、2…接合部材、3…第1の放熱部材、 1a, 1b ... semiconductor chip, 2 ... bonding member, 3 ... first heat radiation member,
4…第2の放熱部材、6…凸部、7a、7b…突起部、8…凹部、 4 ... The second heat radiation member, 6 ... protrusion, 7a, 7b ... protrusion, 8 ... recess,
9…リードフレーム、12a、12b…穴、13…スペーサ。 9 ... lead frames, 12a, 12b ... hole, 13 ... spacer.

Claims (9)

  1. 半導体チップ(1a、1b)と、前記半導体チップ(1a、1b)の両面を挟むように熱伝導性を有する接合部材(2)を介して接合された一対の放熱部材(3、4)と、前記半導体チップ(1a)における前記第1の放熱部材(3)と対向する面には制御電極が形成されており、前記制御電極と電気的に接続されるリードフレーム(9)とを備え、前記一対の放熱部材(3、4)は、第1の放熱部材(3)と、前記半導体チップ(1a、1b)と対向する面に凹部(8)が形成された第2の放熱部材(4)とよりなり、この凹部(8)内に前記半導体チップ(1a、1b)が嵌め合わされていることを特徴とする半導体装置。 A semiconductor chip (1a, 1b) and, with the semiconductor chip (1a, 1b) a pair of heat radiating member joined via a joint member (2) having thermal conductivity so as to sandwich both sides of the (3,4), said semiconductor chip to said first heat radiating member (3) and a surface facing in (1a) are formed control electrode, and a lead frame (9) connected to said control electrode electrically, wherein a pair of heat radiation members (3, 4) includes a first heat radiating member (3), said semiconductor chip (1a, 1b) and recesses on opposite sides (8) a second heat radiating member is formed (4) more becomes, the semiconductor chip (1a, 1b) in the recess (8) in a semiconductor device, wherein a is fitted.
  2. 前記第1の放熱部材(3)における前記半導体チップ(1a、1b)と対向する部位に、前記半導体チップ(1a、1b)側に突出した凸部(6)が形成されており、この凸部(6)が前記半導体チップ(1a、1b)と前記接合部材(2)を介して接合されていることを特徴とする請求項1に記載の半導体装置。 A position opposing to the semiconductor chip in the first heat radiating member (3) (1a, 1b), said semiconductor chip (1a, 1b) protruding portion protruding side (6) is formed, the projections (6) said semiconductor chip (1a, 1b) the semiconductor device according possible to claim 1, characterized in that is bonded via said joint member (2).
  3. 前記一対の放熱部材(3、4)における前記半導体チップ(1a、1b)との対向面の少なくとも一方には突起部(7a、7b)が形成されており、前記リードフレーム(9)に形成された穴(12a、12b)と前記突起部(7a、7b)とを嵌め合わせることにより、前記一対の放熱部材(3、4)の少なくとも一方が前記リードフレーム(9)に固定されていることを特徴とする請求項1又は2に記載の半導体装置。 Said semiconductor chip (1a, 1b) protrusions on at least one of the opposing surfaces of the (7a, 7b) in said pair of heat radiation members (3, 4) are formed, is formed on the lead frame (9) holes (12a, 12b) and the projections (7a, 7b) by mating and, that at least one of the pair of heat radiation members (3, 4) is fixed to the lead frame (9) the semiconductor device according to claim 1 or 2, characterized.
  4. 前記一対の放熱部材(3、4)における前記半導体チップ(1a、1b)との対向面の少なくとも一方には突起部(7a、7b)が形成されており、当該放熱部材(3、4)と前記リードフレーム(9)との間にスペーサ(13)を介在させた状態で、前記リードフレーム(9)に形成された穴(12a、12b)と前記突起部(7a、7b)とが嵌め合わされて固定されており、前記スペーサ(13)によって当該放熱部材(3、4)と前記半導体チップ(1a、1b)との、前記半導体チップ(1a、1b)の厚み方向における位置決めがなされていることを特徴とする請求項1又は2に記載の半導体装置。 Said semiconductor chip (1a, 1b) in the pair of heat radiation members (3,4) on at least one the protrusion surface facing the (7a, 7b) are formed, with the heat radiating member (3, 4) wherein while interposing a spacer (13) between the lead frame (9), the lead frame (9) which is formed in the hole (12a, 12b) and the projections (7a, 7b) and is fitted is fixed Te, the said the heat radiating member by a spacer (13) (3,4) semiconductor chips (1a, 1b) and of said semiconductor chip (1a, 1b) is positioned in the thickness direction of the have been made the semiconductor device according to claim 1 or 2, characterized in.
  5. 半導体チップ(1a、1b)と、前記半導体チップ(1a、1b)の両面を挟むように熱伝導性を有する接合部材(2)を介して接合された一対の放熱部材(3、4)とを備え、前記一対の放熱部材(3、4)は、前記半導体チップ(1a、1b)と対向する部位に、前記半導体チップ(1a、1b)側に突出した凸部(6)が形成された第1の放熱部材(3)と、第2の放熱部材(4)とよりなり、この凸部(6)が、前記接合部材(2)を介して前記半導体チップ(1a、1b)に接合されており、前記半導体チップ(1a)における前記第1の放熱部材(3)と対向する面に形成された制御電極と電気的に接続されるリードフレーム(9)を備えており、前記一対の放熱部材(3、4)における前記半導体チップ(1a、1b)との対 A semiconductor chip (1a, 1b) and said semiconductor chip (1a, 1b) a pair of heat radiating member joined via a joint member (2) having thermal conductivity so as to sandwich both sides of the (3,4) wherein the pair of radiating members (3, 4), the semiconductor chip (1a, 1b) and in a position facing, the said semiconductor chip (1a, 1b) protruding portion protruding side (6) is formed a first heat radiating member (3), become more and second heat radiating members (4), the projection (6) comprises through the bonding member (2) semiconductor chips (1a, 1b) is joined to cage, wherein comprises a semiconductor chip the first heat radiating member (3) and opposing lead frame formed by a control electrode electrically connected to the surface in (1a) (9), said pair of heat radiation members wherein in (3,4) semiconductor chips (1a, 1b) and the pair 面の少なくとも一方には突起部(7a、7b)が形成されており、前記リードフレーム(9)に形成された穴(12a、12b)と、前記突起部(7a、7b)とを嵌め合わせて固定することにより、前記一対の放熱部材(3、4)の少なくとも一方が前記リードフレーム(9)に固定されており、前記一対の放熱部材(3、4)と前記リードフレーム(9)との間に生じる隙間にスペーサ(13)を介在させ、前記スペーサ(13)によって前記一対の放熱部材(3、4)と前記半導体チップ(1a、1b)との、前記半導体チップ(1a、1b)の厚み方向における位置決めがなされていることを特徴とする半導体装置。 Projections on at least one surface (7a, 7b) are formed, the lead frame (9) the formed hole (12a, 12b) and the projections (7a, 7b) and fitting together the by fixing, at least one of the pair of heat radiation members (3, 4) the are fixed to a lead frame (9), and the pair of the heat radiating member (3, 4) and the lead frame (9) by interposing a spacer (13) to the gap formed between, and said and said pair of heat radiation members (3, 4) a semiconductor chip (1a, 1b) by said spacer (13), said semiconductor chip (1a, 1b) wherein a positioning in the thickness direction is made.
  6. 前記一対の放熱部材(3、4)として、前記半導体チップ(1a、1b)に線膨張率が近似した金属を用いることを特徴とする請求項1ないし5のいずれか1つに記載の半導体装置。 Wherein as a pair of heat radiation members (3, 4), said semiconductor chip (1a, 1b) The semiconductor device according to to any one of 5 claims 1, characterized by using a metal linear expansion coefficient approximate to .
  7. 前記一対の放熱部材(3、4)として、銅の内部において、インバーおよびモリブデンのうちの少なくとも1つが、部分的に複数配置されているものを用いることを特徴とする請求項1ないし6のいずれか1つに記載の半導体装置。 Wherein as a pair of heat radiation members (3, 4), one inside the copper, at least one of Invar and molybdenum, claims 1, characterized by using what is partially plurality placement 6 or semiconductor device according to one.
  8. 前記一対の放熱部材(3、4)の各々の面のうち、前記半導体チップ(1a、1b)と対向する面とは反対側の面が露出した状態で、前記一対の放熱部材(3、4)および前記半導体チップ(1a、1b)が樹脂封止されていることを特徴とする請求項1ないし7のいずれか1つに記載の半導体装置。 Of each face of the pair of heat radiation members (3, 4), said semiconductor chip (1a, 1b) in a state where the surface opposite the exposed and facing surfaces, said pair of heat radiation members (3, 4 ) and said semiconductor chip (1a, 1b) is a semiconductor device according to any one of claims 1 to 7, characterized in that resin-sealed.
  9. 前記一対の放熱部材(3、4)が、前記半導体チップ(1a、1b)の電極として用いられることを特徴とする請求項1ないし8のいずれか1つに記載の半導体装置。 It said pair of heat radiation members (3, 4), said semiconductor chip (1a, 1b) The semiconductor device according to any one of claims 1, characterized in that used as an electrode 8.
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JP33312499A JP3596388B2 (en) 1999-11-24 1999-11-24 Semiconductor device
US09717227 US6703707B1 (en) 1999-11-24 2000-11-22 Semiconductor device having radiation structure
FR0015130A FR2801423B1 (en) 1999-11-24 2000-11-23 A semiconductor device a radiating structure, manufacturing process of a semiconductor device and method of fabricating an electronic instrument
DE2000166443 DE10066443B8 (en) 1999-11-24 2000-11-24 A semiconductor device having radiation components
DE2000166446 DE10066446B4 (en) 1999-11-24 2000-11-24 A process for producing an electronic component having two radiation components
DE2000158446 DE10058446B8 (en) 1999-11-24 2000-11-24 A semiconductor device having radiation components
DE2000166445 DE10066445B4 (en) 1999-11-24 2000-11-24 A semiconductor device having radiating structure
DE2000166441 DE10066441B4 (en) 1999-11-24 2000-11-24 A semiconductor device having radiation components
DE2000166442 DE10066442B4 (en) 1999-11-24 2000-11-24 A semiconductor device having radiating structure
US10321365 US6693350B2 (en) 1999-11-24 2002-12-18 Semiconductor device having radiation structure and method for manufacturing semiconductor device having radiation structure
US10699784 US20040089941A1 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10699838 US6798062B2 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10699828 US6992383B2 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10699837 US6960825B2 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10699785 US6891265B2 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10699744 US20040089940A1 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10699954 US6967404B2 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10699746 US6998707B2 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure

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