JP3518083B2 - Substrate manufacturing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to SOI (Silicon).
The method of manufacturing a On Insulator) laminating board such.

[0002]

2. Description of the Related Art In recent years, a microstructure or a circuit has been processed on the surface of a silicon substrate, which has been turned over and joined to another substrate (glass or silicon) to form a structure of the original substrate. A method has been developed in which an unformed portion is eliminated from the upper surface by polishing or etching. According to this method, a complicated movable structure can be mounted on the lower substrate.

[0003] A conventional example of such a bonded SOI will be described with reference to Figs. First, for example, lithography and reactive ion etching (RI
In step E), a step is formed as shown in FIG.
Thereafter, as shown in FIG. 5B, after forming a gate oxide film 12, a polysilicon film 13 is deposited and patterned to form a gate electrode 13a. And the buried oxide film 14
Then, the bonding polysilicon film 15 is formed, and the surface of the bonding polysilicon 15 is flattened by polishing. In this case, an oxide film 12 ', a polysilicon film 13', a buried oxide film 14 ', and a bonding polysilicon film 15' are also formed on the opposite side of the surface of the silicon substrate on which the irregularities are formed.

[0004] Such a processed silicon substrate 10 is provided as shown in FIG.
As shown in (3), it is bonded to the holding silicon substrate 20. In this case, for example, if the substrate is heated to about 1000 ° C. in a vacuum and kept in close contact for several hours, the surfaces of both silicon substrates are bonded at the bonding surface 210. Next, as shown in FIG.
Silicon layer 1 of several μm from back side of processed silicon substrate 10
Grinding (polishing) until 1 'is left. This allows
A backside silicon film 15 ′ formed on the processing substrate 10,
Oxide film 14 ', polysilicon film 13', gate oxide film 1
2 'is ground and disappears. Further, selective polishing is performed using the oxide film stopper 12 from the state of FIG. 6 (4), and a bonded SOI substrate having a thin film SOI layer corresponding to the step formed first is completed.

[0005]

Considering the warpage of the wafer in these series of steps, up to the bonding state shown in FIG. 5 (3), the front and back surfaces of the processing substrate 10 have the same film structure. Warping hardly occurs.

However, before the selective polishing shown in FIG. 6 (4), the oxide film layer 14 is concentrated on the surface side of the bonded substrate. An example of the thickness of each layer at this time is as follows: the holding substrate 20 is about 725 μm, and the bonded polysilicon film 14 is about 2 μm.
3 μm, the oxide film 14 is about 1 μm, and the silicon substrate 11 ′
Is about 4 to 5 μm. Therefore, due to the film stress, the bonded substrate is processed as shown in FIG.
A convex warpage occurs on the 0 'side. This is because there is no stress when the oxide film is formed by, for example, CVD (for example, formed at 800 ° C.), but when returning to room temperature, the difference in thermal expansion coefficient
A stress is generated between the oxide film having a small shrinkage and the silicon side having a large shrinkage, and asymmetry caused by removing one of the oxide films by grinding, the stress is manifested as a bending moment, as shown in FIG. Then, a convex warpage occurs on the processing substrate side.

Generally, the warpage of a wafer is expressed by a warp defined as shown in FIG. 8, and the warp value in the state of FIG. 6 (4) is about 50 to 60 μm. When a wafer having such a large Warp value is polished, as shown in FIG. 9, in the selective polishing of a wafer having a warp as shown in FIG. 9, a polishing pad (either soft (a) or hard (b)) is used. The wafer does not contact the wafer uniformly, and is polished in a ring shape, and the in-plane uniformity of the polishing rate deteriorates. This has been confirmed experimentally. As a result, the in-plane uniformity of the SOI film thickness of the bonded substrate deteriorates, and the variation in device characteristics increases. This problem becomes more pronounced as the diameter of the wafer increases (especially at 8 inches or more).

The present invention has been made in view of the above circumstances, and it is an object of the present invention to reduce the warpage of a substrate as much as possible and to perform uniform polishing when grinding a substrate on which a semiconductor layer is formed on an insulating layer. and to provide a manufacturing how a substrate that can.

[0009]

In order to achieve the above-mentioned object, a method of manufacturing a substrate according to the present invention comprises forming a step on a surface.
Forming a buried insulating film to fill the step on the semiconductor substrate,
A processed substrate having a planarization film formed on the buried insulating film is formed.
Forming, and a holding group on the planarizing film of the processing substrate.
Bonding a board to form a bonded substrate;
The substrate was thinned by grinding the semiconductor substrate
Forming a semiconductor layer; and
The holding substrate on the surface opposite to the bonding surface of
Reducing the warpage of the bonded substrate due to the embedded insulating film;
The compensation film is made of the same material as the buried insulating film, and
Condition that satisfies the relationship represented by the following formula
In a step of forming in question of _{(T 1 -R.T.) × t 1} = (T 2 -R.T.) × t 2 ( the above formulas, T ₁ is the forming temperature of the buried insulating film, t ₁
Is the thickness of the buried insulating film; T. Is the room temperature, T ₂ is the compensation film
The formation temperature, t _2, is the thickness of the compensation film, and
Bonding temperature in the forming process is the softening temperature of the buried insulating film
The T ₁ is a lamination temperature when crossing).

According to the method of manufacturing a substrate of the present invention, when manufacturing a substrate having a semiconductor layer formed on an insulating layer, the warpage of the substrate caused by the insulating layer having a different thermal expansion coefficient from that of the semiconductor layer can be achieved. For the purpose of reducing as much as possible, a compensation film for canceling the warpage of the insulating layer is formed on the substrate.

Specifically, after predetermined processing, an insulating layer such as an oxide film is formed on the surface, and a smoothing film such as a silicon film or a glass film having a smoothed surface is formed on the insulating layer. Then, by bonding the smoothing film of such a processed substrate and the holding substrate, and grinding the processed substrate of the bonded bonded substrate to make it thin, a bonded wafer is manufactured. Are ubiquitous from the center plane in the thickness direction of the bonded substrate, whereby the bonded substrate is warped. To prevent this, a warp in the opposite direction to the warp due to the insulating layer is provided on the holding substrate surface, and the warp due to the insulating layer is canceled by the compensating film, thereby warping the bonded substrate due to the insulating layer. Can be reduced by the compensation film.

In this case, the insulating layer and the compensation film are generally made of the same silicon oxide.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. 1 and 2
Describes an example of the method of manufacturing a substrate of the present invention,
As shown in FIG. 1, a process of bonding the processed substrate 10 and the holding substrate 20 on which the compensation film 30 is formed and then grinding the processed substrate to obtain a substrate 1 ′ before selective polishing shown in FIG. 2 is shown. .

The manufacturing process of the processed substrate 10 shown in FIG. 1 is the same as the conventional one. First, the silicon substrate 11 is subjected to, for example, lithography and reactive ion etching (RIE) as shown in FIG. To form a step. afterwards,
After forming the gate oxide film 12, a polysilicon film 13 is deposited and patterned to form a gate electrode 13a. Then, the gate electrode 13a is filled with an insulating layer (buried oxide film) 14, and then a polysilicon film for bonding (film for smoothing) 15
Is formed, and the surface of the bonding polysilicon 15 is flattened by polishing to form a smooth surface 15a. In this case, the oxide film 1 is also formed on the opposite side of the surface of the silicon substrate on which the irregularities are formed.
2 ', a polysilicon film 13', an insulating layer 14 ', and a bonding polysilicon film 15' are formed.

On the other hand, for example, a silicon substrate is used as the holding substrate 20, and an oxide film 30 having the same thickness as the insulating layer 14 of the processing substrate 10 is formed on one surface thereof by, for example, the same CVD. In order to form the oxide film 30 on only one surface of the holding substrate 20, for example, it is convenient to use the CVD method. However, after forming the oxide film on both surfaces by the thermal oxidation method, HF is used for the oxide film on one side. It can be manufactured by removing by wet etching or the like.

The smooth surface 20a of the holding substrate 20 on which the compensation oxide film 30 is not formed and the smooth surface 1 of the processing substrate 10
5a is joined by an ordinary joining method. The joining conditions are not particularly limited. For example, in an O ₂ atmosphere, about 950
By heating to １1100 ° C. and keeping in close contact for 0.5 to 2 hours, the smooth silicon surface 15 a of the processing substrate 10 and the smooth silicon surface 20 a of the holding substrate 20 are joined and bonded at the joining surface 210. A substrate is formed. Note that a glass film may be used instead of the bonding silicon film 15.

Next, the processed substrate side of the bonded substrate is ground to obtain a bonded ground substrate 1 'shown in FIG. Thereby, the silicon film 1 on the back side formed on the processing substrate 10
5 ', the oxide film 14', the polysilicon film 13 ', and the gate oxide film 12' are ground and disappear. The bonded and ground substrate shown in FIG. 2 represents the substrate of the present invention. The substrate of the present invention
It is sufficient that a compensation film is formed immediately after lamination, during grinding after lamination, and further after lamination, including the laminated substrate.

At this time, since the insulating layer 14 is ubiquitous from the center of the bonded substrate 1 ′, a bending moment is generated in the bonded substrate 1 ′. This bending moment is formed on the holding substrate 20. Again, it is ubiquitous from the center and is offset by the bending moment generated by the compensating oxide film 30 facing the insulating layer. For this reason, the warp value shown in FIG. 8 is reduced, and the warp value is preferably 20 μm or less, more preferably 15 μm or less. Such small warp values ensure polishing uniformity.

Then, selective polishing is performed using the oxide film stopper 12 from the state shown in FIG. 2, and a bonded SOI substrate having a thin film SOI layer corresponding to the step formed first is completed. In the obtained bonded SOI substrate, the in-plane uniformity of the polishing rate is secured, so that the in-plane uniformity of the thickness of the SOI layer is maintained, and the in-plane variation of the device characteristics is suppressed to the minimum. After the polishing is completed, the compensation oxide film may be removed by, for example, etching or polishing.
You don't have to . )

The insulating layer 14 and the compensation oxide film 30 are the same.
It is preferable to have the same thickness by CVD under the conditions,
For the purpose of the present invention, the relationship represented by the following equation (1) is satisfied.
It is thought that the intended warpage compensation will be achieved for the time being.
It is.   (T₁-R. T. ) × t₁= (T_Two-R. T. ) × t_Two    … (1) Where T₁Is the formation temperature of the insulating layer, t₁Is the insulation layer film
Thickness, R. T. Is room temperature, T _TwoIs the temperature at which the compensation oxide film is formed, t
_TwoIs the thickness of the compensation oxide film. The temperature is absolute
Temperature and the same unit for the film thickness. In this case, lamination
Temperature is SiO_TwoExceeds about 950 ° C of softening temperature
Has a T₁Uses the bonding temperature. This is when pasting
The bending moment when forming the oxide film disappears at the temperature of
Difference of coefficient of thermal expansion when returning from room temperature to room temperature
Because it is necessary to compensate for the bending moment
You.

FIG. 3 shows that the bonded substrate is ground by a predetermined amount, one of the insulating layers 14 ′ is shaved and disappears, and the buried oxide film 14 is removed.
When the bending moment is manifested ubiquitously from the center of the bonded substrate 1 ′ (FIG. 3A), the state in which the compensation oxide film 30 is formed on the surface of the holding substrate 20 of the bonded substrate (FIG.
(2)). 3, the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals, and description thereof will be omitted.

In this case, an oxide film may be formed on only one side of the bonded and ground substrate by, for example, a CVD method, or an oxide film may be formed on both sides of the bonded substrate by a thermal oxidation method and then formed on the processed substrate side. The removed oxide film may be removed by etching or polishing. FIG. 4 shows another method of forming a compensation film. Here, after bonding, an oxide film serving as a compensation film is formed on both surfaces (entire surface) of the bonded substrate by, for example, CVD, and the processed substrate side is formed. This shows a method of removing the compensation oxide film in a normal polishing step. According to this method, it is not necessary to perform an operation for forming an oxide film on one side, and thus a compensation film can be easily and efficiently formed. 4, the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals, and description thereof will be omitted.

The present invention is not limited to the above embodiment. For example, in the above example, both the insulating layer and the compensation film are formed of an oxide film. However, for example, silicon nitride may be used.
However, the present invention is not limited thereto, and the insulating layer and the compensation film may be made of different materials, or may be a laminated film. Further, the insulating layer can be formed not only by the method of embedding after the formation but also by deep implantation by ion implantation. In addition, although the example in which the step is provided on the processing substrate has been described, it is needless to say that the method can be effectively applied to a normal method having no step.
In addition, various changes can be made without departing from the spirit of the present invention.

[0024]

According to the substrate manufacturing method of the present invention, it is possible to obtain a substrate having a semiconductor layer formed on an insulating layer while reliably preventing warpage due to the insulating layer. Since the warpage of the substrate is suppressed and the polishing is performed uniformly, the in-plane variation of the device characteristics is suppressed.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a processed substrate and a holding substrate used in the substrate manufacturing method of the present invention.

FIG. 2 is a cross-sectional view showing a state where the two substrates of FIG. 1 are bonded and ground.

FIGS. 3A and 3B are cross-sectional views illustrating a method for manufacturing a bonded ground substrate.

FIG. 4 is a sectional view showing another example of the method for manufacturing a substrate according to the present invention.

FIG. 5 shows a conventional method for manufacturing a bonded substrate,
(1), (2), and (3) are cross-sectional views each showing a procedure of a process.

FIG. 6 is a sectional view showing a step continued from FIG. 5;

FIG. 7 is a cross-sectional view illustrating a state in which the bonded substrate is warped by the insulating layer.

FIG. 8 is an explanatory diagram illustrating a warp value serving as a reference for warpage.

FIG. 9 is a schematic diagram showing a state in which a wafer having a large warp is polished.

[Explanation of symbols]

10 Processed substrate 11 Silicon substrate 12 Gate oxide film 13a Gate electrode 14 Insulating layer (buried oxide film) 15 Silicon film 20 Holding substrate 30 Compensation film

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-6-267804 (JP, A) JP-A-3-250615 (JP, A) JP-A-5-175325 (JP, A) JP-A-61- 292934 (JP, A) JP-A-1-302837 (JP, A) JP-A-3-50817 (JP, A) JP-A-7-74329 (JP, A) JP-A-9-8124 (JP, A) Special Table Hei 8-501900 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/02 H01L 21/336 H01L 21/76 H01L 27/12 H01L 29/786

Claims (5)

(57) [Claims] A semiconductor substrate having a step formed on a surface thereof;
Forming a buried insulating film filling the step, and forming a buried insulating film on the buried insulating film;
A step of forming a processed substrate on which a planarizing film is formed, and bonding a holding substrate to the flattening film of the processed substrate.
Step of forming a laminated substrate, by grinding the semiconductor substrate of the bonded substrate
Forming a thinned semiconductor layer; and a step of forming a thinned semiconductor layer on the surface opposite to the surface to be bonded to the planarizing film.
The holding substrate, the bonding substrate of the embedded insulating film
The compensation film for reducing the warpage is made of the same material as the buried insulating film.
And the conditions for forming the buried insulating film and the following formula
Formation of that in relation includes the step of forming under the condition satisfying _{(T 1 -R.T.) × t 1} = (T 2 -R.T.) × t 2 ( the above formulas, T ₁ is embedded insulating film Temperature, t ₁
Is the thickness of the buried insulating film; T. Is the room temperature, T ₂ is the compensation film
The formation temperature, t _2, is the thickness of the compensation film, and
Bonding temperature in the forming process is the softening temperature of the buried insulating film
T ₁ is a lamination temperature) method of manufacturing a substrate when crossing. 2. The method according to claim 1, wherein in the step of forming the processing substrate, a table is formed.
Forming a circuit on a semiconductor substrate having a step formed on a surface thereof,
Forming a circuit and a buried insulating film filling the step;
Forming a processed substrate with a planarization film formed on a buried insulating film
The method for manufacturing a substrate according to claim 1. 3. The method according to claim 1, further comprising :
Performing a step of forming the compensation film on the holding substrate; and forming the bonded substrate in the step of forming the compensation film.
The surface opposite to the formed surface is the flat surface of the processing substrate.
The method for producing a substrate according to claim 1, wherein the substrate is bonded to a chemical conversion film . 4. After the lamination substrate is formed, the lamination is performed.
Forming the compensation film on both surfaces of the semiconductor substrate, and forming the semiconductor layer in the step of forming the semiconductor layer.
Polishing the compensation film formed on the side and the semiconductor substrate.
The method for manufacturing a substrate according to claim 1, wherein the semiconductor layer is formed by shaving . 5. The method according to claim 1 , further comprising the step of:
The above-mentioned protection on the surface opposite to the surface to be bonded to the planarizing film
The method for manufacturing a substrate according to claim 1 , wherein a step of forming the compensation film on the carrier substrate is performed .