JP3481723B2 - Commutation margin angle detection circuit of thyristor converter - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a commutation allowance angle detection circuit for a thyristor converter, and more particularly to a DC interconnection facility such as DC power transmission and a frequency converter, a static starter
It is used for the constant margin angle control of a separately excited conversion device with an inverse conversion operation such as a regenerative inverter for an electric railway.

[0002]

2. Description of the Related Art Generally, a control system for a separately excited converter is constructed as shown in FIG. In the forward conversion operation of the separately-excited conversion device, the AC power sent via the power supply line 51 is sent to the converter transformer 54 via the breaker 53 to be transformed. The transformed AC power is sent to the thyristor converter 56, converted into DC, and sent to the outside via the DC reactor 57. In the reverse direction conversion operation, the operation reverse to the above operation is performed. In FIG. 11, the AC high voltage detector 52 is a voltage Vac of the AC power flowing through the power supply line 51.
The current transformer 55 detects the current Iac on the DC winding side of the converter transformer 54, and the current transformer 58 for detecting the DC current (hereinafter, also referred to as the AC transformer 58) is converted by the thyristor converter 56 into an alternating current. The current of the direct current converted from electric power or converted to alternating current power is detected.

On the other hand, the control system has a controller 20 and a gate pulse generator 30. Control device 20
Is a constant margin angle control circuit 21 (hereinafter, also referred to as AγR21)
And a constant current control circuit 22 (hereinafter, also referred to as ACR22)
And a selection circuit 23, a synchronization detection circuit 24, and a phase control circuit 25. Also, the gate pulse generator 3
0 is the normal pressure / reverse pressure detection circuit 34 and the gate pulse generation circuit 3
6 and. The constant margin angle control circuit 21 outputs a control angle command signal α _AγR that makes the margin angle of the thyristor converter 56 constant based on the anode-cathode voltage waveform of the thyristor converter 56 during the reverse conversion operation. The constant current control circuit 22 outputs a control angle command signal α _ACR that makes the direct current Idc constant based on the direct current Idc detected by the current transformer 58 during the forward conversion operation. The selection circuit 23 selects the output of the constant current control device 22 during the forward conversion operation, and selects the output of the constant margin angle control circuit 21 during the reverse conversion operation and sends it to the phase control circuit 25. The synchronization detection circuit 24 outputs a phase signal indicating a timing at which the thyristor of a certain phase of the thyristor converter 56 is subjected to forward pressure based on the AC voltage Vac detected by the AC high voltage detector 52, and the phase control circuit 25.
Send to. The phase control circuit 25 sends a phase control pulse PHS to the gate pulse generation circuit 36 based on the control angle command α output from the selection circuit 23 and the phase signal from the synchronization detection circuit 24. The forward pressure / reverse pressure detection circuit 34 detects whether the anode-cathode voltage of the thyristor converter 56 (for example, the anode-cathode voltage of the U-phase thyristor of the thyristor converter 56) is in the forward voltage state or the reverse voltage state. However, when in the forward voltage state, the forward voltage signal FV is
When in the reverse voltage state, the reverse voltage signal RV is sent to the gate pulse generating circuit 36. The gate pulse generation circuit 36 generates a pulse having a width of 120 electrical degrees for each thyristor based on the phase control pulse generation PHS from the phase control circuit 25, and when the forward voltage signal FV is received, the generated pulse is generated. Is output as a gate control pulse to the thyristor converter 3, and if sufficient back pressure is not applied to the thyristor during extinction, the gate control pulse is output again to the thyristor when the barotropic pressure is detected. It has a firing function.

FIG. 12 shows a general configuration example of the constant margin angle control circuit 21. The constant margin angle control device 21 includes a reverse voltage detection circuit 21A, a pulse angle conversion circuit 21B, and a PID calculation circuit 21C. Thyristor anode
A portion corresponding to the margin angle of the cathode voltage waveform, that is, a reverse voltage period is detected by the reverse voltage detection circuit 21A,
The detected margin angle is converted into an electric quantity proportional to the margin angle by the pulse angle conversion circuit 21B. Then, the control angle command signal α _{AγR at} which the deviation between the allowance angle reference γ _o and the output of the pulse angle conversion circuit 21B becomes zero is calculated by the PID calculation circuit 21C, and the selection circuit 23 (FIG. 11).
Refer to)). The pulse angle conversion circuit 21B shown in FIG. 13 has a function of holding the previous detection value during this detection cycle because the margin angle, which is the detection value, is detected once per cycle. It is known to detect such a margin angle and perform constant margin angle control, for example, Takehiko Machida, "DC transmission", Tokyo Denki University Press, p113-11.
6, published in March 1977.

[0005]

Generally, the purpose of the constant margin angle control is to prevent commutation failure of the thyristor and to operate at a high power factor. Since the constant margin angle control circuit 21 shown in FIG. 14 is performed based on the reverse voltage of the anode-cathode voltage of the thyristor, when the control angle α is smaller than 120 degrees, the reverse voltage due to commutation of the thyristor of the other phase is used. Will also be detected. FIG. 13 shows the voltage waveform between the anode and the cathode of the thyristor when the control angle α is 120 degrees in electrical angle, and the output waveforms of the margin angle detection circuit 21A and the pulse angle conversion circuit 21B at that time. It shows in FIG. In the conventional margin angle detection, as can be seen from FIGS. 13 and 14, when the control angle α is 120 degrees, the actual margin angle is detected without being affected by the commutation of the thyristor of the other phase (see FIG. 13). When the control angle α is 90 degrees, the reverse voltage due to the commutation of the thyristor of the other phase is detected, so that a value smaller than the actual margin angle is detected. (See Figure 14). Therefore, there is a problem that the control angle does not proceed in the direction of 180 degrees and the establishment of the DC voltage is delayed. If the margin angle detection is locked at the time of start-up or restart and is started by constant current control, commutation failure, which is originally prevented by constant margin angle control, may occur. If it occurs frequently, it will give up starting.

The present invention has been made in consideration of the above circumstances, and it is possible to detect a margin angle with high accuracy and, if used for constant margin angle control, commutation failure is possible. It is an object of the present invention to provide a commutation allowance angle detection circuit for a thyristor converter, which enables the above-mentioned prevention and enables high power factor operation.

[0007]

A commutation allowance angle detection circuit of a thyristor converter according to the first aspect of the present invention (hereinafter simply referred to as an allowance angle detection circuit) reverses the anode-cathode voltage of a thyristor in a certain phase of the thyristor converter. Rising / falling detecting means for detecting rising and falling of output pulse of reverse voltage detecting circuit for detecting voltage period, and first phase control pulse of thyristor fired next to thyristor of a certain phase. The flip-flop circuit set by the second phase control pulse of the thyristor which is set by the thyristor of the certain phase and is fired next to the next, and the flip-flop circuit based on the detection output of the rising / falling detecting means. Counts the number of reverse voltage changes when the output of the switch circuit is in the ON state, and outputs the ON state when the count value reaches 2 A counter circuit that outputs and resets the count value and the output by the first phase control pulse; and an AND circuit that calculates the logical product of the output of the reverse voltage detection circuit and the inverted output of the counter circuit. It is characterized by being

The margin angle detection circuit according to the second invention is set by the phase control pulse of the thyristor which is fired next to the thyristor of one phase of the thyristor converter, and the next next of the thyristor of one phase. A flip-flop circuit that is reset by a phase control pulse of a thyristor that is fired at, a pulse generation circuit that generates a pulse that is turned on for a predetermined period based on the output of this flip-flop circuit, and an anode of a thyristor of a certain phase. The output of the reverse voltage detection circuit that detects the period of the reverse voltage from the voltage between the cathodes,
AND for calculating a logical product with the output of the pulse generation circuit
And a circuit.

A margin angle detection circuit according to a third aspect of the present invention detects a trailing edge of an output pulse of a reverse voltage detection circuit that detects a period in which a reverse voltage is detected from an anode-cathode voltage of a thyristor of a certain phase of a thyristor converter. Set by the falling control circuit and the phase control pulse of the thyristor which is fired next to the thyristor of a certain phase, the output of the falling detection circuit and the next next of the thyristor of a certain phase is fired. It is characterized in that it is provided with a flip-flop circuit that is reset by the logical sum of the phase control pulses of the thyristor, and an AND circuit that calculates the logical product of the output of the reverse voltage detection circuit and the flip-flop circuit.

A margin angle detection circuit according to a fourth aspect of the present invention detects a trailing edge of an output pulse of a reverse voltage detection circuit that detects a reverse voltage period from an anode-cathode voltage of a thyristor of a certain phase of a thyristor converter. AC power is supplied to the fall detection circuit and the thyristor converter in the case of forward conversion, and AC power is supplied from the thyristor converter in the case of reverse conversion. That is set by the output of the first level detection circuit, the second level detection circuit that detects that the AC voltage has become zero, and the fall detection circuit and the second level detection circuit. And a flip-flop circuit that is reset by the logical sum of the level detection circuit of AND, and an AND circuit that calculates the logical product of the output of the reverse voltage detection circuit and the output of the flip-flop circuit. Characterized in that it comprises a.

The margin angle detection circuit according to the fifth aspect of the present invention outputs to a reverse voltage detection circuit for detecting a period in which the voltage between the anode and the cathode of a certain phase of the thyristor converter becomes a reverse voltage,
With the output of the flip-flop circuit in the gate pulse generation circuit, which is set by the phase control pulse of a certain phase and is reset by the signal obtained by inputting the reverse voltage detection output of the reverse voltage detection circuit to the on-delay circuit. An AND circuit for calculating a logical product, and a flip-flop circuit which is set by a rise of an output pulse of the AND circuit and reset by a fall of a reverse voltage detection output of the reverse voltage detection circuit are provided. To do.

[0012]

According to the margin angle detecting circuit of the first aspect of the invention thus constituted, the counter circuit causes the influence of the commutation of the thyristor of the other phase different from the above-mentioned certain phase from the output of the reverse voltage detecting circuit. It is possible to generate a pulse from which is removed. Then, the AND of the inverted output of the counter circuit and the output of the reverse voltage detection circuit is calculated in the AND circuit, and the calculation result becomes a pulse for detecting the original margin angle. As a result, it is possible to detect the margin angle with high accuracy.

According to the margin angle detecting circuit of the second aspect of the invention configured as described above, the flip-flop circuit and the pulse generating circuit prevent the influence of the commutation of the other phase from the output of the reverse voltage detecting circuit. The removed pulse can be generated, and a logical product of this pulse and the output of the reverse voltage detection circuit is calculated in the AND circuit, so that an accurate margin angle can be detected.

According to the margin angle detecting circuit of the third aspect of the invention configured as described above, a pulse including only the first pulse in the output pulse train of the reverse voltage detecting circuit is output from the flip-flop circuit, An AND circuit takes the logical product of the output of the flip-flop circuit and the output of the reverse voltage detection circuit. As a result, it is possible to eliminate the influence of commutation of the other phase, and it is possible to perform accurate margin angle detection.

Further, according to the margin angle detecting circuit of the fourth aspect of the invention configured as described above, only the first pulse in the pulse train of the reverse voltage detecting circuit is affected even when the commutation of the other phase is affected. Is output from the flip-flop circuit, and the logical product of the output of the flip-flop circuit and the output of the reverse voltage detection circuit is taken in the AND circuit. As a result, it is possible to eliminate the influence of commutation of the other phase, and it is possible to perform accurate margin angle detection.

According to the margin angle detection circuit of the fifth aspect of the invention, the flip-flop circuit is set by the rise of the output of the AND circuit and reset by the fall of the reverse voltage detection output of the reverse voltage detection circuit. This allows
Even if there is an influence of the commutation of the other phase, only the first pulse can be detected in the output pulse train of the reverse voltage detection circuit. As a result, it is possible to eliminate the influence of commutation of the other phase, and it is possible to perform accurate margin angle detection.

[0017]

FIG. 1 shows the configuration of a first embodiment of a commutation allowance angle detection circuit for a thyristor converter according to the present invention, and FIG. 2 shows its operation waveform diagram. The commutation allowance angle detection circuit 4 of this embodiment is the reverse voltage detection circuit 21A and the pulse angle conversion circuit 2 of the constant allowance angle control circuit 21 shown in FIG.
It is provided between 1B, and the up-edge one-shot circuit 4A, the down-edge one-shot circuit 4B, O
R circuit 4C, flip-flop circuit 4D, AND circuit 4E, counter circuit 4F, NOT circuit 4G, A
And an ND circuit 4H.

Next, the structure and operation of this embodiment will be described with reference to FIG. Now, consider the case where the thyristor converter 56 (see FIG. 11) is started or restarted by the constant margin angle control circuit 21. At this time, the control angle α is near 90 degrees, and the reverse voltage detection circuit 21A detects three reverse voltages due to the influence of the commutation of the thyristor of the other phase, as shown in FIG. 14, resulting in three pulse trains. Reverse voltage detection circuit 2
Assuming that the reverse voltage to be detected by 1A is the anode-cathode voltage of the U-phase thyristor, three pulses appear in the output signal a of the reverse voltage detection circuit 21A shown in FIG. Pulse is originally a margin angle required for constant margin angle control, the second pulse is a reverse voltage due to the effect of commutation of the V-phase thyristor, and the third pulse is due to the effect of commutation of the X-phase thyristor. It is a reverse voltage.

First, the V-phase phase control pulse PHS-V (signal c in FIGS. 1 and 2) is set, and the X-phase phase control pulse P is set.
The output e of the flip-flop circuit 4D which is reset by the HS-X (the signal d in FIGS. 1 and 2) is as shown in FIG. Next, the up-edge one-shot circuit 4A that generates a one-shot pulse at the rising edge of the signal a and the signal a
The reverse voltage detection circuit 2 using the down-edge one-shot circuit 4B that generates a one-shot pulse at the falling edge of
The change in the output voltage of 1 A is detected. Then, the output b of the OR circuit 4C which performs the logical sum of the one-shot circuits 4A and 4B becomes as shown in FIG. The AND operation of the output b of the OR circuit 4C and the output e of the flip-flop circuit 4D is operated in the AND circuit 4E, and the signal f which is the operation result is sent to the counter circuit 4F. This signal f becomes a one-shot pulse at the rising and falling edges of the first pulse of the signal a as shown in FIG. Counter 4F
Counts the output pulse f of the AND circuit 4E and when the count value becomes 2, the output signal g of the counter 4F is set to "1".
To Then, the count value is reset to 0 and the output signal g is also set to "0" by the V-phase phase control signal PHS-V (see FIG. 2). The output g of the counter circuit 4F is inverted by the NOT circuit 4G and sent to the AND circuit 4H. The AND circuit 4H calculates the logical product of the signal a and the output signal of the NOT circuit 4H, and the signal h indicating the calculation result is sent to the pulse angle conversion circuit 21B. At this time, the signal h is turned on only at the rising edge of the first pulse of the signal a as shown in FIG.
The pulse turns off only at the falling edge, and the margin angle can be detected with high accuracy. By performing the constant margin angle control using the margin angle detected with high accuracy, commutation failure can be prevented as much as possible and high power factor operation is enabled.

Next, the configuration of the second embodiment of the commutation allowance angle detection circuit according to the present invention is shown in FIG. 3 and its operation waveform diagram is shown in FIG. The commutation allowance angle detection circuit 5 of this embodiment is provided between the reverse voltage detection circuit 21A and the pulse angle conversion circuit 21B of the constant allowance angle control device 21, and includes a flip-flop circuit 5A.
It has a one-shot circuit 5B and an AND circuit 5C. The flip-flop circuit 5A has a V-phase phase control pulse P
It is set by HS-V (signal name b in FIGS. 3 and 4) and reset by the X-phase control pulse PHS-X (signal name c in FIGS. 3 and 4). The one-shot circuit 5B is turned on by the rise of the output d of the flip-flop circuit 5A, and generates a one-shot pulse e which is turned on for a predetermined period (≦ electrical angle <60 degrees) (see FIG. 2). Where γ. Is a margin control standard. The logical product of this one-shot pulse e and the output signal a of the reverse voltage detection circuit 21A is the AND circuit 5C.
Is calculated by. Now, considering the case where the control angle α is near 90 degrees as in the case of the first embodiment, the reverse voltage detection circuit 21
At the output a of A, three pulses appear in the same manner as described in the first embodiment. If the reverse voltage detection circuit 21A detects the reverse voltage based on the anode-cathode voltage of the U-phase thyristor, the first pulse of the output a has the margin angle originally required for the constant margin angle control. Yes, the second pulse indicates a reverse voltage due to the effect of commutation of the V-phase thyristor, and the third pulse
Pulse indicates a reverse voltage due to the effect of commutation of the X-phase thyristor.

As described above, the output e of the one-shot circuit 5B is turned on by the rise of the output d of the flip-flop circuit 5A, and is turned on for a predetermined period. At this time O
The upper limit value for continuing the N state is set so as not to exceed the interval (60 electrical degrees) in the normal state between the signal b and the signal c, and the lower limit value is sufficient to detect the first pulse of the signal a. Is set to. Therefore, the output f of the AND circuit 5C is obtained by accurately detecting the margin angle. This makes it possible to prevent commutation failure as much as possible, and enables high power factor operation. Further, now, after outputting the phase control pulse PHS-V (signal name b) of the V-phase thyristor, the control angle α suddenly changes and the appearance of the phase control pulse PHS-X (signal name c) of the X-phase thyristor appears. Consider the case where it becomes too late. At this time, the flip-flop circuit 5
The time width of the output d of A becomes long, but the one-shot circuit 5
Since the output of B is turned on for a predetermined period, the second and third pulses of the signal a are not detected in this embodiment.

The configuration of the third embodiment of the commutation allowance angle detection circuit according to the present invention is shown in FIG. 5 and its operation waveform diagram is shown in FIG. The commutation allowance angle detection circuit 6 of this embodiment is provided between the reverse voltage detection circuit 21A and the pulse angle conversion circuit 21B of the constant allowance angle control device 21, and has a down edge one-shot circuit 6A, an OR circuit 6B, and a flip block. Circuit 6C
And the AND circuit 6D causes the one-shot pulse b to occur when the output a of the reverse voltage detection circuit 21A that detects the reverse voltage based on the anode-cathode voltage of the U-phase thyristor falls.
To occur. The OR circuit 6B outputs the output b of the town edge one-shot circuit 6A and the X-phase control pulse PHS-X.
(The signal name d in FIGS. 5 and 6) is ORed. The flip-flop circuit 6C uses the V-phase phase control pulse PHS-V.
(Signal name c in FIGS. 5 and 6) is set, and OR circuit 6B is set.
Is reset by the output of. Then, the AND circuit 6D calculates the logical product of the signal a and the output e of the flip-flop circuit 6C, and outputs the output signal f which is the calculation result to the pulse angle conversion circuit 21B.

Next, the operation of this embodiment will be described with reference to FIG. Now, assume that waveform distortion occurs in the AC voltage during the reverse voltage period of the first pulse of the signal a shown in FIG. 2 and the reverse voltage pulse of the signal a becomes a train of five pulses as shown in FIG. . Then, the flip-flop circuit 6C causes the one-shot circuit 6A to detect the first of the reverse voltage pulse trains of the signal a.
The output e of the flip-flop circuit 6C is as shown in FIG. 6 because it is reset by the falling edge of the pulse. Therefore, the output f of the AND circuit 6D is obtained by detecting only the first pulse in the reverse voltage pulse train of the signal a. Further, when the signal a shown in FIG. 2 is input to the commutation allowance angle detection circuit 6 of this embodiment, it is possible to detect the allowance angle with high accuracy as in the case of the first embodiment. It can be easily understood from.

In the commutation allowance angle detection circuits of the above-described first to third embodiments, the other remaining voltage is detected based on the reverse voltage of the anode-cathode voltage of the thyristor of a certain phase (for example, U phase). Phase (V phase, X phase) phase control pulse PHS
Although the commutation margin angle was detected using -V and PHS-X, the output of the phase control circuit 25 shown in FIG. 11 is used as these phase control pulses.

Next, FIG. 7 shows the configuration of the fourth embodiment of the commutation allowance angle detection circuit according to the present invention, and FIG. 8 shows its operation waveform diagram. The commutation allowance angle detection circuit 7 of this embodiment includes a down edge one shot circuit 7A and level detection circuits 7B and 7C.
, OR circuit 7D, flip-flop circuit 7E, A
And an ND circuit 7F. The down-edge one-shot circuit 7A generates a one-shot pulse b when the output a of the reverse voltage detection circuit 21A which detects a reverse voltage based on the anode-cathode voltage of the U-phase thyristor falls. The level detection circuit 7B outputs a "1" level signal c when the level of the DC winding U-phase current Iac of the converter transformer 54 shown in FIG. 11 becomes zero (see FIG. 8). The level detection circuit 7C is "1" when the AC voltage Vac detected by the AC high voltage detector 52 shown in FIG. 11 becomes zero V.
The level signal d is output (see FIG. 8). OR circuit 7D
Is the output b of the one-shot circuit 7A and the level detection circuit 7C
The logical sum of the output d is calculated. Flip-flop circuit 7
E is set by the output of the level detection circuit 7B, and O
It is reset by the output of the R circuit 7D. The AND circuit 7F calculates the logical product of the signal a and the output e of the flip-flop circuit 7E, and outputs the output signal f which is the calculation result to the pulse angle conversion circuit 21B.

Next, the operation of the commutation allowance angle detection circuit 7 of the fourth embodiment will be described with reference to FIG. Now, in the period from when the energizing current Iac of the U-phase thyristor becomes zero to when the AC voltage Vac becomes zero, the waveform is distorted for some reason and the reverse voltage a becomes a pulse train of three (see FIG. 8). think of. The reverse voltage pulse train is set by the flip-flop circuit 7E which is set when the energizing current Iac of the U-phase thyristor becomes zero and is reset when the reverse voltage pulse train a becomes zero, or when the alternating voltage Vac becomes zero. A signal e containing only the first pulse of signals a)
Is output from the flip-flop circuit 7E, and this signal e
And the pulse train of the reverse voltage (signal a) are calculated in the AND circuit 7F. As a result, only the first pulse is extracted from the signal f that is the logical product, the margin angle can be detected with high accuracy, and commutation failure can be prevented as much as possible and high strength can be achieved. Enables rate driving.

Next, the configuration of the fifth embodiment of the commutation allowance angle detection circuit according to the present invention is shown in FIG. 9 and its operation waveform diagram is shown in FIG. The commutation allowance angle detection circuit 8 of this embodiment is provided in the gate pulse generator 30 shown in FIG.
A, an up-edge one-shot circuit 8B, a down-edge one-shot circuit 8C, and a flip-flop circuit 8
And D. Further, the gate pulse generating circuit 36 in the gate pulse generating device 30 has a forced ignition function. In the gate pulse generating circuit 36, a phase control pulse from the control device 20, for example, a U-phase phase control pulse PHS-U is set, and a V-phase phase control pulse PHS is set.
A pulse a (see FIG. 10) having an electrical angle width of 120 degrees is generated from the flip-flop circuit 36A which is reset by -V. The flip-flop circuit 36C is set by the pulse a. Also, the flip-flop circuit 3
6C is a reverse voltage detection signal RV from the normal pressure / reverse pressure detection circuit 34.
Of the signal b after passing through the on-delay circuit 36B (see FIG.
Reset). Then, the logical product of the output c of the flip-flop circuit 36C and the forward pressure detection signal FV from the forward pressure / reverse pressure detection circuit 34 is operated in the AND circuit 36D, and the operation result is controlled by the gate control pulse of the U-phase thyristor. It becomes a signal and is sent to the gate of the U-phase thyristor.

On the other hand, in the margin angle detection circuit 8 of the present embodiment, the reverse voltage detection signal RV from the forward pressure / reverse pressure detection circuit 34.
AND the output signal C of the flip-flop circuit 36C is calculated in the AND circuit 8A, the rising edge of the output pulse d of the AND circuit 8A is detected by the up edge one shot circuit 8B, and the one shot pulse e
Is generated. The one-shot pulse e sets the flip-flop circuit 8D. Further, the falling edge of the reverse voltage detection signal RV indicates that the down edge one-shot circuit 8
Detected by C, a one-shot pulse f is generated. This one-shot pulse f resets the flip-flop circuit 8D. And flip-flop circuit 8D
Is sent to the pulse angle conversion circuit 21B in the constant margin angle control circuit 21. As a result, only the first pulse of the reverse voltage pulse train is detected by the flip-flop circuit 8D. That is, it is possible to detect the margin angle with high accuracy, which makes it possible to prevent commutation failure as much as possible and to enable high power factor operation.

In the first to fifth embodiments,
A particular phase has been described, for example the U phase. Therefore, in each embodiment, it is assumed that the control device 20 and the gate pulse generator 30 are provided for each phase.

[0030]

As described above, according to the present invention,
It is possible to eliminate the influence of commutation of the other phase, and it is possible to detect the margin angle with high accuracy. Therefore, if it is used for the constant margin angle control, it is possible to prevent commutation failure as much as possible, and it is possible to perform high power factor operation.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a first embodiment of a commutation allowance angle detection circuit according to the present invention.

FIG. 2 is an operation waveform diagram showing an operation of the first embodiment.

FIG. 3 is a block diagram showing a configuration of a second embodiment of a commutation allowance angle detection circuit according to the present invention.

FIG. 4 is an operation waveform diagram showing an operation of the second embodiment.

FIG. 5 is a block diagram showing a configuration of a third embodiment of a commutation allowance angle detection circuit according to the present invention.

FIG. 6 is an operation waveform chart showing the operation of the third embodiment.

FIG. 7 is a block diagram showing a configuration of a fourth embodiment of a commutation allowance angle detection circuit according to the present invention.

FIG. 8 is an operation waveform diagram showing an operation of the fourth embodiment.

FIG. 9 is a block diagram showing the configuration of a fifth embodiment of a commutation allowance angle detection circuit according to the present invention.

FIG. 10 is an operation waveform chart showing the operation of the fifth embodiment.

FIG. 11 is a block diagram showing a general configuration of a control system for a Siris converter.

12 is a block diagram showing the configuration of a constant margin angle control circuit according to the control system shown in FIG.

13 is a margin angle detection timing chart when the control angle α is 120 degrees detected by the constant margin angle control circuit shown in FIG.

14 is a margin angle detection timing chart when the control angle α is 90 degrees, which is detected by the constant margin angle control circuit shown in FIG.

[Explanation of symbols]

4 Commutation allowance angle detection circuit 4A up edge one shot circuit 4B down edge one shot circuit 4C OR circuit 4D flip-flop circuit 4E AND circuit 4F counter 4G NOT circuit 4H AND circuit 5 Commutation allowance angle detection circuit 5A flip-flop circuit 5B one shot circuit 5C AND circuit 6 Commutation allowance angle detection circuit 6A down edge one shot circuit 6B OR circuit 6C flip-flop circuit 6D AND circuit 7 Commutation allowance angle detection circuit 7A down edge one shot circuit 7B, 7C level detection circuit 7D OR circuit 7E flip-flop circuit 7F AND circuit 8 Commutation allowance angle detection circuit 7A AND circuit 8B up edge one shot circuit 8C down edge one shot circuit 8D flip-flop circuit 20 Control device 21 Constant margin angle control circuit 21A Reverse voltage detection circuit 21B pulse angle conversion circuit 22 Constant current control circuit 23 Selection circuit 24 Sync detection circuit 25 Phase control circuit 30 Gate pulse generator 34 Normal pressure / reverse pressure detection circuit 36 Gate pulse generator 51 power supply line 52 AC high voltage detector 53 circuit breaker 54 Transformer for Transformer 55 AC 56 Thyristor converter 57 DC reactor 58 Current transformer for DC current detection

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Masamori Nobayashi Masahiro Nobayashi 3-3-22 Nakanoshima 3-chome, Kita-ku, Osaka City, Osaka Prefecture Kansai Electric Power Co., Inc. (72) Atsuo Kawachi 2-5 Marunouchi, Takamatsu City, Kagawa Prefecture Shikoku Electric Power Co., Inc. (72) Inventor Takatsugu Okabe 6-15-1, Ginza, Chuo-ku, Tokyo Power development Co., Ltd. (72) Inventor Yasutomo Moriura, No. 1, Toshiba-cho, Fuchu-shi, Tokyo Toshiba Fuchu Factory, Ltd. (56) References JP-A-57-162969 (JP, A) JP-A-50-1324 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H02M 7/757 H02M 7 / 515

Claims (5)

(57) [Claims] 1. Rising / falling detecting means for detecting rising and falling of an output pulse of a reverse voltage detecting circuit for detecting a reverse voltage period from an anode-cathode voltage of a thyristor of a certain phase of a thyristor converter, A second phase control pulse of a thyristor, which is set by a first phase control pulse of a thyristor fired next to the thyristor of the phase, and which is fired next to the next next of the thyristor of the phase. The number of changes in the reverse voltage when the output of the flip-flop circuit is in the ON state is counted based on the flip-flop circuit that is reset by the flip-flop circuit and the detection output of the rising / falling detection means, and the count value is 2 When it becomes, the output of the ON state is output, and the count value and the output are changed by the first phase control pulse. A counter circuit that is set, and an AND circuit that calculates the logical product of the output of the reverse voltage detection circuit and the inverted output of the counter circuit. circuit. 2. A phase of a thyristor next to the next thyristor of a certain phase set by a phase control pulse of the thyristor next to the thyristor of the certain phase of the thyristor converter. A flip-flop circuit reset by a control pulse, and a predetermined period based on the output of the flip-flop circuit,
A logical product of a pulse generation circuit that generates a pulse to be turned on, an output of the reverse voltage detection circuit that detects a reverse voltage period from the anode-cathode voltage of the thyristor of a certain phase, and an output of the pulse generation circuit is calculated. A commutation allowance angle detection circuit for a thyristor converter, comprising: an AND circuit for calculating. 3. A fall detection circuit for detecting a fall of an output pulse of a reverse voltage detection circuit for detecting a period of a reverse voltage from an anode-cathode voltage of a thyristor of a certain phase of a thyristor converter; Of the phase control pulse of the thyristor, which is set by the phase control pulse of the thyristor that is fired next to the thyristor of A commutation margin of the thyristor converter, comprising: a flip-flop circuit that is reset by a logical sum, and an AND circuit that calculates a logical product of the reverse voltage detection circuit and the output of the flip-flop circuit. Corner detection circuit. 4. A fall detection circuit for detecting a fall of an output pulse of a reverse voltage detection circuit for detecting a reverse voltage period from an anode-cathode voltage of a thyristor of a certain phase of the thyristor converter, and a forward conversion circuit. AC power is supplied to the thyristor converter in this case, and it is detected that the DC winding current of the converter transformer to which AC power is supplied from the thyristor converter in the case of reverse conversion has become zero. A level detecting circuit, a second level detecting circuit for detecting that the AC voltage has become zero, and an output of the first level detecting circuit,
A flip-flop circuit that is reset by the logical sum of the fall detection circuit and the second level detection circuit; and an AND circuit that calculates the logical product of the output of the reverse voltage detection circuit and the output of the flip-flop circuit. A commutation allowance angle detection circuit for a thyristor converter characterized by being provided. 5. A reverse voltage detection circuit that is set by an output to a reverse voltage detection circuit that detects a period in which the voltage between the anode and the cathode of a certain phase is a reverse voltage of the thyristor converter and the phase control pulse of the certain phase, An AND circuit that calculates the logical product of the output of the reverse voltage detected by the output of the flip-flop circuit in the gate pulse generation circuit, which is reset by the signal obtained by inputting it to the on-delay circuit, and the output of this AND circuit A commutation allowance angle detection circuit for a thyristor converter, comprising: a flip-flop circuit which is set by a rise of a pulse and reset by a fall of a reverse voltage detection output of the reverse voltage detection circuit.