JPH01160368A - Phase controller of power converter - Google Patents

Abstract

PURPOSE:To provide a small and simplified construction by generating the timing pulses 1-3 in order by means of a synchronized pulse to the line voltage and holding a control signal of modulation rate in this pulse order and giving output as a triggering pulse. CONSTITUTION:Power converter provides with the inverter 1, a DC capacitor 5, a linked reactor 2 and a linked transformer 3 and supplies AC power which is converted from DC power supply 6 for line 4. In addition, it also provides with PT 7, CT 8, a control device 9 and a phase controller 10a. The phase controller 10a consists of a synchronous detector 11, on which the pulse SCLK is generated and synchronized to the line voltage by the output of PT 7, each timing pulse generator 13 for a phase counter (T1), for a control signal latch (T2) and for a triggering signal latch T3, a phase counter 14, a holding circuit of control signal for modulation rate 15 and a memory element 16. Consequently both the control signal for the angle of phase difference and the control signal of modulation rate can be handled digitally.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a power conversion device that is operated by being connected to an alternating current system, and particularly relates to a controllable rectifier element that constitutes this power conversion device. The present invention relates to a phase control device that controls a phase control device.

(Prior Art) FIG. 3 is a schematic configuration diagram of a power converter using a voltage-controlled inverter, which is generally used as a power converter for grid cooperation.

In the figure, an AC side terminal of an inverter 1 is connected to an AC system power supply (hereinafter referred to as the system) 4 via a grid interconnection reactor 2 and a grid interconnection transformer 3, while a DC capacitor 5 is connected to the DC side terminal of the inverter 1. and a DC power supply 6 are connected, and these constitute a main system.

In addition, the secondary winding voltage of a potential transformer (hereinafter referred to as PT) 7 that detects the grid voltage and the secondary winding current of a potential current transformer (hereinafter referred to as CT) 8 that detects the input/output current to the grid. When the control device 9 outputs the phase difference angle signal φ based on
The phase control device 10 controls the inverter 1 based on this phase difference angle signal φ and the secondary winding voltage of the PT7, and these constitute a control system.

The phase control device 10 includes a synchronization detector 11 that receives the secondary winding voltage of the PT 7 and generates a synchronization signal, and inputs the synchronization signal and the phase difference angle signal φ of the control device 9 to form the inverter 1. The ignition pulse determination circuit 12 generates an ignition pulse for the controllable rectifying element.

The principle of power conversion of this power conversion device will be explained below using FIG. 4.

First, inverter 1 and DC capacitor 5 shown in FIG.
is the inverter main circuit 1a, and the interconnection reactor 2 and the interconnection transformer 3 are the interconnection reactor 2a, the inverter main circuit 1a converts the DC power of the DC power supply 6 into the inverter main circuit 1a, as shown in FIG. They are converted into alternating current and supplied to the system 4, so they can be considered as alternating current power supplies that generate active and reactive currents. Here, the output voltage of the inverter main circuit 1a is 9IN', the voltage of the system 4 is 981,
The grid connection impedance of the grid connection reactor 2a is transferred from the grid 4 to the inverter main circuit 1 via the jX1 grid connection reactor 2a.
The current flowing toward a is connected to the 11 system voltage 98. If the phase angle of the output voltage "IN" of the inverter main circuit 1a is φ,
There is a relationship between these as shown in the vector diagrams in FIGS. Of these, (b) is the inverter main circuit 1
A shows a state in which a reactor is operating, that is, a state in which delayed reactive current is consumed. in this case,
The amplitude of the inverter output voltage "IN" is smaller than the amplitude of the grid voltage 98., and the grid interconnection reactor 2a has (V
SY-91N) voltage is applied, and the interconnection reactor 2a
The current flowing through the grid voltage is 98. component in phase with 9
0" delay component i. This is the inverter main circuit 1a
It is shown that it operates as a reactor and also operates to obtain active power from the grid 4. This relationship is expressed by the following equation.

IN 5Y P-□・sinφ... (1) In other words, the amplitude of the inverter output voltage 9□ is smaller than the amplitude of the grid voltage 'SY, and the phase of the inverter output voltage 'IN lags behind the phase of the grid voltage 98Y. If so, the inverter main circuit 1a consumes delayed reactive power and obtains active power from the grid 4.As is clear from equations (1) and (2) above, the amplitude of the inverter output voltage "IN" is the grid voltage 98. Even if it is smaller than , if the phase of the inverter output voltage 'IN is ahead of the phase of the grid voltage, the inverter main circuit 1a consumes delayed reactive power and outputs active power to the grid 4. In addition, in equation (1), when the phase of the inverter output voltage ``IN'' is ahead of the grid voltage, the phase difference φ is treated as a positive value, and when it is delayed, it is treated as a negative value, and P is When it is positive, it indicates that active power is being supplied from the inverter main circuit 1a to the grid 4.In addition, in equation (2), when Q is positive, the inverter main circuit 1a operates as a capacitor. This shows that when Q is negative, the inverter main circuit 1a is operating as a reactor.

Next, FIG. 4(C) shows the inverter output voltage "IN".

The actual value vIN is the grid voltage 98. The motion vectors are shown when the following conditions are satisfied for the execution value vSY of .

In this case, the current flowing through the interconnection reactor 2a is at the grid voltage 98. The current i has an in-phase component and a 90" leading component. This indicates that the inverter main circuit 1a operates as a capacitor and also obtains active power from the system 4.

Even when formula (3) is satisfied, as is clear from formulas (1) and (2), when the phase difference angle φ is positive, the inverter main circuit 1a operates as a capacitor and supplies active power to the grid 4. It shows.

Next, the operations of the control device 9 and phase control device 10 shown in FIG. 3, which operate according to the principle explained in FIG. 4, will be described.

Conventionally, the control device 9 has adjusted the a-dynamic power flowing into the system, detecting active power from the AC voltage and AC current obtained from PT7 and CTa, and adjusting the active power so that it becomes a predetermined value (1) The phase difference angle φ is calculated using the formula, and the phase difference angle control signal φ is applied to the phase control device 10. In the phase side control device 10, the synchronization detector 11 detects the AC voltage phase of the system 4 as a phase signal, and based on this phase signal and the phase difference angle control signal φ from the control device 9, the ignition pulse determining circuit 12 controls the inverter. An ignition pulse is output to the controllable element to determine the energization period.

FIG. 5 shows a configuration example of the inverter main circuit 1a, in which GU, GV, GW, and GX are bridge-connected.

GY and GZ indicate a gate turn-off thyristor (hereinafter referred to as GTO), which is a type of controllable rectifying element, and DU, DV, and D are connected in parallel to this GTO, respectively.
W, DX, DY and Dz indicate diodes.

Further, PT and NT indicate DC terminals, and a DC power source is connected to both terminals. Further, R, S and T indicate AC terminals.

When the inverter 1 shown in FIG. 5 is applied to the power conversion device shown in FIG. 3, the phase control device 10 adjusts the energization time of each GTO as shown by the solid line in FIG. 6 using the R-phase voltage detected by the PT7 as a reference. decide.

The energization period of GTOGU (hereinafter simply referred to as GU, GV, ..., omitting GTO to avoid complexity) is calculated by the phase difference angle φ from the 09 phase of the R-phase voltage of the grid voltage.
The current is applied for 180' with a delay of 180'.

GX is turned on for 180'' during the non-energized period of GU.

GV is energized for 180'' with a delay of 120' from GU.

GY is energized for 180' of the non-energizing period of GV.

GW is energized for 180@ with a delay of 120' from Gv.

GZ is energized for 180' of the non-energizing period of GW.

By operating the inverter 1 as described above, three-phase inverter output voltages that are out of phase with the system voltage by the phase difference angle φ are obtained. In FIG. 6, the R-phase fundamental wave of the inverter output voltage is shown as R1 to show the voltage phase relationship.

The above-mentioned control can be easily realized, for example, by using the device disclosed in Japanese Patent Application Laid-open No. 109760/1983.

(Problem that the invention attempts to solve) In the conventional phase control device 10 described above, (1).

As explained using equation (2) and FIG. 4, when only the phase difference angle φ is controlled by the phase control device 10 in order to control the active power P by the control device 9, the problem is that the reactive power Q also changes. There is. In this case, the value of reactive power Q is (2)
The value is determined by the formula.

Changes in the reactive power Q result in the alternating current voltage of the system 4 shown in FIG. 3 being increased or decreased, which is undesirable.

Therefore, this problem was solved as follows.

That is, the inverter output voltage effective value V1N and the DC voltage V of the DC power supply 6. There is a relationship between the following equation.

V - to -V -MF -(4)IN
DC However: Constant determined by the inverter main circuit MF: A variable in the range of 0 to 1 that determines the energization period width of the inverter main circuit and is also called a modulation rate.

Equation (4) shows that if the DC voltage vDC is constant, the effective value vIN of the inverter output voltage changes by changing the modulation factor MF that determines the energization period width of the inverter main circuit 1a. The method of changing this modulation factor MF is generally PWM (Pulse7idth Modular
on) control method.

In order to perform this PWM control and set the active power P and the reactive power Q to predetermined values, the control device 9 performs (1), (2
), the modulation factor MF and phase difference angle φ are calculated from equation (4), and a device corresponding to the phase control device 10 in FIG. 3 calculates each GTO of the inverter main circuit 1a in FIG. The energization period will need to be adjusted. An example of how to control the energization period of each GTO by performing PWM control will be explained with reference to FIG. 6 again.

When the modulation factor MF is "1", the solid line in FIG. 6 is as already explained. The case where the modulation factor MF is less than 1 degree will be explained. In this case, the phase control device 10 operates to make the energization period of each GTO a period corresponding to the modulation factor MF. For example, if the modulation factor MF of the GU is " The energization is stopped for a period of α degrees (2α) before and after 90″ of the 180° energization period in the case of 1″, and the current is applied to GX during this period. In this case, if this operation is performed for each pair of GU and GXSGV and GY, and GW and GZ (7), the energization will be between JjA as shown by the broken line in Figure 6, and the fundamental wave of the inverter output voltage R phase will also be like R2. The amplitude decreases.

As explained above, if the inverter 1 shown in FIG. 3 is subjected to PWM control, the active power P and reactive power Q supplied to the grid 4 can be adjusted, but the conventional phase control device 10 can only handle the phase difference angle φ. Can not. Therefore, in order to perform PWM control, a phase control device that determines the energization period of the inverter main circuit 1a based on the phase difference angle φ and the modulation factor MF is required, but the two pieces of information, the phase difference angle φ and the modulation factor MF, are required. Since it has to be handled, there are problems in that the phase control device 10 becomes large in size and has a complicated configuration.

The present invention was made to solve the above problems, and an object of the present invention is to obtain a phase control device that is small and has a simple configuration.

(Means for Solving the Problems) The present invention provides a synchronization detection device that generates a synchronization pulse synchronized with a grid voltage, and a synchronization detection device that generates first, second, and third timing pulses having predetermined intervals using this synchronization pulse. a timing pulse generation circuit that sequentially generates a digital phase signal of an output voltage based on the first timing pulse and the phase difference angle control signal; a modulation rate control holding circuit that holds the pulse and outputs it as an amplitude signal;
a storage element that inputs the digital phase signal and the amplitude signal as an address signal and outputs a firing information signal of the controllable rectifying element; and a storage element that outputs a firing information signal of the controllable rectifier; The present invention is characterized by comprising an ignition pulse holding circuit which outputs the ignition pulse as an ignition pulse.

(Function) In this invention, the phase difference angle control signal and the modulation rate control ta
Since the signals can be handled digitally, a phase control device that is small and has a simple configuration can be obtained.

(Embodiment) FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, in which the same reference numerals as in FIG. 3 indicate the same elements, and the configuration of the phase control device 10a is shown in FIG. are different.

Here, the phase control device 10a includes a synchronization detection device 11 that generates a synchronization pulse 5CLK synchronized with the grid voltage based on the output signal of the PT7, and uses the synchronization pulse 5CLK of the synchronization detection device 11 to generate a timing pulse generation circuit. 1
3 is the phase counter clock pulse TI, the control signal latch timing pulse T2. The ignition information latch timing pulse T3 is generated. Further, based on the phase counter clock pulse T1 of the timing generation circuit 13 and the phase difference angle control signal φ of the control device 9, the phase counter 4 generates a digital phase signal θ of the output voltage of the power conversion device.
At the same time, the latch timing pulse T2 of the timing pulse generation circuit 13 causes the modulation rate control signal holding circuit (
When the M latch (hereinafter referred to as M latch) 15 holds the modulation rate control signal MF of the control device 9 and outputs the amplitude signal M, the storage element 16 stores the voltage phase signal θ and the amplitude signal M as an address signal, and as shown in FIG. An ignition information signal TI indicating the energization period of the GTO indicated by is output. In addition, the ignition pulse holding circuit (hereinafter referred to as T latch) 17 holds the ignition information signal TI and outputs the ignition pulse TP by the ignition information latch timing pulse T3 of the timing generation circuit 13. ing.

The operation of this embodiment configured as described above will be explained below.

First, the synchronization detection device 11 generates a synchronization pulse 5CLK synchronized with the three-phase AC voltage of the system 4 from the PT7. A PLL circuit is generally used as this synchronization detection device 11, and its specific configuration and operation are described in, for example, Japanese Patent Laid-Open No. 55
The output frequency is an integral multiple of the voltage frequency of the system 4, and the higher the output frequency, the better, although a detailed explanation will be omitted since it is disclosed in Japanese Patent No. 34851. Here, the frequency is 60Hz
Input the voltage of system 4 of 6 x 211 x 60-
737280Hz, i.e. 1 for the voltage of grid 4
It outputs a pulse equivalent to approximately 0.029° in electrical angle of the period. The timing generation circuit 13 uses this synchronization pulse signal 5CL.
In response to K, the phase counter April's clock pulse T1
, a latch timing pulse T2 that controls the M latch 15.
and outputs the ignition information latch timing pulse T3 of the T latch 17. The phase counter 4 is composed of a binary counter, and performs counting using the phase counter clock pulse T1 of the timing generation circuit 13. If the phase difference angle control signal φ from the control device 9 is updated once and is not updated thereafter, the count value of the phase counter 4 will maintain the phase difference of the AC system voltage phase and the phase difference angle control signal φ, and Counting corresponding to 360° is repeated from 0@ at the corner.

Note that this count value represents the output voltage phase of the inverter, and is output as an output voltage phase signal θ. The reason for this will be explained below.

The phase difference angle control signal is φ. When , the grid voltage *8. When the frequency of is f, at any time t, the instantaneous value VSY of the system voltage and the instantaneous value VIN of the inverter output voltage have the following relationship.

V −V −5in2πf−t
= (4) SY 5Y VIN=VIN-sin (2πf-t+φ)
-(5) That is, the output voltage phase of the inverter is at time t
At the time point, it is expressed as 2πf-, t+φ. As can be seen from equation (5), the inverter output voltage is a sine wave, so the inverter output voltage phase (2πf-t+φ) can be considered to repeat from 01 to 360' in electrical angle. The phase counter clock pulse T1 of the timing generation circuit 13 is a signal obtained from the synchronization detection device 11, and oscillates in synchronization with the phase of the system voltage. The output voltage phase signal θ is the inverter output voltage phase (2
πf−t+φ), and is a signal representing the inverter output voltage phase at every time step of the phase counter clock pulse T1 at 360 degrees from Oo in electrical angle.

When the phase difference angle control signal φ from the control device 9 is updated,
The phase counter 4 receives the phase difference angle control signal φ in response to the control signal latch timing pulse T2 from the timing generation circuit 13.
Let be the new count value of the phase counter 4. Next, when the phase counter 4 receives the clock pulse T1 output from the timing generation circuit 13, it increases this new count value and repeats the count corresponding to 0@ to 360'' in electrical angle.

The M latch 15 receives the modulation rate control signal MFC from the control device 9.
is updated, the latch timing pulse T2 from the timing generation circuit 13 causes the modulation rate control signal MFC to be updated.
is held and output as an amplitude signal M.

The memory element 16 inputs both the output voltage phase signal θ from the phase counter 4 and the amplitude signal from the M latch 15 as address inputs, and receives the firing information signal TI indicating the energization period of each GTO explained in FIG. Output.

The T latch 17 receives the firing information signal T of the memory element 16.
By holding I by the firing information latch timing pulse T3 from the timing generation circuit 13, a firing pulse that determines the energization period of each GTO of the interrupter I is output.

FIG. 2 is a time chart for explaining the operation within the phase control device 10a described above.

In the figure, during period a, the control device 9 outputs the phase difference angle control signal φ.
. The output signals of each component are shown when the modulation rate control signal MF and the modulation rate control signal MF are updated. In addition, the period control device 9
shows the output signal of each component when the phase difference angle control signal φ and modulation rate control signal MF are not updated.

Here, period a and period s are each synchronized pulse signal S CL
Finish with K(7) 24J-cycles. The phase counter clock pulse T1, control signal latch timing pulse T2, and ignition information latch timing pulse T3 output by the timing generation circuit 13 are each allocated as one pulse obtained by dividing two cycles of the synchronization pulse signal 5CLK into four. The first pulse signal outputted among the pulses having widths obtained by dividing period a and period A by four is T.
o.

When the ill device 9 updates and outputs the phase difference angle control signal φ and the modulation rate control signal MF to the phase control device 10a, it outputs them in synchronization with this pulse signal TO.

Next, period a will be explained. Pulse signal T.

In synchronization with the rise of , phase difference angle control signal φC and modulation rate control signal MFc are updated. Next, when the phase counter clock pulse T1 rises, the output voltage phase signal θ is
is updated. However, in general, even if a memory element is given an address input, it cannot immediately obtain an output corresponding to the address input.
It has the characteristic that an output corresponding to the address input is obtained after an irregular signal period occurs, and this is a drawback of the memory element. The time from when an address input to a storage element is given until a correct output corresponding to the address input is obtained is generally called access time.

This results in a signal irregular period in which the ignition information signal TI output from the memory element 16 does not become correct information even if the address input of the memory element 16 is given.

Thereafter, with the rise of the control signal latch timing pulse T2, the phase difference angle control signal φ and the modulation rate control signal MF are updated in synchronization with the rise of the pulse signal TO.
is taken into the phase counter 4 and set as a new count value, and is held in the M latch 15. This results in
By changing the address input of the memory element 16 again,
There is a signal irregularity period in which the ignition information signal TI output from the memory element 16 does not become a correct signal again. Thereafter, the ignition information signal TI is held in the T latch 17 due to the rise of the ignition information latch timing pulse T3.

At this point, the ignition information signal TI has entered the signal confirmation period in which it becomes correct information, and each GT of the phase control device 10a
Information on the appropriate energization period of O is obtained, and this is sent to each G of the phase control device 10a as a firing pulse TP from the T latch air.
Output to TO.

The period a has been explained above, but since the phase difference angle control signal φ and the modulation rate signal MF are not updated during the period A, the operation is the same as the period a except that the operation at the rising edge of the control signal latch timing signal T2 is not performed. It becomes.

Thus, according to this embodiment, during the period a in FIG. 2, the address input of the storage element 16 is changed due to the rise of the control signal latch timing signal T2, and during the period 2, the change in the address input of the storage element 16 occurs due to the rise of the control signal latch timing signal T2. After the ignition information signal TI outputted from the memory element 16 enters the signal uncertainty period due to address input change of the memory element 16 due to the rising edge, the ignition information signal TM is transferred to the T latch 17 due to the rising edge of the ignition information latch timing T3. Therefore, it is possible to obtain a firing pulse TP that gives an appropriate energization period to each GTO of the phase control device 10a. Thereby, the memory string 16 can be incorporated into the phase control device 10a, so that it is possible to provide a small, high-performance phase control device that connects the inverter to the grid and performs PWM control that handles a large amount of information.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, since the phase difference angle control signal and the modulation rate control signal can be handled digitally, a phase control device that is small and has a simple configuration can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.
FIG. 2 is a time chart for explaining the operation of the same embodiment, FIG. 3 is a schematic configuration diagram of a power conversion device using a conventional phase control circuit, and FIG. 4(a). (b) and (c) are equivalent circuit diagrams and vector diagrams for explaining the operating principle of this power converter, FIG. 5 is a circuit diagram of the voltage controlled inverter of this power converter, and FIG.
The figure is an explanatory diagram for explaining the operating principle of this voltage source inverter. 1... Inverter, 2... Grid interconnection reactor, 3...
- Interconnection transformer, 5... DC capacitor, 6... DC power supply, 9... Control device, 10a... Phase control device, 11... Synchronization detection device, 13... Timing pulse generation circuit , 14... Phase counter, 15... Modulation rate control signal holding circuit, 16... Storage element, 17...
Ignition pulse holding circuit. Applicant's agent Yu Goto (α) (b) (c) Figure 4 Fan 6

Claims (1)

[Claims] an inverter formed by bridge-connecting controllable rectifying elements, the controllable rectifying elements based on a phase difference angle control signal for determining an output voltage phase and a modulation rate control signal for determining energization time of the controllable rectifying elements; In a power converter device that supplies alternating current power to a power grid by controlling a timing pulse generation circuit that sequentially generates timing pulses; a phase counter that outputs a digital phase signal of an output voltage based on the first timing pulse and the phase difference angle control signal; a modulation rate control holding circuit that holds the digital phase signal and the amplitude signal as an amplitude signal; and a storage element that receives the digital phase signal and the amplitude signal as an address signal and outputs a firing information signal of the controllable rectifying element. , and a firing pulse holding circuit that outputs the firing information signal as a firing pulse of the controllable rectifier according to the third timing pulse.