JPS5875472A - Switching regulator - Google Patents

Switching regulator

Info

Publication number
JPS5875472A
JPS5875472A JP17419381A JP17419381A JPS5875472A JP S5875472 A JPS5875472 A JP S5875472A JP 17419381 A JP17419381 A JP 17419381A JP 17419381 A JP17419381 A JP 17419381A JP S5875472 A JPS5875472 A JP S5875472A
Authority
JP
Japan
Prior art keywords
switching
voltage
circuit
rectifier
triangular wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17419381A
Other languages
Japanese (ja)
Inventor
Kenichi Shigeizumi
茂泉 健一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP17419381A priority Critical patent/JPS5875472A/en
Publication of JPS5875472A publication Critical patent/JPS5875472A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

Abstract

PURPOSE:To contrive simplification and cost down for the titled switching regulator by a method wherein a smoothing capacitor to be provided between a rectifier and a series transistor is omitted, and the duty ratio of the series transistor is controlled in the reverse relation to the large and small value of the output voltage instantaneous ratio of the rectifier. CONSTITUTION:An AC power source 1 is rectified by a rectifier 2, connected to the series transistor 4, and power is fed to a DC load 9 without passing through a smoothing capacitor. Then, a switching control is performed on the transistor 4 in such a manner that the duty ratio will become in reverse relation to the large or small output voltage instantaneous value of the rectifier 2 within each half cycle of AC voltage using the saw tooth wave of a delta wave generating circuit 21, the output of a duty ratio mathematic operation circuit 20, and the switching control circuit 11 which will be compared by a comparator 22. As a result, no inteference is encountered on the final output, the capacitor to be provided on the powersource side can be omitted, and the simplification of circuit constitution and cost down of the titled switching regulator can be accomplished.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、整流電圧を電源とし、高周波でスイッチング
制御される直列トランジスタを介して直流負荷に給電す
るためのスイッチングレギュレータに関するものである
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a switching regulator that uses a rectified voltage as a power source and supplies power to a DC load via a series transistor whose switching is controlled at a high frequency.

〔従来技術〕[Prior art]

この種のスイッチングレギュレータは一般に第1図に示
す構成を持っている。第1図の装置においては、交流電
源1(例えば商用電源)の電圧を整流器2で整流し、そ
の整流電圧を平滑コンデン?3によって平滑して得た直
流電圧を直列トランジスタ4により加〜50 KHzの
繰返し周波数のもとで所定のデユーティ比でスイッチン
グし、その出力電圧を、転流IイオーP6、平滑リアク
トル7および平滑;ンデンサ8から成る平滑回路5を介
して平滑化して直流負荷9に給電する。ト2ンジ、、:
:lj:l”” スタ4によって行われるスイッチングのデユーティ比す
なわちトランジスタ40制御信号のデユーティ比Drは
、第2図に示すようにスイッチングの周期をTo、IW
!U期中のオン時間をt。nとすれ圧Vo が一定であ
る限り、デユーティ比Drもスイッチング制御回路10
により一定に制御される。
This type of switching regulator generally has the configuration shown in FIG. In the device shown in FIG. 1, the voltage of an AC power source 1 (for example, a commercial power source) is rectified by a rectifier 2, and the rectified voltage is converted into a smoothing capacitor. 3 is applied by a series transistor 4 and switched at a predetermined duty ratio at a repetition frequency of 50 KHz, and the output voltage is transferred to a commutating I/O P6, a smoothing reactor 7 and a smoothing; The smoothed signal is smoothed through a smoothing circuit 5 consisting of a capacitor 8 and then supplied to a DC load 9 . To 2ndji...:
:lj:l"" The duty ratio of the switching performed by the star 4, that is, the duty ratio Dr of the control signal of the transistor 40, is determined by the switching period To, IW as shown in FIG.
! The on time during the U period is t. As long as n and the through pressure Vo are constant, the duty ratio Dr is also the same as that of the switching control circuit 10.
controlled at a constant level.

〔従来技術の問題点〕[Problems with conventional technology]

第1図の回路では整流器2の直後に平滑コンデンサ3を
接続して、大きく脈動する整流電圧を平滑化している。
In the circuit shown in FIG. 1, a smoothing capacitor 3 is connected immediately after the rectifier 2 to smooth the rectified voltage that fluctuates greatly.

しかし、このコンデンサは、直流用であって、定格電圧
も高く、キャノぐシタンスも大きいので、大型かつ高価
であり、装置全体の実装密度を低下させ、かつ装置it
全全体高価にする一因となっていた。
However, this capacitor is for DC use, has a high rated voltage, and has a large capacitance, so it is large and expensive, reduces the packaging density of the entire device, and
This was a contributing factor to making the whole thing expensive.

〔発明の目的〕[Purpose of the invention]

本発明の目的は上記欠点を除去し、回路構成の簡単な、
実装密度の高い、Jり低コストのスイッチングレイユレ
ータf、提供することにある。
The purpose of the present invention is to eliminate the above-mentioned drawbacks, and to simplify the circuit configuration.
An object of the present invention is to provide a switching layer with high packaging density and low cost.

〔発明の要約〕[Summary of the invention]

上記目的を達成するため本発明は、整流器と直列トラン
ジスタとの間に設けられていた平滑コンデyすを省略す
ると共に、直列トラン・クスタの各スイッチングサイク
ル内のデユーティ比が交流電圧の各牛サイクル内で整流
器の出力電圧一時値の大小と逆の関係になるように直列
トランジスタをスイッチング制御するようにしたもので
ある。
In order to achieve the above object, the present invention eliminates the smoothing capacitor provided between the rectifier and the series transistor, and at the same time, the duty ratio within each switching cycle of the series trunk transistor is The switching of the series transistors is controlled so as to have an inverse relationship with the temporary value of the output voltage of the rectifier.

〔発明の実施例〕[Embodiments of the invention]

第3図は本発明の一実施例を示すものである。 FIG. 3 shows an embodiment of the present invention.

このスイッチングレギュレータの交流電源1、整流器2
、直列トランジスタ4、平滑回路5(転流ダイオ−P6
、平滑リアクトル“7、平滑コンデンサ8から成る)、
および直流負荷9は、第1図のものと何ら変わりが無い
。この主回路構成上の特命は、整流器2と直列トランジ
スタ4との間に平滑コンデンサが設けられていないこと
である。直列トランジスタ4は、整流器2の出力電圧(
、)、トランジスタ4の出力側電圧、および平滑回路5
の出力電圧すなわち負荷電圧に基づいてスイッチング制
御回路11により次に述べるようにしてスイッチング制
御される。スイッチング周波数は前述のとと(加〜50
1Gis程度である。
AC power supply 1 and rectifier 2 of this switching regulator
, series transistor 4, smoothing circuit 5 (commutating diode-P6
, consisting of a smoothing reactor 7 and a smoothing capacitor 8),
The DC load 9 and the DC load 9 are the same as those in FIG. A special feature of this main circuit configuration is that no smoothing capacitor is provided between the rectifier 2 and the series transistor 4. The series transistor 4 outputs the output voltage of the rectifier 2 (
), the output side voltage of the transistor 4, and the smoothing circuit 5
Based on the output voltage, that is, the load voltage, the switching control circuit 11 performs switching control as described below. The switching frequency is the same as mentioned above (additionally ~50
It is about 1 Gis.

スイッチング制御回路11内におけるデユーティ比の決
定のし方の1)櫂ターンを第4図に示す。ここで整流器
2の出力電圧aの零点間の周期すなわち整流前の交流電
圧の半周期をTs  とする。デユーティ比の、eター
ンを決める一つの方法は電圧aに完全に反比例するよう
にすることである。しかし、この方法では電圧aの零点
付近で演算不能になるので、第4図下半部に示している
ように、電圧aが所定値vl に達するまではデユーテ
ィ比Drを100−とし、値V−を超えたら、電圧aの
最大値1rvrn、時間をtとして、デユーティ比Dr
をI に従って変化させる。Drの最小値Drmlnは、であ
る。なお、これとは逆に、先に層ml□を設定し、それ
に基づいてVs t”決定してもよい。
FIG. 4 shows the method of determining the duty ratio in the switching control circuit 11: 1) paddle turn. Here, the period between the zero points of the output voltage a of the rectifier 2, that is, the half period of the AC voltage before rectification is assumed to be Ts. One way to determine the duty ratio e-turn is to make it completely inversely proportional to the voltage a. However, with this method, calculation becomes impossible near the zero point of voltage a, so as shown in the lower half of FIG. -, the maximum value of voltage a is 1rvrn, the time is t, and the duty ratio Dr
Vary according to I. The minimum value Drmln of Dr is. Note that, on the contrary, the layer ml□ may be set first, and Vs t'' may be determined based on it.

このようなデユーティ比の演算結果に基づいて交流電源
電圧の次の牛サイクルの特定位相点、例えば整流電圧a
の零点でトリガ信号を発生させ、デユーティ比を変化さ
せればよい。
Based on the calculation result of the duty ratio, a specific phase point of the next cycle of the AC power supply voltage, for example, the rectified voltage a
It is sufficient to generate a trigger signal at the zero point of and change the duty ratio.

第5図は、このようなデユーティ比制御を爽現するスイ
ッチング/臂ルス発生回路の一例を示すものである。デ
エーテイ比演算回路加は電圧aと■3(第4図参照)の
入力信号に基づいて前述のデユーティ比Drを演算する
回路である。この演算(ロ)路加はデユーティ比Drに
比例する電圧Vd を出力し、コンパレータ22に比較
電圧として入力する。
FIG. 5 shows an example of a switching/arm pulse generation circuit that embodies such duty ratio control. The duty ratio calculation circuit 1 is a circuit that calculates the above-mentioned duty ratio Dr based on the voltage a and the input signal 3 (see FIG. 4). This calculation (b) outputs a voltage Vd proportional to the duty ratio Dr, and inputs it to the comparator 22 as a comparison voltage.

三角波発生回路21は、第6図(a)に示すのこぎり波
状電圧Stを発生する。この電圧Stは電圧aに同期し
、かつ直列トランジスタ4のスイッチング周波数に等し
い周波数、例えば50 KHzで発振し、その最大値は
、デユーティ比100優のときの電圧Vdの値に一致す
るように設定される。この電圧8tは=ンル−タnに基
準電圧として入力される。コンル−タnは、第、・6図
(b)に示すように、let<Va の範囲で11′信
号を出力し、at<Vdの範囲で10′信号を出力する
。第6図(a)、(b)において右半分には電圧Vdの
値が比較的大きい場合、すなわち電圧aが比較的低い位
相点付近の様子が示され、右半分にはその反対に電圧V
dが比較的低く、したがって電圧1が比較的高い位相点
付近の様子が示されている。コーン・ぞレータ四の出力
信号に対応して直列トランジスタ4がオン制御される。
The triangular wave generating circuit 21 generates a sawtooth wave voltage St shown in FIG. 6(a). This voltage St is synchronized with the voltage a and oscillates at a frequency equal to the switching frequency of the series transistor 4, for example, 50 KHz, and its maximum value is set to match the value of the voltage Vd when the duty ratio is 100 or more. be done. This voltage 8t is inputted to the router n as a reference voltage. As shown in FIG. 6(b), the converter n outputs a 11' signal in the range let<Va, and outputs a 10' signal in the range at<Vd. In FIGS. 6(a) and 6(b), the right half shows the situation when the value of the voltage Vd is relatively large, that is, near the phase point where the voltage a is relatively low, and the right half shows the situation where the voltage Vd is relatively low.
The situation near the phase point where d is relatively low and therefore the voltage 1 is relatively high is shown. The series transistor 4 is controlled to be turned on in response to the output signal of the cone/regulator 4.

第6図(c)は、このようにしてスイッチング制御され
た時の直列トランジスタ4の出力電圧を示すもので、左
半分では、電圧は比較的低いが、オン時間幅はコンル−
タnの出力に対応して比較的広く、右半分では、電圧は
比較的高いが、オン時間幅は比較的狭くなっていること
が判る。
FIG. 6(c) shows the output voltage of the series transistor 4 when switching is controlled in this way. In the left half, the voltage is relatively low, but the on-time width is
It can be seen that in the right half, the voltage is relatively high, but the on-time width is relatively narrow.

ここで重要なことは、第6図(C)からも認められるよ
うに、電圧の高低にかかわらず各スイッチングサイクル
のオン区間の面積、すなわち電圧時間積がほぼもしくけ
全く等しくなっていることである。これは、交流電源電
圧の零点付近を除いて、デユーティ比Dr f電圧1に
反比例する形で求めたことに対応している。この事実に
より、整流器直後の平滑コンデンサを省略しても、スイ
ッチング後の平滑が容易になり、平滑回路5の平滑能力
を特に増大させることなしに済ますことができる。
What is important here is that, as can be seen from Figure 6 (C), the area of the on section of each switching cycle, that is, the voltage-time product, is almost exactly the same regardless of the voltage level. be. This corresponds to finding the duty ratio Dr f in inverse proportion to the voltage 1, except for the vicinity of the zero point of the AC power supply voltage. Due to this fact, even if the smoothing capacitor immediately after the rectifier is omitted, smoothing after switching becomes easy, and the smoothing ability of the smoothing circuit 5 can be avoided without particularly increasing.

〔発明の変形例〕[Modified example of the invention]

第7図は第5図に対する他の実施例を示すものである。 FIG. 7 shows an alternative embodiment to FIG. 5.

この実施例は、各スイッチングサイ炙ルのデユーティ比
を、制御信号発生回路5から入力される同期信号、周波
数信号、および電圧信号と、内部メ毫りに予め記憶され
ているデユーティ比発生パターン(例えば、前述のごと
く、デユーティ比を入力電圧に反比例する形とするか、
言い換えれば、第6図(C)の各出力電圧波形面積を入
力電圧の値いかんにかかわらずはぼ一定にするかどうか
れをアナロ!値で出力する構成となっている。上述の同
期信号、周波数信号および電圧信号は、整の出力信号と
、電圧V@(第4図参照)とに基づいてノルス発振回路
nが、コンパレータ四の出力信号と同様の出力信号を出
す。
In this embodiment, the duty ratio of each switching cycle is determined based on the synchronization signal, frequency signal, and voltage signal input from the control signal generation circuit 5, and the duty ratio generation pattern ( For example, as mentioned above, the duty ratio should be inversely proportional to the input voltage, or
In other words, whether or not the area of each output voltage waveform in FIG. 6(C) should be kept approximately constant regardless of the value of the input voltage is an analog test! It is configured to output as a value. Based on the above-mentioned synchronization signal, frequency signal and voltage signal, the Norse oscillation circuit n outputs an output signal similar to the output signal of the comparator 4 based on the output signal of the integer and the voltage V@ (see FIG. 4).

この実施例は、途中の信号処理方法が多少違うだけで、
結果として第5図のものと同一の制御結果1得ることが
できることは明らかである。
In this example, the only difference is in the signal processing method in the middle.
It is clear that the same control result 1 as that shown in FIG. 5 can be obtained as a result.

なお、以上の説明は単相全波整流方式の場合について行
ったが、本発明は他の整流回路方式にも適用できること
はもちろんであり、特に相数が多くなればリップル分が
減少するので望ましいことである。
Although the above explanation has been made for the case of a single-phase full-wave rectification system, the present invention can of course be applied to other rectifier circuit systems, and is particularly desirable as the number of phases increases because the ripple component decreases. That's true.

〔発明の効果] 以上述べたように本発明は、整流器と直列トランジスタ
との間の平滑コンデンサを省略すると共に、直列トラン
ジスタの各スイッチングサイクル内のデユーティ比が交
流電圧の各半サイクル内で整流器の出力電圧瞬時値の大
小と逆の関係になるように直列トランジスタをスイッチ
ング制御するようにしたので、最終出力に大して支障を
来たすことなく、電源側コンデンサの省略による回路構
成の簡素化および低コスト化を達成し、実装密度の高い
スイッチングレイユレータを提供することができる。
[Effects of the Invention] As described above, the present invention eliminates the smoothing capacitor between the rectifier and the series transistor, and also allows the duty ratio of the series transistor within each switching cycle to be equal to or smaller than that of the rectifier within each half cycle of the AC voltage. Switching of the series transistors is controlled so that the relationship is inverse to the magnitude of the instantaneous output voltage value, so there is no major problem with the final output, and the circuit configuration is simplified and costs are reduced by omitting the power supply side capacitor. This makes it possible to provide a switching layer with high packaging density.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のスイッチングレイユレータの回路図、第
2図はデユーティ比の説明図、第3図は本発明のスイッ
チングレイユレータの回路図、第4図は本発明によるデ
ユーティ比の設定例を示す線図、第5図は第4図のデユ
ーティ比に従ってスイツチン、ダAルスを発生する回路
のブロック図、第6図(a)、(b)、 (a)は第5
図の回路の動作を説明するための信号波形図、第7図は
第5図の回路に対する他の実施例を示すブロック図であ
る。 2・・・整流器、4・・・直列トランジスタ、5・・・
平滑回路、11・・・スイッチング制御回路。 出願人代理人   猪 股    清 、:
Fig. 1 is a circuit diagram of a conventional switching regulator, Fig. 2 is an explanatory diagram of a duty ratio, Fig. 3 is a circuit diagram of a switching regulator of the present invention, and Fig. 4 is an example of setting a duty ratio according to the present invention. FIG. 5 is a block diagram of a circuit that generates switch pulses and pulses according to the duty ratio shown in FIG. 4, and FIGS.
A signal waveform diagram is used to explain the operation of the circuit shown in the figure, and FIG. 7 is a block diagram showing another embodiment of the circuit shown in FIG. 2... Rectifier, 4... Series transistor, 5...
Smoothing circuit, 11... switching control circuit. Applicant's agent Kiyoshi Inomata:

Claims (1)

【特許請求の範囲】 1、交流電圧を整流する整流器と、この整流器の出力側
に、平滑;ンデンサを介することなく、直接接続された
直列トランジスタと、このトランジスタの出力側と直流
負荷との間に接続された平滑回路と、前記直列トランジ
スタの各スイッチングサイクル内のデミ−ティ比が前記
交流電圧の各半サイクル内で前記整流器の出力電圧瞬時
値の大小と逆の関係になるように前記直列トランジスタ
をスイッチング制御するスイッチング制御回路とを備え
て成るスイッチングレギュレータ。 2、前記スイッチング制御同時は、前記直列トランジス
タのスイッチング周波数に対応する周期で繰返す三角波
を発生する三角波発生回路と、前記整流器の出力電圧瞬
時値の高低に応じて所定の・譬ターンで前記高低とは逆
の関係で変化する比較電圧を出力するデユーティ比演算
回路と、前記三角波と前記比較電圧との比較結果に基づ
いて前記直列トランジスタのスイッチング制御信号を出
力するコンノセレータとを含んでいることを特徴とする
特許請求の範囲第1項記載のスイッチングレーユレータ
。 36  前記スイッチング制御回路は、前記整流器の出
力電圧の周波数を表わす周波数信号および電圧値を表わ
す電圧信号を出力する制御信号発生回路と、前記周波数
信号および前記電圧信号ならびに予め記憶されている前
記整流器出力電圧瞬時値対デユーティ比ノターンに従っ
てスイッチングパルスを出力する回路と、前記スイッチ
ングパルスに基づいて前記直列トランジスタのスイッチ
ング制御信号を出力するパルス発振回路とを含んでいる
ことを特徴とする特許請求の範囲第1項記載のスイッチ
ングレーユレータ。
[Claims] 1. A rectifier that rectifies AC voltage, a series transistor directly connected to the output side of the rectifier without using a smoothing capacitor, and between the output side of this transistor and a DC load. and a smoothing circuit connected to the series transistors such that the demitty ratio within each switching cycle of the series transistors is inversely related to the magnitude of the instantaneous value of the output voltage of the rectifier within each half cycle of the alternating current voltage. A switching regulator comprising a switching control circuit that controls switching of transistors. 2. The simultaneous switching control includes a triangular wave generation circuit that generates a triangular wave that repeats at a period corresponding to the switching frequency of the series transistor, and a triangular wave generation circuit that generates a triangular wave that repeats at a cycle corresponding to the switching frequency of the series transistor, and a triangular wave generating circuit that generates a triangular wave that repeats at a cycle corresponding to the switching frequency of the series transistor, and a triangular wave generating circuit that generates a triangular wave that repeats at a cycle corresponding to the switching frequency of the series transistor, and a triangular wave generating circuit that generates a triangular wave that repeats at a cycle corresponding to the switching frequency of the series transistor. is characterized in that it includes a duty ratio calculation circuit that outputs a comparison voltage that changes in an inverse relationship, and a connocerator that outputs a switching control signal for the series transistor based on a comparison result between the triangular wave and the comparison voltage. A switching layer generator according to claim 1. 36 The switching control circuit includes a control signal generation circuit that outputs a frequency signal representing the frequency of the output voltage of the rectifier and a voltage signal representing the voltage value, and a control signal generating circuit that outputs a frequency signal representing the frequency of the output voltage of the rectifier and a voltage signal representing the voltage value, and a control signal generating circuit that outputs the frequency signal, the voltage signal, and the rectifier output stored in advance. Claim 1, characterized in that it includes a circuit that outputs a switching pulse according to an instantaneous voltage value vs. duty ratio curve, and a pulse oscillation circuit that outputs a switching control signal for the series transistor based on the switching pulse. The switching layer generator described in item 1.
JP17419381A 1981-10-30 1981-10-30 Switching regulator Pending JPS5875472A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17419381A JPS5875472A (en) 1981-10-30 1981-10-30 Switching regulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17419381A JPS5875472A (en) 1981-10-30 1981-10-30 Switching regulator

Publications (1)

Publication Number Publication Date
JPS5875472A true JPS5875472A (en) 1983-05-07

Family

ID=15974347

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17419381A Pending JPS5875472A (en) 1981-10-30 1981-10-30 Switching regulator

Country Status (1)

Country Link
JP (1) JPS5875472A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60190163A (en) * 1984-03-09 1985-09-27 Matsushita Electric Ind Co Ltd Power source
JPS60194754A (en) * 1984-03-12 1985-10-03 Matsushita Electric Ind Co Ltd Power source
JPH05300734A (en) * 1992-04-18 1993-11-12 Nippon Purotekutaa:Kk Switching regulator
JPH0974764A (en) * 1995-09-08 1997-03-18 Nishishiba Electric Co Ltd Chopper device
JP2012182231A (en) * 2011-02-28 2012-09-20 Tdk Corp Led lighting device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60190163A (en) * 1984-03-09 1985-09-27 Matsushita Electric Ind Co Ltd Power source
JPS60194754A (en) * 1984-03-12 1985-10-03 Matsushita Electric Ind Co Ltd Power source
JPH05300734A (en) * 1992-04-18 1993-11-12 Nippon Purotekutaa:Kk Switching regulator
JPH0974764A (en) * 1995-09-08 1997-03-18 Nishishiba Electric Co Ltd Chopper device
JP2012182231A (en) * 2011-02-28 2012-09-20 Tdk Corp Led lighting device

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