JP3462080B2 - High frequency semiconductor element storage package - Google Patents

High frequency semiconductor element storage package

Info

Publication number
JP3462080B2
JP3462080B2 JP11115298A JP11115298A JP3462080B2 JP 3462080 B2 JP3462080 B2 JP 3462080B2 JP 11115298 A JP11115298 A JP 11115298A JP 11115298 A JP11115298 A JP 11115298A JP 3462080 B2 JP3462080 B2 JP 3462080B2
Authority
JP
Japan
Prior art keywords
line conductor
conductor
semiconductor element
input
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP11115298A
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Japanese (ja)
Other versions
JPH11307666A (en
Inventor
覚 冨江
滋生 森岡
清孝 横井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
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Priority to JP11115298A priority Critical patent/JP3462080B2/en
Publication of JPH11307666A publication Critical patent/JPH11307666A/en
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Publication of JP3462080B2 publication Critical patent/JP3462080B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Waveguides (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明はマイクロ波帯やミリ
波帯等の高周波用半導体素子収納用パッケージに関し、
詳しくは高周波信号の入出力特性の優れた高周波用半導
体素子収納用パッケージに関する。 【0002】 【従来の技術】従来より、マイクロ波帯やミリ波帯等の
高周波信号を用いる高周波用半導体素子等を気密封止し
て収容する高周波用半導体素子収納用パッケージとし
て、フラットパッケージと呼ばれるタイプのものがあ
る。これは、上面に高周波用半導体素子を搭載する搭載
部を有し、その入出力信号である高周波信号を伝送する
マイクロストリップ線路等の伝送線路が形成された誘電
体基板と、誘電体基板上に搭載部を囲むように接合さ
れ、誘電体基板との間に伝送線路の一部を挟んでフィー
ドスルー部を形成する誘電体枠体とを備えている。そし
て、外部電気回路との電気的な接続は、伝送線路をフィ
ードスルー部を介して誘電体枠体の外側に引き出した部
位にリード端子を取着してそのリード端子を半田付けし
たり、その部位に直接にワイヤボンディングすることに
よって行なわれる。 【0003】また、これに対して製造コストの低減を狙
ったタイプのパッケージとして、表面実装型パッケージ
がある。従来の表面実装型の高周波用半導体素子収納用
パッケージの例を図4に示す。図4(a)は分解斜視図
であり、(b)はその誘電体基板の下面側から見た斜視
図である。 【0004】図4において、1は誘電体基板、2は誘電
体枠体、3は高周波用半導体素子である。誘電体基板1
は上面に高周波用半導体素子3を搭載するための搭載部
1aを有しており、また、搭載部1a近傍から外周にか
けて高周波信号伝送用の線路導体4および接地用配線導
体5が配設されている。これら線路導体4および接地用
配線導体5は、誘電体基板1内に形成された貫通導体あ
るいは側面に形成されたキャスタレーションと呼ばれる
側面導体層6および接地用側面導体層7を介して誘電体
基板1の下面に引き回され、誘電体基板1の下面に形成
された接続用電極8および接地接続用電極9に接続され
ている。 【0005】誘電体枠体2はその中央部に誘電体基板1
の搭載部1aを囲繞するように貫通穴が形成された枠状
の部材であり、搭載部1aを囲繞するとともに誘電体基
板1との間に線路導体4および接地用配線導体5の一部
を挟むように誘電体基板1の上面に取着される。 【0006】搭載部1aに搭載された高周波用半導体素
子3は、裏面で接地用配線導体5に電気的に接続される
とともに表面の電極と線路導体4とがボンディングワイ
ヤ10を介して電気的に接続され、必要に応じて蓋体を取
着し、あるいは樹脂封止することにより内部に気密に収
容される。そして、このパッケージを外部電気回路に表
面実装するとともに、誘電体基板1の下面の接続用電極
8および接地接続用電極9をこれら電極8・9に取着さ
れたリード端子を介して、あるいはリードレスの形態に
より外部電気回路の配線導体と電気的に接続することに
より、高周波用半導体素子3と外部電気回路とが接続さ
れて高周波信号の入出力が行なわれ、半導体装置として
使用されることとなる。 【0007】 【発明が解決しようとする課題】しかしながら、上記の
ような従来の高周波用半導体素子収納用パッケージのう
ちフラットパッケージタイプのものは、高周波信号の伝
送特性には優れているが、パッケージ本体に対して予め
リード端子を取着することが必要であり、あるいは外部
電気回路への実装時にワイヤボンディングが必要である
ことから、小型化が困難であり、実装コストがかかるた
め安価な半導体装置とすることが困難である等の問題点
があった。 【0008】また、このフラットパッケージタイプのも
のは、伝送線路にリード端子をろう付け等により取着し
たり、実装時にワイヤボンディングによる接続を行なっ
たりするため、製造工程上のばらつき等による高周波特
性のばらつきへの影響が大きいという問題点もあった。 【0009】一方、表面実装型パッケージにおいては、
実装コストの低減は図ることができるものの、線路導体
4を誘電体基板1の上面から側面導体層6あるいは貫通
導体を介して誘電体基板1下面の接続用電極8にまで引
き回しており、線路導体4が途中で屈曲した形状(段差
形状)となっているため、高周波用半導体素子3を作動
させる際に高周波信号の伝送において反射損失等の伝送
損失が増大することとなり、特に信号の周波数が高くな
るほど高周波特性が著しく低下してしまうという問題点
があった。 【0010】本発明は上記問題点に鑑みて案出されたも
のであり、その目的は、外部電気回路に対して表面実装
が可能で小型化を図ることでき、しかも高周波信号の伝
送において反射損失を低減させて優れた高周波特性を有
する高周波用半導体素子収納用パッケージを提供するこ
とにある。 【0011】 【課題を解決するための手段】本発明の高周波用半導体
素子収納用パッケージは、上面に高周波用半導体素子を
搭載する搭載部を有し、この搭載部近傍から外周にかけ
て高周波信号伝送用の線路導体が配設された誘電体基板
と、この誘電体基板上に取着され、前記搭載部を囲繞す
るとともに前記線路導体の延長方向に前記誘電体基板の
外周から突出する部位を有する誘電体枠体と、この誘電
体枠体の下面に前記突出する部位から前記線路導体と対
向する部位にかけて形成され、前記線路導体と外部電気
回路の配線導体とに当接されて前記線路導体を前記外部
電気回路に電気的に接続する入出力用線路導体とを具備
して成り、前記線路導体の線路幅を前記搭載部近傍から
前記入出力用線路導体との当接部に向けて狭くし、前記
入出力用線路導体の線路幅を前記線路導体との当接部に
おいて前記線路導体の線路幅より狭くするとともに前記
突出する部位に向けて広くしたことを特徴とするもので
ある。 【0012】本発明の高周波用半導体素子収納用パッケ
ージによれば、誘電体基板の上面に配設された高周波信
号伝送用の線路導体に誘電体枠体の下面に形成された入
出力用線路導体を当接させ、この入出力用線路導体を外
部電気回路の配線導体に当接させて線路導体と配線導体
とを電気的に接続するようにしたことから、線路導体か
ら外部電気回路の配線導体までがほぼ同一平面上に配置
されることとなり、高周波信号伝送用の信号配線を途中
で屈曲したり段差を形成したりすることなく接続するこ
とができ、高い周波数の信号に対しても反射損失等の伝
送損失を低減することができるので、優れた高周波特性
を有するものとなる。 【0013】また、誘電体基板上面の線路導体と誘電体
枠体下面の入出力用線路導体との当接部において、線路
導体の線路幅を搭載部近傍から当接部に向けて狭くし、
入出力用線路導体の線路幅を当接部において線路導体の
線路幅より狭くするとともに誘電体枠体が誘電体基板か
ら突出する部位に向けて広くしたことから、線路導体と
入出力用線路導体とを当接部において特性インピーダン
スの整合をとりつつ接続することができ、しかも、製造
工程上のばらつきによって当接部に多少の位置ずれが生
じた場合であっても段差状のような急激な線路幅の変化
が生じ難く高周波信号の反射損失等の伝送損失が生じ難
いため、優れた高周波特性を有する高周波用半導体素子
収納用パッケージとなる。 【0014】 【発明の実施の形態】以下、本発明を図面に基づき説明
する。図1は本発明の高周波用半導体素子収納用パッケ
ージの実施の形態の一例を示すものであり、同図(a)
は分解斜視図、(b)はその誘電体枠体の下面側から見
た斜視図である。 【0015】図1において、11は誘電体基板、12は誘電
体枠体、13は高周波用半導体素子である。誘電体基板11
は上面に高周波用半導体素子13を搭載するための搭載部
11aを有しており、また、搭載部11a近傍から外周にか
けて高周波信号伝送用の線路導体14および接地用配線導
体15が配設されている。 【0016】誘電体枠体12はその中央部に誘電体基板11
の搭載部11aを囲繞するように貫通穴が形成された枠状
の部材であり、搭載部11aを囲繞するとともに線路導体
14の延長方向に誘電体基板11の外周から突出する部位12
aを有しており、誘電体基板11との間に線路導体14およ
び接地用配線導体15の一部を挟むように誘電体基板11の
上面に取着される。 【0017】このような構成の高周波用半導体素子収納
用パッケージとしては、高周波用半導体素子13として例
えば個別半導体素子である高周波用FETやHEMT、
あるいは高周波用集積回路やMMIC等を搭載し収容す
るもの等がある。図1では、高周波用半導体素子13とし
てHEMTを搭載するローノイズパッケージに適用した
例を示している。 【0018】ここで、誘電体枠体12の下面には、突出す
る部位12aから誘電体基板11上面の線路導体14と対向す
る部位にかけて入出力用線路導体16が形成されている。
この入出力用線路導体16は、誘電体基板11上に誘電体枠
体12を取着することにより線路導体14とその対向する部
位同士が当接されて電気的に接続され、突出する部位12
aに位置する部位を、外部電気回路基板(図示せず)表
面実装してその配線導体に当接させて直接接続させるこ
とにより線路導体14を外部電気回路に電気的に接続する
ものである。 【0019】そして、線路導体14と入出力用線路導体16
とは、その線路幅を、線路導体14は搭載部11a近傍から
入出力用線路導体16との当接部14aに向けて狭くし、一
方、入出力用線路導体16は線路導体14との当接部16aに
おいて線路導体14の線路幅より狭くするとともに突出す
る部位12aに向けて広くして形成されている。 【0020】このように線路導体14および入出力用線路
導体16の線路幅を所定の関係に設定したことにより、誘
電体基板11と誘電体枠体12とに挟持される当接部14a・
16aにおける線路導体14および入出力用線路導体16の線
路幅をその前後の線路幅より狭くすることによって高周
波信号に対する特性インピーダンスの整合を行なうこと
ができて伝送損失を低減することができるとともに、当
接部14a・16aにおいて線路導体14または入出力用線路
導体16に位置ずれが生じても同じ線路幅同士の線路導体
を接合する場合のようにずれによって段差のような線路
幅が急激に変化する箇所が発生することを防止すること
ができるので、高周波信号の反射損失の発生を効果的に
防止することができ、その結果、優れた高周波特性を有
する信号入出力部を備えた表面実装型の高周波用半導体
素子収納用パッケージとなる。 【0021】本発明の高周波用半導体素子収納用パッケ
ージにおけるこのような線路導体14と入出力用線路導体
16との当接部14a・16aの様子について、図2に示す平
面図に基づいて説明する。 【0022】図2(a)〜(c)はそれぞれ線路導体14
と入出力用線路導体16との当接部14a・16aを示す要部
平面図である。いずれも誘電体枠体12側から誘電体基板
11上面を見たときの線路導体14と入出力用線路導体16と
の当接部14a・16a付近の様子を示しており、図中の左
側が誘電体基板11の搭載部11aの方向に、右側が誘電体
枠体12の突出する部位12aの方向に相当する。 【0023】まず、図2(a)は線路導体14と入出力用
線路導体16とが正常に当接された状態を示している。こ
の図からも分かるように、線路導体14の線路幅は搭載部
11a近傍から入出力用線路導体16との当接部14aに向け
て狭くし、一方、入出力用線路導体16の線路幅は線路導
体14との当接部16aにおいて線路導体14の線路幅より狭
くするとともに突出する部位12aに向けて広くして形成
されており、この例では各線路導体14・16の線路幅を当
接部14a・16aに向けてテーパー形状に変化させて狭く
している。このような線路導体14・16を当接させること
により、接続部における線路幅の急激な変化がなくなっ
て高周波信号の反射損失の発生を防止できるとともに、
この線路幅の変化の設定を仕様に応じて適宜調整するこ
とによって線路導体14と入出力用線路導体16との接続に
おける特性インピーダンスの整合をとることもでき、高
周波特性に優れた信号入出力部を構成することができる
ものとなる。 【0024】次に、図2(b)は線路導体14に対して入
出力用線路導体16が線路幅方向に同図中で上方にずれた
場合の様子を示している。また、図2(c)は線路導体
14に対して入出力用線路導体16が線路幅方向に同図中で
下方に、かつ線路長方向に同図中で右方にずれた場合の
様子を示している。このように、本発明の高周波用半導
体素子収納用パッケージにおいては線路導体14と入出力
用線路導体16との当接部14a・16aにおいては線路幅の
急激な変化は生じないこととなり、高周波信号の反射損
失の発生等を防止することができることが分かる。 【0025】線路導体14および入出力用線路導体16の線
路幅をそれぞれ当接部14a・16aに向けて狭くする場合
の形状や寸法の設定については、当接部14a・16aの位
置ずれによる高周波特性のばらつきを緩和させるような
ものであれば特に限定されるものではないが、線路導体
14および入出力用線路導体16の各部位の特性インピーダ
ンスが概ね整合される線路幅を有し、製造上のずれが生
じたとしてもそれらの線路幅に急激な幅の変動が出ない
ように、当接部14a・16aにテーパー形状等を採用して
設計される。 【0026】なお、図1に示した例では、接地用配線導
体15に対しても同様に、誘電体枠体12の下面に突出する
部位12aから接地用配線導体15と対向する部位にかけて
外部電気回路の接地用配線導体との接続のための接地接
続用配線導体17を形成しているが、このように接地用配
線導体15に対しても線路導体14と同様の構成を採用する
ことにより、外部電気回路へ表面実装した場合に接地用
配線導体15についても屈曲や段差のない接続を行なうこ
とができ、その結果極めて良好な高周波特性を有する高
周波用半導体素子収納用パッケージとすることができ
る。 【0027】また、この例では接地接続用配線導体17の
形状は入出力用線路導体16のように線路幅を変化させて
いないが、接地の接続については接地用配線導体15の幅
に対して位置ずれを見込んで接地接続用配線導体17の幅
を設定しておけば特に問題はない。なお、接地用配線導
体15と接地接続用配線導体17とについても線路導体14と
入出力用線路導体16と同様に線路幅を変化させた構成と
してもよいことは言うまでもない。 【0028】そして、このような構成の本発明の高周波
用半導体素子収納用パッケージに対し、搭載部11aに搭
載された高周波用半導体素子13は、例えば裏面で接地用
配線導体15に電気的に接続されるとともに表面の電極と
線路導体14とがボンディングワイヤ18やボンディングリ
ボン等を介して電気的に接続され、必要に応じて誘電体
枠体12の上面にFe−Ni−CoやFe−Ni42アロイ
等のFe−Ni合金・無酸素銅・アルミニウム・ステン
レス・Cu−W合金・Cu−Mo合金などから成る蓋体
をハンダ・AuSnロウやAuGeロウ等の高融点金属
ロウ・シームウェルド(溶接)等により取着し、あるい
は樹脂封止することにより内部に気密に収容される。 【0029】そして、例えば図3に斜視図で示すよう
に、外部電気回路19に形成された、この高周波用半導体
素子収納用パッケージの誘電体基板11が落とし込まれる
とともに誘電体枠体12の突出する部位12aの下面が上面
に当接するように設計された実装用穴20に装着して、こ
のパッケージを外部電気回路19に表面実装するととも
に、誘電体枠体12の突出する部位12aの下面に位置する
入出力用線路導体16および接地接続用配線導体17をそれ
ぞれ外部電気回路19の高周波信号伝送用の配線導体21お
よび接地用配線導体22に当接させて電気的に接続するこ
とにより、高周波用半導体素子13と外部電気回路19とが
電気的に接続されて高周波信号の入出力が行なわれ、製
品としての高周波用半導体装置として使用されることと
なる。 【0030】本発明の高周波用半導体素子収納用パッケ
ージにおいて、誘電体基板11および誘電体枠体12として
は、例えばアルミナやムライト等のセラミックス材料、
いわゆるガラセラ(ガラス+セラミックス)、あるいは
テフロン(PTFE)・ガラスエポキシ・ポリイミド等
の樹脂系材料などが用いられる。 【0031】なお、誘電体枠体12には誘電体基板11と同
じ材料を用いればよいが、所望の高周波特性を得るため
に異なる材料を用いてもよい。例えば、誘電体基板11の
誘電率よりも誘電体枠体12の誘電率を小さく設定すれ
ば、当接部14a・16aの誘電体損失を小さくすることも
可能となる。 【0032】線路導体14および入出力用線路導体16、接
地用配線導体15、接地接続用配線導体17は、高周波線路
導体用の金属材料、例えばCuやMoMn+Ni+A
u、W+Ni+Au、Cr+Cu、Cr+Cu+Ni+
Au、Ta2 N+NiCr+Au、Ti+Pd+Au、
NiCr+Pd+Auなどを用いて厚膜印刷法あるいは
各種の薄膜形成方法やメッキ処理法などにより形成さ
れ、その厚みや幅は伝送される高周波信号の周波数や特
性インピーダンスなどに応じて設定される。 【0033】 【実施例】以下、本発明の具体例を示す。誘電体材料と
してε=9のアルミナを用い、誘電体枠体12の厚みを0.
38mm、誘電体基板11の厚みを0.25mm、誘電体枠体12
に形成された入出力用線路導体16の線路幅を0.4 mm、
誘電体基板11に形成された線路導体14の線路幅を0.25m
mとし、入出力用線路導体16と線路導体14との当接長さ
を約0.4 mmとなるように設定した。 【0034】入出力用線路導体16は当接部16aにおいて
0.4 mm幅からテーパーが施されており、一方、線路導
体14は当接部14aにおいて0.25mmストレート幅で形成
されており、これらが当接する設計とした。なお、これ
らの線路導体は特性インピーダンスが約50Ωになるよう
に設計した。 【0035】このような設定で図1に示した本発明の高
周波用半導体素子収納用パッケージを作製して高周波信
号の伝送特性を評価したところ、線路導体に屈曲部を有
する従来の高周波用半導体素子収納用パッケージに比べ
て高周波信号の反射損失を極めて低く抑えることがで
き、優れた高周波特性を有するパッケージであることが
確認できた。 【0036】なお、本発明は以下の例に限定されるもの
ではなく、本発明の要旨を逸脱しない範囲で変更・改良
を施すことは何ら差し支えない。 【0037】例えば、図1に示した例では誘電体枠体12
を四角形状としてその四隅に誘電体基板11の外周から突
出する部位12aを設け、それぞれに1つずつの入出力用
線路導体16または接地接続用配線導体17を形成したが、
必要に応じて誘電体枠体12を他の種々の形状として突出
する部位12aをより多く設けたり、各突出する部位12a
に入出力用線路導体16または接地接続用配線導体17を複
数形成してもよい。 【0038】また、所望の実装形態に応じて、突出する
部位12aに厚みの薄いリード端子を取り付けた構造とし
てもよい。 【0039】 【発明の効果】本発明の高周波用半導体素子収納用パッ
ケージによれば、誘電体枠体の下面に形成された入出力
用線路導体を誘電体基板の上面に配設された高周波信号
伝送用の線路導体と外部電気回路の配線導体とに当接さ
せて線路導体と配線導体とを電気的に接続するようにし
たことから、線路導体から配線導体までがほぼ同一平面
上に配置されることとなって高周波信号伝送用の信号配
線を途中で屈曲したり段差を形成したりすることなく接
続することができ、高い周波数の信号に対しても反射損
失等の伝送損失を低減することができるので、優れた高
周波特性を有する高周波用半導体素子収納用パッケージ
となる。 【0040】また、線路導体と入出力用線路導体との当
接部において、線路導体の線路幅を搭載部近傍から当接
部に向けて狭くし、入出力用線路導体の線路幅を当接部
において線路導体の線路幅より狭くするとともに誘電体
枠体が誘電体基板から突出する部位に向けて広くしたこ
とから、線路導体と入出力用線路導体とを当接部におい
て特性インピーダンスの整合をとりつつ接続することが
でき、しかも、製造工程上のばらつきによって当接部に
多少の位置ずれが生じた場合であっても段差状のような
急激な線路幅の変化が生じ難く高周波信号の反射損失等
の伝送損失が生じ難いため、優れた高周波特性を有する
高周波用半導体素子収納用パッケージとなる。 【0041】しかも、本発明の高周波用半導体素子収納
用パッケージによれば、従来の表面実装型パッケージに
比べて線路導体の配線構造が簡略化されており、製造が
容易で小型化にも対応可能なものであって、低コストで
安価な高周波用半導体装置を実現することができる。 【0042】以上により、本発明によれば、外部電気回
路に対して表面実装が可能で小型化を図ることでき、し
かも高周波信号の伝送において反射損失を低減させて優
れた高周波特性を有する高周波用半導体素子収納用パッ
ケージを提供することができた。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a package for accommodating high-frequency semiconductor devices such as a microwave band and a millimeter wave band.
More specifically, the present invention relates to a package for housing a high-frequency semiconductor element having excellent high-frequency signal input / output characteristics. 2. Description of the Related Art Hitherto, a high-frequency semiconductor element housing package for hermetically sealing and housing a high-frequency semiconductor element using a high-frequency signal in a microwave band or a millimeter wave band is called a flat package. There are types. This has a mounting portion for mounting a high-frequency semiconductor element on the upper surface, and a dielectric substrate on which a transmission line such as a microstrip line for transmitting a high-frequency signal as an input / output signal is formed, and on a dielectric substrate. A dielectric frame which is joined to surround the mounting portion and forms a feed-through portion with a part of the transmission line interposed between the dielectric frame and the dielectric substrate. Then, for electrical connection with an external electric circuit, a lead terminal is attached to a portion where the transmission line is drawn out of the dielectric frame via a feed-through portion, and the lead terminal is soldered or This is performed by wire bonding directly to the site. [0003] On the other hand, there is a surface mount type package as a type of package aimed at reducing the manufacturing cost. FIG. 4 shows an example of a conventional surface mount type high frequency semiconductor element storage package. FIG. 4A is an exploded perspective view, and FIG. 4B is a perspective view seen from the lower surface side of the dielectric substrate. In FIG. 4, reference numeral 1 denotes a dielectric substrate, 2 denotes a dielectric frame, and 3 denotes a high-frequency semiconductor element. Dielectric substrate 1
Has a mounting portion 1a for mounting the high-frequency semiconductor element 3 on the upper surface, and a line conductor 4 for transmitting a high-frequency signal and a grounding wiring conductor 5 are arranged from the vicinity of the mounting portion 1a to the outer periphery. I have. The line conductor 4 and the grounding wiring conductor 5 are connected to each other through a through conductor formed in the dielectric substrate 1 or a side conductor layer 6 called a castellation formed on the side surface and a ground side conductor layer 7. 1 is connected to the connection electrode 8 and the ground connection electrode 9 formed on the lower surface of the dielectric substrate 1. The dielectric frame 2 has a dielectric substrate 1
Is a frame-like member having a through-hole formed so as to surround the mounting portion 1a. The line conductor 4 and a part of the grounding wiring conductor 5 surround the mounting portion 1a and the dielectric substrate 1. It is attached to the upper surface of the dielectric substrate 1 so as to sandwich it. The high-frequency semiconductor element 3 mounted on the mounting portion 1a is electrically connected to the grounding wiring conductor 5 on the back surface, and the electrode on the front surface and the line conductor 4 are electrically connected via the bonding wire 10. They are connected and, if necessary, are hermetically accommodated inside by attaching a lid or sealing with a resin. Then, the package is surface-mounted on an external electric circuit, and the connection electrode 8 and the ground connection electrode 9 on the lower surface of the dielectric substrate 1 are connected via lead terminals attached to these electrodes 8.9, By being electrically connected to the wiring conductor of the external electric circuit in the form of an electronic circuit, the high-frequency semiconductor element 3 and the external electric circuit are connected to perform input and output of a high-frequency signal, thereby being used as a semiconductor device. Become. [0007] However, among the above-mentioned conventional high-frequency semiconductor element storage packages, the flat package type package has excellent transmission characteristics of high-frequency signals, but the package body is not suitable. It is necessary to attach lead terminals in advance, or wire bonding is required at the time of mounting to an external electric circuit, so it is difficult to reduce the size, and the mounting cost is high. There is a problem that it is difficult to do so. Further, in this flat package type, since the lead terminals are attached to the transmission line by brazing or the like, and the connection is performed by wire bonding at the time of mounting, the high frequency characteristics due to variations in the manufacturing process and the like are reduced. There is also a problem that the influence on the variation is large. On the other hand, in a surface mount type package,
Although the mounting cost can be reduced, the line conductor 4 is routed from the upper surface of the dielectric substrate 1 to the connection electrode 8 on the lower surface of the dielectric substrate 1 via the side conductor layer 6 or the through conductor. 4 has a bent shape (stepped shape) in the middle, so that when the high-frequency semiconductor element 3 is operated, transmission loss such as reflection loss in transmission of a high-frequency signal increases, and particularly, the frequency of the signal becomes high. There has been a problem that the high-frequency characteristics are remarkably deteriorated. SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to be able to be surface-mounted on an external electric circuit so as to reduce its size, and to further reduce reflection loss in transmitting a high-frequency signal. An object of the present invention is to provide a high-frequency semiconductor element storage package having excellent high-frequency characteristics by reducing the frequency. The high-frequency semiconductor element housing package of the present invention has a mounting portion for mounting the high-frequency semiconductor element on an upper surface thereof, and a high-frequency signal transmission package from the vicinity of the mounting portion to the outer periphery. A dielectric substrate on which the line conductor is disposed, and a dielectric member mounted on the dielectric substrate, surrounding the mounting portion, and having a portion protruding from an outer periphery of the dielectric substrate in an extending direction of the line conductor. A body frame and a portion formed on the lower surface of the dielectric frame from the projecting portion to a portion facing the line conductor, abutting on the line conductor and a wiring conductor of an external electric circuit to form the line conductor. An input / output line conductor electrically connected to an external electric circuit, and the line width of the line conductor is reduced from near the mounting portion toward a contact portion with the input / output line conductor, Said entry and exit The line width of the force line conductor is narrower than the line width of the line conductor at a contact portion with the line conductor and widened toward the projecting portion. According to the high frequency semiconductor element storage package of the present invention, the input / output line conductor formed on the lower surface of the dielectric frame is connected to the line conductor for high frequency signal transmission disposed on the upper surface of the dielectric substrate. And the input / output line conductor is brought into contact with the wiring conductor of the external electric circuit to electrically connect the line conductor and the wiring conductor. Are arranged on the same plane, so that signal wiring for high-frequency signal transmission can be connected without bending or forming a step in the middle. , Etc., can be reduced, so that it has excellent high frequency characteristics. In the contact portion between the line conductor on the upper surface of the dielectric substrate and the input / output line conductor on the lower surface of the dielectric frame, the line width of the line conductor is reduced from near the mounting portion toward the contact portion.
Since the line width of the input / output line conductor is narrower than the line width of the line conductor at the abutting portion, and the dielectric frame is widened toward a portion protruding from the dielectric substrate, the line conductor and the input / output line conductor Can be connected while matching the characteristic impedance at the contact portion, and even if a slight displacement occurs in the contact portion due to a variation in the manufacturing process, a sharp step-like shape can be obtained. Since the line width hardly changes and transmission loss such as reflection loss of a high-frequency signal hardly occurs, a high-frequency semiconductor element housing package having excellent high-frequency characteristics is obtained. Hereinafter, the present invention will be described with reference to the drawings. FIG. 1 shows an example of an embodiment of a package for storing a high-frequency semiconductor element according to the present invention.
FIG. 2 is an exploded perspective view, and FIG. 2B is a perspective view of the dielectric frame viewed from the lower surface side. In FIG. 1, 11 is a dielectric substrate, 12 is a dielectric frame, and 13 is a high-frequency semiconductor element. Dielectric substrate 11
Is a mounting part for mounting the high-frequency semiconductor element 13 on the upper surface
A line conductor 14 for high-frequency signal transmission and a grounding wiring conductor 15 are provided from the vicinity of the mounting portion 11a to the outer periphery. The dielectric frame 12 has a dielectric substrate 11
Is a frame-shaped member having a through hole formed so as to surround the mounting portion 11a.
A portion 12 protruding from the outer periphery of the dielectric substrate 11 in the extension direction of 14
a, and is attached to the upper surface of the dielectric substrate 11 so as to sandwich a part of the line conductor 14 and a part of the grounding wiring conductor 15 between the dielectric substrate 11 and the dielectric substrate 11. In the package for storing a high-frequency semiconductor element having such a configuration, the high-frequency semiconductor element 13 is, for example, a high-frequency FET or HEMT which is an individual semiconductor element.
Alternatively, there is a type in which a high-frequency integrated circuit or MMIC is mounted and accommodated. FIG. 1 shows an example in which the present invention is applied to a low-noise package in which a HEMT is mounted as the high-frequency semiconductor element 13. Here, on the lower surface of the dielectric frame 12, an input / output line conductor 16 is formed from a projecting portion 12a to a portion of the upper surface of the dielectric substrate 11 facing the line conductor 14.
The input / output line conductor 16 is formed by mounting the dielectric frame 12 on the dielectric substrate 11 so that the line conductor 14 and its opposing parts are in contact with each other and are electrically connected to each other.
The line conductor 14 is electrically connected to an external electric circuit by directly mounting the portion located at position a at the surface of an external electric circuit board (not shown) and abutting the wiring conductor. The line conductor 14 and the input / output line conductor 16
That is, the line width of the line conductor 14 is narrowed from the vicinity of the mounting portion 11a toward the contact portion 14a with the input / output line conductor 16, while the input / output line conductor 16 is in contact with the line conductor 14. The contact portion 16a is formed to be narrower than the line width of the line conductor 14 and widen toward the projecting portion 12a. By setting the line widths of the line conductor 14 and the input / output line conductor 16 in a predetermined relationship as described above, the contact portions 14a and 14a sandwiched between the dielectric substrate 11 and the dielectric frame 12 are formed.
By making the line width of the line conductor 14 and the input / output line conductor 16 in 16a narrower than the line width before and after the line conductor 16a, characteristic impedance can be matched to a high-frequency signal, and transmission loss can be reduced. Even if the line conductor 14 or the input / output line conductor 16 is misaligned at the contact portions 14a and 16a, the line width such as a step changes suddenly due to the misalignment as in the case of joining line conductors having the same line width. Since it is possible to prevent the occurrence of locations, it is possible to effectively prevent the occurrence of reflection loss of high-frequency signals, and as a result, a surface-mount type having a signal input / output unit having excellent high-frequency characteristics. This is a package for storing a high-frequency semiconductor element. Such a line conductor 14 and an input / output line conductor in the package for storing a high-frequency semiconductor element of the present invention.
The state of the contact portions 14a and 16a with the 16 will be described with reference to the plan view shown in FIG. FIGS. 2A to 2C show the line conductors 14 respectively.
FIG. 6 is a plan view of a main part showing contact portions 14a and 16a between the input and output line conductors 16; In each case, the dielectric substrate is from the dielectric frame 12 side
11 shows the vicinity of the contact portions 14a and 16a of the line conductor 14 and the input / output line conductor 16 when looking at the upper surface, and the left side in the figure is in the direction of the mounting portion 11a of the dielectric substrate 11, The right side corresponds to the direction of the protruding portion 12a of the dielectric frame 12. First, FIG. 2A shows a state in which the line conductor 14 and the input / output line conductor 16 are normally in contact with each other. As can be seen from this figure, the line width of the line conductor 14 is
The line width of the input / output line conductor 16 is smaller than the line width of the line conductor 14 at the contact portion 16a with the line conductor 14 from the vicinity of 11a toward the contact portion 14a with the input / output line conductor 16. It is formed to be narrower and wider toward the projecting portion 12a, and in this example, the line width of each line conductor 14, 16 is changed to a tapered shape toward the contact portion 14a, 16a so as to be narrower. . By bringing the line conductors 14 and 16 into contact with each other, it is possible to prevent a sudden change in the line width at the connection portion and prevent the occurrence of reflection loss of a high-frequency signal,
By appropriately adjusting the setting of the change in the line width according to the specification, it is possible to match the characteristic impedance in the connection between the line conductor 14 and the input / output line conductor 16 and to obtain a signal input / output unit having excellent high-frequency characteristics. Can be configured. Next, FIG. 2B shows a state where the input / output line conductor 16 is displaced upward in the figure in the line width direction with respect to the line conductor 14. FIG. 2C shows a line conductor.
14 shows a state in which the input / output line conductor 16 is shifted downward in the figure in the line width direction and rightward in the figure in the line length direction. As described above, in the high-frequency semiconductor element housing package of the present invention, no abrupt change in the line width occurs at the contact portions 14a and 16a between the line conductor 14 and the input / output line conductor 16, and the high-frequency signal It can be seen that it is possible to prevent the occurrence of reflection loss and the like. In the case where the line widths of the line conductor 14 and the input / output line conductor 16 are reduced toward the contact portions 14a and 16a, respectively, the shapes and dimensions are set in accordance with the high frequency due to the displacement of the contact portions 14a and 16a. Although it is not particularly limited as long as the characteristic variation is reduced, the line conductor
The characteristic impedance of each part of 14 and the input / output line conductor 16 has a line width that is generally matched, so that even if there is a manufacturing deviation, the line width does not suddenly fluctuate, The contact portions 14a and 16a are designed by adopting a tapered shape or the like. In the example shown in FIG. 1, similarly, for the grounding wiring conductor 15, external electric power extends from a portion 12 a protruding from the lower surface of the dielectric frame 12 to a portion facing the grounding wiring conductor 15. Although the ground connection wiring conductor 17 for connection with the circuit ground wiring conductor is formed, by adopting the same configuration as the line conductor 14 for the ground wiring conductor 15 in this way, When surface-mounted on an external electric circuit, the grounding wiring conductor 15 can also be connected without bending or step, and as a result, a high-frequency semiconductor element housing package having extremely good high-frequency characteristics can be obtained. Also, in this example, the shape of the ground connection wiring conductor 17 does not change the line width unlike the input / output line conductor 16, but the ground connection is different from the width of the ground wiring conductor 15. There is no particular problem if the width of the ground connection wiring conductor 17 is set in consideration of the displacement. It goes without saying that the ground wiring conductor 15 and the ground connection wiring conductor 17 may have a configuration in which the line width is changed similarly to the line conductor 14 and the input / output line conductor 16. The high-frequency semiconductor element 13 mounted on the mounting portion 11a is electrically connected to, for example, the ground wiring conductor 15 on the back surface of the high-frequency semiconductor element housing package of the present invention having such a configuration. At the same time, the electrode on the surface and the line conductor 14 are electrically connected via a bonding wire 18 or a bonding ribbon, and if necessary, an Fe-Ni-Co or Fe-Ni42 alloy is formed on the upper surface of the dielectric frame 12. A lid made of Fe-Ni alloy, oxygen-free copper, aluminum, stainless steel, Cu-W alloy, Cu-Mo alloy, etc. is soldered, high melting point metal brazing such as AuSn brazing or AuGe brazing, seam welding, etc. And airtightly housed inside by resin sealing. Then, as shown in a perspective view in FIG. 3, for example, the dielectric substrate 11 of this high-frequency semiconductor element housing package formed in the external electric circuit 19 is dropped and the dielectric frame 12 is projected. The package is mounted on a mounting hole 20 designed so that the lower surface of the portion 12a to be brought into contact with the upper surface, the package is surface-mounted on the external electric circuit 19, and the lower surface of the projecting portion 12a of the dielectric frame 12 The input / output line conductor 16 and the ground connection wiring conductor 17 are respectively brought into contact with the high-frequency signal transmission wiring conductor 21 and the ground wiring conductor 22 of the external electric circuit 19 to be electrically connected to each other, thereby achieving high-frequency operation. The semiconductor element for use 13 and the external electric circuit 19 are electrically connected to perform input and output of a high-frequency signal, and are used as a high-frequency semiconductor device as a product. In the package for housing a high-frequency semiconductor element of the present invention, the dielectric substrate 11 and the dielectric frame 12 are made of a ceramic material such as alumina or mullite.
What is called glassacea (glass + ceramics) or resin-based materials such as Teflon (PTFE), glass epoxy, and polyimide are used. Although the same material as that of the dielectric substrate 11 may be used for the dielectric frame 12, a different material may be used to obtain desired high-frequency characteristics. For example, if the permittivity of the dielectric frame 12 is set to be smaller than the permittivity of the dielectric substrate 11, the dielectric loss of the contact portions 14a and 16a can be reduced. The line conductor 14, the input / output line conductor 16, the ground wiring conductor 15, and the ground connection wiring conductor 17 are made of a metal material for a high-frequency line conductor, for example, Cu or MoMn + Ni + A
u, W + Ni + Au, Cr + Cu, Cr + Cu + Ni +
Au, Ta 2 N + NiCr + Au, Ti + Pd + Au,
It is formed by a thick film printing method, various thin film forming methods, a plating method, or the like using NiCr + Pd + Au or the like, and its thickness and width are set according to the frequency and characteristic impedance of the transmitted high-frequency signal. EXAMPLES Specific examples of the present invention will be described below. As the dielectric material, alumina of ε = 9 was used, and the thickness of the dielectric frame 12 was set to 0.
38 mm, the thickness of the dielectric substrate 11 is 0.25 mm, the dielectric frame 12
The line width of the input / output line conductor 16 formed at
The line width of the line conductor 14 formed on the dielectric substrate 11 is 0.25 m.
m, and the contact length between the input / output line conductor 16 and the line conductor 14 was set to be about 0.4 mm. The input / output line conductor 16 is connected at the contact portion 16a.
The taper is tapered from a width of 0.4 mm, while the line conductor 14 is formed with a straight width of 0.25 mm at the abutting portion 14a, so that these are designed to abut. These line conductors were designed so that the characteristic impedance was about 50Ω. When the package for accommodating the high-frequency semiconductor device of the present invention shown in FIG. 1 was produced in such a setting and the transmission characteristics of the high-frequency signal were evaluated, the conventional high-frequency semiconductor device having a bent portion in the line conductor was evaluated. The reflection loss of the high-frequency signal can be extremely reduced as compared with the storage package, and it was confirmed that the package had excellent high-frequency characteristics. It should be noted that the present invention is not limited to the following examples, and changes and improvements can be made without departing from the scope of the present invention. For example, in the example shown in FIG.
Is formed in a quadrangular shape, and portions 12a protruding from the outer periphery of the dielectric substrate 11 are provided at the four corners, and one input / output line conductor 16 or one ground connection wiring conductor 17 is formed for each.
If necessary, the dielectric frame 12 may be formed in various other shapes to have more protruding portions 12a, or each protruding portion 12a
A plurality of input / output line conductors 16 or ground connection wiring conductors 17 may be formed. Further, a thin lead terminal may be attached to the protruding portion 12a according to a desired mounting form. According to the high frequency semiconductor element storage package of the present invention, the input / output line conductor formed on the lower surface of the dielectric frame is provided with the high frequency signal arranged on the upper surface of the dielectric substrate. Since the line conductor and the wiring conductor are electrically connected by contacting the transmission line conductor and the wiring conductor of the external electric circuit, the line conductor and the wiring conductor are arranged on substantially the same plane. As a result, signal wiring for high-frequency signal transmission can be connected without bending or forming a step, and transmission loss such as reflection loss can be reduced even for high-frequency signals. Therefore, a high-frequency semiconductor element housing package having excellent high-frequency characteristics can be obtained. Further, at the contact portion between the line conductor and the input / output line conductor, the line width of the line conductor is reduced from the vicinity of the mounting portion toward the contact portion, and the line width of the input / output line conductor is reduced. The width of the line conductor is narrower than the line width of the line conductor, and the width of the dielectric frame is widened toward the part protruding from the dielectric substrate. In addition, even if the contact part is slightly displaced due to variations in the manufacturing process, it is difficult to cause a sudden change in the line width such as a step-like shape, and the reflection of high-frequency signals Since a transmission loss such as a loss is unlikely to occur, a high-frequency semiconductor element housing package having excellent high-frequency characteristics is obtained. Moreover, according to the package for housing a high-frequency semiconductor element of the present invention, the wiring structure of the line conductor is simplified as compared with the conventional surface-mount type package, so that it is easy to manufacture and can be miniaturized. Therefore, a low-cost and inexpensive high-frequency semiconductor device can be realized. As described above, according to the present invention, it is possible to reduce the size of an external electric circuit by surface mounting and reduce reflection loss in transmitting a high-frequency signal, and to obtain a high-frequency signal having excellent high-frequency characteristics. A semiconductor device storage package can be provided.

【図面の簡単な説明】 【図1】(a)は本発明の高周波用半導体素子収納用パ
ッケージの実施の形態の一例を示す分解斜視図、(b)
はその誘電体枠体の下面側から見た斜視図である。 【図2】(a)〜(c)は、それぞれ本発明の高周波用
半導体素子収納用パッケージにおける線路導体と入出力
用線路導体との当接部を示す要部平面図である。 【図3】本発明の高周波用半導体素子収納用パッケージ
の外部電気回路への表面実装の例を示す斜視図である。 【図4】(a)は従来の高周波用半導体素子収納用パッ
ケージの例を示す分解斜視図、(b)はその誘電体基板
の下面側から見た斜視図である。 【符号の説明】 11・・・・・・・・誘電体基板 11a・・・・・・・搭載部 12・・・・・・・・誘電体枠体 12a・・・・・・・誘電体基板11の外周から突出する部
位 13・・・・・・・・高周波用半導体素子 14・・・・・・・・線路導体 14a・・・・・・・線路導体14の入出力用線路導体16と
の当接部 16・・・・・・・・入出力用線路導体 14a・・・・・・・入出力用線路導体16の線路導体14と
の当接部 19・・・・・・・・外部電気回路 21・・・・・・・・配線導体
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is an exploded perspective view showing an example of an embodiment of a package for housing a high-frequency semiconductor element according to the present invention, and FIG.
FIG. 3 is a perspective view of the dielectric frame viewed from the lower surface side. FIGS. 2A to 2C are plan views of main parts showing contact portions between a line conductor and an input / output line conductor in the package for housing a high-frequency semiconductor element according to the present invention; FIG. 3 is a perspective view showing an example of surface mounting of the high-frequency semiconductor element housing package of the present invention to an external electric circuit. FIG. 4A is an exploded perspective view showing an example of a conventional package for housing a high-frequency semiconductor element, and FIG. 4B is a perspective view seen from the lower surface side of the dielectric substrate. [Description of Signs] 11 ... Dielectric substrate 11a ... Mounting part 12 ... Dielectric frame 12a ... Dielectric A portion 13 protruding from the outer periphery of the substrate 11 ... High frequency semiconductor element 14 ... Line conductor 14a ... Input / output line conductor 16 of line conductor 14 Contact portion 16 with input / output line conductor 14a Contact portion 19 of input / output line conductor 16 with line conductor 14・ External electric circuit 21 ・ ・ ・ ・ ・ ・ ・ ・ Wiring conductor

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平9−82826(JP,A) 特開 平5−335436(JP,A) 特開 平6−29419(JP,A) 特開 昭64−84655(JP,A) 特開 平3−167841(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 23/04 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-9-82826 (JP, A) JP-A-5-335436 (JP, A) JP-A-6-29419 (JP, A) JP-A 64-64 84655 (JP, A) JP-A-3-167841 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 23/04

Claims (1)

(57)【特許請求の範囲】 【請求項1】 上面に高周波用半導体素子を搭載する搭
載部を有し、該搭載部近傍から外周にかけて高周波信号
伝送用の線路導体が配設された誘電体基板と、該誘電体
基板上に取着され、前記搭載部を囲繞するとともに前記
線路導体の延長方向に前記誘電体基板の外周から突出す
る部位を有する誘電体枠体と、該誘電体枠体の下面に前
記突出する部位から前記線路導体と対向する部位にかけ
て形成され、前記線路導体と外部電気回路の配線導体と
に当接されて前記線路導体を前記外部電気回路に電気的
に接続する入出力用線路導体とを具備して成り、前記線
路導体の線路幅を前記搭載部近傍から前記入出力用線路
導体との当接部に向けて狭くし、前記入出力用線路導体
の線路幅を前記線路導体との当接部において前記線路導
体の線路幅より狭くするとともに前記突出する部位に向
けて広くしたことを特徴とする高周波用半導体素子収納
用パッケージ。
(1) A dielectric having a mounting portion for mounting a high-frequency semiconductor element on an upper surface thereof, and a line conductor for transmitting a high-frequency signal disposed from the vicinity of the mounting portion to the outer periphery. A substrate, a dielectric frame attached to the dielectric substrate, surrounding the mounting portion, and having a portion protruding from an outer periphery of the dielectric substrate in an extending direction of the line conductor; and a dielectric frame. An input is formed on the lower surface of the device from the projecting portion to a portion facing the line conductor, and is in contact with the line conductor and a wiring conductor of an external electric circuit to electrically connect the line conductor to the external electric circuit. An output line conductor, the line width of the line conductor is reduced from the vicinity of the mounting portion toward the contact portion with the input / output line conductor, and the line width of the input / output line conductor is reduced. The line at the contact portion with the line conductor High-frequency semiconductor element storage package, characterized in that wider toward the site of the protruding with narrower than the line width of the conductor.
JP11115298A 1998-04-21 1998-04-21 High frequency semiconductor element storage package Expired - Fee Related JP3462080B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11115298A JP3462080B2 (en) 1998-04-21 1998-04-21 High frequency semiconductor element storage package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11115298A JP3462080B2 (en) 1998-04-21 1998-04-21 High frequency semiconductor element storage package

Publications (2)

Publication Number Publication Date
JPH11307666A JPH11307666A (en) 1999-11-05
JP3462080B2 true JP3462080B2 (en) 2003-11-05

Family

ID=14553791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11115298A Expired - Fee Related JP3462080B2 (en) 1998-04-21 1998-04-21 High frequency semiconductor element storage package

Country Status (1)

Country Link
JP (1) JP3462080B2 (en)

Also Published As

Publication number Publication date
JPH11307666A (en) 1999-11-05

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